WO2019142438A1 - Display device and method for producing display device - Google Patents

Display device and method for producing display device Download PDF

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Publication number
WO2019142438A1
WO2019142438A1 PCT/JP2018/040326 JP2018040326W WO2019142438A1 WO 2019142438 A1 WO2019142438 A1 WO 2019142438A1 JP 2018040326 W JP2018040326 W JP 2018040326W WO 2019142438 A1 WO2019142438 A1 WO 2019142438A1
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WIPO (PCT)
Prior art keywords
insulating layer
groove
inorganic insulating
layer
display device
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PCT/JP2018/040326
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French (fr)
Japanese (ja)
Inventor
暢人 眞名垣
Original Assignee
株式会社ジャパンディスプレイ
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Application filed by 株式会社ジャパンディスプレイ filed Critical 株式会社ジャパンディスプレイ
Priority to CN201880086290.2A priority Critical patent/CN111602466B/en
Publication of WO2019142438A1 publication Critical patent/WO2019142438A1/en

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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09FDISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09FDISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B33/00Electroluminescent light sources
    • H05B33/02Details
    • H05B33/04Sealing arrangements, e.g. against humidity
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B33/00Electroluminescent light sources
    • H05B33/10Apparatus or processes specially adapted to the manufacture of electroluminescent light sources
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B33/00Electroluminescent light sources
    • H05B33/12Light sources with substantially two-dimensional radiating surfaces
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80Constructional details
    • H10K59/87Passivation; Containers; Encapsulations
    • H10K59/873Encapsulations
    • H10K59/8731Encapsulations multilayered coatings having a repetitive structure, e.g. having multiple organic-inorganic bilayers

Definitions

  • One embodiment of the present invention relates to a display device and a method of manufacturing the display device.
  • a display device using a liquid crystal display element using an electro-optical effect of liquid crystal or a display using an organic electro luminescence (organic EL: Organic Electro-Luminescence) element as a display device used for electric appliances and electronic devices The device has been developed and commercialized. Further, in recent years, a touch panel, which is a display device having a touch sensor mounted on a display element, has been rapidly spread. The touch panel has become indispensable in portable information terminals such as smartphones, and is being developed worldwide for further advancement of the information society.
  • an organic EL element When an organic EL element is used as a display element, it is known that while the image of high quality is displayed, the organic EL layer is deteriorated by moisture. When the display element is driven using the deteriorated organic EL layer, a decrease in luminance or a display failure may occur. For this reason, the sealing layer is provided so that moisture may not mix in the organic EL layer.
  • steps are provided to separate each image.
  • the level difference may be large in an area outside the display area with respect to the display area. Where the difference in level of the step is large, the film thickness of the resist formed on the sealing layer may be small in the manufacturing process of the display device.
  • a wiring layer may be provided on the sealing layer. When the film thickness of the resist becomes thin as described above, the sealing layer may be etched. As a result, the function of the sealing layer to block moisture may be reduced.
  • Patent Document 1 as a method of manufacturing a semiconductor device, by-products containing silicon, which are generated by etching a polysilicon layer by an RIE process, are deposited on the top and side surfaces of a resist mask. It is disclosed to prevent deformation.
  • An object of the present invention is to provide a highly reliable display device while protecting a sealing layer.
  • a plurality of pixels are disposed, and the first region including an organic insulating layer, a first inorganic insulating layer, and a second inorganic insulating layer is continuous with the first region. And a second region including an organic insulating layer, the first inorganic insulating layer, and the second inorganic insulating layer, wherein the second region is a first groove portion provided in the organic insulating layer. And a protective film disposed in contact with the upper surface of the second inorganic insulating layer, wherein the first inorganic insulating layer and the second inorganic insulating layer are side surfaces, an upper end portion, and a bottom surface of the first groove portion.
  • the display device may have a ratio of the height of the first groove to the width of the bottom of the first groove being 1 or less.
  • an organic insulating layer is formed to have a first groove outside the display area, and a top surface of the organic insulating layer and a side surface, an upper end, and a bottom surface of the first groove are covered.
  • FIG. 1 is a top view showing a display device according to an embodiment of the present invention. It is a sectional view showing a display concerning one embodiment of the present invention. It is sectional drawing which shows the peripheral part which concerns on one Embodiment of this invention. It is sectional drawing explaining the manufacturing method of the display apparatus which concerns on one Embodiment of this invention. It is sectional drawing explaining the manufacturing method of the display apparatus which concerns on one Embodiment of this invention. It is sectional drawing explaining the manufacturing method of the display apparatus which concerns on one Embodiment of this invention. It is sectional drawing explaining the manufacturing method of the display apparatus which concerns on one Embodiment of this invention. It is sectional drawing explaining the manufacturing method of the display apparatus which concerns on one Embodiment of this invention. It is sectional drawing explaining the manufacturing method of the display apparatus which concerns on one Embodiment of this invention. It is sectional drawing explaining the manufacturing method of the display apparatus which concerns on one Embodiment of this invention.
  • FIG. 1 shows a display device 10 according to an embodiment of the present invention.
  • FIG. 1 shows a top view of the display device 10.
  • the display device 10 includes a display area 103, a peripheral portion 104, a driver circuit 105, a driver circuit 106, a driver circuit 107, a flexible printed substrate 108, and a touch sensor 109 which are provided on a substrate 100.
  • the drive circuit 105 has a function as a gate driver.
  • the drive circuit 106 has a function as a source driver.
  • the drive circuit 107 has a function of controlling the touch sensor.
  • a plurality of the pixels 101 are arranged in a grid shape with a space.
  • the pixel 101 functions as a component of an image.
  • the scan line 145 c is connected to the drive circuit 105.
  • the signal line 147 b is connected to the drive circuit 106.
  • the pixel 101 is connected to the scan line 145 c and the signal line 147 b.
  • the touch sensor includes a first sensor electrode 171 and a second sensor electrode 173. The first sensor electrode 171 and the second sensor electrode 173 are connected to the drive circuit 107.
  • a video signal is input to the drive circuit 106 through the flexible printed circuit board 108.
  • the driver circuit 105 and the driver circuit 106 drive the display element 130 in the pixel 101 through the scan line 145 c and the signal line 147 b.
  • the display area 103 may be referred to as a first area.
  • the first sensor electrode 171 functions as a transmission electrode.
  • the second sensor electrode 173 functions as a receiving electrode.
  • the capacitance between the first sensor electrode 171 and the second sensor electrode 173 changes when a person brings his finger close to the touch sensor 109.
  • the touch sensor 109 detects position information using this change in capacitance.
  • FIG. 2 shows a pixel 101 (between A1 and A2), a peripheral portion 104 (between B1 and B2) located around the display region 103 and not provided with the pixel 101, and a terminal portion including a conductive layer 148. It is a sectional view (between C1-C2).
  • a glass substrate or an organic resin substrate is used.
  • the organic resin substrate for example, a polyimide substrate is used.
  • the organic resin substrate can have a plate thickness of several micrometers to several tens of micrometers, which makes it possible to realize a flexible sheet display.
  • the substrate 100 and the substrate 200 are required to have transparency in order to extract light emitted from the display element 130 described later.
  • the substrate on the side from which the light emitted from the display element 130 is not extracted does not have to be transparent, and therefore, in addition to the above-described materials, a substrate in which an insulating layer is formed on the surface of a metal substrate may be used.
  • a cover glass, a protective film, or the like may be provided on the second surface of the substrate 100 and the substrate 200 (the surface on the outer side of the substrate when the cross section is viewed). This can prevent the display device from being scratched or the like.
  • the substrate 200 has a role of protecting the display element 130, but is not necessary as long as the sealing layer 161 can sufficiently protect the display element 130.
  • the insulating layer 141 is provided over the substrate 100 and has a function as a base film. Thus, diffusion of impurities, typically, alkali metals, water, hydrogen, and the like from the substrate 100 to the semiconductor layer 142 can be suppressed.
  • the transistor 110 includes the semiconductor layer 142, the gate insulating layer 143, the gate electrode 145a, the source electrode 147a, and the drain electrode 147c.
  • the transistor 110 has a top gate top contact structure, but is not limited to this, and may have a bottom gate structure or a bottom contact structure.
  • the semiconductor layer 142 is provided over the insulating layer 141 in the pixel 101 (between A1 and A2).
  • silicon, an oxide semiconductor, an organic semiconductor, or the like is used for the semiconductor layer 142.
  • the gate insulating layer 143 is provided over the insulating layer 141 and the semiconductor layer 142.
  • silicon oxide, silicon oxynitride, silicon nitride, or another inorganic material with high dielectric constant is used.
  • the gate electrode 145 a is provided on the gate insulating layer 143.
  • the gate electrode 145a is appropriately connected to the scan line 145c.
  • the gate electrode 145 a and the capacitor electrode 145 b are similarly provided over the gate insulating layer 143.
  • the gate electrode 145a and the capacitor electrode 145b are both formed of a conductive material selected from tantalum, tungsten, titanium, molybdenum, aluminum or the like.
  • the gate electrode 145a and the capacitor electrode 145b may have a single layer structure of the above-described conductive material, or may have a stacked structure.
  • the insulating layer 149 is formed using the same material as the gate insulating layer 143, and is provided over the gate insulating layer 143, the gate electrode 145a, and the capacitor electrode 145b. Note that the insulating layer 149 may have a single layer or a stacked structure of the above materials.
  • the source electrode 147 a and the drain electrode 147 c are provided over the insulating layer 149.
  • the source electrode 147a and the drain electrode 147c are appropriately connected to the signal line 147b.
  • the same materials as those described as the example of the material of the gate electrode 145a are used.
  • the same material as the gate electrode 145a may be used, or a different material may be used.
  • the source or drain region of the semiconductor layer 142 and the capacitor electrode 145b are used with the gate insulating layer 143 as a dielectric.
  • the planarization layer 150 has a function of planarizing a step difference formed by the transistor 110 or the like, and is provided over the insulating layer 149, the source electrode 147a, and the drain electrode 147c.
  • the planarization layer 150 includes an organic resin.
  • acrylic resin is used for the planarization layer 150.
  • the flattening layer 150 is not limited to an acrylic resin, and an epoxy resin, a polyimide resin, a polyamide resin, a polystyrene resin, a polyethylene resin, a polyethylene terephthalate resin, or the like may be used.
  • a stack of an organic resin and an inorganic material may be used for the planarization layer 150.
  • the conductive layer 153 and the pixel electrode 155 are used with the insulating layer 154 as a dielectric.
  • the conductive layer 153 is provided on the planarization layer 150.
  • the conductive layer 153 may use the same material as the gate electrode 145 a or a different material.
  • the insulating layer 154 is provided on the planarization layer 150 and the conductive layer 153.
  • a material of the insulating layer 154 an inorganic material such as silicon nitride is used. Note that for the material of the insulating layer 154, the same material as the gate insulating layer 143 may be used.
  • the pixel electrode 155 has a function as an anode of the display element 130. Furthermore, the pixel electrode 155 preferably has a property of reflecting light.
  • the former is preferably an oxide conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO), and the latter is preferably a conductive material having high surface reflectivity such as aluminum or silver.
  • the structure of the pixel electrode 155 can be formed by stacking the above-mentioned materials, specifically, indium tin oxide (ITO) or indium zinc oxide on a conductive layer having high surface reflectivity such as aluminum or silver. A structure in which an oxide conductive layer such as (IZO) is laminated is adopted.
  • the display element 130 the pixel electrode 155, the organic EL layer 159, and the counter electrode 160 are used. That is, it can be said that the display element 130 is an organic EL element.
  • the display element 130 has a so-called top emission type structure that emits the light emitted from the organic EL layer 159 to the counter electrode 160 side.
  • the display element 130 is not limited to the top emission type, and may have a bottom emission type.
  • the organic EL layer 159 is provided on the pixel electrode 155.
  • the organic EL layer 159 has a light emitting material such as an organic electroluminescent material.
  • the counter electrode 160 has a function as a cathode of the display element 130.
  • the counter electrode 160 is provided so as to continuously cover the pixel electrode 155 across the plurality of pixel electrodes 155.
  • a light transmitting material having conductivity is used, and for example, magnesium silver (MgAg) alloy having a thickness of 10 nm or less is used.
  • the opposite electrode 160 is required to be light transmissive, the opposite electrode 160 is also required to be reflective for forming a microcavity with the reflective surface of the pixel electrode 155.
  • the counter electrode 160 is formed as a semipermeable membrane. Specifically, a layer formed of silver, magnesium, or an alloy thereof is formed to have a thickness enough to transmit light.
  • the rib 157 covers the peripheral portion of the pixel electrode 155 which is a part of the display element 130 in order to separate the pixels 101 in the display area 103.
  • the rib 157 contains an organic insulating material (organic resin material), and can also be referred to as an organic insulating layer.
  • organic resin material organic resin material
  • a polyimide resin is used for the rib 157.
  • an organic resin material containing a black pigment may be used for the ribs 157 in order to increase the contrast ratio of the display image.
  • the rib 157 is formed on the substrate 100, the insulating layer 141, the gate insulating layer 143, the insulating layer 149, the planarizing layer 150, and the insulating layer 154 in the peripheral portion 104 (between B1 and B2). Provided.
  • the sealing layer 161 has a function of preventing moisture from entering the display element 130 from the outside of the display device 10.
  • a first inorganic insulating layer 162 In the display region 103 including the pixel 101 (between A1 and A2), in the sealing layer 161, a first inorganic insulating layer 162, an organic insulating layer 164, and a second inorganic insulating layer 166 are stacked in this order.
  • the peripheral portion 104 between B1 and B2
  • the first inorganic insulating layer 162 is in contact with the insulating layer 154 containing an inorganic material.
  • the insulating layer 154, the first inorganic insulating layer 162, and the second inorganic insulating layer 166 are stacked to form a moisture blocking structure 167. Details of the first inorganic insulating layer 162 and the second inorganic insulating layer 166 will be described later.
  • the organic insulating layer 164 covers the foreign matter mixed in at the time of manufacturing the first inorganic insulating layer 162 so that the second inorganic insulating layer 166 can be stacked flat on the organic insulating layer 164.
  • the second inorganic insulating layer 166 can favorably cover the organic insulating layer 164.
  • the film thickness of the organic insulating layer 164 is not limited, it is preferably 5 ⁇ m or more and 20 ⁇ m or less.
  • the same material as the planarization layer 150 may be used.
  • the touch sensor 109 includes a first sensor electrode 171, an insulating layer 172 and a second sensor electrode 173.
  • a light transmitting material may be used.
  • ITO indium tin oxide
  • TAT Ti / Al / Ti
  • Ti Ti / Al / Ti
  • an inorganic material for the adhesive layer 195, an inorganic material, an organic material, or a composite material of an organic material and an inorganic material is used.
  • an acrylic resin is used for the adhesive layer 195.
  • the conductive layer 148 is stacked on the insulating layer 149, and the conductive layer 148 is connected to the flexible printed substrate 108 through the anisotropic conductive film 181.
  • the conductive layer 148 may be formed of the same material as the source electrode 147a and the drain electrode 147c.
  • peripheral portion 104 Outside the display area 103, there is a peripheral portion 104 which is an area in which the pixel 101 is not disposed. Details of the peripheral portion 104 (between B1 and B2 in FIG. 1) will be described with reference to FIG.
  • FIG. 3 is a cross-sectional view of the peripheral portion 104.
  • the peripheral portion 104 may be referred to as a second region.
  • the rib 157, the first inorganic insulating layer 162, and the second inorganic insulating layer 166 are also disposed in the display region 103, and are continuous from the display region 103 to the peripheral edge portion 104.
  • the rib 157 has a first groove portion 158-1 at the peripheral portion 104.
  • the upper end 158-1B, the side surface 158-1C, the lower end 158-1D, and the bottom surface 158-1F of the first groove 158-1 are provided.
  • the ratio of the height 158-1H of the first groove portion 158-1 to the width 158-1W of the bottom surface 158-1F of the first groove portion 158-1 (hereinafter referred to as "aspect ratio"). ) Shall be 1 or less. For example, when the aspect ratio is 1, if the width 158-1W of the bottom surface 158-1F of the first groove portion 158-1 is 10 ⁇ m, the height 158-1H of the first groove portion 158-1 is 10 ⁇ m. When the width 158-1W of the bottom surface 158-1F of the first groove portion 158-1 is 10 ⁇ m when the aspect ratio is 0.5, the height 158-1H of the first groove portion 158-1 is 5 ⁇ m. .
  • the rib 157 can further have a second groove portion 158-2.
  • the upper end portion 158-2B, the side surface 158-2C, the lower end portion 158-2D, and the bottom surface 158-2F of the second groove portion 158-2 are provided in the peripheral portion 104.
  • the width of the bottom surface 158-2F of the second groove portion 158-2 may be equal to or different from the width 158-1W of the bottom surface 158-1F of the first groove portion 158-1.
  • the height of the second groove 158-2 may be equal to or different from the height 158-1H of the first groove 158-1.
  • the rib 157 further includes the second groove 158-2, the first groove 158- with respect to the distance 158L between the upper end 158-1B of the first groove 158-1 and the upper end 158-2B of the second groove 158-2 If the ratio of the width 158-1W of the bottom surface 158-1F of 1 is 2 or less, when forming the protective film 165 by dry etching as described later, the upper end portion 158-1B of the first groove portion 158-1 and the first The protective film 165 is easily formed at a position overlapping the upper surface A of the rib 157 located between the upper end portion 158-2B of the two groove portion 158-2, and the width of the process design is wide.
  • the width 158-1W of the bottom surface 158-1F of the first groove 158-1 with respect to the distance 158L between the upper end 158-1B of the first groove 158-1 and the upper end 158-2B of the second groove 158-2 is If the ratio of the width 158-1W of the bottom surface 158-1F of the first groove portion 158-1 to the distance 158L is 2, that is, if the distance 158L is 10 ⁇ m, the first The width 158-1W of the bottom surface 158-1F of the groove portion 158-1 is 20 ⁇ m.
  • the distance 158L between the upper end portion 158-1B of the first groove portion 158-1 and the upper end portion 158-2B of the second groove portion 158-2 may be 10 ⁇ m or less. As described later, when the distance 158L between the upper end portion 158-1B of the first groove portion 158-1 and the upper end portion 158-2B of the second groove portion 158-2 is 10 ⁇ m or less, the upper surface 157A of the rib 157 The protective film 165 is likely to be formed on the portion located between the upper end portion 158-1B of the first groove portion 158-1 and the upper end portion 158-2B of the second groove portion 158-2.
  • the width 158-1W of the bottom surface 158-1F of the first groove portion 158-1 is preferably 5 ⁇ m or more and 30 ⁇ m or less. If the width 158-1W of the bottom surface 158-1F of the first groove portion 158-1 is larger than 30 ⁇ m, the efficiency with which the protective film 165 is formed on the upper surface 157A of the rib 157 is reduced.
  • the width 158-1W of the bottom surface 158-1F of the first groove portion 158-1 is larger than 30 ⁇ m, the side surface 158-1C and the bottom surface 158-1F of the first groove portion 158-1 in the second inorganic insulating layer 166
  • the component formed by dry etching of the portion arranged to cover the lower surface of the rib 157 is less efficient in depositing on the upper surface 157A of the rib 157.
  • the first inorganic insulating layer 162 is disposed to cover the upper surface 157A of the rib 157 and the side surface 158-1C, the upper end portion 158-1B and the bottom surface 158-1F of the first groove portion 158-1.
  • the first inorganic insulating layer 162 is disposed so as to cover the side surface 158-2C, the upper end portion 158-2B, and the bottom surface 158-2F of the second groove portion 158-2. May be
  • the second inorganic insulating layer 166 is provided on the first inorganic insulating layer 162.
  • the first inorganic insulating layer 162 is in contact with the insulating layer 154 at the bottom surface 158-1F of the first groove portion 158-1 and the bottom surface 158-2F of the second groove portion 158-2, and the insulating layer 154 and the first inorganic insulating layer
  • a moisture blocking structure 167 which is a stacked structure of the layer 162 and the second inorganic insulating layer 166, is formed.
  • an inorganic insulating material such as silicon nitride, silicon oxide, silicon oxynitride, or silicon nitride oxide is used.
  • a silicon nitride film is used for the first inorganic insulating layer 162 and the second inorganic insulating layer 166.
  • the silicon nitride film is dense and suitable for blocking moisture.
  • the film thickness of the first inorganic insulating layer 162 is not limited, it is preferably 50 nm or more and 2 ⁇ m or less.
  • the protective film 165 is provided in contact with the upper surface 166 A of the second inorganic insulating layer 166.
  • the protective film 165 overlaps at least a part of the upper surface 157A of the rib 157 at the peripheral edge portion 104 (between B1 and B2), the upper end portion 158-1B of the first groove portion 158-1 and the side surface 158-1C.
  • the protective film 165 may overlap with the entire side surface 158-1C of the first groove portion 158-1.
  • the protective film 165 contains an inorganic material such as boron nitride or fluorinated silicon oxide (SiOF x ). In this example, the protective film 165 contains boron nitride as a main component.
  • the protective film 165 is preferably a film harder than the resist 168, and since boron nitride forms a hard film, the protective film 165 preferably contains boron nitride as a main component.
  • the protective film 165 is formed by dry etching as described later. More specifically, the protective film 165 is formed to include a component included in the second inorganic insulating layer 166 or a component included in the etching gas of the second inorganic insulating layer 166.
  • the protective film 165 has a second aspect when the aspect ratio, which is the ratio of the height 158-1H of the first groove 158-1 to the width 158-1W of the bottom surface 158-1F of the first groove 158-1, is 1 or less.
  • the insulating layer 166 can be formed by dry etching.
  • the film thickness of the protective film 165 is not limited, it can be 100 nm or less.
  • a glass substrate or an organic resin substrate is used for the substrate 100.
  • an organic resin substrate for example, a polyimide substrate is used.
  • the insulating layer 141 is formed using a material such as silicon oxide, silicon oxynitride, or silicon nitride.
  • the insulating layer 141 may be a single layer or a stacked layer.
  • the insulating layer 141 is formed by a CVD method, a spin coating method, a printing method, or the like.
  • the semiconductor layer 142 When a silicon material is used as the semiconductor layer 142, for example, amorphous silicon, polycrystalline silicon, or the like is used.
  • a metal material such as indium, gallium, zinc, titanium, aluminum, tin, or cerium is used.
  • an oxide semiconductor (IGZO) containing indium, gallium, and zinc can be used.
  • the semiconductor layer 142 is formed by a sputtering method, an evaporation method, a plating method, a CVD method, or the like.
  • an insulating film containing one or more of silicon oxide, silicon oxynitride, silicon nitride, silicon oxynitride, aluminum oxide, magnesium oxide, hafnium oxide, and the like is used. It can be formed by the same method as the insulating layer 141.
  • the gate electrode 145a is a metal element selected from tungsten, aluminum, chromium, copper, titanium, tantalum, molybdenum, nickel, iron, cobalt, tungsten, indium, zinc, or an alloy containing the above metal element, or the above metal It is formed using a material such as an alloy in which elements are combined.
  • a material in which nitrogen, oxygen, hydrogen, or the like is contained in the above material may be used.
  • a stacked film of an aluminum (Al) layer and a titanium layer (Ti) formed by a sputtering method is used as the gate electrode 145a.
  • the insulating layer 149 is formed over the gate insulating layer 143, the gate electrode 145a, and the capacitor electrode 145b.
  • the same material and method as the gate insulating layer 143 are used.
  • the insulating layer 149 a silicon oxide film formed by plasma CVD is used.
  • the source electrode 147 a and the drain electrode 147 c are formed over the insulating layer 149.
  • materials and methods similar to those of the gate electrode 145a can be used.
  • the source electrode 147 a and the drain electrode 147 c are formed after forming an opening in the insulating layer 149, and are connected to the source / drain region of the semiconductor layer 142.
  • the conductive layer 148 is formed simultaneously with the source electrode 147a and the drain electrode 147c.
  • the planarization layer 150 is formed over the insulating layer 149, the source electrode 147a, and the drain electrode 147c.
  • the planarization layer 150 is made of an organic insulating material such as an acrylic resin, an epoxy resin, or a polyimide.
  • the planarization layer 150 can be formed by a spin coating method, a printing method, an inkjet method, or the like.
  • an acrylic resin formed by spin coating can be used as the planarization layer 150.
  • the planarization layer 150 is formed to such an extent that the upper surface is flat. Note that in the planarization layer 150, an opening 150A for electrically connecting the transistor 110 and the pixel electrode 155 is formed in part of the pixel 101 (between A1 and A2). Further, the shape of the planarizing layer 150 at the peripheral portion 104 (between B1 and B2) is processed into a predetermined shape. In addition, the planarization layer 150 in the terminal portion (between C1 and C2) is removed.
  • the capacitor 121 formed of the conductive layer 153, the insulating layer 154, and the pixel electrode 155) and the display 130 (pixel electrode 155, the organic EL layer 159, and the opposite electrode 160) are formed over the planarization layer 150. And the organic insulating layer 157b.
  • Each layer is appropriately processed into a predetermined shape by using a photolithography method, a nanoimprinting method, an inkjet method, an etching method, or the like.
  • the conductive layer 153 is formed on the planarization layer 150.
  • the conductive layer 153 can be formed by the same material and method as the gate electrode 145a.
  • a stacked film of molybdenum, aluminum, and molybdenum formed by a sputtering method is used as the conductive layer 153.
  • the insulating layer 154 is formed over the conductive layer 153 and the planarization layer 150.
  • the insulating layer 154 is formed by the same material and method as the gate insulating layer 143.
  • a silicon nitride film formed by plasma CVD is used as the insulating layer 154. Note that the insulating layer 154 is removed from the terminal portion (between C1 and C2), but may not be processed in the other portions.
  • the pixel electrode 155 is formed over the insulating layer 154 in the pixel 101 (between A1 and A2).
  • the pixel electrode 155 may use a light reflective metal material such as aluminum (Al), silver (Ag), or the like, or indium tin oxide (ITO) or indium zinc oxide (IZO) excellent in hole injection property.
  • a light reflective metal layer may be laminated.
  • the pixel electrode 155 is formed by the same method as the gate electrode 145a.
  • a laminated film of ITO, silver, and ITO formed by a sputtering method is used as the pixel electrode 155.
  • the organic insulating layer 157 b is formed over the insulating layer 154 and the pixel electrode 155.
  • a polyimide film formed by spin coating is used as the organic insulating layer 157b.
  • an opening 157G is formed in the organic insulating layer 157b so as to expose the top surface of the pixel electrode 155.
  • a first groove portion 158-1 is formed in the organic insulating layer 157b in order to form the above-described moisture blocking structure.
  • the ratio of the height 158-1H of the first groove 158-1 to the width 158-1W of the bottom surface 158-1F of the first groove 158-1 is 1 or less.
  • the first groove 158-1 may be formed such that the width 158-1W of the bottom surface 158-1F of the first groove 158-1 is 5 ⁇ m to 30 ⁇ m.
  • the organic insulating layer 157b in which the opening 157G and the first groove 158-1 are formed is referred to as a rib 157.
  • a second groove portion 158-2 is formed in the organic insulating layer 157b.
  • the ratio of the width 158-1W of the bottom surface 158-1F of the first groove 158-1 to the distance 158L between the upper end 158-1B of the first groove 158-1 and the upper end 158-2B of the second groove 158-2 is The first groove portion 158-1 and the second groove portion 158-2 may be formed to have two or less.
  • the first groove 158-1 and the second groove 158 are formed such that the distance 158L between the upper end 158-1B of the first groove 158-1 and the upper end 158-2B of the second groove 158-2 is 10 ⁇ m or less. -2 may be formed. Note that the organic insulating layer 157b in the terminal portion (between C1 and C2) is removed.
  • the organic EL layer 159 is formed on the pixel electrode 155 and the rib 157.
  • the organic EL layer 159 is formed using a low molecular weight or high molecular weight organic material.
  • the organic EL layer 159 is added to a light emitting layer containing a light emitting organic material, and a hole injecting layer or an electron injecting layer sandwiching the light emitting layer, and a hole transporting layer or an electron It may be configured to include a transport layer or the like.
  • the organic EL layer 159 is formed to overlap at least the pixel electrode 155.
  • the organic EL layer 159 is formed by a vacuum evaporation method, a printing method, a spin coating method, or the like. In the case of forming the organic EL layer 159 by a vacuum evaporation method, it may be formed using a shadow mask as appropriate while providing a region not to be formed.
  • the organic EL layer 159 may be formed using a material different from that of the adjacent pixel, or the same organic EL layer 159 may be used in all the pixels.
  • the counter electrode 160 is formed on the pixel electrode 155 and the organic EL layer 159 in the pixel 101 (between A1 and A2).
  • a transparent conductive film such as indium tin oxide (ITO) or indium zinc oxide (IZO) or an alloy of silver (Ag) and magnesium can be used.
  • the counter electrode 160 can be formed by a vacuum evaporation method or a sputtering method.
  • an alloy film of silver (Ag) and magnesium formed by a deposition method is used as the counter electrode 160.
  • the counter electrode 160 may be formed without processing.
  • the counter electrode 160 may be formed also on the peripheral portion 104 (between B1 and B2), but is removed from the terminal portion (between C1 and C2).
  • the first inorganic insulating layer 162 In the pixel 101 (between A1 and A2), the first inorganic insulating layer 162, the organic insulating layer 164, and the second inorganic insulating layer 166 to be the sealing layer 161 are formed on the counter electrode 160. Form in order.
  • the first inorganic insulating layer 162 In the peripheral portion 104 (between B1 and B2), the first inorganic insulating layer 162 has the upper surface 157A of the rib 157 and the side surface 158-1C, the upper end portion 158-1B and the bottom surface 158-1F of the first groove portion 158-1.
  • the organic insulating layer 164 formed in the peripheral portion 104 is removed. That is, the second inorganic insulating layer 166 is formed on the first inorganic insulating layer 162 at the peripheral portion 104 (between B1 and B2).
  • the sealing layer 161 is formed to cover the entire surface of the display area 103. Also in the terminal portion (between C1 and C2), the first inorganic insulating layer 162 and the second inorganic insulating layer 166 are formed on the conductive layer 148 and the insulating layer 149.
  • the organic insulating layer 164 a material such as acrylic, polyimide, or epoxy can be used.
  • the organic insulating layer 164 may be formed by an inkjet method, a spin coating method, an evaporation method, a spray method, a printing method, or the like.
  • the thickness of the organic insulating layer 164 is not limited, but may be, for example, 5 ⁇ m or more and 20 ⁇ m or less.
  • an inorganic insulating material such as silicon nitride, silicon oxide, silicon oxynitride, or silicon nitride oxide is used.
  • the first inorganic insulating layer 162 and the second inorganic insulating layer 166 are formed by the upper surface 157A of the rib 157 and the side surface 158-1C of the first groove portion 158-1, the upper end portion 158-1B and the bottom surface 158-1F, and the second groove portion 158-2
  • a film forming method with high coverage that is, a long mean free path of film forming particles
  • a silicon nitride film formed by a plasma CVD method is used as the first inorganic insulating layer 162 and the second inorganic insulating layer 166.
  • the film thickness of the first inorganic insulating layer 162 and the second inorganic insulating layer 166 is not limited, but can be 50 nm or more and 2 ⁇ m or less.
  • the film forming method is not limited to the plasma CVD method, and molecular beam epitaxy (MBE) may be used as a method having a long mean free path of film forming particles.
  • a protective film 165 is formed on the second inorganic insulating layer 166.
  • the protective film 165 may be formed to include an inorganic material.
  • the protective film 165 is formed to overlap at least a part of the upper surface 157A of the rib 157 at the peripheral edge portion 104 (between B1 and B2), the upper end portion 158-1B of the first groove portion 158-1 and the side surface 158-1C. .
  • the protective film 165 may be formed to overlap the entire side surface 158-1C of the first groove portion 158-1.
  • the protective film 165 may be formed to have a film thickness of 100 nm or less.
  • the protective film 165 is formed by dry etching the second inorganic insulating layer 166.
  • the main component is dry etching on the second inorganic insulating layer 166 using a mixed gas of boron trichloride (BCl 3 ) and nitrogen as an etching gas.
  • a protective film 165 which is boron nitride is formed. Note that in the case where dry etching is performed on the second inorganic insulating layer 166 which is silicon nitride using a mixed gas of boron trichloride and nitrogen as an etching gas, dry etching of only several hundred nm is performed to form the protective film 165. It is enough to do.
  • the second inorganic insulating layer 166 is silicon nitride
  • a mixed gas of tetrafluoromethane (CF 4 ) and trifluoromethane (CHF 3 ) or a mixed gas of tetrafluoromethane and hydrogen is used as an etching gas.
  • CF 4 tetrafluoromethane
  • CHF 3 trifluoromethane
  • a mixed gas of tetrafluoromethane and hydrogen is used as an etching gas.
  • a protective film 165 whose main component is a fluorine-added silicon oxide is formed.
  • the protective film 165 may contain an organic substance.
  • the rate at which etching progresses is faster than the rate at which the protective film 165 is formed on the bottom surface 158-1F of the first groove portion 158-1, so the bottom surface 158-1F.
  • the protective film 165 is not formed on the substrate.
  • the composition ratio of the etching gas is not limited to this, and N 2 may be contained in a ratio of 5% to 20%.
  • the etching pressure is not limited to this, and, for example, any numerical value of 10 Pa or less may be adopted.
  • the etching power is not limited to this, and, for example, an arbitrary output of 200 W or more may be used.
  • the distance 158L between the upper end 158-1B of the first groove 158-1 and the upper end 158-2B of the second groove 158-2 is 10 ⁇ m or less
  • the protective film 165 is easily formed on the portion of the upper surface 157A of the rib 157 located between the upper end portion 158-1B of the first groove portion 158-1 and the upper end portion 158-2B of the second groove portion 158-2. .
  • first inorganic insulating layer 162 and second inorganic insulating layer 166 in terminal portion are removed by dry etching.
  • a resist 168 is formed on the pixels 101 (between A1 and A2) and the peripheral portion 104 (B1 to B2) by photolithography, for example.
  • the resist 168 is removed.
  • a method such as removal by ashing with oxygen plasma can be used.
  • the touch sensor 109 is formed.
  • the first sensor electrode 171 is formed.
  • the first sensor electrode 171 is formed by sputtering in this example.
  • the first sensor electrode 171 is not limited to the sputtering method, and may be a vapor deposition method, a printing method, a coating method, a molecular beam epitaxy method (MBE), or the like.
  • the first sensor electrode 171 is processed by photolithography and etching after film formation.
  • the same material as the gate electrode 145a is used for the first sensor electrode 171.
  • the insulating layer 172 is formed on the first sensor electrode 171 and the protective film 165.
  • the insulating layer 172 is formed by a coating method.
  • a material such as acrylic, polyimide, or epoxy is used.
  • the insulating layer 172 is formed to a thickness of several hundred nm to ten ⁇ m using a spin coating method, an evaporation method, a spray method, an inkjet method, a printing method, or the like.
  • the insulating layer 172 is processed.
  • the insulating layer 172 is processed by a photolithography method and an etching method. Note that as long as the insulating layer 172 contains a photosensitive material, only photolithography may be used.
  • the second sensor electrode 173 is formed using a light transmitting material.
  • the second sensor electrode 173 is formed by, for example, a sputtering method.
  • the second sensor electrode 173 is not limited to the sputtering method, and may be a vapor deposition method, a printing method, an inkjet method, or the like.
  • ITO indium tin oxide
  • the substrate 200 to be the opposite substrate is attached to the substrate 100 using the adhesive layer 195.
  • an epoxy resin, an acrylic resin, or the like can be used as the adhesive layer 195.
  • the flexible printed substrate 108 is electrically connected to the conductive layer 148 using the anisotropic conductive film 181.
  • the film present in the terminal portion may be removed by laser irradiation or the like.
  • the anisotropic conductive film 181 can be formed by including metal particles of silver, copper, or the like in a resin and coating the resin.
  • the display device 10 shown in FIG. 2 is manufactured by the above method.
  • FIG. 16 is a cross-sectional view of the conventional peripheral portion 204 which does not have the protective film 165.
  • the resist 168 when the resist 168 is provided in the peripheral portion 204 not having the protective film 165, a portion of the resist 168 overlapping the upper end portion 158-1B and the side surface 158-1C of the first groove portion 158-1.
  • the film thickness of 168A may be thinner than the film thickness of the resist 268 superimposed on the upper surface 157A of the rib 157.
  • the first inorganic insulating layer 162 and the second inorganic insulating layer 166 in the terminal portion between C1 and C2 are removed, the second inorganic insulating layer 166 located under the thinned resist 168 or There is a risk that the first inorganic insulating layer 162 may be removed.
  • FIG. 15 shows a case where a resist 168 is formed on the peripheral portion 104 in the step of removing the first inorganic insulating layer 162 and the second inorganic insulating layer 166 in the terminal portion (between C1 and C2) during the manufacture of the display device 10.
  • the peripheral portion 104 has a protective film 165, whereby the first inorganic insulating layer 162 and the second inorganic insulating layer 166 in the manufacturing process of the display device 10 (particularly, between the terminals (C1-C2)).
  • the step of removing the resist 168 for example, even if the film thickness of the resist 168 is reduced in the portion 168A of the resist 168 overlapping the upper end portion 158-1B and the side surface 158-1C of the first groove portion 158-1.
  • the inorganic insulating layer 162 and the second inorganic insulating layer 166 are protected. That is, when the first inorganic insulating layer 162 and the second inorganic insulating layer 166 in the terminal portion (between C1 and C2) are removed, the second inorganic insulating layer 266 located under the thinned resist 168 in the peripheral portion 104 And the removal of the first inorganic insulating layer 262 can be prevented. Therefore, the function of the sealing layer 161 is normally exhibited, and the display device 10 can block moisture. That is, the deterioration of the organic EL layer 159 due to moisture is suppressed. As a result, a highly reliable display device can be provided.
  • the function of the protective film 165 described above to protect the first inorganic insulating layer 162 and the second inorganic insulating layer 166 is sufficient when the protective film 165 is a film harder than the resist 168.
  • the protective film 165 contains boron nitride as a main component
  • the protective film 165 is a hard film, and therefore, it is preferable that the protective film 165 contain boron nitride as a hot water component.
  • the protective film 165 is a hard film when the protective film 165 contains boron nitride, the protective film 165 does not have to have a large thickness, and may be, for example, 100 nm or less.
  • the distance 158L between the upper end 158-1B of the first groove 158-1 and the upper end 158-2B of the second groove 158-2 is 10 ⁇ m or less
  • a protective film 165 is formed on a portion of the upper surface 157A of the rib 157 located between the upper end portion 158-1B of the first groove portion 158-1 and the upper end portion 158-2B of the second groove portion 158-2.
  • the first inorganic material is located on the portion of the upper surface 157A of the rib 157 which is located between the upper end portion 158-1B of the first groove portion 158-1 and the upper end portion 158-2B of the second groove portion 158-2.
  • the insulating layer 162 and the second inorganic insulating layer 166 are further protected.
  • display device 20 display device 100: substrate 101: pixel 103: display region 104: peripheral portion 105: drive circuit 106: 106 Drive circuit 107: Drive circuit 108: flexible printed circuit board 109: touch sensor 110: transistor 120: capacitive element 121: capacitive element 130: 130 Display element, 141: insulating layer, 142: semiconductor layer, 143: gate insulating layer, 145a: gate electrode, 145b: capacitance electrode, 145c: scanning line, 147a,. Source electrode, 147b: Signal line, 147c: Drain electrode, 148: Conductive layer, 149: Insulating layer, 150: Planarizing layer, 150-1: First planarizing layer Groove, 150-2 ...

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Abstract

This display device comprises: a first region in which a plurality of pixels are arranged, and which contains an organic insulating layer, a first inorganic insulating layer and a second inorganic insulating layer; and a second region that contains the organic insulating layer, the first inorganic insulating layer and the second inorganic insulating layer, which are respectively continuous from the first region. The second region additionally contains a first groove part that is provided in the organic insulating layer, and a protective film that is arranged to be in contact with the upper surface of the second inorganic insulating layer. The first inorganic insulating layer and the second inorganic insulating layer cover the lateral surface, the upper end part and the bottom surface of the first groove part. The protective film overlaps at least a part of the upper surface of the organic insulating layer contained in the second region, the upper end part of the first groove part, and at least a part of the lateral surface of the first groove part. The ratio of the height of the first groove part to the width of the bottom surface of the first groove part is 1 or less.

Description

表示装置及び表示装置の製造方法Display device and method of manufacturing display device
 本発明の一実施形態は、表示装置及び表示装置の製造方法に関する。 One embodiment of the present invention relates to a display device and a method of manufacturing the display device.
 電気器具及び電子機器に用いられる表示装置として、液晶の電気光学効果を利用した液晶表示素子を用いた表示装置または有機エレクトロルミネセンス(有機EL:Organic Electro-Luminescence)素子を表示素子として用いた表示装置が開発、商品化されている。また、表示素子上にタッチセンサを搭載させた表示装置である、タッチパネルが近年急速に普及している。タッチパネルは、スマートフォンなどの携帯情報端末において必要不可欠なものとなっており、情報化社会のさらなる進歩に向けて世界的に開発が進んでいる。 A display device using a liquid crystal display element using an electro-optical effect of liquid crystal or a display using an organic electro luminescence (organic EL: Organic Electro-Luminescence) element as a display device used for electric appliances and electronic devices The device has been developed and commercialized. Further, in recent years, a touch panel, which is a display device having a touch sensor mounted on a display element, has been rapidly spread. The touch panel has become indispensable in portable information terminals such as smartphones, and is being developed worldwide for further advancement of the information society.
 表示素子として有機EL素子を用いた場合、高画質の画像が表示される一方で、有機EL層が水分によって劣化してしまうことが知られている。劣化した有機EL層を用いて表示素子を駆動させると、輝度の低下や表示不良が起こる恐れがある。このため、有機EL層に水分が混入しないように封止層が設けられている。 When an organic EL element is used as a display element, it is known that while the image of high quality is displayed, the organic EL layer is deteriorated by moisture. When the display element is driven using the deteriorated organic EL layer, a decrease in luminance or a display failure may occur. For this reason, the sealing layer is provided so that moisture may not mix in the organic EL layer.
 また、有機EL表示装置では、各画像を区切るために段差(リブと呼ぶ場合がある)が設けられる。この段差は、表示領域よりも表示領域の外側の領域において高低差が大きくなる場合がある。段差の高低差が大きい場所では、表示装置の製造過程で封止層上に形成されるレジストの膜厚が薄くなる場合がある。また、タッチパネルを表示領域上に形成する場合、封止層の上で配線層を設ける場合がある。上記のようにレジストの膜厚が薄くなると、封止層をエッチングしてしまう場合がある。結果として、封止層が水分を遮断する機能が低下してしまうおそれがある。一方、特許文献1には、半導体装置の製造方法として、ポリシリコン層をRIEプロセスによりエッチングすることで生成された、シリコンを含む副生成物をレジストマスクの上面及び側面に堆積させ、レジストマスクの変形を防ぐことが開示されている。 Further, in the organic EL display device, steps (sometimes referred to as ribs) are provided to separate each image. The level difference may be large in an area outside the display area with respect to the display area. Where the difference in level of the step is large, the film thickness of the resist formed on the sealing layer may be small in the manufacturing process of the display device. In addition, when the touch panel is formed on the display region, a wiring layer may be provided on the sealing layer. When the film thickness of the resist becomes thin as described above, the sealing layer may be etched. As a result, the function of the sealing layer to block moisture may be reduced. On the other hand, in Patent Document 1, as a method of manufacturing a semiconductor device, by-products containing silicon, which are generated by etching a polysilicon layer by an RIE process, are deposited on the top and side surfaces of a resist mask. It is disclosed to prevent deformation.
特開2005-116753号公報Japanese Patent Application Laid-Open No. 2005-116753
 本発明は、封止層を保護しつつ、信頼性の高い表示装置を提供することを目的の一つとする。 An object of the present invention is to provide a highly reliable display device while protecting a sealing layer.
 本発明の一実施形態は、複数の画素が配置され、有機絶縁層と、第1無機絶縁層と、第2無機絶縁層と、を含む第1領域と、それぞれ前記第1領域から連続する前記有機絶縁層と、前記第1無機絶縁層と、前記第2無機絶縁層と、を含む第2領域と、を有し、前記第2領域は、前記有機絶縁層に設けられた第1溝部と、前記第2無機絶縁層の上面と接して配置される保護膜と、をさらに含み、前記第1無機絶縁層及び前記第2無機絶縁層は、前記第1溝部の側面、上端部及び底面と、を覆い、前記保護膜は、前記第2領域が含む前記有機絶縁層の上面の少なくとも一部と、前記第1溝部の上端部と、前記第1溝部の側面の少なくとも一部と重畳し、前記第1溝部の底面の幅に対する前記第1溝部の高さの比が1以下である表示装置である。 In one embodiment of the present invention, a plurality of pixels are disposed, and the first region including an organic insulating layer, a first inorganic insulating layer, and a second inorganic insulating layer is continuous with the first region. And a second region including an organic insulating layer, the first inorganic insulating layer, and the second inorganic insulating layer, wherein the second region is a first groove portion provided in the organic insulating layer. And a protective film disposed in contact with the upper surface of the second inorganic insulating layer, wherein the first inorganic insulating layer and the second inorganic insulating layer are side surfaces, an upper end portion, and a bottom surface of the first groove portion. And the protective film overlaps at least a portion of the upper surface of the organic insulating layer included in the second region, the upper end of the first groove, and at least a portion of the side surface of the first groove, The display device may have a ratio of the height of the first groove to the width of the bottom of the first groove being 1 or less.
 本発明の一実施形態は、表示領域の外側に第1溝部を有するように有機絶縁層を形成し、前記有機絶縁層の上面並びに前記第1溝部の側面、上端部及び底面を覆うように第1無機絶縁層を形成し、前記第1無機絶縁層上に第2無機絶縁層を形成し、前記第2無機絶縁層上に前記有機絶縁層の上面の少なくとも一部と、前記第1溝部の上端部と、前記第1溝部の側面の少なくとも一部と重畳するように保護膜を形成することを含み、前記第1溝部の底面の幅に対する前記第1溝部の高さの比が1以下である表示装置の製造方法である。 In one embodiment of the present invention, an organic insulating layer is formed to have a first groove outside the display area, and a top surface of the organic insulating layer and a side surface, an upper end, and a bottom surface of the first groove are covered. (1) forming an inorganic insulating layer, forming a second inorganic insulating layer on the first inorganic insulating layer, and forming at least a part of the upper surface of the organic insulating layer on the second inorganic insulating layer and the first groove portion Forming a protective film so as to overlap the upper end portion and at least a part of the side surface of the first groove portion, wherein the ratio of the height of the first groove portion to the width of the bottom surface of the first groove portion is 1 or less It is a manufacturing method of a certain display.
本発明の一実施形態に係る表示装置を示す上面図である。FIG. 1 is a top view showing a display device according to an embodiment of the present invention. 本発明の一実施形態に係る表示装置を示す断面図である。It is a sectional view showing a display concerning one embodiment of the present invention. 本発明の一実施形態に係る周縁部を示す断面図である。It is sectional drawing which shows the peripheral part which concerns on one Embodiment of this invention. 本発明の一実施形態に係る表示装置の製造方法を説明する断面図である。It is sectional drawing explaining the manufacturing method of the display apparatus which concerns on one Embodiment of this invention. 本発明の一実施形態に係る表示装置の製造方法を説明する断面図である。It is sectional drawing explaining the manufacturing method of the display apparatus which concerns on one Embodiment of this invention. 本発明の一実施形態に係る表示装置の製造方法を説明する断面図である。It is sectional drawing explaining the manufacturing method of the display apparatus which concerns on one Embodiment of this invention. 本発明の一実施形態に係る表示装置の製造方法を説明する断面図である。It is sectional drawing explaining the manufacturing method of the display apparatus which concerns on one Embodiment of this invention. 本発明の一実施形態に係る表示装置の製造方法を説明する断面図である。It is sectional drawing explaining the manufacturing method of the display apparatus which concerns on one Embodiment of this invention. 本発明の一実施形態に係る表示装置の製造方法を説明する断面図である。It is sectional drawing explaining the manufacturing method of the display apparatus which concerns on one Embodiment of this invention. 本発明の一実施形態に係る表示装置の製造方法を説明する断面図である。It is sectional drawing explaining the manufacturing method of the display apparatus which concerns on one Embodiment of this invention. 本発明の一実施形態に係る表示装置の製造方法を説明する断面図である。It is sectional drawing explaining the manufacturing method of the display apparatus which concerns on one Embodiment of this invention. 本発明の一実施形態に係る表示装置の製造方法を説明する断面図である。It is sectional drawing explaining the manufacturing method of the display apparatus which concerns on one Embodiment of this invention. 本発明の一実施形態に係る表示装置の製造方法を説明する断面図である。It is sectional drawing explaining the manufacturing method of the display apparatus which concerns on one Embodiment of this invention. 本発明の一実施形態に係る表示装置の製造方法を説明する断面図である。It is sectional drawing explaining the manufacturing method of the display apparatus which concerns on one Embodiment of this invention. 本発明の一実施形態に係る周縁部を示す断面図である。It is sectional drawing which shows the peripheral part which concerns on one Embodiment of this invention. 従来の周縁部を示す断面図である。It is sectional drawing which shows the conventional peripheral part.
 以下、本発明の一実施形態について、図面を参照しながら説明する。以下に示す実施形態は本発明の実施形態の一例であって、本発明はこれらの実施形態に限定されるものではない。なお、本実施形態で参照する図面において、同一部分または同様な機能を有する部分には同一の符号または類似の符号(数字の後にA、Bなどを付しただけの符号)を付し、その繰り返しの説明は省略する場合がある。また、図面の寸法比率は説明の都合上実際の比率とは異なったり、構成の一部が図面から省略されたりする場合がある。 Hereinafter, an embodiment of the present invention will be described with reference to the drawings. The embodiment shown below is an example of the embodiment of the present invention, and the present invention is not limited to these embodiments. In the drawings referred to in this embodiment, the same portions or portions having similar functions are denoted by the same reference numerals or similar reference numerals (reference numerals with A, B, etc. appended after numbers), and the repetition thereof The description of may be omitted. Further, the dimensional ratio of the drawings may be different from the actual ratio for convenience of explanation, or part of the configuration may be omitted from the drawings.
 さらに、本発明の詳細な説明において、ある構成物と他の構成物の位置関係を規定する際、「上に」「下に」とは、ある構成物の直上あるいは直下に位置する場合のみでなく、特に断りのない限りは、間にさらに他の構成物を介在する場合を含むものとする。 Furthermore, in the detailed description of the present invention, when defining the positional relationship between a certain component and another component, the terms “above” and “below” are only when positioned directly above or below a certain component. However, unless otherwise specified, the case of further intervening other components is included.
<第1実施形態>
 図1は、本発明の実施形態に係る、表示装置10を示す。図1は、表示装置10の上面図を示す。
First Embodiment
FIG. 1 shows a display device 10 according to an embodiment of the present invention. FIG. 1 shows a top view of the display device 10.
(1-1.表示装置の構成)
 図1において、表示装置10は、基板100上に設けられた表示領域103、周縁部104、駆動回路105、駆動回路106、駆動回路107、フレキシブルプリント基板108及びタッチセンサ109を有する。駆動回路105は、ゲートドライバとしての機能を有する。駆動回路106は、ソースドライバとしての機能を有する。駆動回路107は、タッチセンサを制御する機能を有する。表示領域103には、画素101が格子状に離間して複数配置される。画素101は、画像の構成要素として機能する。走査線145cは、駆動回路105と接続される。信号線147bは、駆動回路106と接続される。画素101は、走査線145c及び信号線147bと接続される。タッチセンサは、第1センサ電極171及び第2センサ電極173を有する。第1センサ電極171及び第2センサ電極173は、駆動回路107と接続される。
(1-1. Configuration of Display Device)
In FIG. 1, the display device 10 includes a display area 103, a peripheral portion 104, a driver circuit 105, a driver circuit 106, a driver circuit 107, a flexible printed substrate 108, and a touch sensor 109 which are provided on a substrate 100. The drive circuit 105 has a function as a gate driver. The drive circuit 106 has a function as a source driver. The drive circuit 107 has a function of controlling the touch sensor. In the display area 103, a plurality of the pixels 101 are arranged in a grid shape with a space. The pixel 101 functions as a component of an image. The scan line 145 c is connected to the drive circuit 105. The signal line 147 b is connected to the drive circuit 106. The pixel 101 is connected to the scan line 145 c and the signal line 147 b. The touch sensor includes a first sensor electrode 171 and a second sensor electrode 173. The first sensor electrode 171 and the second sensor electrode 173 are connected to the drive circuit 107.
 表示装置10において、フレキシブルプリント基板108を介して映像信号が駆動回路
106に入力される。次に、駆動回路105及び駆動回路106が、画素101内の表示素子130を走査線145c及び信号線147bを介して駆動させる。その結果、表示領域103において静止画及び動画が表示される。なお、表示領域103は、第1領域と呼ばれる場合がある。
In the display device 10, a video signal is input to the drive circuit 106 through the flexible printed circuit board 108. Next, the driver circuit 105 and the driver circuit 106 drive the display element 130 in the pixel 101 through the scan line 145 c and the signal line 147 b. As a result, still images and moving images are displayed in the display area 103. The display area 103 may be referred to as a first area.
 また、タッチセンサ109において、第1センサ電極171は送信電極として機能する。第2センサ電極173は、受信電極として機能する。タッチセンサ109において、第1センサ電極171と第2センサ電極173との間の容量は、人がタッチセンサ109に指を近づけたときに変化する。タッチセンサ109は、この容量変化を利用して位置情報を検出する。 In the touch sensor 109, the first sensor electrode 171 functions as a transmission electrode. The second sensor electrode 173 functions as a receiving electrode. In the touch sensor 109, the capacitance between the first sensor electrode 171 and the second sensor electrode 173 changes when a person brings his finger close to the touch sensor 109. The touch sensor 109 detects position information using this change in capacitance.
(1-2.表示装置の各層の構成)
 表示装置10の各構成の詳細について以下に示す。図2は、画素101(A1-A2間)、表示領域103の周囲に位置し、画素101が配置されない領域である周縁部104(B1-B2間)、導電層148を含む領域である端子部(C1-C2間)の断面図である。
(1-2. Configuration of Each Layer of Display Device)
Details of each configuration of the display device 10 will be described below. FIG. 2 shows a pixel 101 (between A1 and A2), a peripheral portion 104 (between B1 and B2) located around the display region 103 and not provided with the pixel 101, and a terminal portion including a conductive layer 148. It is a sectional view (between C1-C2).
 基板100及び基板200には、ガラス基板又は有機樹脂基板が用いられる。有機樹脂基板としては、例えば、ポリイミド基板が用いられる。有機樹脂基板は、板厚を数マイクロメートルから数十マイクロメートルにすることができ、可撓性を有するシートディスプレイを実現することが可能となる。基板100及び基板200は、後述する表示素子130からの出射光を外に取り出すために、透明性が求められる。表示素子130からの出射光を取り出さない側にある基板は、透明である必要は無いため、前述の材料に加えて、金属基板の表面に絶縁層を形成したものを用いてもよい。なお、基板100及び基板200の第2面(断面を見た際の、基板外側の面)にカバーガラス、保護フィルムなどを設けてもよい。これにより、表示装置をキズなどから防ぐことができる。基板200は、表示素子130を保護する役割を持っているが、封止層161で十分に保護できるのであれば不要である。 For the substrates 100 and 200, a glass substrate or an organic resin substrate is used. As the organic resin substrate, for example, a polyimide substrate is used. The organic resin substrate can have a plate thickness of several micrometers to several tens of micrometers, which makes it possible to realize a flexible sheet display. The substrate 100 and the substrate 200 are required to have transparency in order to extract light emitted from the display element 130 described later. The substrate on the side from which the light emitted from the display element 130 is not extracted does not have to be transparent, and therefore, in addition to the above-described materials, a substrate in which an insulating layer is formed on the surface of a metal substrate may be used. Note that a cover glass, a protective film, or the like may be provided on the second surface of the substrate 100 and the substrate 200 (the surface on the outer side of the substrate when the cross section is viewed). This can prevent the display device from being scratched or the like. The substrate 200 has a role of protecting the display element 130, but is not necessary as long as the sealing layer 161 can sufficiently protect the display element 130.
 絶縁層141は、基板100上に設けられ、下地膜としての機能を有する。これにより、基板100から半導体層142への不純物、代表的にはアルカリ金属、水、水素等の拡散を抑制することができる。 The insulating layer 141 is provided over the substrate 100 and has a function as a base film. Thus, diffusion of impurities, typically, alkali metals, water, hydrogen, and the like from the substrate 100 to the semiconductor layer 142 can be suppressed.
 トランジスタ110は、半導体層142、ゲート絶縁層143、ゲート電極145a、ソース電極147a及びドレイン電極147cを有する。トランジスタ110は、トップゲート・トップコンタクト構造を有しているが、これに限定されず、ボトムゲート構造としてもよいし、ボトムコンタクト構造としてもよい。 The transistor 110 includes the semiconductor layer 142, the gate insulating layer 143, the gate electrode 145a, the source electrode 147a, and the drain electrode 147c. The transistor 110 has a top gate top contact structure, but is not limited to this, and may have a bottom gate structure or a bottom contact structure.
 半導体層142は、画素101(A1-A2間)において、絶縁層141上に設けられる。半導体層142には、シリコン、酸化物半導体または有機物半導体などが用いられる。 The semiconductor layer 142 is provided over the insulating layer 141 in the pixel 101 (between A1 and A2). For the semiconductor layer 142, silicon, an oxide semiconductor, an organic semiconductor, or the like is used.
 ゲート絶縁層143は、絶縁層141及び半導体層142上に設けられる。ゲート絶縁層143には、酸化シリコン、酸窒化シリコン、窒化シリコン或いはその他高誘電率の無機材料が用いられる。 The gate insulating layer 143 is provided over the insulating layer 141 and the semiconductor layer 142. For the gate insulating layer 143, silicon oxide, silicon oxynitride, silicon nitride, or another inorganic material with high dielectric constant is used.
 ゲート電極145aは、ゲート絶縁層143上に設けられる。ゲート電極145aは、走査線145cと適宜接続される。なお、ゲート電極145aと容量電極145bは、同じくゲート絶縁層143上に設けられる。ゲート電極145a及び容量電極145bは、共にタンタル、タングステン、チタン、モリブデン、アルミニウム等から選ばれた導電材料で形成される。ゲート電極145aと容量電極145bとは、前述の導電材料の単層構造であってもよいし、積層構造であってもよい。 The gate electrode 145 a is provided on the gate insulating layer 143. The gate electrode 145a is appropriately connected to the scan line 145c. Note that the gate electrode 145 a and the capacitor electrode 145 b are similarly provided over the gate insulating layer 143. The gate electrode 145a and the capacitor electrode 145b are both formed of a conductive material selected from tantalum, tungsten, titanium, molybdenum, aluminum or the like. The gate electrode 145a and the capacitor electrode 145b may have a single layer structure of the above-described conductive material, or may have a stacked structure.
 絶縁層149は、ゲート絶縁層143と同様の材料が用いられ、ゲート絶縁層143、ゲート電極145a及び容量電極145b上に設けられる。なお、絶縁層149は、単層としてもよいし、上記材料の積層構造としてもよい。 The insulating layer 149 is formed using the same material as the gate insulating layer 143, and is provided over the gate insulating layer 143, the gate electrode 145a, and the capacitor electrode 145b. Note that the insulating layer 149 may have a single layer or a stacked structure of the above materials.
 ソース電極147a及びドレイン電極147cは、絶縁層149上に設けられる。ソース電極147a及びドレイン電極147cは、信号線147bと適宜接続される。ソース電極147a及びドレイン電極147cには、ゲート電極145aの材料例として挙げたものと同様の材料が用いられる。ゲート電極145aと同じ材料を用いても良いし、異なる材料を用いても良い。 The source electrode 147 a and the drain electrode 147 c are provided over the insulating layer 149. The source electrode 147a and the drain electrode 147c are appropriately connected to the signal line 147b. For the source electrode 147a and the drain electrode 147c, the same materials as those described as the example of the material of the gate electrode 145a are used. The same material as the gate electrode 145a may be used, or a different material may be used.
 容量素子120には、ゲート絶縁層143を誘電体として半導体層142のソースまたはドレイン領域及び容量電極145bが用いられる。 In the capacitor element 120, the source or drain region of the semiconductor layer 142 and the capacitor electrode 145b are used with the gate insulating layer 143 as a dielectric.
 平坦化層150は、トランジスタ110などにより形成された段差を平坦化する機能を有し、絶縁層149、ソース電極147a及びドレイン電極147c上に設けられる。平坦化層150は、有機樹脂を含む。この例では、平坦化層150には、アクリル樹脂が用いられる。なお、平坦化層150には、アクリル樹脂に限定されずに、エポキシ樹脂、ポリイミド樹脂、ポリアミド樹脂、ポリスチレン樹脂、ポリエチレン樹脂、ポリエチレンテレフタレート樹脂などが用いられてもよい。また、平坦化層150には、有機樹脂と無機材料との積層が用いられてもよい。 The planarization layer 150 has a function of planarizing a step difference formed by the transistor 110 or the like, and is provided over the insulating layer 149, the source electrode 147a, and the drain electrode 147c. The planarization layer 150 includes an organic resin. In this example, acrylic resin is used for the planarization layer 150. The flattening layer 150 is not limited to an acrylic resin, and an epoxy resin, a polyimide resin, a polyamide resin, a polystyrene resin, a polyethylene resin, a polyethylene terephthalate resin, or the like may be used. In addition, for the planarization layer 150, a stack of an organic resin and an inorganic material may be used.
 容量素子121には、絶縁層154を誘電体として、導電層153及び画素電極155が用いられる。 For the capacitor element 121, the conductive layer 153 and the pixel electrode 155 are used with the insulating layer 154 as a dielectric.
 導電層153は、平坦化層150上に設けられる。導電層153は、ゲート電極145aと同じ材料を用いてもよいし、異なる材料を用いてもよい。 The conductive layer 153 is provided on the planarization layer 150. The conductive layer 153 may use the same material as the gate electrode 145 a or a different material.
 絶縁層154は、平坦化層150及び導電層153上に設けられる。絶縁層154の材料には、窒化シリコンなどの無機材料が用いられる。なお、絶縁層154の材料には、ゲート絶縁層143と同様の材料が用いられてもよい。 The insulating layer 154 is provided on the planarization layer 150 and the conductive layer 153. As a material of the insulating layer 154, an inorganic material such as silicon nitride is used. Note that for the material of the insulating layer 154, the same material as the gate insulating layer 143 may be used.
 画素電極155は、表示素子130の陽極としての機能を有する。さらに画素電極155は、光を反射させる性質を有することが好ましい。前者の機能として好ましいのは酸化インジウム錫(ITO)や酸化インジウム亜鉛(IZO)等の酸化物導電材料であり、後者の機能として好ましいのはアルミニウムや銀といった表面反射性の高い導電材料が挙げられる。これらの機能を両立するため、画素電極155の構造には、前述の材料の積層、具体的にはアルミニウムや銀といった表面反射性の高い導電層上に、酸化インジウム錫(ITO)や酸化インジウム亜鉛(IZO)等の酸化物導電層を積層するといった構造が採用される。 The pixel electrode 155 has a function as an anode of the display element 130. Furthermore, the pixel electrode 155 preferably has a property of reflecting light. The former is preferably an oxide conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO), and the latter is preferably a conductive material having high surface reflectivity such as aluminum or silver. . In order to make these functions compatible, the structure of the pixel electrode 155 can be formed by stacking the above-mentioned materials, specifically, indium tin oxide (ITO) or indium zinc oxide on a conductive layer having high surface reflectivity such as aluminum or silver. A structure in which an oxide conductive layer such as (IZO) is laminated is adopted.
 表示素子130には、画素電極155、有機EL層159及び対向電極160が用いられる。つまり、表示素子130は、有機EL素子であるということができる。表示素子130は、有機EL層159で発光した光を対向電極160側に放射する、いわゆるトップエミッション型の構造を有する。なお、表示素子130は、トップエミッション型に限定されず、ボトムエミッション型の構造としてもよい。 For the display element 130, the pixel electrode 155, the organic EL layer 159, and the counter electrode 160 are used. That is, it can be said that the display element 130 is an organic EL element. The display element 130 has a so-called top emission type structure that emits the light emitted from the organic EL layer 159 to the counter electrode 160 side. The display element 130 is not limited to the top emission type, and may have a bottom emission type.
 有機EL層159は、画素電極155上に設けられる。有機EL層159は、有機エレクトロルミネセンス材料などの発光材料を有する。 The organic EL layer 159 is provided on the pixel electrode 155. The organic EL layer 159 has a light emitting material such as an organic electroluminescent material.
 対向電極160は、表示素子130の陰極としての機能を有する。対向電極160は、複数の画素電極155にわたって、画素電極155を連続的に覆うように設けられている。対向電極160には有機EL層159で発光した光を透過させるため、透光性を有しかつ導電性を有する材料が用いられ、例えば、10nm以下の膜厚のマグネシウム銀(MgAg)合金が用いられる。 The counter electrode 160 has a function as a cathode of the display element 130. The counter electrode 160 is provided so as to continuously cover the pixel electrode 155 across the plurality of pixel electrodes 155. In order to transmit light emitted from the organic EL layer 159 for the counter electrode 160, a light transmitting material having conductivity is used, and for example, magnesium silver (MgAg) alloy having a thickness of 10 nm or less is used. Be
 対向電極160には透光性が求められるのと同時に、画素電極155の反射面との間でマイクロキャビティを形成するための反射性が求められる。このため、対向電極160は、半透過膜として形成される。具体的には、銀、マグネシウム、又はそれらの合金でなる層を、光が透過する程度の膜厚で形成される。 At the same time as the opposite electrode 160 is required to be light transmissive, the opposite electrode 160 is also required to be reflective for forming a microcavity with the reflective surface of the pixel electrode 155. For this reason, the counter electrode 160 is formed as a semipermeable membrane. Specifically, a layer formed of silver, magnesium, or an alloy thereof is formed to have a thickness enough to transmit light.
 リブ157は、表示領域103におけるそれぞれの画素101を区切るために、表示素子130の一部である画素電極155の周縁部を覆う。リブ157は、有機絶縁材料(有機樹脂材料)を含み、有機絶縁層ということもできる。例えば、リブ157には、ポリイミド樹脂が用いられる。また、表示画像のコントラスト比を高めるために、リブ157には黒色顔料を含む有機樹脂材料が用いられてもよい。 The rib 157 covers the peripheral portion of the pixel electrode 155 which is a part of the display element 130 in order to separate the pixels 101 in the display area 103. The rib 157 contains an organic insulating material (organic resin material), and can also be referred to as an organic insulating layer. For example, a polyimide resin is used for the rib 157. In addition, an organic resin material containing a black pigment may be used for the ribs 157 in order to increase the contrast ratio of the display image.
 また、図2に示すように、リブ157は、周縁部104(B1-B2間)において、基板100、絶縁層141、ゲート絶縁層143、絶縁層149、平坦化層150及び絶縁層154上に設けられる。リブ157は、絶縁層154とともに、平坦化層150の上面及び側面を覆う。周縁部104(B1-B2間)におけるリブの構造などの詳細については後述する。 Further, as shown in FIG. 2, the rib 157 is formed on the substrate 100, the insulating layer 141, the gate insulating layer 143, the insulating layer 149, the planarizing layer 150, and the insulating layer 154 in the peripheral portion 104 (between B1 and B2). Provided. The ribs 157, along with the insulating layer 154, cover the top and side surfaces of the planarization layer 150. Details of the rib structure and the like at the peripheral portion 104 (between B1 and B2) will be described later.
 封止層161は、表示装置10の外部から表示素子130への水分の混入を防止する機能を有する。画素101(A1-A2間)を含む表示領域103において封止層161は、第1無機絶縁層162、有機絶縁層164及び第2無機絶縁層166がこの順で積層されている。一方で、周縁部104(B1-B2間)では、第1無機絶縁層162及び第2無機絶縁層166が積層されている。また、第1無機絶縁層162は、無機材料を含む絶縁層154と接触する。このように、周縁部104において、絶縁層154と第1無機絶縁層162と第2無機絶縁層166が積層され、水分遮断構造167を形成する。第1無機絶縁層162と第2無機絶縁層166の詳細については後述する。 The sealing layer 161 has a function of preventing moisture from entering the display element 130 from the outside of the display device 10. In the display region 103 including the pixel 101 (between A1 and A2), in the sealing layer 161, a first inorganic insulating layer 162, an organic insulating layer 164, and a second inorganic insulating layer 166 are stacked in this order. On the other hand, in the peripheral portion 104 (between B1 and B2), the first inorganic insulating layer 162 and the second inorganic insulating layer 166 are stacked. The first inorganic insulating layer 162 is in contact with the insulating layer 154 containing an inorganic material. Thus, in the peripheral portion 104, the insulating layer 154, the first inorganic insulating layer 162, and the second inorganic insulating layer 166 are stacked to form a moisture blocking structure 167. Details of the first inorganic insulating layer 162 and the second inorganic insulating layer 166 will be described later.
 有機絶縁層164は、第1無機絶縁層162の製造時に混入する異物などを覆うことで、第2無機絶縁層166が有機絶縁層164上に平坦に積層できるようにする。第2無機絶縁層166が有機絶縁層164上に平坦に積層することで、第2無機絶縁層166は有機絶縁層164を良好に被覆することができる。有機絶縁層164の膜厚は限定されないが、好ましくは5μm以上20μm以下である。有機絶縁層164には、平坦化層150と同様の材料が用いられてもよい。 The organic insulating layer 164 covers the foreign matter mixed in at the time of manufacturing the first inorganic insulating layer 162 so that the second inorganic insulating layer 166 can be stacked flat on the organic insulating layer 164. When the second inorganic insulating layer 166 is stacked flatly on the organic insulating layer 164, the second inorganic insulating layer 166 can favorably cover the organic insulating layer 164. Although the film thickness of the organic insulating layer 164 is not limited, it is preferably 5 μm or more and 20 μm or less. For the organic insulating layer 164, the same material as the planarization layer 150 may be used.
 タッチセンサ109は、第1センサ電極171、絶縁層172及び第2センサ電極173を含む。第1センサ電極171及び第2センサ電極173の材料としては、透光性を有する材料が用いられてもよい。具体的には、例えば、酸化インジウム錫(ITO)が用いられる。他には、TAT(Ti/Al/Ti)などを用いることもできるが、これらに限られるものではない。 The touch sensor 109 includes a first sensor electrode 171, an insulating layer 172 and a second sensor electrode 173. As a material of the first sensor electrode 171 and the second sensor electrode 173, a light transmitting material may be used. Specifically, for example, indium tin oxide (ITO) is used. Besides, TAT (Ti / Al / Ti) or the like can also be used, but is not limited thereto.
 接着層195には、無機材料、有機材料、または有機材料と無機材料の複合材料が用いられる。例えば、接着層195にはアクリル樹脂が用いられる。 For the adhesive layer 195, an inorganic material, an organic material, or a composite material of an organic material and an inorganic material is used. For example, an acrylic resin is used for the adhesive layer 195.
 端子部(C1-C2間)においては、絶縁層149上に導電層148が積層され、導電層148は異方性導電膜181を介してフレキシブルプリント基板108と接続される。導電層148はソース電極147a及びドレイン電極147cと同じ材料で形成されてもよい。 In the terminal portion (between C 1 and C 2), the conductive layer 148 is stacked on the insulating layer 149, and the conductive layer 148 is connected to the flexible printed substrate 108 through the anisotropic conductive film 181. The conductive layer 148 may be formed of the same material as the source electrode 147a and the drain electrode 147c.
(1-3.周縁部の構成)
 表示領域103の外側には、画素101が配置されない領域である周縁部104がある。周縁部104(図1のB1-B2間)の詳細について、図3を用いて説明する。
(1-3. Configuration of peripheral portion)
Outside the display area 103, there is a peripheral portion 104 which is an area in which the pixel 101 is not disposed. Details of the peripheral portion 104 (between B1 and B2 in FIG. 1) will be described with reference to FIG.
 図3は、周縁部104の断面図である。なお、周縁部104は、第2領域と呼ばれる場合がある。リブ157、第1無機絶縁層162及び第2無機絶縁層166は、表示領域103にも配置されており、表示領域103から周縁部104まで連続している。 FIG. 3 is a cross-sectional view of the peripheral portion 104. The peripheral portion 104 may be referred to as a second region. The rib 157, the first inorganic insulating layer 162, and the second inorganic insulating layer 166 are also disposed in the display region 103, and are continuous from the display region 103 to the peripheral edge portion 104.
 リブ157は、周縁部104において、第1溝部158-1を有する。このとき、周縁部104には、リブ157の上面157A、底面157Eの他、第1溝部158-1の上端部158-1B、側面158-1C、下端部158-1D及び底面158-1Fが設けられる。 The rib 157 has a first groove portion 158-1 at the peripheral portion 104. At this time, in the peripheral portion 104, in addition to the upper surface 157A and the bottom surface 157E of the rib 157, the upper end 158-1B, the side surface 158-1C, the lower end 158-1D, and the bottom surface 158-1F of the first groove 158-1 are provided. Be
 第1溝部158-1において、第1溝部158-1の底面158-1Fの幅158-1Wに対する第1溝部158-1の高さ158-1Hの比(以下「アスペクト比」ということがある。)は、1以下とする。例えば、アスペクト比を1とした場合、第1溝部158-1の底面158-1Fの幅158-1Wが10μmであれば、第1溝部158-1の高さ158-1Hは10μmである。また、アスペクト比を0.5とした場合、第1溝部158-1の底面158-1Fの幅158-1Wが10μmであれば、第1溝部158-1の高さ158-1Hは5μmである。 In the first groove portion 158-1, the ratio of the height 158-1H of the first groove portion 158-1 to the width 158-1W of the bottom surface 158-1F of the first groove portion 158-1 (hereinafter referred to as "aspect ratio"). ) Shall be 1 or less. For example, when the aspect ratio is 1, if the width 158-1W of the bottom surface 158-1F of the first groove portion 158-1 is 10 μm, the height 158-1H of the first groove portion 158-1 is 10 μm. When the width 158-1W of the bottom surface 158-1F of the first groove portion 158-1 is 10 μm when the aspect ratio is 0.5, the height 158-1H of the first groove portion 158-1 is 5 μm. .
 また、リブ157はさらに第2溝部158-2を有することができる。このとき、周縁部104には、第2溝部158-2の上端部158-2B、側面158-2C、下端部158-2D及び底面158-2Fが設けられる。なお、第2溝部158-2の底面158-2Fの幅は、第1溝部158-1の底面158-1Fの幅158-1Wと等しくてもいいし、異なっていてもよい。また、第2溝部158-2の高さは、第1溝部158-1の高さ158-1Hと等しくてもよいし、異なっていてもよい。 Also, the rib 157 can further have a second groove portion 158-2. At this time, the upper end portion 158-2B, the side surface 158-2C, the lower end portion 158-2D, and the bottom surface 158-2F of the second groove portion 158-2 are provided in the peripheral portion 104. The width of the bottom surface 158-2F of the second groove portion 158-2 may be equal to or different from the width 158-1W of the bottom surface 158-1F of the first groove portion 158-1. In addition, the height of the second groove 158-2 may be equal to or different from the height 158-1H of the first groove 158-1.
 リブ157がさらに第2溝部158-2を有する場合、第1溝部158-1の上端部158-1Bと第2溝部158-2の上端部158-2Bの間の距離158Lに対する第1溝部158-1の底面158-1Fの幅158-1Wの比が2以下であると、後述するように保護膜165をドライエッチングにより形成する際に、第1溝部158-1の上端部158-1Bと第2溝部158-2の上端部158-2Bの間に位置するリブ157の上面Aに重畳する位置に保護膜165が形成されやすく、プロセス設計の幅が広い。これは、この条件を満たすとき、第2無機絶縁層166のうち、第1溝部158-1の側面158-1C及び底面158-1Fを覆うように配置される部分のドライエッチングにより形成される成分と、第2溝部158-2の側面158-2C及び底面158-2Fを覆うように配置される部分のドライエッチングにより形成される成分が、いずれもリブ157の当該上面Aに重畳する位置に堆積しやすいからである。また、「第1溝部158-1の上端部158-1Bと第2溝部158-2の上端部158-2Bの間の距離158Lに対する第1溝部158-1の底面158-1Fの幅158-1Wの比が2以下である」とは、例えば、距離158Lに対する第1溝部158-1の底面158-1Fの幅158-1Wの比が2である場合、距離158Lが10μmであれば、第1溝部158-1の底面158-1Fの幅158-1Wは20μmであることをいう。 When the rib 157 further includes the second groove 158-2, the first groove 158- with respect to the distance 158L between the upper end 158-1B of the first groove 158-1 and the upper end 158-2B of the second groove 158-2 If the ratio of the width 158-1W of the bottom surface 158-1F of 1 is 2 or less, when forming the protective film 165 by dry etching as described later, the upper end portion 158-1B of the first groove portion 158-1 and the first The protective film 165 is easily formed at a position overlapping the upper surface A of the rib 157 located between the upper end portion 158-2B of the two groove portion 158-2, and the width of the process design is wide. This is a component formed by dry etching of a portion of the second inorganic insulating layer 166 disposed so as to cover the side surface 158-1C and the bottom surface 158-1F of the first groove portion 158-1 when this condition is satisfied. And a component formed by dry etching of a portion arranged to cover the side surface 158-2C and the bottom surface 158-2F of the second groove portion 158-2 are deposited at positions overlapping with the upper surface A of the rib 157. It is easy to do. Also, “the width 158-1W of the bottom surface 158-1F of the first groove 158-1 with respect to the distance 158L between the upper end 158-1B of the first groove 158-1 and the upper end 158-2B of the second groove 158-2 is If the ratio of the width 158-1W of the bottom surface 158-1F of the first groove portion 158-1 to the distance 158L is 2, that is, if the distance 158L is 10 μm, the first The width 158-1W of the bottom surface 158-1F of the groove portion 158-1 is 20 μm.
 第1溝部158-1の上端部158-1Bと第2溝部158-2の上端部158-2Bの間の距離158Lは10μm以下であってもよい。後述するように、第1溝部158-1の上端部158-1Bと第2溝部158-2の上端部158-2Bの間の距離158Lが10μm以下であると、リブ157の上面157Aのうち、第1溝部158-1の上端部158-1Bと第2溝部158-2の上端部158-2Bの間に位置する部分の上に保護膜165が形成されやすい。 The distance 158L between the upper end portion 158-1B of the first groove portion 158-1 and the upper end portion 158-2B of the second groove portion 158-2 may be 10 μm or less. As described later, when the distance 158L between the upper end portion 158-1B of the first groove portion 158-1 and the upper end portion 158-2B of the second groove portion 158-2 is 10 μm or less, the upper surface 157A of the rib 157 The protective film 165 is likely to be formed on the portion located between the upper end portion 158-1B of the first groove portion 158-1 and the upper end portion 158-2B of the second groove portion 158-2.
 また、第1溝部158-1の底面158-1Fの幅158-1Wは5μm以上30μm以下であることが好ましい。第1溝部158-1の底面158-1Fの幅158-1Wが30μmより大きいと、リブ157の上面157Aに、保護膜165が形成される効率が低下する。これは、第1溝部158-1の底面158-1Fの幅158-1Wが30μmより大きいと、第2無機絶縁層166のうち、第1溝部158-1の側面158-1C及び底面158-1Fを覆うように配置される部分のドライエッチングにより形成される成分がリブ157の上面157Aに堆積する効率が低下するからである。 The width 158-1W of the bottom surface 158-1F of the first groove portion 158-1 is preferably 5 μm or more and 30 μm or less. If the width 158-1W of the bottom surface 158-1F of the first groove portion 158-1 is larger than 30 μm, the efficiency with which the protective film 165 is formed on the upper surface 157A of the rib 157 is reduced. This is because if the width 158-1W of the bottom surface 158-1F of the first groove portion 158-1 is larger than 30 μm, the side surface 158-1C and the bottom surface 158-1F of the first groove portion 158-1 in the second inorganic insulating layer 166 The component formed by dry etching of the portion arranged to cover the lower surface of the rib 157 is less efficient in depositing on the upper surface 157A of the rib 157.
 第1無機絶縁層162は、リブ157の上面157A並びに第1溝部158-1の側面158-1C、上端部158-1B及び底面158-1Fを覆うように配置される。リブ157がさらに第2溝部158-2を有する場合、第1無機絶縁層162は、第2溝部158-2の側面158-2C、上端部158-2B及び底面158-2Fを覆うように配置されてもよい。また、第2無機絶縁層166は第1無機絶縁層162上に設けられる。そして、第1溝部158-1の底面158-1Fと、第2溝部158-2の底面158-2Fにおいて、第1無機絶縁層162は絶縁層154と接触し、絶縁層154と第1無機絶縁層162と第2無機絶縁層166が積層された構造である水分遮断構造167を形成する。 The first inorganic insulating layer 162 is disposed to cover the upper surface 157A of the rib 157 and the side surface 158-1C, the upper end portion 158-1B and the bottom surface 158-1F of the first groove portion 158-1. When the rib 157 further includes the second groove portion 158-2, the first inorganic insulating layer 162 is disposed so as to cover the side surface 158-2C, the upper end portion 158-2B, and the bottom surface 158-2F of the second groove portion 158-2. May be In addition, the second inorganic insulating layer 166 is provided on the first inorganic insulating layer 162. The first inorganic insulating layer 162 is in contact with the insulating layer 154 at the bottom surface 158-1F of the first groove portion 158-1 and the bottom surface 158-2F of the second groove portion 158-2, and the insulating layer 154 and the first inorganic insulating layer A moisture blocking structure 167, which is a stacked structure of the layer 162 and the second inorganic insulating layer 166, is formed.
 第1無機絶縁層162及び第2無機絶縁層166には、窒化シリコン、酸化シリコン、酸化窒化シリコン、窒化酸化シリコンなどの無機絶縁材料が用いられる。この例では、第1無機絶縁層162及び第2無機絶縁層166には窒化シリコン膜が用いられる。窒化シリコン膜は、緻密であり、水分を遮断するうえで好適である。第1無機絶縁層162の膜厚は限定されないが、好ましくは50nm以上2μm以下である。 For the first inorganic insulating layer 162 and the second inorganic insulating layer 166, an inorganic insulating material such as silicon nitride, silicon oxide, silicon oxynitride, or silicon nitride oxide is used. In this example, a silicon nitride film is used for the first inorganic insulating layer 162 and the second inorganic insulating layer 166. The silicon nitride film is dense and suitable for blocking moisture. Although the film thickness of the first inorganic insulating layer 162 is not limited, it is preferably 50 nm or more and 2 μm or less.
 保護膜165は、第2無機絶縁層166の上面166Aと接して設けられる。保護膜165は、周縁部104(B1-B2間)におけるリブ157の上面157A、第1溝部158-1の上端部158-1B及び側面158-1Cの少なくとも一部と重畳する。保護膜165は、第1溝部158-1の側面158-1Cの全体と重畳してもよい。保護膜165は、窒化ホウ素、フッ素添加シリコン酸化物(SiOFx)などの無機材料を含む。この例では、保護膜165は、主成分として、窒化ホウ素を含む。保護膜165は後述するように、レジスト168よりも硬い膜であることが好ましく、また、窒化ホウ素は硬い膜を形成するため、保護膜165が窒化ホウ素を主成分として含むことは好ましい。保護膜165は、後述するように、ドライエッチングにより形成される。より詳細には、保護膜165は、第2無機絶縁層166に含まれる成分または第2無機絶縁層166のエッチングガスに含まれる成分を含んで形成される。保護膜165は、第1溝部158-1の底面158-1Fの幅158-1Wに対する第1溝部158-1の高さ158-1Hの比であるアスペクト比が1以下である場合に、第2無機絶縁層166に対するドライエッチングにより形成されることができる。保護膜165の膜厚は、限定されないが、100nm以下とすることができる。 The protective film 165 is provided in contact with the upper surface 166 A of the second inorganic insulating layer 166. The protective film 165 overlaps at least a part of the upper surface 157A of the rib 157 at the peripheral edge portion 104 (between B1 and B2), the upper end portion 158-1B of the first groove portion 158-1 and the side surface 158-1C. The protective film 165 may overlap with the entire side surface 158-1C of the first groove portion 158-1. The protective film 165 contains an inorganic material such as boron nitride or fluorinated silicon oxide (SiOF x ). In this example, the protective film 165 contains boron nitride as a main component. As described later, the protective film 165 is preferably a film harder than the resist 168, and since boron nitride forms a hard film, the protective film 165 preferably contains boron nitride as a main component. The protective film 165 is formed by dry etching as described later. More specifically, the protective film 165 is formed to include a component included in the second inorganic insulating layer 166 or a component included in the etching gas of the second inorganic insulating layer 166. The protective film 165 has a second aspect when the aspect ratio, which is the ratio of the height 158-1H of the first groove 158-1 to the width 158-1W of the bottom surface 158-1F of the first groove 158-1, is 1 or less. The insulating layer 166 can be formed by dry etching. Although the film thickness of the protective film 165 is not limited, it can be 100 nm or less.
(1-4.表示装置の製造方法)
 以下、表示装置10の製造方法について、図4から図14を用いて説明する。
(1-4. Method of manufacturing display device)
Hereinafter, a method of manufacturing the display device 10 will be described with reference to FIGS. 4 to 14.
(1-4-1.トランジスタの形成)
 まず、図4に示すように、基板100の第1面(断面方向から見た場合の上面)に、絶縁層141、半導体層142及びゲート絶縁層143を形成後、ゲート絶縁層143上にゲート電極145aを形成する。各層は、適宜フォトリソグラフィ法、ナノインプリンティング法、インクジェット法またはエッチング法などを用いて、所定の形状に加工される。
(1-4-1. Formation of a transistor)
First, as shown in FIG. 4, after the insulating layer 141, the semiconductor layer 142, and the gate insulating layer 143 are formed on the first surface (upper surface when viewed from the cross sectional direction) of the substrate 100, the gate is formed on the gate insulating layer 143. An electrode 145a is formed. Each layer is appropriately processed into a predetermined shape by using a photolithography method, a nanoimprinting method, an inkjet method, an etching method, or the like.
 基板100には、ガラス基板又は有機樹脂基板が用いられる。基板100として有機樹脂基板を用いる場合、例えば、ポリイミド基板が用いられる。 For the substrate 100, a glass substrate or an organic resin substrate is used. When an organic resin substrate is used as the substrate 100, for example, a polyimide substrate is used.
 絶縁層141は、酸化シリコン、酸窒化シリコン、窒化シリコン等の材料を用いて形成される。絶縁層141は、単層であっても、積層であってもよい。絶縁層141は、CVD法、スピンコーティング法または印刷法などにより形成される。 The insulating layer 141 is formed using a material such as silicon oxide, silicon oxynitride, or silicon nitride. The insulating layer 141 may be a single layer or a stacked layer. The insulating layer 141 is formed by a CVD method, a spin coating method, a printing method, or the like.
 半導体層142としてシリコン材料を用いる場合、例えばアモルファスシリコン、多結晶シリコンなどが用いられる。また、半導体層142として酸化物半導体を用いる場合、例えばインジウム、ガリウム、亜鉛、チタン、アルミニウム、錫、セリウムなどの金属材料が用いられる。例えば、インジウム、ガリウム、亜鉛を有する酸化物半導体(IGZO)を用いることができる。半導体層142は、スパッタリング法、蒸着法、めっき法またはCVD法などにより形成される。 When a silicon material is used as the semiconductor layer 142, for example, amorphous silicon, polycrystalline silicon, or the like is used. In the case of using an oxide semiconductor as the semiconductor layer 142, for example, a metal material such as indium, gallium, zinc, titanium, aluminum, tin, or cerium is used. For example, an oxide semiconductor (IGZO) containing indium, gallium, and zinc can be used. The semiconductor layer 142 is formed by a sputtering method, an evaporation method, a plating method, a CVD method, or the like.
 ゲート絶縁層143には、酸化シリコン、酸窒化シリコン、窒化シリコン、窒酸化シリコン、酸化アルミニウム、酸化マグネシウム、酸化ハフニウムなどを一種以上含む絶縁膜が用いられる。絶縁層141と同様の方法により形成することができる。 For the gate insulating layer 143, an insulating film containing one or more of silicon oxide, silicon oxynitride, silicon nitride, silicon oxynitride, aluminum oxide, magnesium oxide, hafnium oxide, and the like is used. It can be formed by the same method as the insulating layer 141.
 ゲート電極145aは、タングステン、アルミニウム、クロム、銅、チタン、タンタル、モリブデン、ニッケル、鉄、コバルト、タングステン、インジウム、亜鉛から選ばれた金属元素、または上記金属元素を成分とする合金か、上記金属元素を組み合わせた合金等の材料を用いて形成される。また、ゲート電極145aには、上記材料に窒素、酸素、水素などが含有されたものが用いられてもよい。例えば、ゲート電極145aとして、スパッタリング法により形成したアルミニウム(Al)層、チタン層(Ti)の積層膜が用いられる。 The gate electrode 145a is a metal element selected from tungsten, aluminum, chromium, copper, titanium, tantalum, molybdenum, nickel, iron, cobalt, tungsten, indium, zinc, or an alloy containing the above metal element, or the above metal It is formed using a material such as an alloy in which elements are combined. In addition, as the gate electrode 145a, a material in which nitrogen, oxygen, hydrogen, or the like is contained in the above material may be used. For example, a stacked film of an aluminum (Al) layer and a titanium layer (Ti) formed by a sputtering method is used as the gate electrode 145a.
 次に、ゲート絶縁層143、ゲート電極145a及び容量電極145b上に絶縁層149を形成する。絶縁層149は、ゲート絶縁層143と同様の材料、方法が用いられる。例えば、絶縁層149として、プラズマCVD法により形成した酸化シリコン膜が用いられる。 Next, the insulating layer 149 is formed over the gate insulating layer 143, the gate electrode 145a, and the capacitor electrode 145b. For the insulating layer 149, the same material and method as the gate insulating layer 143 are used. For example, as the insulating layer 149, a silicon oxide film formed by plasma CVD is used.
 次に、絶縁層149上にソース電極147a及びドレイン電極147cを形成する。ソース電極147a及びドレイン電極147cは、ゲート電極145aと同様の材料、方法を用いることができる。ソース電極147a及びドレイン電極147cは、絶縁層149に開口部を形成してから形成され、半導体層142のソース・ドレイン領域と接続される。端子部(C1-C2間)において、導電層148は、ソース電極147a及びドレイン電極147cと同時に形成される。 Next, the source electrode 147 a and the drain electrode 147 c are formed over the insulating layer 149. For the source electrode 147a and the drain electrode 147c, materials and methods similar to those of the gate electrode 145a can be used. The source electrode 147 a and the drain electrode 147 c are formed after forming an opening in the insulating layer 149, and are connected to the source / drain region of the semiconductor layer 142. In the terminal portion (between C1 and C2), the conductive layer 148 is formed simultaneously with the source electrode 147a and the drain electrode 147c.
 次に、絶縁層149、ソース電極147a及びドレイン電極147c上に平坦化層150を形成する。平坦化層150は、アクリル樹脂、エポキシ樹脂、ポリイミドなどの有機絶縁材料が用いられる。平坦化層150は、スピンコーティング法、印刷法、インクジェット法などにより形成することができる。例えば、平坦化層150として、スピンコーティング法により形成したアクリル樹脂を用いることができる。平坦化層150は、上面が平坦となる程度まで形成される。なお、平坦化層150において、画素101(A1-A2間)の一部にトランジスタ110と、画素電極155を電気的に接続するための開口部150Aが形成される。また、周縁部104(B1-B2間)における平坦化層150の形状は所定の形状に加工される。また、端子部(C1-C2間)の平坦化層150は、除去される。 Next, the planarization layer 150 is formed over the insulating layer 149, the source electrode 147a, and the drain electrode 147c. The planarization layer 150 is made of an organic insulating material such as an acrylic resin, an epoxy resin, or a polyimide. The planarization layer 150 can be formed by a spin coating method, a printing method, an inkjet method, or the like. For example, an acrylic resin formed by spin coating can be used as the planarization layer 150. The planarization layer 150 is formed to such an extent that the upper surface is flat. Note that in the planarization layer 150, an opening 150A for electrically connecting the transistor 110 and the pixel electrode 155 is formed in part of the pixel 101 (between A1 and A2). Further, the shape of the planarizing layer 150 at the peripheral portion 104 (between B1 and B2) is processed into a predetermined shape. In addition, the planarization layer 150 in the terminal portion (between C1 and C2) is removed.
(1-4-2.表示素子の形成)
 次に、平坦化層150上に、容量素子121(導電層153、絶縁層154及び画素電極155で形成される)、表示素子130(画素電極155、有機EL層159及び対向電極160で形成される)及び有機絶縁層157bを形成する。各層は、適宜フォトリソグラフィ法、ナノインプリンティング法、インクジェット法またはエッチング法などを用いて、所定の形状に加工される。
(1-4-2. Formation of Display Element)
Next, the capacitor 121 (formed of the conductive layer 153, the insulating layer 154, and the pixel electrode 155) and the display 130 (pixel electrode 155, the organic EL layer 159, and the opposite electrode 160) are formed over the planarization layer 150. And the organic insulating layer 157b. Each layer is appropriately processed into a predetermined shape by using a photolithography method, a nanoimprinting method, an inkjet method, an etching method, or the like.
 まず、図5に示すように、平坦化層150上に導電層153を形成する。導電層153は、ゲート電極145aと同様の材料及び方法により形成することができる。例えば、導電層153として、スパッタリング法により形成したモリブデン、アルミニウム、モリブデンの積層膜が用いられる。 First, as shown in FIG. 5, the conductive layer 153 is formed on the planarization layer 150. The conductive layer 153 can be formed by the same material and method as the gate electrode 145a. For example, as the conductive layer 153, a stacked film of molybdenum, aluminum, and molybdenum formed by a sputtering method is used.
 次に、導電層153及び平坦化層150上に絶縁層154を形成する。絶縁層154は、ゲート絶縁層143と同様の材料及び方法により形成される。例えば、絶縁層154として、プラズマCVD法により形成した窒化シリコン膜が用いられる。なお、絶縁層154は、端子部(C1-C2間)からは除去されるが、その他の部分では加工されなくてもよい。 Next, the insulating layer 154 is formed over the conductive layer 153 and the planarization layer 150. The insulating layer 154 is formed by the same material and method as the gate insulating layer 143. For example, as the insulating layer 154, a silicon nitride film formed by plasma CVD is used. Note that the insulating layer 154 is removed from the terminal portion (between C1 and C2), but may not be processed in the other portions.
 次に、画素101(A1-A2間)において、絶縁層154上に、画素電極155を形成する。例えば、画素電極155は、アルミニウム(Al)、銀(Ag)、等の光反射性の金属材料を用いてもよいし、正孔注入性に優れる酸化インジウム錫(ITO)や酸化インジウム亜鉛(IZO)による透明導電層と、光反射性の金属層とが積層された構造を有していてもよい。画素電極155は、ゲート電極145aと同様の方法により形成される。例えば、画素電極155として、スパッタリング法により形成したITO、銀、ITOの積層膜が用いられる。 Next, the pixel electrode 155 is formed over the insulating layer 154 in the pixel 101 (between A1 and A2). For example, the pixel electrode 155 may use a light reflective metal material such as aluminum (Al), silver (Ag), or the like, or indium tin oxide (ITO) or indium zinc oxide (IZO) excellent in hole injection property. ) And a light reflective metal layer may be laminated. The pixel electrode 155 is formed by the same method as the gate electrode 145a. For example, as the pixel electrode 155, a laminated film of ITO, silver, and ITO formed by a sputtering method is used.
 次に、絶縁層154及び画素電極155上に、有機絶縁層157bを形成する。例えば、有機絶縁層157bとして、スピンコーティング法により形成したポリイミド膜が用いられる。 Next, the organic insulating layer 157 b is formed over the insulating layer 154 and the pixel electrode 155. For example, a polyimide film formed by spin coating is used as the organic insulating layer 157b.
 次に、図6に示すように、有機絶縁層157bには、画素電極155の上面を露出するように開口部157Gが形成される。また、周縁部104(B1-B2間)において、上述した水分遮断構造を形成するために、有機絶縁層157bに、第1溝部158-1が形成される。このとき、第1溝部158-1の底面158-1Fの幅158-1Wに対する第1溝部158-1の高さ158-1Hの比は1以下である。また、第1溝部158-1の底面158-1Fの幅158-1Wが5μm以上30μm以下となるように第1溝部158-1を形成してもよい。このように、開口部157G、第1溝部158-1が形成された有機絶縁層157bをリブ157と呼ぶ。 Next, as shown in FIG. 6, an opening 157G is formed in the organic insulating layer 157b so as to expose the top surface of the pixel electrode 155. Further, in the peripheral portion 104 (between B1 and B2), a first groove portion 158-1 is formed in the organic insulating layer 157b in order to form the above-described moisture blocking structure. At this time, the ratio of the height 158-1H of the first groove 158-1 to the width 158-1W of the bottom surface 158-1F of the first groove 158-1 is 1 or less. Alternatively, the first groove 158-1 may be formed such that the width 158-1W of the bottom surface 158-1F of the first groove 158-1 is 5 μm to 30 μm. Thus, the organic insulating layer 157b in which the opening 157G and the first groove 158-1 are formed is referred to as a rib 157.
 周縁部104(B1-B2間)において、有機絶縁層157bには、第2溝部158-2が形成される。第1溝部158-1の上端部158-1Bと第2溝部158-2の上端部158-2Bの間の距離158Lに対する第1溝部158-1の底面158-1Fの幅158-1Wの比が2以下になるように第1溝部158-1及び第2溝部158-2を形成してもよい。また、第1溝部158-1の上端部158-1Bと第2溝部158-2の上端部158-2Bの間の距離158Lは10μm以下となるように第1溝部158-1及び第2溝部158-2を形成してもよい。なお、端子部(C1-C2間)の有機絶縁層157bは、除去される。 At the peripheral portion 104 (between B1 and B2), a second groove portion 158-2 is formed in the organic insulating layer 157b. The ratio of the width 158-1W of the bottom surface 158-1F of the first groove 158-1 to the distance 158L between the upper end 158-1B of the first groove 158-1 and the upper end 158-2B of the second groove 158-2 is The first groove portion 158-1 and the second groove portion 158-2 may be formed to have two or less. The first groove 158-1 and the second groove 158 are formed such that the distance 158L between the upper end 158-1B of the first groove 158-1 and the upper end 158-2B of the second groove 158-2 is 10 μm or less. -2 may be formed. Note that the organic insulating layer 157b in the terminal portion (between C1 and C2) is removed.
 次に、図7に示すように、画素101(A1-A2間)において、画素電極155及びリブ157上に有機EL層159を形成する。有機EL層159は、低分子系又は高分子系の有機材料を用いて形成される。低分子系の有機材料を用いる場合、有機EL層159は発光性の有機材料を含む発光層に加え、当該発光層を挟むように正孔注入層や電子注入層、さらに正孔輸送層や電子輸送層等を含んで構成されていてもよい。 Next, as shown in FIG. 7, in the pixel 101 (between A1 and A2), the organic EL layer 159 is formed on the pixel electrode 155 and the rib 157. The organic EL layer 159 is formed using a low molecular weight or high molecular weight organic material. When a low molecular weight organic material is used, the organic EL layer 159 is added to a light emitting layer containing a light emitting organic material, and a hole injecting layer or an electron injecting layer sandwiching the light emitting layer, and a hole transporting layer or an electron It may be configured to include a transport layer or the like.
 また、有機EL層159は、少なくとも画素電極155と重畳するように形成される。有機EL層159は、真空蒸着法、印刷法、スピンコーティング法などにより形成される。有機EL層159を真空蒸着法により形成する場合、適宜シャドーマスクを用い、成膜されない領域を設けながら形成してもよい。有機EL層159は、隣接する画素と異なる材料を用いて形成してもよいし、全ての画素において同一の有機EL層159を用いてもよい。 Further, the organic EL layer 159 is formed to overlap at least the pixel electrode 155. The organic EL layer 159 is formed by a vacuum evaporation method, a printing method, a spin coating method, or the like. In the case of forming the organic EL layer 159 by a vacuum evaporation method, it may be formed using a shadow mask as appropriate while providing a region not to be formed. The organic EL layer 159 may be formed using a material different from that of the adjacent pixel, or the same organic EL layer 159 may be used in all the pixels.
 次に、画素101(A1-A2間)において画素電極155及び有機EL層159の上に対向電極160を形成する。対向電極160には、酸化インジウム錫(ITO)や酸化インジウム亜鉛(IZO)等の透明導電膜または銀(Ag)とマグネシウムの合金を用いることができる。また、対向電極160は、真空蒸着法、スパッタリング法により形成することができる。例えば、対向電極160として、蒸着法により成膜した銀(Ag)とマグネシウムの合金膜が用いられる。なお、対向電極160は、加工されずに形成されてもよい。このとき、周縁部104(B1-B2間)にも対向電極160が形成されてもよいが、端子部(C1-C2間)からは除去される。 Next, the counter electrode 160 is formed on the pixel electrode 155 and the organic EL layer 159 in the pixel 101 (between A1 and A2). For the counter electrode 160, a transparent conductive film such as indium tin oxide (ITO) or indium zinc oxide (IZO) or an alloy of silver (Ag) and magnesium can be used. Further, the counter electrode 160 can be formed by a vacuum evaporation method or a sputtering method. For example, as the counter electrode 160, an alloy film of silver (Ag) and magnesium formed by a deposition method is used. Note that the counter electrode 160 may be formed without processing. At this time, the counter electrode 160 may be formed also on the peripheral portion 104 (between B1 and B2), but is removed from the terminal portion (between C1 and C2).
(1-4-3.封止層の形成)
 次に、図8に示すように、画素101(A1-A2間)において、対向電極160上に封止層161となる第1無機絶縁層162、有機絶縁層164及び第2無機絶縁層166を順に形成する。このとき、周縁部104(B1-B2間)において、第1無機絶縁層162は、リブ157の上面157A並びに第1溝部158-1の側面158-1C、上端部158-1B及び底面158-1F並びに第2溝部158-2の側面158-2C、上端部158-2B及び底面158-2Fを覆うように形成される。また、周縁部104(B1-B2間)に形成された有機絶縁層164は除去される。つまり、周縁部104(B1-B2間)においては、第1無機絶縁層162上に第2無機絶縁層166が形成される。封止層161は、表示領域103全面を覆うように形成される。端子部(C1-C2間)においても、第1無機絶縁層162と第2無機絶縁層166が、導電層148と絶縁層149上に形成される。
(1-4-3. Formation of sealing layer)
Next, as shown in FIG. 8, in the pixel 101 (between A1 and A2), the first inorganic insulating layer 162, the organic insulating layer 164, and the second inorganic insulating layer 166 to be the sealing layer 161 are formed on the counter electrode 160. Form in order. At this time, in the peripheral portion 104 (between B1 and B2), the first inorganic insulating layer 162 has the upper surface 157A of the rib 157 and the side surface 158-1C, the upper end portion 158-1B and the bottom surface 158-1F of the first groove portion 158-1. And, it is formed to cover the side surface 158-2C, the upper end portion 158-2B and the bottom surface 158-2F of the second groove portion 158-2. In addition, the organic insulating layer 164 formed in the peripheral portion 104 (between B1 and B2) is removed. That is, the second inorganic insulating layer 166 is formed on the first inorganic insulating layer 162 at the peripheral portion 104 (between B1 and B2). The sealing layer 161 is formed to cover the entire surface of the display area 103. Also in the terminal portion (between C1 and C2), the first inorganic insulating layer 162 and the second inorganic insulating layer 166 are formed on the conductive layer 148 and the insulating layer 149.
 有機絶縁層164には、アクリル、ポリイミド、エポキシ等の材料を用いることができる。また、有機絶縁層164は、インクジェット法、スピンコーティング法、蒸着法、スプレー法、印刷法などを用いて形成してもよい。有機絶縁層164の膜厚は、限定されないが、例えば5μm以上20μm以下としてもよい。 For the organic insulating layer 164, a material such as acrylic, polyimide, or epoxy can be used. Alternatively, the organic insulating layer 164 may be formed by an inkjet method, a spin coating method, an evaporation method, a spray method, a printing method, or the like. The thickness of the organic insulating layer 164 is not limited, but may be, for example, 5 μm or more and 20 μm or less.
 第1無機絶縁層162及び第2無機絶縁層166には、窒化シリコン、酸化シリコン、酸化窒化シリコン、窒化酸化シリコンなどの無機絶縁材料が用いられる。第1無機絶縁層162及び第2無機絶縁層166は、リブ157の上面157A並びに第1溝部158-1の側面158-1C、上端部158-1B及び底面158-1F並びに第2溝部158-2の側面158-2C、上端部158-1B及び底面158-2Fを覆うために、被覆性の高い(つまり成膜粒子の平均自由行程の長い)成膜方法を用いて形成される。例えば、第1無機絶縁層162及び第2無機絶縁層166には、プラズマCVD法で形成した窒化シリコン膜が用いられる。第1無機絶縁層162及び第2無機絶縁層166の膜厚は限定されないが、50nm以上2μm以下とすることができる。なお、成膜方法は、プラズマCVD法に限定されず、成膜粒子の平均自由行程の長い方法として、分子線エピタキシー(MBE)法を用いてもよい。 For the first inorganic insulating layer 162 and the second inorganic insulating layer 166, an inorganic insulating material such as silicon nitride, silicon oxide, silicon oxynitride, or silicon nitride oxide is used. The first inorganic insulating layer 162 and the second inorganic insulating layer 166 are formed by the upper surface 157A of the rib 157 and the side surface 158-1C of the first groove portion 158-1, the upper end portion 158-1B and the bottom surface 158-1F, and the second groove portion 158-2 In order to cover the side surface 158-2C, the upper end portion 158-1B, and the bottom surface 158-2F, a film forming method with high coverage (that is, a long mean free path of film forming particles) is used. For example, as the first inorganic insulating layer 162 and the second inorganic insulating layer 166, a silicon nitride film formed by a plasma CVD method is used. The film thickness of the first inorganic insulating layer 162 and the second inorganic insulating layer 166 is not limited, but can be 50 nm or more and 2 μm or less. The film forming method is not limited to the plasma CVD method, and molecular beam epitaxy (MBE) may be used as a method having a long mean free path of film forming particles.
 次に、図9に示すように、第2無機絶縁層166上に保護膜165を形成する。保護膜165は、無機材料を含んで形成されてもよい。保護膜165は、周縁部104(B1-B2間)におけるリブ157の上面157A、第1溝部158-1の上端部158-1B及び側面158-1Cの少なくとも一部と重畳するように形成される。保護膜165は、第1溝部158-1の側面158-1Cの全体と重畳するように形成されてもよい。保護膜165は、その膜厚が100nm以下となるように形成されてもよい。この保護膜165は、第2無機絶縁層166に対するドライエッチングにより形成される。例えば、第2無機絶縁層166が窒化シリコンである場合に、エッチングガスとして三塩化ホウ素(BCl3)と窒素の混合ガスを用いて第2無機絶縁層166に対するドライエッチングを行うと、主成分が窒化ホウ素である保護膜165が形成される。なお、三塩化ホウ素と窒素の混合ガスをエッチングガスとして用いて窒化シリコンである第2無機絶縁層166に対するドライエッチングを行う場合、保護膜165を形成するためには、数百nmのみドライエッチングを行えば十分である。また、例えば、第2無機絶縁層166が窒化シリコンである場合に、エッチングガスとしてテトラフルオロメタン(CF4)とトリフルオロメタン(CHF3)の混合ガスやテトラフルオロメタンと水素の混合ガスを用いて第2無機絶縁層166に対するドライエッチングを行うと、主成分がフッ素添加シリコン酸化物である保護膜165が形成される。この場合、保護膜165には有機物が含まれ得る。 Next, as shown in FIG. 9, a protective film 165 is formed on the second inorganic insulating layer 166. The protective film 165 may be formed to include an inorganic material. The protective film 165 is formed to overlap at least a part of the upper surface 157A of the rib 157 at the peripheral edge portion 104 (between B1 and B2), the upper end portion 158-1B of the first groove portion 158-1 and the side surface 158-1C. . The protective film 165 may be formed to overlap the entire side surface 158-1C of the first groove portion 158-1. The protective film 165 may be formed to have a film thickness of 100 nm or less. The protective film 165 is formed by dry etching the second inorganic insulating layer 166. For example, when the second inorganic insulating layer 166 is silicon nitride, the main component is dry etching on the second inorganic insulating layer 166 using a mixed gas of boron trichloride (BCl 3 ) and nitrogen as an etching gas. A protective film 165 which is boron nitride is formed. Note that in the case where dry etching is performed on the second inorganic insulating layer 166 which is silicon nitride using a mixed gas of boron trichloride and nitrogen as an etching gas, dry etching of only several hundred nm is performed to form the protective film 165. It is enough to do. For example, when the second inorganic insulating layer 166 is silicon nitride, a mixed gas of tetrafluoromethane (CF 4 ) and trifluoromethane (CHF 3 ) or a mixed gas of tetrafluoromethane and hydrogen is used as an etching gas. When dry etching is performed on the second inorganic insulating layer 166, a protective film 165 whose main component is a fluorine-added silicon oxide is formed. In this case, the protective film 165 may contain an organic substance.
 なお、ドライエッチングにより保護膜165を形成する際、第1溝部158-1の底面158-1Fにおいては保護膜165が形成される速度よりもエッチングが進む速度の方が早いので、底面158-1Fには保護膜165は形成されない。 When the protective film 165 is formed by dry etching, the rate at which etching progresses is faster than the rate at which the protective film 165 is formed on the bottom surface 158-1F of the first groove portion 158-1, so the bottom surface 158-1F. The protective film 165 is not formed on the substrate.
 保護膜165を形成するのに有利なエッチング条件は、例えば、エッチングガスがBCl3/N2=45/5sccm、エッチング圧力が1Pa、エッチングパワーが500Wである。もっとも、エッチングガスの構成比はこれに限られるものではなく、N2が5%から20%の比率で含まれていてもよい。また、エッチング圧力もこれに限られるものではなく、例えば、10Pa以下の任意の数値を採用してもよい。また、エッチングパワーについてもこれに限られるものではなく、例えば、200W以上の任意の出力を使用してもよい。 The etching conditions advantageous for forming the protective film 165 are, for example, an etching gas BCl 3 / N 2 = 45/5 sccm, an etching pressure 1 Pa, and an etching power 500 W. However, the composition ratio of the etching gas is not limited to this, and N 2 may be contained in a ratio of 5% to 20%. Also, the etching pressure is not limited to this, and, for example, any numerical value of 10 Pa or less may be adopted. Further, the etching power is not limited to this, and, for example, an arbitrary output of 200 W or more may be used.
 リブ157がさらに第2溝部158-2を有する場合、第1溝部158-1の上端部158-1Bと第2溝部158-2の上端部158-2Bの間の距離158Lが10μm以下であると、リブ157の上面157Aのうち、第1溝部158-1の上端部158-1Bと第2溝部158-2の上端部158-2Bの間に位置する部分の上に保護膜165が形成されやすい。 When the rib 157 further includes the second groove 158-2, the distance 158L between the upper end 158-1B of the first groove 158-1 and the upper end 158-2B of the second groove 158-2 is 10 μm or less The protective film 165 is easily formed on the portion of the upper surface 157A of the rib 157 located between the upper end portion 158-1B of the first groove portion 158-1 and the upper end portion 158-2B of the second groove portion 158-2. .
(1-4-4.端子部の第1無機絶縁層162と第2無機絶縁層166の除去)
 次に、端子部(C1-C2間)における第1無機絶縁層162と第2無機絶縁層166をドライエッチングにより除去する。
(1-4-4. Removal of first inorganic insulating layer 162 and second inorganic insulating layer 166 in terminal portion)
Next, the first inorganic insulating layer 162 and the second inorganic insulating layer 166 in the terminal portion (between C1 and C2) are removed by dry etching.
 まず、図10に示すように、例えばフォトリソグラフィ法により、画素101(A1-A2間)及び周縁部104(B1-B2)にレジスト168を形成する。 First, as shown in FIG. 10, a resist 168 is formed on the pixels 101 (between A1 and A2) and the peripheral portion 104 (B1 to B2) by photolithography, for example.
 次に、ドライエッチングを行い、図11に示すように、端子部(C1-C2間)における第1無機絶縁層162と第2無機絶縁層166を除去する。この際、レジスト168のうち第1溝部158-1の上端部158-1B及び側面158-1Cに重畳する部分168Aなどにおいてレジスト168の膜厚が薄くなっても、周縁部104には保護膜165があるので、周縁部104において薄くなったレジスト168の下に位置する第2無機絶縁層166や第1無機絶縁層162が除去されることを防ぐことができる。 Next, dry etching is performed to remove the first inorganic insulating layer 162 and the second inorganic insulating layer 166 in the terminal portion (between C1 and C2) as shown in FIG. At this time, even if the film thickness of the resist 168 is small in the portion 168A of the resist 168 overlapping the upper end portion 158-1B and the side surface 158-1C of the first groove portion 158-1, the protective film 165 is formed on the peripheral portion 104. Accordingly, it is possible to prevent the removal of the second inorganic insulating layer 166 and the first inorganic insulating layer 162 located under the thinned resist 168 in the peripheral portion 104.
 次に、図12に示すように、レジスト168を除去する。このようにレジスト168を除去する方法に特に限定はないが、例えば、酸素プラズマによる灰化による除去などの方法を用いることができる。 Next, as shown in FIG. 12, the resist 168 is removed. There is no particular limitation on the method for removing the resist 168 as described above, but for example, a method such as removal by ashing with oxygen plasma can be used.
(1-4-5.タッチセンサの形成)
 次に、図13に示すように、タッチセンサ109を形成する。まず、第1センサ電極171を形成する。第1センサ電極171は、この例ではスパッタリング法により成膜される。第1センサ電極171は、スパッタリング法に限定されず、蒸着法、印刷法、塗布法、分子線エピタキシー法(MBE)などが用いられてもよい。第1センサ電極171は、成膜後にフォトリソグラフィ法及びエッチング法より加工される。第1センサ電極171には、酸化インジウム亜鉛(IZO)、酸化インジウム錫(ITO)、酸化亜鉛(ZnO)または酸化インジウム錫亜鉛(ITZO)の他、ゲート電極145aと同様の材料が用いられる。
(1-4-5. Formation of touch sensor)
Next, as shown in FIG. 13, the touch sensor 109 is formed. First, the first sensor electrode 171 is formed. The first sensor electrode 171 is formed by sputtering in this example. The first sensor electrode 171 is not limited to the sputtering method, and may be a vapor deposition method, a printing method, a coating method, a molecular beam epitaxy method (MBE), or the like. The first sensor electrode 171 is processed by photolithography and etching after film formation. For the first sensor electrode 171, in addition to indium zinc oxide (IZO), indium tin oxide (ITO), zinc oxide (ZnO) or indium tin zinc oxide (ITZO), the same material as the gate electrode 145a is used.
 次に、第1センサ電極171及び保護膜165上に絶縁層172を形成する。絶縁層172は、塗布法により形成される。絶縁層172には、アクリル、ポリイミド、エポキシ等の材料が用いられる。また、絶縁層172は、スピンコーティング法、蒸着法、スプレー法、インクジェット法、印刷法などを用いて数百nm以上十μm以下の厚さに形成される。 Next, the insulating layer 172 is formed on the first sensor electrode 171 and the protective film 165. The insulating layer 172 is formed by a coating method. For the insulating layer 172, a material such as acrylic, polyimide, or epoxy is used. In addition, the insulating layer 172 is formed to a thickness of several hundred nm to ten μm using a spin coating method, an evaporation method, a spray method, an inkjet method, a printing method, or the like.
 次に、絶縁層172を加工する。このとき、絶縁層172は、フォトリソグラフィ法及びエッチング法により加工される。なお、絶縁層172に感光性材料が含まれていれば、フォトリソグラフィ法のみでもよい。 Next, the insulating layer 172 is processed. At this time, the insulating layer 172 is processed by a photolithography method and an etching method. Note that as long as the insulating layer 172 contains a photosensitive material, only photolithography may be used.
 次に、第2センサ電極173を形成する。第2センサ電極173は、透光性を有する材料を用いて形成される。第2センサ電極173は、例えばスパッタリング法により形成される。なお、第2センサ電極173は、スパッタリング法に限定されず、蒸着法、印刷法、インクジェット法などが用いられてもよい。例えば、第2センサ電極173は、スパッタリング法により形成された酸化インジウム錫(ITO)が用いられる。 Next, the second sensor electrode 173 is formed. The second sensor electrode 173 is formed using a light transmitting material. The second sensor electrode 173 is formed by, for example, a sputtering method. The second sensor electrode 173 is not limited to the sputtering method, and may be a vapor deposition method, a printing method, an inkjet method, or the like. For example, indium tin oxide (ITO) formed by a sputtering method is used for the second sensor electrode 173.
(1-4-6.対向基板との貼り合わせ)
 次に、図14に示すように、対向基板となる基板200を、接着層195を用いて基板100と貼り合わせる。接着層195として、例えば、エポキシ樹脂、アクリル樹脂などを用いることができる。
(1-4-6. Bonding with opposing substrate)
Next, as shown in FIG. 14, the substrate 200 to be the opposite substrate is attached to the substrate 100 using the adhesive layer 195. For example, an epoxy resin, an acrylic resin, or the like can be used as the adhesive layer 195.
 最後に、フレキシブルプリント基板108を、異方性導電膜181を用いて導電層148と電気的に接続する。このとき、端子部(C1-C2間)に存在する膜は、レーザー照射を行うなどして、除去してもよい。異方性導電膜181には、銀、銅などの金属粒子を樹脂中に含ませ、塗布することで形成することができる。 Finally, the flexible printed substrate 108 is electrically connected to the conductive layer 148 using the anisotropic conductive film 181. At this time, the film present in the terminal portion (between C1 and C2) may be removed by laser irradiation or the like. The anisotropic conductive film 181 can be formed by including metal particles of silver, copper, or the like in a resin and coating the resin.
 以上の方法により、図2に示す表示装置10が製造される。 The display device 10 shown in FIG. 2 is manufactured by the above method.
(1-5.周縁部の機能)
 図16は、保護膜165を有しない従来の周縁部204の断面図である。
(1-5. Function of peripheral part)
FIG. 16 is a cross-sectional view of the conventional peripheral portion 204 which does not have the protective film 165.
 図16に示すように、保護膜165を有しない周縁部204においてレジスト168が設けられた場合、レジスト168のうち第1溝部158-1の上端部158-1B及び側面158-1Cに重畳する部分168Aの膜厚が、リブ157の上面157Aに重畳するレジスト268の膜厚に比べて薄くなってしまう場合がある。この場合、特に、端子部(C1-C2間)における第1無機絶縁層162及び第2無機絶縁層166を除去する際に、薄くなったレジスト168の下に位置する第2無機絶縁層166や第1無機絶縁層162まで除去される恐れがある。 As shown in FIG. 16, when the resist 168 is provided in the peripheral portion 204 not having the protective film 165, a portion of the resist 168 overlapping the upper end portion 158-1B and the side surface 158-1C of the first groove portion 158-1. The film thickness of 168A may be thinner than the film thickness of the resist 268 superimposed on the upper surface 157A of the rib 157. In this case, in particular, when the first inorganic insulating layer 162 and the second inorganic insulating layer 166 in the terminal portion (between C1 and C2) are removed, the second inorganic insulating layer 166 located under the thinned resist 168 or There is a risk that the first inorganic insulating layer 162 may be removed.
 図15は、表示装置10の製造中、端子部(C1-C2間)における第1無機絶縁層162及び第2無機絶縁層166を除去する工程において、周縁部104にレジスト168を形成した場合の断面図である。図15に示すように、周縁部104は、保護膜165を有することにより、表示装置10の製造工程(特に端子部(C1-C2間)における第1無機絶縁層162及び第2無機絶縁層166を除去する工程)において、例えば、レジスト168のうち第1溝部158-1の上端部158-1B及び側面158-1Cに重畳する部分168Aなどにおいてレジスト168の膜厚が薄くなっても、第1無機絶縁層162及び第2無機絶縁層166が保護される。すなわち、端子部(C1-C2間)における第1無機絶縁層162及び第2無機絶縁層166を除去する際に、周縁部104において薄くなったレジスト168の下に位置する第2無機絶縁層266や第1無機絶縁層262まで除去されることを防ぐことができる。したがって、封止層161の機能が正常に発揮され、表示装置10は、水分を遮断することができる。つまり、有機EL層159の水分による劣化が抑制される。結果として、信頼性の高い表示装置を提供することができる。 FIG. 15 shows a case where a resist 168 is formed on the peripheral portion 104 in the step of removing the first inorganic insulating layer 162 and the second inorganic insulating layer 166 in the terminal portion (between C1 and C2) during the manufacture of the display device 10. FIG. As shown in FIG. 15, the peripheral portion 104 has a protective film 165, whereby the first inorganic insulating layer 162 and the second inorganic insulating layer 166 in the manufacturing process of the display device 10 (particularly, between the terminals (C1-C2)). In the step of removing the resist 168, for example, even if the film thickness of the resist 168 is reduced in the portion 168A of the resist 168 overlapping the upper end portion 158-1B and the side surface 158-1C of the first groove portion 158-1. The inorganic insulating layer 162 and the second inorganic insulating layer 166 are protected. That is, when the first inorganic insulating layer 162 and the second inorganic insulating layer 166 in the terminal portion (between C1 and C2) are removed, the second inorganic insulating layer 266 located under the thinned resist 168 in the peripheral portion 104 And the removal of the first inorganic insulating layer 262 can be prevented. Therefore, the function of the sealing layer 161 is normally exhibited, and the display device 10 can block moisture. That is, the deterioration of the organic EL layer 159 due to moisture is suppressed. As a result, a highly reliable display device can be provided.
 上述の保護膜165が第1無機絶縁層162及び第2無機絶縁層166を保護する機能は、保護膜165がレジスト168よりも硬い膜であるときに十分なものとなる。保護膜165が窒化ホウ素を主成分として含むとき保護膜165は硬い膜となるので、保護膜165が窒化ホウ素を湯成分として含むことは好ましい。また、保護膜165が窒化ホウ素を含むとき保護膜165は硬い膜となるので、保護膜165に厚い膜厚は必要なく、例えば、100nm以下であってもよい。 The function of the protective film 165 described above to protect the first inorganic insulating layer 162 and the second inorganic insulating layer 166 is sufficient when the protective film 165 is a film harder than the resist 168. When the protective film 165 contains boron nitride as a main component, the protective film 165 is a hard film, and therefore, it is preferable that the protective film 165 contain boron nitride as a hot water component. In addition, since the protective film 165 is a hard film when the protective film 165 contains boron nitride, the protective film 165 does not have to have a large thickness, and may be, for example, 100 nm or less.
 リブ157が第2溝部158-2を有する場合には、第1溝部158-1の上端部158-1Bと第2溝部158-2の上端部158-2Bの間の距離158Lが10μm以下であると、リブ157の上面157Aのうち、第1溝部158-1の上端部158-1Bと第2溝部158-2の上端部158-2Bの間に位置する部分の上に保護膜165が形成されやすいため、リブ157の上面157Aのうち、第1溝部158-1の上端部158-1Bと第2溝部158-2の上端部158-2Bの間に位置する部分の上に位置する第1無機絶縁層162及び第2無機絶縁層166がより保護される。 When the rib 157 has the second groove 158-2, the distance 158L between the upper end 158-1B of the first groove 158-1 and the upper end 158-2B of the second groove 158-2 is 10 μm or less And a protective film 165 is formed on a portion of the upper surface 157A of the rib 157 located between the upper end portion 158-1B of the first groove portion 158-1 and the upper end portion 158-2B of the second groove portion 158-2. The first inorganic material is located on the portion of the upper surface 157A of the rib 157 which is located between the upper end portion 158-1B of the first groove portion 158-1 and the upper end portion 158-2B of the second groove portion 158-2. The insulating layer 162 and the second inorganic insulating layer 166 are further protected.
 上述した各実施形態の態様によりもたらされる作用効果とは異なる他の作用効果であっても、本明細書の記載から明らかなもの、または、当業者において容易に予測し得るものについては、当然に本発明によりもたらされるものと解される。 Even if other effects or effects different from the effects brought about by the aspects of the above-described embodiments are apparent from the description of the present specification or those which can be easily predicted by those skilled in the art, it is natural. It is understood that the present invention provides.
10・・・表示装置、20・・・表示装置、100・・・基板、101・・・画素、103・・・表示領域、104・・・周縁部、105・・・駆動回路、106・・・駆動回路、107・・・駆動回路、108・・・フレキシブルプリント基板、109・・・タッチセンサ、110・・・トランジスタ、120・・・容量素子、121・・・容量素子、130・・・表示素子、141・・・絶縁層、142・・・半導体層、143・・・ゲート絶縁層、145a・・・ゲート電極、145b・・・容量電極、145c・・・走査線、147a・・・ソース電極、147b・・・信号線、147c・・・ドレイン電極、148・・・導電層、149・・・絶縁層、150・・・平坦化層、150-1・・・第1平坦化層溝、150-2・・・第2平坦化層溝、150A・・・開口部、153・・・導電層、154・・・絶縁層、155・・・画素電極、157・・・リブ、157b・・・有機絶縁層、158-1・・・第1溝部、158-2・・・第2溝部、159・・・有機EL層、160・・・対向電極、161・・・封止層、162・・・第1無機絶縁層、164・・・有機絶縁層、165・・・保護膜、166・・・第2無機絶縁層、166A・・・上面、167・・・水分遮断構造、168・・・レジスト、171・・・第1センサ電極、172・・・絶縁層、173・・・第2センサ電極、181・・・異方性導電膜、195・・・接着層、200・・・基板、204・・・周縁部 10: display device 20: display device 100: substrate 101: pixel 103: display region 104: peripheral portion 105: drive circuit 106: 106 Drive circuit 107: Drive circuit 108: flexible printed circuit board 109: touch sensor 110: transistor 120: capacitive element 121: capacitive element 130: 130 Display element, 141: insulating layer, 142: semiconductor layer, 143: gate insulating layer, 145a: gate electrode, 145b: capacitance electrode, 145c: scanning line, 147a,. Source electrode, 147b: Signal line, 147c: Drain electrode, 148: Conductive layer, 149: Insulating layer, 150: Planarizing layer, 150-1: First planarizing layer Groove, 150-2 ... 2 Flattened layer groove, 150A: opening, 153: conductive layer, 154: insulating layer, 155: pixel electrode, 157: rib, 157b: organic insulating layer, 158- 1: First groove portion, 158-2: Second groove portion, 159: Organic EL layer, 160: Counter electrode, 161: Sealing layer, 162: First inorganic insulating layer , 164: organic insulating layer, 165: protective film, 166: second inorganic insulating layer, 166A: upper surface, 167: moisture blocking structure, 168: resist, 171: First sensor electrode, 172: insulating layer, 173: second sensor electrode, 181: anisotropic conductive film, 195: adhesive layer, 200: substrate, 204: peripheral portion

Claims (18)

  1.  複数の画素が配置され、有機絶縁層と、第1無機絶縁層と、第2無機絶縁層と、を含む第1領域と、
     それぞれ前記第1領域から連続する前記有機絶縁層と、前記第1無機絶縁層と、前記第2無機絶縁層と、を含む第2領域と、
    を有し、
     前記第2領域は、前記有機絶縁層に設けられた第1溝部と、前記第2無機絶縁層の上面と接して配置される保護膜と、をさらに含み、
     前記第1無機絶縁層及び前記第2無機絶縁層は、前記第1溝部の側面、上端部及び底面と、を覆い、
     前記保護膜は、前記第2領域が含む前記有機絶縁層の上面の少なくとも一部と、前記第1溝部の上端部と、前記第1溝部の側面の少なくとも一部と重畳し、
     前記第1溝部の底面の幅に対する前記第1溝部の高さの比が1以下である表示装置。
    A first region including a plurality of pixels and including an organic insulating layer, a first inorganic insulating layer, and a second inorganic insulating layer;
    A second region including the organic insulating layer continuous from the first region, the first inorganic insulating layer, and the second inorganic insulating layer;
    Have
    The second region further includes a first groove portion provided in the organic insulating layer, and a protective film disposed in contact with the upper surface of the second inorganic insulating layer,
    The first inorganic insulating layer and the second inorganic insulating layer cover the side surface, the upper end portion, and the bottom surface of the first groove portion,
    The protective film overlaps at least a portion of the upper surface of the organic insulating layer included in the second region, an upper end portion of the first groove portion, and at least a portion of a side surface of the first groove portion.
    The display device, wherein the ratio of the height of the first groove to the width of the bottom of the first groove is 1 or less.
  2.  前記第2領域は、前記有機絶縁層に設けられた第2溝部をさらに含み、前記第1溝部の上端部と前記第2溝部の上端部の間の距離に対する前記底面の幅の比が2以下である請求項1に記載の表示装置。 The second region further includes a second groove provided in the organic insulating layer, and a ratio of a width of the bottom surface to a distance between an upper end of the first groove and an upper end of the second groove is 2 or less The display device according to claim 1, wherein
  3.  前記第2領域は、前記有機絶縁層に設けられた第2溝部をさらに含み、前記第1溝部の上端部と前記第2溝部の上端部の間の距離が10μm以下である請求項1に記載の表示装置。 The second region further includes a second groove provided in the organic insulating layer, and a distance between an upper end of the first groove and an upper end of the second groove is 10 μm or less. Display device.
  4.  前記第1溝部の底面の幅が5μm以上30μm以下である請求項1から3のいずれか一項に記載の表示装置。 The display device according to any one of claims 1 to 3, wherein a width of a bottom surface of the first groove portion is 5 μm to 30 μm.
  5.  前記保護膜は、無機材料を含む請求項1から3のいずれか一項に記載の表示装置。 The display device according to any one of claims 1 to 3, wherein the protective film contains an inorganic material.
  6.  前記無機材料は窒化ホウ素である請求項5に記載の表示装置。 The display device according to claim 5, wherein the inorganic material is boron nitride.
  7.  前記第1無機絶縁層及び前記第2無機絶縁層は窒化シリコン層である請求項1から3のいずれか一項に記載の表示装置。 The display device according to any one of claims 1 to 3, wherein the first inorganic insulating layer and the second inorganic insulating layer are silicon nitride layers.
  8.  前記保護膜の膜厚は100nm以下である請求項1から3のいずれか一項に記載の表示装置。 The display device according to any one of claims 1 to 3, wherein a film thickness of the protective film is 100 nm or less.
  9.  前記画素は有機EL素子を含む請求項1から3のいずれか一項に記載の表示装置。 The display device according to any one of claims 1 to 3, wherein the pixel includes an organic EL element.
  10.  表示領域の外側に第1溝部を有するように有機絶縁層を形成し、
     前記有機絶縁層の上面並びに前記第1溝部の側面、上端部及び底面を覆うように第1無機絶縁層を形成し、
     前記第1無機絶縁層上に第2無機絶縁層を形成し、
     前記第2無機絶縁層上に前記有機絶縁層の上面の少なくとも一部と、前記第1溝部の上端部と、前記第1溝部の側面の少なくとも一部と重畳するように保護膜を形成することを含み、
     前記第1溝部の底面の幅に対する前記第1溝部の高さの比が1以下である表示装置の製造方法。
    Forming an organic insulating layer so as to have a first groove outside the display area;
    A first inorganic insulating layer is formed to cover the upper surface of the organic insulating layer and the side surface, the upper end portion and the bottom surface of the first groove portion,
    Forming a second inorganic insulating layer on the first inorganic insulating layer;
    Forming a protective film on the second inorganic insulating layer so as to overlap at least a part of the upper surface of the organic insulating layer, an upper end of the first groove, and at least a part of the side surface of the first groove; Including
    A method of manufacturing a display device, wherein the ratio of the height of the first groove to the width of the bottom of the first groove is 1 or less.
  11.  前記有機絶縁層はさらに第2溝部を有するように形成されることを含み、
     前記第1溝部の上端部と前記第2溝部の上端部の間の距離に対する前記底面の幅の比が2以下である請求項10に記載の表示装置の製造方法。
    And the organic insulating layer is further formed to have a second groove,
    The method according to claim 10, wherein the ratio of the width of the bottom surface to the distance between the upper end of the first groove and the upper end of the second groove is 2 or less.
  12.  前記有機絶縁層はさらに第2溝部を有するように形成されることを含み、
     記第1溝部の上端部と前記第2溝部の上端部の間の距離が10μm以下である請求項10に記載の表示装置の製造方法。
    And the organic insulating layer is further formed to have a second groove,
    The method according to claim 10, wherein a distance between an upper end of the first groove and an upper end of the second groove is 10 μm or less.
  13.  前記第1溝部の底面の幅が5μm以上30μm以下である請求項10から12のいずれか一項に記載の表示装置の製造方法。 The method of manufacturing a display device according to any one of claims 10 to 12, wherein a width of a bottom surface of the first groove portion is 5 μm to 30 μm.
  14.  前記保護膜は、無機材料を含む請求項10から12のいずれか一項に記載の表示装置の製造方法。 The method for manufacturing a display device according to any one of claims 10 to 12, wherein the protective film contains an inorganic material.
  15.  前記無機材料は窒化ホウ素である請求項14に記載の表示装置の製造方法。 The method according to claim 14, wherein the inorganic material is boron nitride.
  16.  前記第1無機絶縁層及び前記第2無機絶縁層は窒化シリコン層である請求項10から12のいずれか一項に記載の表示装置の製造方法。 The method according to any one of claims 10 to 12, wherein the first inorganic insulating layer and the second inorganic insulating layer are silicon nitride layers.
  17.  前記保護膜の膜厚は100nm以下である請求項10から12のいずれか一項に記載の表示装置の製造方法。 The method for manufacturing a display device according to any one of claims 10 to 12, wherein a film thickness of the protective film is 100 nm or less.
  18.  前記保護膜は、ドライエッチングにより形成される請求項10から12のいずれか一項に記載の表示装置の製造方法。 The method for manufacturing a display device according to any one of claims 10 to 12, wherein the protective film is formed by dry etching.
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