WO2019140680A1 - 测试卡以及测试系统 - Google Patents

测试卡以及测试系统 Download PDF

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Publication number
WO2019140680A1
WO2019140680A1 PCT/CN2018/073610 CN2018073610W WO2019140680A1 WO 2019140680 A1 WO2019140680 A1 WO 2019140680A1 CN 2018073610 W CN2018073610 W CN 2018073610W WO 2019140680 A1 WO2019140680 A1 WO 2019140680A1
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WIPO (PCT)
Prior art keywords
test
test card
interface
communication module
pxi
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PCT/CN2018/073610
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English (en)
French (fr)
Inventor
覃伟和
李仕军
张伟宏
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深圳市汇顶科技股份有限公司
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Priority to PCT/CN2018/073610 priority Critical patent/WO2019140680A1/zh
Publication of WO2019140680A1 publication Critical patent/WO2019140680A1/zh

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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer

Definitions

  • the embodiments of the present application relate to the field of testing technologies, and in particular, to a test card and a test system.
  • PXI PCI extensions for Instrumentation
  • PCI PC-based measurement and automation platform.
  • PXI combines the electrical bus characteristics of PCI (Peripheral Component Interconnection), the ruggedness and modularity of CompactPCI (Compact PCI), and the mechanical packaging of Eurocard for applications such as test, measurement and data acquisition. Mechanical, electrical, and software specifications.
  • the PXI test system generally includes a controller, a chassis, multiple test cards, etc.
  • the controller and the chassis are connected by a PCI connection cable, and a PCI bus is disposed in the chassis to meet the PCI electrical characteristics of the PXI system; the chassis can control multiple sheets.
  • the test cards work together to complete the test, so that the PXI system can test more complex test content; and the test card integrates some test functions, and can meet the requirements of different test scenarios by replacing different test cards, so that the test system has higher Scalability.
  • test content in some existing test scenarios is relatively simple, such as in a small-scale mass production test or in a laboratory, on the one hand, it is not necessary to work with multiple test cards to complete the test, and on the other hand, the cost of the chassis and the PCI connection line is completed. Expensive, which ultimately leads to waste of resources and increased costs.
  • the purpose of the embodiments of the present application is to provide a test card and a test system for solving at least the above problems in the prior art.
  • the embodiment of the present application provides a test card, including: a PXI/PXIE test card body, a first communication module, and a power module, wherein the first communication module is set in PXI/ On the PXIE test card body, the test card directly performs data interaction with the controller through the first communication module, so that the test card obtains the test command of the controller through the data interaction, and enables the controller to obtain the test through data interaction.
  • the power module is disposed on the PXI/PXIE test card body for powering the test card.
  • the embodiment of the present application further provides a testing system including a controller and a test card as described above.
  • the embodiment provides a test card and a test system, which can make the test card directly interact with the controller through the setting of the first communication module, and can supply power through the power module, without setting the chassis and the PCI connection line, and the test card can be independent. Testing is completed, which reduces test costs and prevents waste of resources; and a single test card is smaller, more portable, and more flexible to use than a chassis.
  • FIG. 1 is a schematic structural diagram of a test system including a test card
  • test card 2 is a schematic structural view of a test card
  • FIG. 3 is a schematic structural diagram of a test card according to an embodiment of the present application.
  • test card 4 is a schematic structural diagram of another test card according to an embodiment of the present application.
  • FIG. 5 is a schematic structural diagram of a PXI/PXIE test system according to an embodiment of the present application.
  • FIG. 6 is a schematic structural diagram of another PXI/PXIE test system according to an embodiment of the present disclosure.
  • FIG. 7 is a schematic flowchart of a testing method based on a test card according to an embodiment of the present application.
  • FIG. 1 is a schematic structural diagram of a test system including a test card, and FIG. 1 illustrates an example in which the object to be tested is a chip to be tested. As shown in FIG. 1, it includes a carrier board 11, a test card 12, a chassis 13, and a controller 14.
  • the controller 14 is coupled to the chassis 13 via a PCI connection line, and the controller 14 is operative to determine test commands.
  • the determined test command is different for different test scenarios, and a corresponding test command may be determined by a person skilled in the art according to the test scenario, which is not limited herein.
  • the controller 14 may be a PC or the like, and the controller 14 may be installed with a driver for testing, and the driver is used to determine a test command according to a user's operation, and the test command is transmitted to the chassis 13 through the PCI cable, thereby making the chassis 13 can control multiple test cards 12 to work together through test commands.
  • the test scenarios are different, the drivers are different, and the generated test commands are different.
  • the chassis 13 is connected to a plurality of test cards 12.
  • the chassis 13 may include a plurality of PXI/PXIE connectors, and the plurality of test cards 12 are connected to different PXI/PXIE connectors in a preset order, and the chassis 13 controls the plurality of test cards 12 to work according to the test command. carry out testing.
  • the plurality of test cards 12 can respectively implement different test functions, which is equivalent to modularizing part of the test functions in the test system by the test card 12, so that the test card 12 can be replaced or upgraded according to different test scenarios, so that the test system can be conveniently Combine or improve.
  • test system is facilitated, and the plurality of test cards 12 are cooperatively operated under the control of the chassis 13, thereby ensuring the accuracy of the test system.
  • the chassis 13 may be provided with a star trigger line or a trigger bus, etc., so that the trigger time of the plurality of test cards 12 can be controlled by the star trigger line, the trigger bus, etc., and the time consistency of the plurality of test cards 12 is ensured. .
  • measuring a plurality of chips to be tested in a certain system requires that a plurality of chips to be tested are simultaneously triggered.
  • a plurality of test cards 12 are controlled by a star trigger line, a trigger bus, etc. on the chassis 13 to be triggered to start working. In order to ensure the consistency of the triggering time of the plurality of chips to be tested.
  • test performance of the chassis 13 can also be improved by adding a special test card 12, for example, by adding the clock test card 12 to provide a more accurate timing function for the chassis 13, thereby finally improving the chassis. 13 test performance.
  • test card 12 is used to provide specific test functions.
  • the test card 12 includes a PXI/PXIE test card body and a PXI/PXIE interface 121 provided on the PXI/PXIE test card body.
  • the PXI/PXIE interface 121 can be coupled to the chassis 13 such that the test card 12 can receive corresponding test commands transmitted via the PCI standard via the chassis 13 such that the test card 12 can begin to operate in accordance with the test commands.
  • the PXI/PXIE interface 121 can include a connector.
  • the PXI interface of the 3U standard test card 12 shown in FIG. 2 includes a first connector J1 and a second connector J2.
  • the first connector J1 can transmit a 32-bit PCI signal; the second connector J2 can transmit a 64-bit PCI extension signal or other extended signals added by the PXI, and other extended signals can be star-type bus signals transmitted by the star-type trigger line. Or a trigger bus signal that triggers a bus transfer.
  • the test card 12 can also be connected to the power supply of the chassis 13 through the PXI/PXIE interface 121 to supply power to the test card 12.
  • the PXI/PXIE test card body can carry the logic circuit for testing.
  • the PXI/PXIE test card body can be integrated with a test FPGA (Programmable Logic Gate) module. After the test card 12 starts working, the FPGA module can determine the test signal according to the test command received by the PXI interface.
  • FPGA Processable Logic Gate
  • the PXI/PXIE test card body can also be provided with an interface module, and the FPGA module performs data interaction with the chip to be tested through the interface module, thereby transmitting the test signal to the chip to be tested, and determining the corresponding test result signal through the interface module, and the test result signal
  • the interface module includes a first interface circuit, a first user interface 122, and the FPGA is connected to the first interface circuit, the first interface circuit is used to connect with the first user interface 122, and the first user interface 122 is used for placing and testing.
  • the carrier board 11 of the chip is connected.
  • the FPGA module can output a test signal to the carrier 11 through the first interface circuit and the first user interface 122, and receive a test result signal returned by the carrier 11.
  • the carrier board 11 may be provided with a second user interface 111.
  • the first user interface 122 of the test card 12 and the second user interface 111 of the carrier board 11 may be connected by connecting wires, thereby implementing the test card 12 and the carrier board 11. Connection.
  • the type of the first user interface 122 and the second user interface 111 may be a common interface type, or the corresponding interface type may be set according to the specifically transmitted data, as long as the data transmission requirement between the carrier 11 and the test card 12 can be met. .
  • the carrier board 11 since the carrier 11 is used to place the chip to be tested.
  • the carrier board 11 may be provided with a plurality of slots, so that a plurality of chips to be tested are inserted into the slots; further, the carrier board 11 may further be provided with a transmission line, which is connected to the carrier board 11 through the transmission line.
  • the test signal outputted by the connected test card 12 is transmitted to the input ends of the plurality of chips to be tested, and then the test result signals outputted from the outputs of the plurality of chips to be tested are transmitted to the test card 12 to be tested by the chip to be tested.
  • the controller 14 can determine the test command according to the operation of the user, and send a test command to the chassis 13 through the PCI cable, and then the plurality of test cards 12 are controlled by the chassis 13 to work together, and the chassis 13 triggers the test card 12 to output correspondingly.
  • the test signal is sent to the carrier board 11, and then input to the chip to be tested by the circuit on the carrier board 11.
  • the chip to be tested outputs a test result signal, and the test result signal is transmitted to the test card 12 through the carrier board 11, and then returned to the test card 12 by the test card 12.
  • the chassis 13 is returned by the chassis 13 to the controller 14 to complete the entire testing process.
  • the following embodiments of the present application provide a test card for an existing small-scale production test or a test in a laboratory, without setting a chassis and eliminating the need for a PCI connection between the chassis and the controller. It meets test needs, preventing waste of resources and reducing test costs.
  • FIG. 3 is a schematic structural diagram of a test card according to an embodiment of the present disclosure. As shown in FIG. 3, the method includes: a PXI/PXIE test card main body 31, a first communication module 32, and a power module 33.
  • the PXI/PXIE test card main body 31 serves as a bearer unit of the test circuit, and the FPGA module 34 can be integrated therein, and the FPGA module 34 is configured to determine a corresponding test signal according to the test command of the controller, and is used to determine the to-be-tested signal.
  • the test result signal corresponding to the measurement object.
  • An interface module 35 may be disposed in the PXI/PXIE test card main body 31, and the FPGA module performs data interaction with the object to be tested through the interface module 35, so that the object to be tested obtains a test signal, and the FPGA is caused.
  • the module 34 determines a test result signal corresponding to the object to be tested.
  • the interface module 35 includes the foregoing first interface circuit and the first user interface.
  • the first interface circuit is connected to the first user interface, and the second user interface is disposed on the carrier board, and the first user interface is connected to the carrier through the second user interface, the first interface circuit and the FPGA module Connecting 34, so that the FPGA module 34 is connected to the carrier through the first interface circuit and the first user interface, thereby performing data interaction with the object to be tested disposed on the carrier board, due to The objects to be tested are placed on the carrier board, thereby achieving simultaneous measurement of a plurality of objects to be tested.
  • test signal is output to the input end of the object to be tested through the interface module 35, and the object to be tested outputs a corresponding test result signal according to the test signal, and the test result signal is transmitted to the FPGA module 34 through the interface circuit, so that the FPGA module 34 determines the corresponding object to be tested. Test result signal.
  • the FPGA module 34 can provide the function of testing the touch chip, and the controller can send the test command of the test finger touch to the FPGA module 34 through the first communication module 32, and the FPGA module 34 can touch the test finger according to the received test.
  • the control test command generates an analog signal touched by the finger; the analog signal touched by the finger (ie, the test signal) is input to the input end of the touch chip (ie, the object to be tested); the output end of the touch chip outputs the touch result signal, and
  • the touch result signal ie, the test result signal
  • the touch result signal ie, the test result signal
  • the FPGA module 34 determines the test result according to the touch result signal, and transmits the test result to the controller through the first communication module 32; After the touch result signal outputted by the output end of the measurement object is transmitted to the FPGA module 34, the FPGA module 34 can directly transmit the touch result signal as a test result to the controller through the first communication module 32.
  • the FPGA module 34 can also provide other functions, such as providing a function of testing an audio and video chip, testing a function of the display chip, and the like.
  • the first communication module 32 is disposed on the PXI/PXIE test card main body 31, and the test card directly interacts with the controller through the first communication module 32, so that the test card can obtain the controller through data interaction. Test commands and enable the controller to obtain test results through data interaction.
  • the first communication module 32 may include any one of a USB communication module, a network communication module, and a Bluetooth communication module, as long as the first communication module 32 can directly communicate with the controller, the embodiment is here. Not limited. Compared with the PCI interface, the USB communication module, the network communication module, and the Bluetooth communication module are simple in implementation and low in cost, so that the cost of the test card is not greatly increased.
  • the USB communication module when the first communication module 32 is a USB communication module, the USB communication module includes a USB interface 321 and a USB PHY module 322 connected to the USB interface, and the USB interface is used to connect the USB data cable, the USB PHY module. Connected to the FPGA module 34 for converting data. Generally, the FPGA module 34 interacts with the chassis through the PXI interface, and the data transmitted is based on the PCI standard. Therefore, in this embodiment, the USB PHY module can convert the USB standard-based data received based on the USB interface into a PCI-based standard.
  • the data is transferred to the FPGA module 34, or the PCI standard-based data is converted into USB standard data through the USB PHY module, and then output through the USB interface, so that the FPGA module 34 and the controller are performed through the USB PHY module and the USB interface. Data interaction.
  • the number of USB interfaces may be one or multiple, and multiple USB interfaces may implement faster data transmission than one USB interface.
  • the network communication module may specifically include a network adapter and a network interface, the network adapter is connected to the network interface, the network interface is used to connect the network cable, and the network adapter is connected to the FPGA module 34. Convert data.
  • the network adapter can convert the data based on the network transmission protocol into data based on the PCI standard, and then transmit it to the FPGA module 34, or convert the data based on the PCI standard into data based on the network transmission protocol, and output through the network interface, thereby making the FPGA module 34 Data interaction with the controller through a network adapter and a network interface.
  • the power module 33 is disposed on the PXI/PXIE test card main body 31 for supplying power to the test card.
  • the power module 33 includes an external power interface 331 and a power circuit 332 connected to an external power source for connecting to an external power source, so that the external power source is connected to the power circuit through the external power interface.
  • Power the test card Generally, the power supply provided by the chassis for the test card is 12V.
  • the external power supply connected to the power interface can be the same as the power supply provided by the chassis, and is also 12V.
  • the test card is connected to the chassis through the PXI interface, and performs data interaction with the chassis. And the power is supplied through the PXI interface.
  • the test card can directly perform data interaction with the controller, and the power is supplied through the power module 33, and the test card can be independent without setting the chassis and the PCI connection line. Testing is completed, which reduces test costs and prevents waste of resources; and a single test card is smaller, more portable, and more flexible to use than a chassis.
  • the plurality of test cards are controlled by the chassis to work together for testing.
  • the test card further includes a PXI/PXIE interface 36 for connecting to the chassis to be connected to the controller through the chassis.
  • the PXI/PXIE interface is similar to the PXI/PXIE interface on the test card provided in Figure 2, and will not be described here.
  • the test card When the test card includes both the first communication module 32 and the PXI/PXIE interface, the test card of this embodiment can be applied to two different test systems, and the two test systems are as shown in FIG. 5 and FIG. 6, FIG.
  • the illustrated PXI/PXIE test system can be used in a large-scale mass production test system; another PXI/PXIE test system shown in Figure 6 can be used for small-scale mass production testing or in a laboratory.
  • the object to be tested is a chip to be tested
  • the first communication module 32 is a USB communication module as an example.
  • the PXI/PXIE test system for mass production includes: a carrier board 51, a test card 52 as described above, a chassis 53, and a controller 54.
  • test card performs data interaction and power supply through the PXI/PXIE interface, and the USB interface of the test card is suspended, does not perform data interaction with the controller, and the external power interface is not connected to the external power source.
  • the controller sends a test command to the chassis, and the chassis controls multiple test cards to work together.
  • Each test card is connected to the carrier board, and multiple test chips can be set on each carrier board, thereby achieving large-scale mass production. The scale of the chip under test is tested.
  • the PXI/PXIE test system for small-scale mass production testing or for use in a laboratory includes a carrier board 61, a test card 62 as described above, and a controller 63.
  • a plurality of chips to be tested can be placed on the carrier board, and the carrier board is connected to the test card through a connecting wire.
  • the USB interface of the test card is connected to the controller, and the external power interface is connected to the external power source.
  • connection between the carrier board and the test card and the data interaction are similar to those shown in FIG. 2 above, and details are not described herein again.
  • the PXI/PXIE interface is suspended, does not participate in the test, and the USB interface communicates with the controller, and the external power interface is connected to the external power source.
  • the external power supply is provided, and the test system shown in FIG. 6 no longer includes a chassis and a PCI connection line for connecting the chassis and the controller.
  • the driver inside the controller needs to make an adaptive change, so that the control command issued by the controller and the first communication interface of the receivable data format and the test card are adaptation.
  • the switching module may be set on the controller end, thereby converting the original PCI interface into an interface that is adapted to the first communication module 32. .
  • the test card can separately test the plurality of chips to be tested, which is sufficient for the testing requirements in the laboratory or small-scale production.
  • the chip to be tested is not necessarily a chip, and may be another semiconductor device, which is not limited herein.
  • the shape of the test card can be designed according to the general structural standard, such as according to the general 3U structural standard, so that the test card can be adapted to the shape of the chassis based on the 3U standard design; or according to the 6U structure. Standard design, etc.
  • the test card further includes a housing in which the PXI/PXIE test card main body 31 is disposed, thereby ensuring that damage is less likely to occur when the test card is used alone by the housing.
  • the shape of the interior of the housing matches the shape characteristics of the test card.
  • the interface of the test card such as the external power interface, the PXI/PXIE interface, the USB interface, etc.
  • the housing is provided with a through hole adapted to the interface.
  • the PXI/PXIE test card main body 31 is detachably connected to the casing, so that the test card and the casing can be easily disassembled when the test card is shown in FIG. , so that multiple test cards can be placed in the chassis.
  • FIG. 7 is a schematic flowchart of a testing method based on a test card according to an embodiment of the present disclosure.
  • a test chip is still taken as an example for description. As shown in Figure 7, it includes:
  • the controller determines a category of the test system.
  • the category of the test system may include the above two types, the first one is the test system applied to mass production shown in FIG. 5, and the second is applied to small-scale mass production or application shown in FIG. Test system in the laboratory.
  • the test command issued by the controller and the test data received by the controller are data based on the PCI reference.
  • the test command issued by the controller and the test data it receives are based on the data reference corresponding to the first communication module.
  • test system is the test system shown in FIG. 5, the flow is similar to the process shown in FIG. 1, and details are not described herein again.
  • the controller sends a touch test command to the first communication module.
  • the test command when the controller sends a touch test command, the test command may include only the test command applicable to the test card, and does not include the test command corresponding to the chassis. For example, it only includes touch test commands that trigger the work of the test card, and does not include touch test commands for coordinating multiple test cards for the chassis.
  • the touch test command is transmitted according to the data reference corresponding to the first communication module.
  • the test card receives the touch test command through the first communication module, and determines an analog signal touched by the finger according to the touch test command.
  • the first communication module converts the received touch test command into a touch test command based on the PCI reference, and the FPGA module in the test card recognizes the touch test command, and determines an analog signal touched by the finger according to the first test module.
  • the test card outputs an analog signal touched by the finger to the plurality of chips to be tested on the carrier board.
  • the second user interface on the carrier board is connected to the first user interface of the test card, thereby implementing data interaction between the carrier board and the test card.
  • the plurality of chips to be tested disposed on the carrier board are connected to the second user interface, and the analog signal touched by the finger is input to the plurality of chips to be tested on the carrier board through the first user interface and the second user interface.
  • the chip to be tested outputs a touch result signal according to an analog signal touched by the input finger.
  • the test card receives a touch result signal output by the chip to be tested.
  • the test card and the carrier board perform data interaction between the first user interface and the second user interface, so that the carrier board transmits the touch result outputted by the chip to be tested to the test card, and the test card receives the touch.
  • the internal FPGA module can determine whether the touch result signal is a preset touch result signal, and then use the judgment result as a test result, and perform simple processing such as data conversion, and then perform step S76; or After receiving the touch result signal, the test card directly uses the touch result signal as a test result, and performs simple processing such as data conversion, and then performs step S76.
  • test card uploads the test result to the controller through the first communication module, and then the controller processes the test result to generate a test report.
  • the method for generating a test report is similar to the existing one, and is not described here.
  • embodiments of the present application can be provided as a method, apparatus (device), or computer program product.
  • the present application can take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment in combination of software and hardware.
  • the application can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) including computer usable program code.
  • the computer program instructions can also be stored in a computer readable memory that can direct a computer or other programmable data processing device to operate in a particular manner, such that the instructions stored in the computer readable memory produce an article of manufacture comprising the instruction device.
  • the apparatus implements the functions specified in one or more blocks of a flow or a flow and/or block diagram of the flowchart.
  • These computer program instructions can also be loaded onto a computer or other programmable data processing device such that a series of operational steps are performed on a computer or other programmable device to produce computer-implemented processing for execution on a computer or other programmable device.
  • the instructions provide steps for implementing the functions specified in one or more of the flow or in a block or blocks of a flow diagram.

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Abstract

一种测试卡（52,62）以及测试系统，其中，测试卡（52,62）包括：PXI/PXIE测试卡主体（31）、第一通信模块（32）、电源模块（33），其中，第一通信模块（32）设置在PXI/PXIE测试卡主体（31）上，测试卡（52,62）通过第一通信模块（32）直接与控制器（54,63）进行数据交互，以使得测试卡（52,62）通过数据交互获得控制器（54,63）的测试命令，以及使得控制器（54,63）通过数据交互获得测试结果；电源模块（33）设置在PXI/PXIE测试卡主体（31）上，用于为测试卡（52,62）供电。通过设置第一通信模块（32）使得测试卡（52,62）可以直接与控制器（54,63）进行数据交互，并通过电源模块（33）供电，无需再设置机箱（13）以及PCI连接线，测试卡（52,62）可以独立完成测试，从而降低了测试成本，防止了资源浪费；与设置机箱（13）相比，单独一个测试卡（52,62）的体积更小，更加便携，使用时更加灵活。

Description

测试卡以及测试系统 技术领域
本申请实施例涉及测试技术领域，尤其涉及一种测试卡以及测试系统。
背景技术
PXI(PCI extensions for Instrumentation，面向仪器系统的PCI扩展)是一种基于PC的测量和自动化平台。PXI结合了PCI(Peripheral Component Interconnection,外围组件互连)的电气总线特性、CompactPCI(紧凑PCI)的坚固性及模块化、以及Eurocard机械封装的特性,其适用于试验、测量与数据采集等应用的机械规范、电气规范和软件规范。
PXI测试系统一般包括控制器、机箱、多个测试卡等，控制器与机箱通过PCI连接线连接，机箱内设置有PCI总线等，从而满足PXI系统对PCI电气特性的要求；机箱可以控制多张测试卡协同工作完成测试，从而使得PXI系统可以测试较为复杂的测试内容；而测试卡集成有部分测试功能，通过更换不同的测试卡即可满足不同的测试场景的需求，使得测试系统有较高的可扩展性。
然而现有的部分测试场景中的测试内容较为简单，如小规模的量产测试中或者实验室中，一方面无需多个测试卡协同工作即可完成测试，另外一方面机箱以及PCI连接线造价昂贵，从而最终导致资源的浪费和成本的增加。
发明内容
本申请实施例的目的在于提供一种测试卡以及测试系统，用以至少解决现有技术中的上述问题。
为实现本申请实施例的目的，本申请实施例提供了一种测试卡，其包括：PXI/PXIE测试卡主体、第一通信模块、电源模块，其中，所述第一通信模块设置在PXI/PXIE测试卡主体上，测试卡通过所述第一通信模块直接与控制器进行数据交互，以使得所述测试卡通过所述数据交互获得控制器的测试命令， 以及使得控制器通过数据交互获得测试结果；所述电源模块设置在PXI/PXIE测试卡主体上，用于为所述测试卡供电。
为实现本申请实施例的目的，本申请实施例还提供了测试系统，其包括控制器以及如上所述的测试卡。
本实施例提供一种测试卡以及测试系统，其通过设置第一通信模块使得测试卡可以直接与控制器进行数据交互，并通过电源模块供电，无需再设置机箱以及PCI连接线，测试卡可以独立完成测试，从而降低了测试成本，防止了资源浪费；且与设置机箱相比，单独一个测试卡的体积更小，更加便携，使用时更加灵活。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域技术人员来讲，在不付出创造性劳动性的前提下，还可以根据这些附图获得其他的附图。
图1为一种包括测试卡的测试系统结构示意图；
图2为一种测试卡的结构示意图；
图3为本申请实施例提供的一种测试卡的结构示意图；
图4为本申请实施例提供的另一种测试卡的结构示意图；
图5为本申请实施例提供的一种PXI/PXIE测试系统的结构示意图；
图6为本申请实施例提供的另一种PXI/PXIE测试系统的结构示意图；
图7为本申请实施例提供的一种基于测试卡的测试方法流程示意图。
具体实施方式
以下将配合图示及实施例来详细说明本申请的实施方式，藉此对本申请如何应用技术手段来解决技术问题并达成技术功效的实现过程能充分理解并据以实施。
图1为一种包括测试卡的测试系统结构示意图，图1中以待测对象为待测芯片进行举例说明。如图1所示，其包括：载板11、测试卡12、机箱13、 控制器14。
控制器14通过PCI连接线与机箱13连接，控制器14用于确定测试命令。当然，针对不同的测试场景，确定的测试命令也不同，本领域的技术人员可以根据测试场景确定对应的测试命令，本实施例在此不进行限定。
具体地，控制器14可以为PC等，控制器14上可以安装有用于测试的驱动程序，驱动程序用于根据用户的操作确定测试命令，测试命令通过PCI连接线传输至机箱13，从而使得机箱13可以通过测试命令控制多个测试卡12协同工作。当然，测试场景不同，驱动程序也不同，生成的测试命令也不同。
机箱13与多个测试卡12连接。具体地，机箱13上可以包括多个PXI/PXIE连接器，多个测试卡12按照预设的顺序与不同的PXI/PXIE连接器连接，机箱13根据测试命令控制多个测试卡12协同工作来进行测试。
多个测试卡12可以分别实现不同的测试功能，相当于通过测试卡12将测试系统中的部分测试功能模块化，使得测试卡12可以根据测试场景的不同进行更换或者升级，使得测试系统可以方便地进行组合或改进。
另外，方便了测试系统的构建，多个测试卡12在机箱13的控制下协同操作，从而保证了测试系统的准确性。
具体地，机箱13上可以设置有星型触发线或触发总线等，从而可以通过星型触发线、触发总线等来控制多张测试卡12的触发时间,保证多张测试卡12的时间一致性。例如测量某一系统中多种待测芯片，需要使得多种待测芯片同时被触发，此时，通过机箱13上的星型触发线、触发总线等控制多个测试卡12同时被触发开始工作，从而保证被测量的多种待测芯片的触发时间的一致性。
此外，为了提高测试系统的准确性，还可以通过增加特殊的测试卡12来提高机箱13的测试性能，例如通过增加时钟测试卡12来为机箱13提供更加准确的计时功能等，从而最终提高机箱13的测试性能。
本实施例中，测试卡12用于提供具体测试功能。测试卡12包括：PXI/PXIE测试卡主体、设置在PXI/PXIE测试卡主体上的PXI/PXIE接口121。
PXI/PXIE接口121可与机箱13连接,从而使得测试卡12可以通过机箱13接收到基于PCI标准传输的相应的测试命令，使得测试卡12可以根据测试命令开始工作。具体地，为了满足PXI测试系统对PCI标准的要求，PXI/PXIE 接口121可以包括连接器。例如图2示出的3U标准的测试卡12的PXI接口包括第一连接器J1和第二连接器J2。在与机箱13连接后，第一连接器J1可以传输32bitPCI信号；第二连接器J2可以传输64bitPCI扩展信号或PXI增加的其他扩展信号，其他扩展信号可以为星型触发线传输的星型总线信号或触发总线传输的触发总线信号等。同时测试卡12还可以通过PXI/PXIE接口121与机箱13的电源连接，以为测试卡12供电。
PXI/PXIE测试卡主体可以承载有测试用的逻辑电路。具体的，PXI/PXIE测试卡主体内部可以集成有测试用的FPGA(可编程逻辑门电路)模块，当测试卡12开始工作后，FPGA模块可以根据PXI接口接收的测试命令确定测试信号。
PXI/PXIE测试卡主体还可以设置有接口模块，FPGA模块通过接口模块与待测芯片进行数据交互，从而将测试信号传输至待测芯片，并通过接口模块确定对应的测试结果信号，测试结果信号为将测试信号输入至待测对象后，待测对象输出的测试结果信号。具体地，接口模块包括第一接口电路、第一用户接口122,FPGA与第一接口电路连接，第一接口电路用于与第一用户接口122连接，第一用户接口122用于与放置待测芯片的载板11连接。FPGA模块可以通过第一接口电路以及第一用户接口122将测试信号输出至载板11，以及接收载板11返回的测试结果信号。
具体地，载板11上可以设置有第二用户接口111，测试卡12的第一用户接口122与载板11的第二用户接口111可以通过连接导线连接，从而实现测试卡12以及载板11的连接。第一用户接口122以及第二用户接口111的类型可以为通用接口类型，也可以根据具体传输的数据设置对应的接口类型，只要能够满足载板11与测试卡12之间的数据传输要求即可。
具体地，由于载板11用于放置待测芯片。为此，载板11上可以设置有多个插槽，从而将多个待测芯片插在插槽内；进一步地，载板11上还可以设置有传输线路，通过传输线路将与载板11连接的测试卡12输出的测试信号传输至多个待测芯片的输入端，然后将多个待测芯片的输出端输出的测试结果信号传输至测试卡12，以对待测芯片进行测试。
在测试时，控制器14可以根据用户的操作确定测试命令，并通过PCI连 接线下发测试命令至机箱13，再由机箱13控制多张测试卡12协同工作，机箱13触发测试卡12输出相应的测试信号至载板11，再由载板11上的电路输入至待测芯片，待测芯片输出测试结果信号，测试结果信号通过载板11传输至测试卡12，再由测试卡12返回到机箱13，由机箱13返回至控制器14，从而完成整个测试过程。
由上可见，现有的小规模的量产测试中或者实验室中的测试内容较为简单，如果继续使用上述图1中多个测试卡12协同工作以完成测试的话，而由于机箱13以及PCI连接线造价昂贵，会最终导致资源的浪费和成本的增加。
有鉴于此，本申请下述实施例提供一种测试卡，针对现有的小规模的量产测试中或者实验室中的测试，无需设置机箱以及无需机箱与控制器之间的PCI连接线即可满足测试需求，从而防止了资源的浪费以及降低了测试成本。
图3为本申请实施例提供的一种测试卡的结构示意图，如图3所示，其包括：PXI/PXIE测试卡主体31、第一通信模块32、和电源模块33。
本实施例中，PXI/PXIE测试卡主体31作为测试电路的承载单元，其内可以集成有FPGA模块34，FPGA模块34用于根据控制器的测试命令确定对应的测试信号，以及用于确定待测对象对应的测试结果信号。
PXI/PXIE测试卡主体31内还可以设置有接口模块35，所述FPGA模块通过所述接口模块35与待测对象进行数据交互，以使所述待测对象获得测试信号，以及使得所述FPGA模块34确定待测对象对应的测试结果信号。具体地，接口模块35包括上述第一接口电路、上述第一用户接口。所述第一接口电路与所述第一用户接口连接，载板上设置有第二用户接口，所述第一用户接口通过第二用户接口与载板连接，第一接口电路与所述FPGA模块34连接，以使所述FPGA模块34通过所述第一接口电路、所述第一用户接口与所述载板连接，进而与设置在所述载板上的待测对象进行数据交互，由于多个待测对象设置在载板上，从而实现了多个待测对象的同时测量。
测试信号通过接口模块35输出至待测对象的输入端，待测对象根据测试信号输出对应的测试结果信号，测试结果信号通过接口电路传输至FPGA模块34，使得FPGA模块34确定待测对象对应的测试结果信号。
例如，FPGA模块34可以提供测试触控芯片的功能，则控制器可以通过第 一通信模块32将测试手指触控的测试命令下发至FPGA模块34，FPGA模块34可以根据接收到的测试手指触控的测试命令生成手指触摸的模拟信号；手指触摸的模拟信号(即测试信号)被输入至触控芯片(即待测对象)的输入端；触控芯片的输出端输出触控结果信号，并通过接口电路将触控结果信号(即测试结果信号)传输至FPGA模块34；FPGA模块34根据触控结果信号确定测试结果，并通过第一通信模块32将测试结果传输至控制器；当然，待测对象输出端输出的触控结果信号传输至FPGA模块34后，FPGA模块34也可以直接将触控结果信号作为测试结果，通过第一通信模块32传输至控制器。
当然，本实施例中，FPGA模块34还可以提供其他功能，例如提供测试音视频芯片的功能、测试显示芯片的功能等。
本实施例中，第一通信模块32设置在PXI/PXIE测试卡主体31上，测试卡通过所述第一通信模块32直接与控制器进行数据交互，从而测试卡可以通过数据交互获得控制器的测试命令，以及使得控制器通过数据交互获得测试结果。
本实施例中，第一通信模块32可以包括USB通信模块、网络通信模块、蓝牙通信模块中的任一种，只要第一通信模块32能够与控制器直接进行通信即可，本实施例在此不进行限定。与PCI接口相比，上述的USB通信模块、网络通信模块、蓝牙通信模块实现简单且成本低，从而不会较大地增加测试卡的成本。
具体地，如图4所示，当第一通信模块32为USB通信模块时，USB通信模块包括USB接口321以及与USB接口连接的USBPHY模块322，USB接口用于连接USB数据线，USB PHY模块与FPGA模块34连接，用于转换数据。通常，FPGA模块34通过PXI接口与机箱进行的数据交互，传输的数据是基于PCI标准的，因此本实施例中，USB PHY模块可以将基于USB接口接收的基于USB标准的数据转换为基于PCI标准的数据，再传输至FPGA模块34，或者通过USB PHY模块将基于PCI标准的数据转换为USB标准的数据，再通过USB接口输出，从而使得FPGA模块34通过USB PHY模块以及USB接口与控制器进行数据交互。
进一步地，本实施例中，USB接口的数量可以为一个，也可以为多个，与一个USB接口相比，多个USB接口可以实现数据更快地传输。
同理，当第一通信模块32为网络通信模块时,网络通信模块具体可以包括网络适配器以及网络接口，网络适配器与网络接口连接，网络接口用于连接网线，网络适配器与FPGA模块34连接，用于转换数据。网络适配器可以将基于网络传输协议的数据转换为基于PCI标准的数据，再传输至FPGA模块34，或者将基于PCI标准的数据转换为基于网络传输协议的数据，通过网络接口输出，从而使得FPGA模块34通过网络适配器以及网络接口与控制器进行数据交互。
电源模块33设置在PXI/PXIE测试卡主体31上，用于为所述测试卡供电。
具体地，如图4所示，电源模块33包括外部电源接口331以及与外部电源接口连接的电源电路332，外部电源接口用于与外部电源连接，使得外部电源通过外部电源接口与电源电路连接，为测试卡供电。通常，机箱为测试卡提供的电源为12V，则本实施例中，电源接口连接的外部电源可以与机箱提供的电源一致，同样为12V。
针对现有的小规模的量产测试中或者实验室中的测试，本实施例中，与上述图2提供的测试卡相比，上述测试卡通过PXI接口与机箱连接，与机箱进行数据交互，并通过PXI接口供电，本实施例中，通过设置第一通信模块32使得测试卡可以直接与控制器进行数据交互，并通过电源模块33供电，无需再设置机箱以及PCI连接线，测试卡可以独立完成测试，从而降低了测试成本，防止了资源浪费；且与设置机箱相比，单独一个测试卡的体积更小，更加便携，使用时更加灵活。
具体地，为了使本申请提供的测试卡不仅可以单独工作以进行测试，还可以与机箱连接，从而通过机箱控制多个测试卡协同工作以进行测试。本实施例中，所述测试卡还包括PXI/PXIE接口36，用于与机箱连接，从而通过机箱与控制器连接。PXI/PXIE接口与图2提供的测试卡上的PXI/PXIE接口类似，在此不再赘述。
当测试卡既包括第一通信模块32，又包括PXI/PXIE接口时，本实施例的测试卡可以应用于两种不同的测试系统，两种测试系统如图5以及图6所示，图5示出的PXI/PXIE测试系统可以用于大规模的量产测试系统；图6示出的另一种PXI/PXIE测试系统可以用于小规模的量产测试或者用于实验室中。本 实施例中，以待测对象为待测芯片、以第一通信模块32为USB通信模块为例进行举例说明。
如5图所示，用于大规模的量产的PXI/PXIE测试系统包括：载板51、如上所述的测试卡52、机箱53、控制器54。
在本实施例中，测试卡通过PXI/PXIE接口进行数据交互以及供电，而测试卡的USB接口悬空，不与控制器进行数据交互，外部电源接口也不连接外部电源。
本实施例中载板、机箱、控制器的具体实现方式与图1中示出的实现方式类似，本实施例在此不再赘述。
通过控制器下发测试命令至机箱，机箱控制多个测试卡协同工作，每个测试卡连接载板，每个载板上可以设置多个待测芯片，从而实现大规模量产时，对大规模的待测芯片进行测试。
如6图所示，用于小规模的量产测试或者用于实验室中的PXI/PXIE测试系统包括：载板61、如上所述的测试卡62、控制器63。
载板上可以放置多个待测芯片，载板通过连接导线与测试卡连接，测试卡的USB接口与控制器连接，外接电源接口接入外部电源。
本实施例中，载板与测试卡之间的连接以及数据交互与上述图2中示出的类似，在此不再赘述。
与图5中示出的测试系统不同的是，图6示出的测试系统中，PXI/PXIE接口悬空，不参与测试，而USB接口与控制器进行通信，外部电源接口接入外部电源，通过外部电源供电，且图6示出的测试系统中不再包括机箱以及用于连接机箱以及控制器的PCI连接线。
此外，当测试卡通过USB接口与控制器进行数据交互时，控制器内部的驱动程序需要进行适应性更改，使得控制器下发的控制指令以及可接收的数据格式与测试卡的第一通信接口适配。
本实施例中，若控制器不包括与USB通信模块适配的接口如USB接口时，可以在控制器端设置转接模块，从而将原PCI接口转换为与第一通信模块32适配的接口。
本实施例中，通过设置测试卡以及载板，从而使得测试卡可以单独完成对多个待测芯片的测试，足以满足实验室或小规模量产时的测试需求。
当然，上述仅仅以芯片为例进行说明，在本申请的其他实现中，待测试的不一定是芯片，还可以是其他的半导体装置，本申请在此不进行限定。
另外，本实施例中，测试卡的形状可以按照通用的结构标准进行设计，如按照通用的3U结构标准进行设计，从而使得测试卡可以与基于3U标准设计的机箱形状适配；或者按照6U结构标准进行设计等。
本实施例中，测试卡还包括壳体，所述壳体内设置所述PXI/PXIE测试卡主体31，从而通过壳体保证了在测试卡单独使用时不易发生损坏。
本实施例中，壳体内部的形状与测试卡的形状特征相匹配。
本实施例中，所述测试卡的接口，如上述的外部电源接口、PXI/PXIE接口、USB接口等裸露于所述壳体外，或者壳体上设置有与上述接口适配的通孔。
本实施例中，所述PXI/PXIE测试卡主体31与所述壳体可拆卸地连接，以在测试卡应用图5示出测试系统时，可以方便地将所述测试卡与壳体拆卸开,从而可以将多张测试卡设置在机箱内。
图7为本申请实施例提供的一种基于测试卡的测试方法流程示意图，本实施例中，仍然以测试触控芯片为例进行说明。如图7所示，其包括：
S71、控制器确定测试系统的类别。
具体地，测试系统的类别可以包括上述两种，第一种为图5示出的应用于大规模量产的测试系统，第二种为图6示出的应用于小规模量产或应用于实验室中的测试系统。
本实施例中，由于上述两种系统中，数据交互的基准不同，若使用图5示出的测试系统，则控制器下发的测试命令以及其接收的测试数据为基于PCI基准的数据，若使用图6示出的测试系统，则控制器下发的测试命令以及其接收的测试数据为基于第一通信模块对应的数据基准。
本实施例中，若测试系统为图5中示出的测试系统，则其流程与图1中示出的流程类似，在此不再赘述。
S72、当测试系统为用于实验室或者小规模量产的测试系统时，控制器发送触控测试命令至第一通信模块。
本实施例中，控制器发送触控测试命令时，测试命令中可以仅仅包括适用 于测试卡的测试命令，而不包括机箱对应的测试命令。例如，仅仅包括触发测试卡工作的触控测试命令，而不包括适用于机箱的用于协调多个测试卡的触控测试命令。
触控测试命令传输时依据第一通信模块对应的数据基准进行传输。
S73、测试卡通过第一通信模块接收触控测试命令，并根据触控测试命令确定手指触摸的模拟信号。
具体地，第一通信模块将接收到的触控测试命令转换为基于PCI基准的触控测试命令，测试卡中的FPGA模块识别该触控测试命令，并根据其确定手指触摸的模拟信号。
S74、测试卡输出手指触摸的模拟信号至载板上的多个待测芯片。
具体地，载板上的第二用户接口与测试卡的第一用户接口连接，从而实现载板与测试卡的数据交互。
载板上设置的多个待测芯片与第二用户接口连接，手指触摸的模拟信号通过第一用户接口以及第二用户接口输入至载板上的多个待测芯片。
待测芯片根据输入的手指触摸的模拟信号输出触控结果信号。
S75、测试卡接收待测芯片输出的触控结果信号。
本实施例中，测试卡与载板之间通过上述的第一用户接口以及第二用户接口进行数据交互，使得载板将待测芯片输出的触控结果传输至测试卡，测试卡接收到触控结果信号后，可以通过其内部的FPGA模块判断触控结果信号是否为预设的触控结果信号，再将判断结果作为测试结果，对其进行简单的处理如数据转化后执行步骤S76；或者，测试卡接收到触控结果信号后，直接将触控结果信号作为测试结果，对其进行简单的处理如数据转化后执行步骤S76。
S76、测试卡通过第一通信模块将测试结果上传至控制器，然后控制器对测试结果进行处理，生成测试报告。
具体生成测试报告的方法与现有的类似，在此不再赘述。
此外，本领域技术人员应该能够理解，上述的单元以及模块划分方式仅是众多划分方式中的一种，如果划分为其他单元或模块或不划分块，只要信息对象的具有上述功能，都应该在本申请的保护范围之内。
本领域的技术人员应明白，本申请的实施例可提供为方法、装置(设备)、 或计算机程序产品。因此，本申请可采用完全硬件实施例、完全软件实施例、或结合软件和硬件方面的实施例的形式。而且，本申请可采用在一个或多个其中包含有计算机可用程序代码的计算机可用存储介质(包括但不限于磁盘存储器、CD-ROM、光学存储器等)上实施的计算机程序产品的形式。
本申请是参照根据本申请实施例的方法、装置(设备)和计算机程序产品的流程图和/或方框图来描述的。应理解可由计算机程序指令实现流程图和/或方框图中的每一流程和/或方框、以及流程图和/或方框图中的流程和/或方框的结合。可提供这些计算机程序指令到通用计算机、专用计算机、嵌入式处理机或其他可编程数据处理设备的处理器以产生一个机器，使得通过计算机或其他可编程数据处理设备的处理器执行的指令产生用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的装置。
这些计算机程序指令也可存储在能引导计算机或其他可编程数据处理设备以特定方式工作的计算机可读存储器中，使得存储在该计算机可读存储器中的指令产生包括指令装置的制造品，该指令装置实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能。
这些计算机程序指令也可装载到计算机或其他可编程数据处理设备上，使得在计算机或其他可编程设备上执行一系列操作步骤以产生计算机实现的处理，从而在计算机或其他可编程设备上执行的指令提供用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的步骤。
尽管已描述了本申请的优选实施例，但本领域内的技术人员一旦得知了基本创造性概念，则可对这些实施例做出另外的变更和修改。所以，所附权利要求意欲解释为包括优选实施例以及落入本申请范围的所有变更和修改。显然，本领域的技术人员可以对本申请进行各种改动和变型而不脱离本申请的精神和范围。这样，倘若本申请的这些修改和变型属于本申请权利要求及其等同技术的范围之内，则本申请也意图包含这些改动和变型在内。

Claims (13)

  1. 一种测试卡，其特征在于，包括：PXI/PXIE测试卡主体、第一通信模块、电源模块，
    其中，所述第一通信模块设置在PXI/PXIE测试卡主体上，测试卡通过所述第一通信模块直接与控制器进行数据交互，以使得所述测试卡通过所述数据交互获得控制器的测试命令，以及使得控制器通过数据交互获得测试结果；
    所述电源模块设置在PXI/PXIE测试卡主体上，用于为所述测试卡供电。
  2. 根据权利要求1所述的测试卡，其特征在于，所述PXI/PXIE测试卡主体内集成有FPGA模块，所述FPGA模块用于根据控制器的测试命令确定对应的测试信号，以及确定待测对象对应的测试结果信号。
  3. 根据权利要求2所述的测试卡，其特征在于，所述PXI/PXIE测试卡主体内设置有接口模块，所述FPGA模块通过所述接口模块与待测对象进行数据交互，以使所述待测对象获得测试信号，以及使得所述FPGA模块确定待测对象对应的测试结果信号。
  4. 根据权利要求3所述的测试卡，其特征在于，所述接口模块包括第一接口电路、第一用户接口，所述第一接口电路与所述第一用户接口连接，所述第一用户接口通过设置在载板上的第二用户接口与载板连接，第一接口电路与所述FPGA模块连接，以使所述FPGA模块通过所述第一接口电路、所述第一用户接口与所述载板连接，进而与设置在所述载板上的待测对象进行数据交互。
  5. 根据权利要求1所述的测试卡，其特征在于，所述第一通信模块包括USB通信模块、网络通信模块、蓝牙通信模块中的任一种。
  6. 根据权利要求5所述的测试卡，其特征在于，所述第一通信模块包括USB通信模块时，所述USB通信模块包括USB接口以及与USB接口连接的USBPHY模块，所述USB接口用于连接USB数据线，所述USB PHY模块与所述测试卡连接，用于转换数据。
  7. 根据权利要求6所述的测试卡，其特征在于，所述USB接口的数量为多个。
  8. 根据权利要求5所述的测试卡，其特征在于，所述第一通信模块包括 所述网络通信模块时，所述网络通信模块包括网络适配器以及网络接口，网络适配器与网络接口连接，网络接口用于连接网线，网络适配器与所述测试卡连接，用于转换数据。
  9. 根据权利要求1所述的测试卡，其特征在于，所述电源模块包括外部电源接口以及与外部电源接口连接的电源电路，所述外部电源接口用于与外部电源连接，使得外部电源通过外部电源接口与电源电路连接，为测试卡供电。
  10. 根据权利要求1所述的测试卡，其特征在于，测试卡还包括壳体，所述壳体内设置所述PXI/PXIE测试卡主体。
  11. 根据权利要求10所述的测试卡，其特征在于，所述PXI/PXIE测试卡主体与所述壳体可拆卸地连接。
  12. 一种测试系统，其特征在于，包括控制器以及如权利要求1-11任一项所述的测试卡。
  13. 根据权利要求12所述的系统，其特征在于，所述测试卡还包括PXI/PXIE接口，对应的，所述测试系统还包括：机箱、PCI连接线；
    所述测试卡通过所述PXI/PXIE接口与所述机箱连接，所述机箱通过所述PCI连接线与所述控制器连接。
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