WO2019134515A1 - 像素排布结构、其制作方法、显示面板、显示装置和掩模板 - Google Patents

像素排布结构、其制作方法、显示面板、显示装置和掩模板 Download PDF

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Publication number
WO2019134515A1
WO2019134515A1 PCT/CN2018/122022 CN2018122022W WO2019134515A1 WO 2019134515 A1 WO2019134515 A1 WO 2019134515A1 CN 2018122022 W CN2018122022 W CN 2018122022W WO 2019134515 A1 WO2019134515 A1 WO 2019134515A1
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Prior art keywords
sub
pixels
pixel
pixel arrangement
area
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PCT/CN2018/122022
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English (en)
French (fr)
Inventor
王杨
汪杨鹏
王本莲
尹海军
邱海军
胡耀
代伟男
Original Assignee
京东方科技集团股份有限公司
成都京东方光电科技有限公司
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Priority to US16/473,281 priority Critical patent/US11342384B2/en
Publication of WO2019134515A1 publication Critical patent/WO2019134515A1/zh
Priority to US17/726,842 priority patent/US20220246692A1/en

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    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/04—Coating on selected surface areas, e.g. using masks
    • C23C14/042—Coating on selected surface areas, e.g. using masks using masks
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
    • C23C14/12—Organic material
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/24—Vacuum evaporation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H10K59/35—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
    • H10K59/352—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels the areas of the RGB subpixels being different
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H10K59/35—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
    • H10K59/353—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels characterised by the geometrical arrangement of the RGB subpixels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/10—Deposition of organic active material
    • H10K71/16—Deposition of organic active material using physical vapour deposition [PVD], e.g. vacuum deposition or sputtering
    • H10K71/164—Deposition of organic active material using physical vapour deposition [PVD], e.g. vacuum deposition or sputtering using vacuum deposition
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/10—Deposition of organic active material
    • H10K71/16—Deposition of organic active material using physical vapour deposition [PVD], e.g. vacuum deposition or sputtering
    • H10K71/166—Deposition of organic active material using physical vapour deposition [PVD], e.g. vacuum deposition or sputtering using selective deposition, e.g. using a mask

Definitions

  • the present disclosure relates to the field of display technologies, and in particular, to a pixel arrangement structure, a method of fabricating the pixel arrangement structure, a display panel, a display device, and a mask.
  • organic electroluminescent (OLED) displays Compared with liquid crystal displays (LCDs), organic electroluminescent (OLED) displays have the advantages of low energy consumption, low production cost, self-illumination, wide viewing angle and fast response.
  • OLED display devices At present, in the field of flat panel display such as mobile phones, PDAs, and digital cameras, OLED display devices have begun to replace traditional liquid crystal displays.
  • An OLED display typically includes a base substrate and sub-pixels arranged in a matrix on the base substrate.
  • the sub-pixels are generally formed by vapor-depositing an organic light-emitting material on an array substrate using a high-definition metal mask (FMM).
  • FMM high-definition metal mask
  • a pixel arrangement structure including: a plurality of first group sub-pixels arranged in a first direction, each of the plurality of first groups including a plurality of alternately arranged a first sub-pixel and a plurality of third sub-pixels; and a plurality of second group sub-pixels arranged in a first direction, each of the plurality of second groups comprising a plurality of third sub-pixels alternately arranged and a plurality of second sub-pixels.
  • the plurality of first groups and the plurality of second groups are alternately arranged in a second direction perpendicular to the first direction.
  • the plurality of first groups and the plurality of second groups are arranged such that a plurality of third group sub-pixels arranged in the second direction and a plurality of fourth groups arranged in the second direction are formed Subpixels, the plurality of third groups and the plurality of fourth groups are alternately arranged in the first direction.
  • Each of the plurality of third groups includes a plurality of first sub-pixels and a plurality of third sub-pixels alternately arranged, each of the plurality of fourth groups including a plurality of third sub-pixels alternately arranged And a plurality of second sub-pixels.
  • each of the third sub-pixels is asymmetrical with respect to at least one of the first direction or the second direction.
  • each of the third sub-pixels has a substantially axisymmetric shape and is asymmetrical about a direction perpendicular to an axis of symmetry of the third subpixel.
  • each of the third sub-pixels is substantially symmetrical about one of the first direction and the second direction and with respect to the other of the first direction and the second direction One direction is asymmetrical.
  • each of the third sub-pixels has a strip shape.
  • each of the third sub-pixels in each of the plurality of first groups extends along the first direction, and each of the plurality of second groups The third sub-pixels each extend along the second direction.
  • each of the third sub-pixels has two ends of different contours.
  • one of the two ends has a circular arc-shaped profile, and the other of the two ends has a profile formed by at least one straight line.
  • each two adjacent third sub-pixels of the plurality of third sub-pixels in each of the plurality of first groups have substantially opposite orientations to each other.
  • each of the plurality of third sub-pixels in each of the plurality of third groups has an orientation that is substantially opposite to each other.
  • the plurality of third sub-pixels in each of the plurality of first groups have substantially the same orientation.
  • the plurality of third sub-pixels in each of the plurality of third groups have substantially the same orientation.
  • each of the third sub-pixels of the plurality of first group of sub-pixels is directly adjacent to the first sub-pixel of each of the first sub-pixels in the first direction
  • the pixels have opposite sides that are substantially parallel to each other; each of the third sub-pixels of the plurality of second group of sub-pixels and a direct phase of each of the second sub-pixels in the first direction
  • the adjacent second sub-pixels have opposite sides substantially parallel to each other; each of the third sub-pixels of the plurality of third group sub-pixels and each of the first sub-pixels in the second direction
  • the immediately adjacent first sub-pixels in the pixels have opposite sides that are substantially parallel to each other; and each of the third sub-pixels of the plurality of fourth group of sub-pixels is in the second direction
  • the immediately adjacent second sub-pixels of each of the second sub-pixels have opposite sides that are substantially parallel to each other.
  • each of the first plurality of first sub-pixels in each of the first sub-pixels has a third sub-pixel in each of the first direction and the second direction Four opposite edges of four directly adjacent third sub-pixels, each of the four edges having an end opposite the edge of a corresponding one of the four directly adjacent third sub-pixels
  • the contours of the contours match the corresponding contours.
  • each of the first sub-pixels and each of the third sub-pixels does not have an internal angle of less than 90 degrees.
  • each of the first sub-pixels, each of the second sub-pixels, and each of the third sub-pixels are disposed substantially equidistantly with respect to each other.
  • each of the third sub-pixels is disposed substantially equidistantly with respect to each other, and each of the first sub-pixels and each of the second sub-pixels are disposed substantially equidistantly with respect to each other.
  • the first sub-pixel is a red pixel
  • the second sub-pixel is a blue pixel
  • the third sub-pixel is a green pixel
  • the first sub-pixel is a blue pixel
  • the second sub-pixel is a red pixel
  • the third sub-pixel is a green pixel
  • the blue sub-pixels each have a first area, wherein the red sub-pixels each have a second area that is smaller than the first area, and wherein the green sub-pixels each have a smaller a third area of the second area.
  • the blue sub-pixels each have a first area
  • the green sub-pixels each have a second area that is smaller than the first area
  • the red sub-pixels each have a smaller a third area of the second area
  • the red sub-pixel has a first total area
  • the green sub-pixel has a second total area
  • the blue sub-pixel has a third total area.
  • the first total area, the second total area, and the third total area have 1: (1.1 to 1.5): (1.2 to 1.7), and further 1: (1.2 to 1.35): (1.4 to 1.55) Or, further, a ratio of 1:1.27:1.46.
  • the ratio of each of the red sub-pixels, each of the green sub-pixels, and each of the blue sub-pixels is approximately 1:2:1.
  • each of the third sub-pixels has substantially the same area and substantially the same shape.
  • each of the first sub-pixels has substantially the same area and substantially the same shape.
  • each of the second sub-pixels has substantially the same area and substantially the same shape.
  • a display panel including: a display substrate; and a pixel arrangement structure as described above, the pixel arrangement structure being formed on the display substrate.
  • the pixel arrangement structure is arranged such that each of the first direction and the second direction intersects about 45 degrees of a length direction of the display substrate.
  • the first sub-pixel, the second sub-pixel, and the third sub-pixel are organic electroluminescent sub-pixels.
  • a display device including the display panel as described above.
  • a set of masks for fabricating a pixel arrangement comprising: a first mask defining a plurality of first openings, the plurality of first openings a pattern arranged to have a pattern corresponding to a pattern of each of the first sub-pixels; a second mask defining a plurality of second openings, the plurality of second openings being arranged to have a second sub-pixel a pattern corresponding to the pattern; and a third mask defining a plurality of third openings, the plurality of third openings being arranged to have a pattern corresponding to the pattern of each of the third sub-pixels.
  • a method of fabricating a pixel arrangement using a set of reticle as described above comprising: providing a display substrate; evaporating the first electroluminescent material and by evaporating An electroluminescent material is deposited through the plurality of first openings of the first mask to deposit the evaporated first electroluminescent material onto the display substrate to form respective first sub-pixels; evaporating a second Electroluminescent material and depositing the evaporated second electroluminescent material onto the display substrate by passing the evaporated second electroluminescent material through the plurality of second openings of the second mask Forming each of the second sub-pixels; and evaporating the third electroluminescent material and passing the evaporated third electroluminescent material through the plurality of third openings of the third mask A third electroluminescent material is deposited onto the display substrate to form each of the third sub-pixels.
  • a pixel arrangement structure including: five first sub-pixels respectively located at a center position of a first virtual rectangle and four vertex positions; four second sub-pixels Located at respective center positions of the four sides of the first virtual rectangle; and four third sub-pixels located within the corresponding four second virtual rectangles, each of the second virtual rectangles a respective one of the four vertex positions of the first virtual rectangle, the four sides of the first virtual rectangle, and a corresponding center position of the two sides of the corresponding vertex position, And defining a center position of the first virtual rectangle, the four second virtual rectangles forming the first virtual rectangle.
  • each of the third sub-pixels is asymmetrical with respect to at least one of the first direction or the second direction.
  • a display panel including: a display substrate; and a plurality of adjacent pixel arrangement structures as described above, the pixel arrangement structure being formed on the display substrate.
  • Each of the two first virtual rectangles directly adjacent to each of the first virtual rectangles in the row direction has a common side such that the sub-pixels on the common side are shared by the two immediately adjacent first virtual rectangles.
  • Each of the two first virtual rectangles directly adjacent to each of the first virtual rectangles has a common side in the column direction such that the sub-pixels on the common side are shared by the two directly adjacent first virtual rectangles .
  • a pixel arrangement structure including: a plurality of first repeating units arranged in a first direction, each of the plurality of first repeating units including a plurality of alternately arranged a first sub-pixel and a plurality of third sub-pixels; and a plurality of second repeating units arranged in the first direction, each of the plurality of second repeating units comprising a plurality of third sub-pixels arranged alternately And a plurality of second sub-pixels.
  • the plurality of first repeating units and the plurality of second repeating units are alternately arranged in a second direction perpendicular to the first direction.
  • the plurality of first repeating units and the plurality of second repeating units are arranged such that each of the first sub-pixels and each of the third sub-pixels The pixels are directly adjacent and each of the second sub-pixels is directly adjacent to four of the third sub-pixels.
  • FIG. 1 is a schematic plan view of a pixel arrangement structure in accordance with an embodiment of the present disclosure
  • Figure 2 is a schematic plan view of a partial area of the pixel arrangement structure of Figure 1;
  • FIG. 3 is a schematic plan view of a localized area of a variation of the pixel arrangement structure of FIG. 1;
  • FIG. 4 is a schematic plan view of a local area of another variation of the pixel arrangement structure of FIG. 1;
  • FIG. 5 is a partially enlarged schematic view showing the pixel arrangement structure of FIG. 4;
  • FIG. 6 is a schematic plan view of a local area of another variation of the pixel arrangement of FIG. 1;
  • Figure 7 is a schematic plan view of a localized area of another variation of the pixel arrangement of Figure 1;
  • Figure 8 is a schematic plan view of a localized area of another variation of the pixel arrangement of Figure 1;
  • FIG. 9 is a schematic view generally showing a principle of color transfer of a pixel arrangement structure according to an embodiment of the present disclosure.
  • FIG. 10 is a schematic plan view of a display device according to an embodiment of the present disclosure.
  • 11A, 11B, and 11C are schematic plan views of a set of reticle according to an embodiment of the present disclosure.
  • FIG. 12 is a flow chart of a method of fabricating a pixel arrangement structure in accordance with an embodiment of the present disclosure.
  • first, second, third, etc. may be used herein to describe various elements, components, regions, layers and/ Some should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer Thus, a first element, component, region, layer, or section, which is discussed below, may be referred to as a second element, component, region, layer or section without departing from the teachings of the disclosure.
  • under and under can encompass both the ⁇ RTIgt; Terms such as “before” or “before” and “after” or “following” may be used, for example, to indicate the order in which light passes through the elements.
  • the device can be oriented in other ways (rotated 90 degrees or in other orientations) and the spatially relative descriptors used herein interpreted accordingly.
  • a layer is referred to as “between two layers,” it may be a single layer between the two layers, or one or more intermediate layers may be present.
  • FIG. 1 is a schematic plan view of a pixel arrangement structure 100 in accordance with an embodiment of the present disclosure.
  • the pixel arrangement structure 100 includes a plurality of first group sub-pixels (also referred to as “first repeating units”) G1 arranged in the first direction D1 and more arranged in the first direction D2.
  • a second set of sub-pixels also referred to as “second repeating units” G2.
  • the plurality of first groups G1 and the plurality of second groups G2 are alternately arranged in a second direction D2 perpendicular to the first direction D1.
  • Each of the plurality of first groups G1 includes a plurality of first sub-pixels 101 and a plurality of third sub-pixels 103 that are alternately arranged.
  • Each of the plurality of second groups G2 includes a plurality of third sub-pixels 103 and a plurality of second sub-pixels 102 that are alternately arranged.
  • the plurality of first groups G1 and the plurality of second groups G2 are also arranged such that a plurality of third group sub-pixels G3 and a plurality of fourth group sub-pixels G4 alternately arranged in the first direction D1 are formed.
  • Each of the plurality of third groups G3 includes a plurality of first sub-pixels 101 and a plurality of third sub-pixels 103 alternately arranged, and each of the plurality of fourth groups G4 includes a plurality of third sub-arrays arranged alternately A pixel 103 and a plurality of second sub-pixels 102. As shown in FIG. 1, each of the first sub-pixels 101 is directly adjacent to the four third sub-pixels 103, and each of the second sub-pixels 102 is also directly adjacent to the four third sub-pixels 103.
  • each of the third sub-pixels 103 is asymmetrical with respect to at least one of the first direction D1 or the second direction D2.
  • each of the third sub-pixels 103 in each of the first groups G1 is asymmetrical with respect to the second direction D2, and each of the third sub-pixels 103 in each of the second groups G2 is not related to the first direction D1.
  • symmetry Such asymmetry allows for a flexible design of the sub-pixel pattern.
  • the pixel arrangement structure 100 can allow the first sub-pixel 101, the second sub-pixel 102, and the third sub-pixel 103 to be more closely arranged under the same process conditions, thereby increasing as much as possible.
  • the area of a large single sub-pixel helps to reduce the drive current of the display device and increase the lifetime of the display device.
  • each of the first, second, and third sub-pixels 101, 102, and 103 are disposed substantially equidistantly with respect to each other.
  • the third sub-pixels 103 may be arranged differently.
  • each of the third sub-pixels 103 may be arranged substantially equidistant with respect to each other, and each of the first sub-pixels 101 and each of the second sub-pixels 102 are arranged substantially equidistant with respect to each other.
  • FIG. 2 is a schematic plan view of a partial area of the pixel arrangement structure 100 of FIG. 1.
  • each of the third sub-pixels 103 has a substantially axisymmetric shape.
  • each of the third sub-pixels 103 in each of the first groups G1 is substantially symmetrical about the first direction D1 and asymmetric about the second direction D2, that is, they have an axis of symmetry along the first direction D1 and are perpendicular to The direction of the axis of symmetry is asymmetrical;
  • each of the third sub-pixels 103 in each second group G2 is substantially symmetrical about the second direction D2 and asymmetrical about the first direction D1, ie they have an axis of symmetry along the second direction D2 And asymmetry about the direction perpendicular to the axis of symmetry.
  • the substantially axisymmetric third sub-pixel 103 can reduce the complexity of the pattern used to vaporize the reticle of the pixel arrangement 100.
  • the third sub-pixels 103 each have a strip shape. Specifically, each of the third sub-pixels 103 in the first group G1 extends along the first direction D1, and each of the third sub-pixels 103 in the second group G2 extends in the second direction D2.
  • Such a strip-shaped third sub-pixel 103 allows an increase in the area of the second sub-pixel 102.
  • the second sub-pixel 102 may advantageously serve as a sub-pixel (eg, a blue sub-pixel) that is less efficient in illumination.
  • the third sub-pixels 103 each also have opposite ends of different contours. Specifically, one end of the both ends has a circular arc-shaped outer contour, and the other end of the both ends has an outer contour formed by at least one straight line (a trapezoid in the example of FIG. 2). This allows for a flexible design of the sub-pixel pattern as will be described in more detail later.
  • each of the third sub-pixels 103 in the first group G1 has substantially the same orientation, and each of the third sub-pixels 103 in each of the third groups also has substantially the same orientation.
  • the arc-shaped ends of the third sub-pixels 103 in the first group G1 are all directed to the upper right corner of the figure, and the arc-shaped portions of the third sub-pixels 103 in each of the third group are The ends point to the lower right corner of the graph. This provides a specific sub-pixel pattern.
  • Fig. 2 also shows a large rectangle (hereinafter referred to as "first virtual rectangle") defined by a broken line connecting the first sub-pixels 101 at four corners.
  • the first virtual rectangle includes four small rectangles (hereinafter referred to as “second virtual rectangles”) each of which is a corresponding one of the four vertex positions of the first virtual rectangle, the first A respective center position of two adjacent sides of the corresponding apex position and a center position of the first imaginary rectangle are defined in the four sides of a virtual rectangle.
  • the pixel arrangement structure of Fig. 2 is described below with reference to the first virtual rectangle and the second virtual rectangle.
  • the pixel arrangement structure includes: five first sub-pixels 101 respectively located at a central position of the first virtual rectangle and four vertex positions, at respective central positions of the four sides of the first virtual rectangle Four second sub-pixels 102, and four third sub-pixels 103 located within the respective four second virtual rectangles.
  • a sub-pixel is located at a certain location means that the sub-pixel overlaps the location without necessarily requiring the center of the sub-pixel to overlap the location.
  • the center of the sub-pixel may be the geometric center of the sub-pixel or the center of the light-emitting area of the sub-pixel.
  • FIG. 3 is a schematic plan view of a localized region of a variation of the pixel arrangement structure 100 of FIG. 1.
  • each first sub-pixel 101 has four rounded corners instead of four right-angled corners in this embodiment. This provides a specific sub-pixel pattern.
  • FIG. 4 is a schematic plan view of a localized region of another variation of the pixel arrangement structure 100 of FIG. 1.
  • the pixel arrangement as a whole is rotated 90 degrees clockwise in this embodiment. This provides a flexible design of the sub-pixel pattern.
  • each of the first plurality of first sub-pixels in each of the first sub-pixels 101 has four direct currents in each of the third sub-pixels 103 in the first direction D1 and the second direction D2, respectively. And four adjacent sides of the adjacent third sub-pixels, each of the four sides having an outline of an end opposite to the side of the corresponding one of the four directly adjacent third sub-pixels 103 Match the corresponding contours.
  • FIG. 5 is a partially enlarged schematic view of the pixel arrangement of FIG. 4 and shows a first sub-pixel 101 and the first direction D1 and the second direction D2
  • the four third sub-pixels 103A, 103B, 103C, and 103D directly adjacent to one sub-pixel 101.
  • the first sub-pixel 101 has four edges s1, s2, s3, and s4 opposite to the third sub-pixels 103A, 103B, 103C, and 103D, respectively, and each of the four edges has a third A corresponding contour of the contour of the end of the corresponding one of the sub-pixels 103A, 103B, 103C, 103D that matches the edge of the strip.
  • the edge s1 has an outline that matches the arcuate end of the third sub-pixel 103A
  • the edge s2 has an outline that matches the circular end of the third sub-pixel 103B
  • the edge s3 has the third sub-
  • the trapezoidal end of the pixel 103C matches the contour of the outline
  • the edge s4 has an outline that matches the trapezoidal end of the third sub-pixel 103D.
  • the four edges s1, s2, s3, s4 have corresponding recessed portions having substantially the same shape as the respective ends of the elongated third sub-pixels 103A, 103B, 103C, 103D. This allows for a tighter arrangement of the first sub-pixel 101 and the third sub-pixels 103A, 103B, 103C, 103D, thereby providing the required sub-pixel area while avoiding color mixing.
  • the first sub-pixel 101 and each of the third sub-pixels 103A, 103B, 103C, 103D each have no internal angle of less than 90 degrees.
  • the larger the internal angle of the sub-pixel the easier the evaporation is achieved; conversely, if the internal angle of the sub-pixel is small, it may be necessary to compensate for the pattern of the mask. Therefore, the sub-pixel pattern according to the present embodiment can reduce the complexity of the pattern of the reticle.
  • the third sub-pixel 103C and the first sub-pixel 101 have opposite sides substantially parallel to each other, and the third sub-pixel 103D and The first sub-pixel 101 has opposite sides that are substantially parallel to each other.
  • the depressed portion of the edge s3 is parallel to the outline of the trapezoidal end of the third sub-pixel 103C
  • the depressed portion of the edge s4 is parallel to the outline of the trapezoidal end of the third sub-pixel 103D.
  • the recessed portions of the edges s1 and s2 may have such a curvature that the two recessed portions are respectively contoured with the arcuate ends of the third sub-pixels 103A, 103B. parallel.
  • each of the third sub-pixels 103 in the second group of sub-pixels G2 and the second sub-pixels 102 directly adjacent in the first direction D1 have opposite sides substantially parallel to each other, and each of the third sub-pixels 103 in the four sets of sub-pixels G4 and the second sub-pixels 102 directly adjacent in the second direction D2 have opposite sides that are substantially parallel to each other. This provides a uniform width of the gap between the third sub-pixel 103 and the immediately adjacent second sub-pixel 102, which is advantageous for preventing color mixing.
  • the opposite sides of the third sub-pixel 103 and the immediately adjacent second sub-pixel 102 are linear, the complexity of the pattern of the mask is simplified.
  • the present disclosure is not limited to this.
  • the opposite sides of the third sub-pixel 103 and the immediately adjacent second sub-pixel 102 may not be linear.
  • FIG. 6 is a schematic plan view of a localized region of a variation of the pixel arrangement structure 100 of FIG. 1.
  • each first sub-pixel 101 has four rounded corners instead of four right-angled corners in this embodiment. This provides a specific sub-pixel pattern.
  • FIG. 7 is a schematic plan view of a localized area of another variation of the pixel arrangement structure 100 of FIG. 1.
  • each of the first sub-pixels 101 has a rectangular shape in this embodiment, thereby simplifying the complexity of the pattern of the mask.
  • each of the two adjacent third sub-pixels in each of the first sub-pixels 103 in each of the first groups G1 has an orientation substantially opposite to each other.
  • the third sub-pixels 103B and 103D have substantially opposite orientations to each other, wherein the arcuate end of the third sub-pixel 103B points to the upper right corner of the figure and the arcuate end of the third sub-pixel 103D points to the The bottom left corner of the figure.
  • each of the two adjacent third sub-pixels in each of the third sub-pixels 103 in each of the third groups G3 has an orientation substantially opposite to each other.
  • the third sub-pixels 103A and 103C have substantially opposite orientations to each other, wherein the arcuate end of the third sub-pixel 103A points to the upper left corner of the figure and the arcuate end of the third sub-pixel 103C points to the The bottom right corner of the figure. This provides a flexible design of the sub-pixel pattern.
  • FIG. 8 is a schematic plan view of a localized area of another variation of the pixel arrangement structure 100 of FIG. 1.
  • each of the third sub-pixels 103 has a different shape than the embodiment of FIG. As shown in FIG. 8, the third sub-pixels 103A, 103B, 103C, 103D are each still elongated, but have one end of a circular arc-shaped outline and the other end of a flat outline. This simplifies the complexity of the pattern of the reticle.
  • first sub-pixel 101 the second sub-pixel 102, and the third sub-pixel 103 are described above in connection with FIGS. 1-8, the present disclosure is not limited thereto.
  • the first sub-pixel 101 and the second sub-pixel 102 may have a shape selected from at least one of a group consisting of a rectangle, an ellipse, a convex polygon, a concave polygon, a triangle, and a circle
  • the third sub-pixel 103 may It has a different shape than that shown.
  • Other embodiments are possible.
  • Each of the third sub-pixels 103 may or may not have substantially the same area and substantially the same shape, and each of the first sub-pixels 101 may or may not have substantially the same area and substantially the same shape, and each of the described The second sub-pixels 102 may or may not have substantially the same area and substantially the same shape.
  • the shape, orientation, and relative position of the first sub-pixel 101, the second sub-pixel 102, and the third sub-pixel 103 can be designed as needed.
  • the third sub-pixel 103 may be a green sub-pixel.
  • the first sub-pixel 101 can be a red sub-pixel and the second sub-pixel 102 can be a blue sub-pixel.
  • the first sub-pixel 101 may be a blue sub-pixel
  • the second sub-pixel 102 may be a red sub-pixel. Since the human eye is more sensitive to green light, the area of the third sub-pixel 103 can be relatively small. In some embodiments, the area of the green sub-pixel is smaller than the area of the red sub-pixel, and the area of the red sub-pixel is smaller than the area of the blue sub-pixel.
  • the area of the red sub-pixel is smaller than the area of the green sub-pixel, and the area of the green sub-pixel is smaller than the area of the blue sub-pixel.
  • the red sub-pixel has a first total area
  • the green sub-pixel has a second total area
  • the blue sub-pixel has a third total area.
  • the first total area, the second total area, and the third total area have 1: (1.1 to 1.5): (1.2 to 1.7), and further 1: (1.2 to 1.35) A ratio of (1.4 to 1.55), or still further 1: 1:27: 1.46. This provides different levels of visual quality improvement compared to pixel patterns in which the red, green, and blue sub-pixels have the same total area.
  • the ratio of each of the red sub-pixels, each of the green sub-pixels, and each of the blue sub-pixels is approximately 1:2:1. This can be achieved by sufficiently extending the pattern of the pixel arrangement structure in the first direction D1 and the second direction D2.
  • the term "about” is intended to cover a certain range of error, such as ⁇ 10% (based on the number of red or blue sub-pixels). For example, 1:1.9:1 is considered to be "about 1:2:1".
  • the distance between each of the first sub-pixel 101, each of the second sub-pixels 102, and any two of the third sub-pixels 103 needs to be greater than or equal to the process limit distance.
  • the distance between two sub-pixels is defined as the shortest distance among the respective distances between each of the two sub-pixels and each point of the other of the two sub-pixels.
  • the process limit distance is related to the manufacturing process used. In an embodiment in which a high-precision metal mask (FMM) is used in conjunction with an etching process, the process limit distance is about 16 ⁇ m. In embodiments employing processes such as laser or electroforming, the process limit distance will be smaller.
  • the distance between the third sub-pixel 103 and the first sub-pixel 101 is equal to the distance between the third sub-pixel 103 and the second sub-pixel 102.
  • FIG. 9 generally illustrates the principle of color borrowing of a pixel arrangement structure in accordance with an embodiment of the present disclosure.
  • the first sub-pixel 101 is a red sub-pixel
  • the second sub-pixel 102 is a blue sub-pixel
  • the third sub-pixel 103 is a green sub-pixel.
  • the area of the second sub-pixel 102 is the same as the area of the first sub-pixel 101, that is, the area of the red sub-pixel is the same as the area of the blue sub-pixel.
  • the green sub-pixel G, the red sub-pixel R, and the blue sub-pixel B located at the vertices of each of the broken triangles constitute one virtual pixel.
  • the first sub-pixel 101, the second sub-pixel 102, and the third sub-pixel 103 are allowed to be arranged more closely, thereby providing a larger sub-pixel area than the existing pixel arrangement.
  • FIG. 10 is a schematic plan view of a display device 1000 in accordance with an embodiment of the present disclosure.
  • the display device 1000 includes a display panel 1010, a scan driver 1020, a data driver 1030, and a timing controller 1040.
  • the display panel 1010 includes a display substrate 1012 and a pixel arrangement 1014 formed on the display substrate 1012.
  • the pixel arrangement 1014 can take the form of any of the pixel arrangement 100 described above with respect to Figures 1-9 and its various variations.
  • the pixel arrangement structure 1014 is arranged such that each of the first direction D1 and the second direction D2 (the configuration according to which the pixel arrangement structure 100 and its various modifications are described) and the length direction of the display substrate 1012 D3 intersects at approximately 45 degrees.
  • the term "about” is intended to cover a certain range of error, such as ⁇ 10%. For example, 40.5 degrees is considered to be "about 45 degrees.”
  • the sub-pixels in the pixel arrangement structure 1014 may be organic electroluminescence sub-pixels, although the disclosure is not limited thereto.
  • the pixel arrangement 1014 includes a plurality of adjoining first virtual matrices.
  • each of the two first virtual rectangles directly adjacent to each of the first virtual rectangles has a common side such that the sub-pixels on the common side are directly
  • the two first virtual rectangles of the neighbor are shared.
  • each of the two first virtual rectangles directly adjacent to each of the first virtual rectangles has a common side such that the sub-pixels on the common side are directly
  • the two first virtual rectangles of the neighbor are shared.
  • the scan driver 1020 outputs a gate scan signal to the display panel 1010.
  • scan driver 1020 may be directly integrated in display substrate 1012 as an array substrate row drive (GOA) circuit.
  • the scan driver 1020 may be connected to the display panel 1010 by a Tape Carrier Package (TCP). Implementations of scan driver 1020 may be known, and a detailed description thereof is thus omitted.
  • the data driver 1030 outputs a data voltage to the display panel 1010.
  • data driver 1030 can include a plurality of data driven chips operating in parallel.
  • the implementation of data driver 1030 may be known, and a detailed description thereof is thus omitted.
  • the timing controller 1040 controls the operations of the scan driver 1020 and the data driver 1030. Specifically, the timing controller 1040 outputs data control signals and image data to control the driving operation of the data driver 1030, and outputs a gate control signal to control the driving operation of the scan driver 1020. Data control signals and image data are applied to the data driver 1030. A gate control signal is applied to the scan driver 1020.
  • the implementation of the timing controller 1040 may be known, and a detailed description thereof is thus omitted.
  • the display device 1000 has the same advantages as the embodiment of the pixel arrangement described above with respect to FIG. 109, and will not be described herein.
  • the display device 1000 can be any product or component having a display function, such as a cell phone, a tablet computer, a television set, a display, a notebook computer, a digital photo frame, a navigator, and the like.
  • FIG. 11A, 11B, and 11C are schematic plan views of a set of reticle in accordance with an embodiment of the present disclosure.
  • the set of reticle includes a first reticle 1100A, a second reticle 1100B, and a third reticle 1100C.
  • the first mask 1100A defines a plurality of first openings 1112.
  • the plurality of first openings 1112 are arranged to have a pattern corresponding to the pattern of each of the first sub-pixels of any one of the pixel arrangement structures 100 described above with respect to FIGS. 1-9 or any of its various variations.
  • the plurality of first openings 1112 are arranged to have a pattern corresponding to the pattern of each of the first sub-pixels of the pixel arrangement structure 100 of FIG.
  • the reticle 1100A is a high precision metal reticle that can be used in an evaporation process to form a desired pixel pattern.
  • the second mask 1100B defines a plurality of second openings 1114.
  • the plurality of second openings 1114 are arranged to have a pattern corresponding to a pattern of each of the second sub-pixels of any one of the pixel arrangement structures 100 described above with respect to FIGS. 1-9 or variations thereof.
  • the plurality of second openings 1114 are arranged to have a pattern corresponding to the pattern of each of the second sub-pixels of the pixel arrangement structure 100 of FIG.
  • the reticle 1100B is a high precision metal reticle that can be used in an evaporation process to form a desired pixel pattern.
  • the third mask 1100C defines a plurality of third openings 1116.
  • the plurality of third openings 1116 are arranged to have a pattern corresponding to the pattern of each of the third sub-pixels of any one of the pixel arrangement structures 100 described above with respect to FIGS. 1-9 or any of its various variations.
  • the plurality of third openings 1116 are arranged to have a pattern corresponding to the pattern of each of the third sub-pixels of the pixel arrangement structure 100 of FIG.
  • the reticle 1100C is a high precision metal reticle that can be used in an evaporation process to form a desired pixel pattern.
  • the reticle 1100A, 1100B, and 1100C may provide the same advantages as the embodiment of the pixel arrangement described above with respect to Figures 1-9, which are not described herein.
  • FIG. 12 is a flow diagram of a method 1200 of fabricating a pixel arrangement in accordance with an embodiment of the present disclosure.
  • Embodiments of the pixel arrangement described above with respect to Figures 1-9 can be implemented using method 1200 and masks 1100A, 1100B, and 1100C.
  • a display substrate is provided.
  • the display substrate is typically a back sheet that has been provided with a driving circuit formed of, for example, a thin film transistor (TFT).
  • TFT thin film transistor
  • the first electroluminescent material is evaporated and the first electroluminescence evaporated by passing the evaporated first electroluminescent material through the plurality of first openings 1112 of the first reticle 1100A A material is deposited onto the display substrate to form a first sub-pixel 101.
  • the second electroluminescent material is evaporated and the second electroluminescence evaporated by passing the evaporated second electroluminescent material through the plurality of second openings 1114 of the second mask 1100B Material is deposited onto the display substrate to form a second sub-pixel 102.
  • the third electroluminescent material is evaporated and the evaporated third electroluminescence is passed through the plurality of third openings 1116 of the third mask 1100C by passing the evaporated third electroluminescent material. Material is deposited onto the display substrate to form a third sub-pixel 103.
  • Steps 1220 to 1240 are generally referred to as evaporation, and their pixel patterns will be formed at predetermined positions on the display substrate. It will be understood that steps 1220 through 1240 can be performed in an order different from that illustrated and described.
  • the electroluminescent material can be an organic electroluminescent material. Other electroluminescent materials are possible.

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Abstract

一种像素排布结构，包括：在第一方向上排列的多个第一组子像素，所述多个第一组中的每一个包括交替排列的多个第一子像素和多个第三子像素；以及在第一方向上排列的多个第二组子像素，所述多个第二组中的每一个包括交替排列的多个第三子像素和多个第二子像素。所述多个第一组和所述多个第二组在垂直于所述第一方向的第二方向上交替排列。所述多个第一组和所述多个第二组被排列使得形成在所述第二方向上排列的多个第三组子像素和在所述第二方向上排列的多个第四组子像素，所述多个第三组和所述多个第四组在所述第一方向上交替排列。所述多个第三组中的每一个包括交替排列的多个第一子像素和多个第三子像素，所述多个第四组中的每一个包括交替排列的多个第三子像素和多个第二子像素。

Description

像素排布结构、其制作方法、显示面板、显示装置和掩模板
相关申请的交叉引用
本申请要求2018年1月2日提交的中国专利申请No.200810002806.2的优先权，其全部公开内容通过引用合并于此。
技术领域
本公开涉及显示技术领域，尤其涉及一种像素排布结构、制作该像素排布结构的方法、显示面板、显示装置及掩模板。
背景技术
与液晶显示器(LCD)相比，有机电致发光(OLED)显示器具有低能耗、生产成本低、自发光、宽视角及响应速度快等优点。目前，在手机、PDA、数码相机等平板显示领域，OLED显示器件已经开始取代传统的液晶显示屏。
OLED显示器典型地包括：衬底基板和制作在衬底基板上呈矩阵排列的子像素。子像素一般通过利用高精细金属掩模板(FMM)将有机发光材料蒸镀在阵列基板上而形成。
发明内容
根据本公开的一方面，提供了一种像素排布结构，包括：在第一方向上排列的多个第一组子像素，所述多个第一组中的每一个包括交替排列的多个第一子像素和多个第三子像素；以及在第一方向上排列的多个第二组子像素，所述多个第二组中的每一个包括交替排列的多个第三子像素和多个第二子像素。所述多个第一组和所述多个第二组在垂直于所述第一方向的第二方向上交替排列。所述多个第一组和所述多个第二组被排列使得形成在所述第二方向上排列的多个第三组子像素和在所述第二方向上排列的多个第四组子像素，所述多个第三组和所述多个第四组在所述第一方向上交替排列。所述多个第三组中的每一个包括交替排列的多个第一子像素和多个第三子像素，所述多个第四组中的每一个包括交替排列的多个第三子像素和多个第二子像素。
在一些实施例中，所述第三子像素中的每一个关于所述第一方向或所述第二方向中的至少一个方向不对称。
在一些实施例中，所述第三子像素中的每一个具有基本轴对称的形状，且关于垂直于该第三子像素的对称轴的方向不对称。
在一些实施例中，所述第三子像素中的每一个关于所述第一方向和所述第二方向中的一个方向基本对称并且关于所述第一方向和所述第二方向中的另一个方向不对称。
在一些实施例中，所述第三子像素中的每一个具有长条的形状。
在一些实施例中，所述多个第一组中的每一个中的各第三子像素每个沿着所述第一方向延伸，并且所述多个第二组中的每一个中的各第三子像素每个沿着所述第二方向延伸。
在一些实施例中，所述第三子像素中的每一个具有不同外形轮廓的两端。
在一些实施例中，所述两端中的一端具有圆弧形的外形轮廓，并且所述两端中的另一端具有由至少一条直线形成的外形轮廓。
在一些实施例中，所述多个第一组中的每一个中的所述多个第三子像素中的每两个相邻的第三子像素具有彼此基本相反的取向。
在一些实施例中，所述多个第三组中的每一个中的所述多个第三子像素中的每两个相邻的第三子像素具有彼此基本相反的取向。
在一些实施例中，所述多个第一组中的每一个中的所述多个第三子像素具有基本相同的取向。
在一些实施例中，所述多个第三组中的每一个中的所述多个第三子像素具有基本相同的取向。
在一些实施例中，所述多个第一组子像素中的所述第三子像素中的每一个与所述第一方向上各所述第一子像素中的直接相邻的第一子像素具有相互基本平行的相对的侧边；所述多个第二组子像素中的所述第三子像素中的每一个与所述第一方向上各所述第二子像素中的直接相邻的第二子像素具有相互基本平行的相对的侧边；所述多个第三组子像素中的所述第三子像素中的每一个与所述第二方向上各所述第一子像素中的直接相邻的第一子像素具有相互基本平行的相对的侧边；并且所述多个第四组子像素中的所述第三子像素中的每一个与所述第二方向上各所述第二子像素中的直接相邻的第二子像素具有相互 基本平行的相对的侧边。
在一些实施例中，各所述第一子像素中的第一多个第一子像素中的每一个具有分别与所述第一方向和所述第二方向上各所述第三子像素中的四个直接相邻的第三子像素相对的四条边缘，所述四条边缘中的每一条具有与所述四个直接相邻的第三子像素中的相应一个的与该条边缘相对的一端的外形轮廓相匹配的相应外形轮廓。
在一些实施例中，各所述第一子像素和各所述第三子像素每一个均不具有小于90度的内角。
在一些实施例中，各所述第一子像素、各所述第二子像素和各所述第三子像素相对于彼此基本等距地布置。
在一些实施例中，各所述第三子像素相对于彼此基本等距地布置，并且各所述第一子像素和各所述第二子像素相对于彼此基本等距地布置。
在一些实施例中，所述第一子像素为红色像素，所述第二子像素为蓝色像素，并且所述第三子像素为绿色像素。
在一些实施例中，所述第一子像素为蓝色像素，其中所述第二子像素为红色像素，并且其中所述第三子像素为绿色像素。
在一些实施例中，所述蓝色子像素每个具有第一面积，其中所述红色子像素每个具有小于所述第一面积的第二面积，并且其中所述绿色子像素每个具有小于所述第二面积的第三面积。
在一些实施例中，所述蓝色子像素每个具有第一面积，其中所述绿色子像素每个具有小于所述第一面积的第二面积，并且其中所述红色子像素每个具有小于所述第二面积的第三面积。
在一些实施例中，所述红色子像素具有第一总面积，所述绿色子像素具有第二总面积，并且所述蓝色子像素具有第三总面积。所述第一总面积、所述第二总面积和所述第三总面积具有1∶(1.1～1.5)∶(1.2～1.7)、进一步地1∶(1.2～1.35)∶(1.4～1.55)、或更进一步地1∶1.27∶1.46的比率。
在一些实施例中，各所述红色子像素、各所述绿色子像素和各所述蓝色子像素在数量上的比率大约为1∶2∶1。
在一些实施例中，各所述第三子像素具有基本相同的面积和基本相同的形状。
在一些实施例中，各所述第一子像素具有基本相同的面积和基本相同的形状。
在一些实施例中，各所述第二子像素具有基本相同的面积和基本相同的形状。
根据本公开的另一方面，提供了一种显示面板，包括：显示基板；以及如上所述的像素排布结构，所述像素排布结构形成在所述显示基板上。所述像素排布结构被布置使得所述第一方向和所述第二方向中的每一个与所述显示基板的长度方向成大约45度相交。
在一些实施例中，所述第一子像素、所述第二子像素和所述第三子像素为有机电致发光子像素。
根据本公开的又另一方面，提供了一种显示装置，包括如上所述的显示面板。
根据本公开的再另一方面，提供了一组用于制作如上所述的像素排布结构的掩模板，包括：第一掩模板，其限定多个第一开口，所述多个第一开口被布置成具有与各所述第一子像素的图案对应的图案；第二掩模板，其限定多个第二开口，所述多个第二开口被布置成具有与各所述第二子像素的图案对应的图案；以及第三掩模板，其限定多个第三开口，所述多个第三开口被布置成具有与各所述第三子像素的图案对应的图案。
根据本公开的再另一方面，提供了一种使用如上所述的一组掩模板制作像素排布结构的方法，包括：提供显示基板；蒸发第一电致发光材料并通过使所蒸发的第一电致发光材料穿过所述第一掩模板的所述多个第一开口而将所蒸发的第一电致发光材料沉积到所述显示基板上以形成各第一子像素；蒸发第二电致发光材料并通过使所蒸发的第二电致发光材料穿过所述第二掩模板的所述多个第二开口而将所蒸发的第二电致发光材料沉积到所述显示基板上以形成各第二子像素；并且蒸发第三电致发光材料并通过使所蒸发的第三电致发光材料穿过所述第三掩模板的所述多个第三开口而将所蒸发的第三电致发光材料沉积到所述显示基板上以形成各第三子像素。
根据本公开的另一方面，提供了一种像素排布结构，包括：五个第一子像素，分别位于第一虚拟矩形的中心位置处和四个顶角位置处；四个第二子像素，位于所述第一虚拟矩形的四条侧边的相应中心位置 处；以及四个第三子像素，位于相应的四个第二虚拟矩形内，各所述第二虚拟矩形中的每一个由所述第一虚拟矩形的所述四个顶角位置中的一个相应顶角位置、所述第一虚拟矩形的所述四条侧边中包含该相应顶角位置的两条侧边的相应中心位置、以及所述第一虚拟矩形的中心位置限定，所述四个第二虚拟矩形构成所述第一虚拟矩形。
在一些实施例中，所述第三子像素中的每一个关于所述第一方向或所述第二方向中的至少一个方向不对称。
根据本公开的另一方面，提供了一种显示面板，包括：显示基板；以及多个邻接的如上所述的像素排布结构，所述像素排布结构形成在所述显示基板上。在行方向上各所述第一虚拟矩形中直接相邻的每两个第一虚拟矩形具有共用侧边，使得该共用侧边上的子像素被该直接相邻的两个第一虚拟矩形共用。在列方向上各所述第一虚拟矩形中直接相邻的每两个第一虚拟矩形具有共用侧边，使得该共用侧边上的子像素被该直接相邻的两个第一虚拟矩形共用。
根据本公开的另一方面，提供了一种像素排布结构，包括：在第一方向上排列的多个第一重复单元，所述多个第一重复单元中的每一个包括交替排列的多个第一子像素和多个第三子像素；以及在第一方向上排列的多个第二重复单元，所述多个第二重复单元中的每一个包括交替排列的多个第三子像素和多个第二子像素。所述多个第一重复单元和所述多个第二重复单元在垂直于所述第一方向的第二方向上交替排列。所述多个第一重复单元和所述多个第二重复单元被排列使得各所述第一子像素中的每个第一子像素与各所述第三子像素中的四个第三子像素直接相邻并且各所述第二子像素中的每个第二子像素与各所述第三子像素中的四个第三子像素直接相邻。
根据在下文中所描述的实施例，本公开的这些和其它方面将是清楚明白的，并且将参考在下文中所描述的实施例而被阐明。
附图说明
在下面结合附图对于示例性实施例的描述中，本公开的更多细节、特征和优点被公开，在附图中：
图1为根据本公开实施例的像素排布结构的示意性平面图；
图2为图1的像素排布结构的局部区域的示意性平面图；
图3为图1的像素排布结构的一种变型的局域区域的示意性平面图；
图4为图1的像素排布结构的另一种变型的局域区域的示意性平面图；
图5为图4的像素排布结构的局部放大示意图；
图6为图1的像素排布结构的另一种变型的局域区域的示意性平面图；
图7为图1的像素排布结构的另一种变型的局域区域的示意性平面图；
图8为图1的像素排布结构的另一种变型的局域区域的示意性平面图；
图9为一般地示出根据本公开实施例的像素排布结构的借色原理的示意图；
图10为根据本公开实施例的显示装置的示意性平面图；
图11A、11B和11C为根据本公开实施例的一组掩模板的示意性平面图；并且
图12为根据本公开实施例的制作像素排布结构的方法的流程图。
在附图中，由同一数字和不同字母后缀组合而成的不同参考标记可以集体地由该数字引用。
具体实施方式
将理解的是，尽管术语第一、第二、第三等等在本文中可以用来描述各种元件、部件、区、层和/或部分，但是这些元件、部件、区、层和/或部分不应当由这些术语限制。这些术语仅用来将一个元件、部件、区、层或部分与另一个区、层或部分相区分。因此，下面讨论的第一元件、部件、区、层或部分可以被称为第二元件、部件、区、层或部分而不偏离本公开的教导。
诸如“在...下面”、“在...之下”、“较下”、“在...下方”、“在...之上”、“较上”等等之类的空间相对术语在本文中可以为了便于描述而用来描述如图中所图示的一个元件或特征与另一个(些)元件或特征的关系。将理解的是，这些空间相对术语意图涵盖除了图中描绘的取向之外在使用或操作中的器件的不同取向。例如，如果翻 转图中的器件，那么被描述为“在其他元件或特征之下”或“在其他元件或特征下面”或“在其他元件或特征下方”的元件将取向为“在其他元件或特征之上”。因此，示例性术语“在...之下”和“在...下方”可以涵盖在...之上和在...之下的取向两者。诸如“在...之前”或“在...前”和“在...之后”或“接着是”之类的术语可以类似地例如用来指示光穿过元件所依的次序。器件可以取向为其他方式(旋转90度或以其他取向)并且相应地解释本文中使用的空间相对描述符。另外，还将理解的是，当层被称为“在两个层之间”时，其可以是在该两个层之间的唯一的层，或者也可以存在一个或多个中间层。
本文中使用的术语仅出于描述特定实施例的目的并且不意图限制本公开。如本文中使用的，单数形式“一个”、“一”和“该”意图也包括复数形式，除非上下文清楚地另有指示。将进一步理解的是，术语“包括”和/或“包含”当在本说明书中使用时指定所述及特征、整体、步骤、操作、元件和/或部件的存在，但不排除一个或多个其他特征、整体、步骤、操作、元件、部件和/或其群组的存在或添加一个或多个其他特征、整体、步骤、操作、元件、部件和/或其群组。如本文中使用的，术语“和/或”包括相关联的列出项目中的一个或多个的任意和全部组合。
将理解的是，当元件或层被称为“在另一个元件或层上”、“连接到另一个元件或层”、“耦合到另一个元件或层”或“邻近另一个元件或层”时，其可以直接在另一个元件或层上、直接连接到另一个元件或层、直接耦合到另一个元件或层或者直接邻近另一个元件或层，或者可以存在中间元件或层。相反，当元件被称为“直接在另一个元件或层上”、“直接连接到另一个元件或层”、“直接耦合到另一个元件或层”、“直接邻近另一个元件或层”时，没有中间元件或层存在。然而，在任何情况下“在...上”或“直接在...上”都不应当被解释为要求一个层完全覆盖下面的层。
本文中参考本公开的理想化实施例的示意性图示(以及中间结构)描述本公开的实施例。正因为如此，应预期例如作为制造技术和/或公差的结果而对于图示形状的变化。因此，本公开的实施例不应当被解释为限于本文中图示的区的特定形状，而应包括例如由于制造导致的形状偏差。因此，图中图示的区本质上是示意性的，并且其形状不意 图图示器件的区的实际形状并且不意图限制本公开的范围。
除非另有定义，本文中使用的所有术语(包括技术术语和科学术语)具有与本公开所属领域的普通技术人员所通常理解的相同含义。将进一步理解的是，诸如那些在通常使用的字典中定义的之类的术语应当被解释为具有与其在相关领域和/或本说明书上下文中的含义相一致的含义，并且将不在理想化或过于正式的意义上进行解释，除非本文中明确地如此定义。
下面将结合附图详细描述本公开的实施例。
图1为根据本公开实施例的像素排布结构100的示意性平面图。
如图1所示，像素排布结构100包括在第一方向D1上排列的多个第一组子像素(也被称为“第一重复单元”)G1和在第一方向D2上排列的多个第二组子像素(也被称为“第二重复单元”)G2。多个第一组G1和多个第二组G2在垂直于第一方向D1的第二方向D2上交替排列。
多个第一组G1中的每一个包括交替排列的多个第一子像素101和多个第三子像素103。多个第二组G2中的每一个包括交替排列的多个第三子像素103和多个第二子像素102。多个第一组G1和多个第二组G2还被排列使得形成在第一方向D1上交替排列的多个第三组子像素G3和多个第四组子像素G4。多个第三组G3中的每一个包括交替排列的多个第一子像素101和多个第三子像素103，并且多个第四组G4中的每一个包括交替排列的多个第三子像素103和多个第二子像素102。如图1所示，每个第一子像素101与四个第三子像素103直接相邻，并且每个第二子像素102也与四个第三子像素103直接相邻。
在该实施例中，各第三子像素103中的每一个关于第一方向D1或第二方向D2中的至少一个方向不对称。在图1的示例中，每个第一组G1中的各第三子像素103关于第二方向D2不对称，并且每个第二组G2中的各第三子像素103关于第一方向D1不对称。这样的不对称性允许子像素图案的灵活设计。
与现有的像素排布结构相比，像素排布结构100在同等工艺条件下可以允许第一子像素101、第二子像素102和第三子像素103被更紧密地排列，从而尽可能增大单个子像素的面积。这进而有利于降低显示器件的驱动电流，增加显示器件的寿命。
在图1的示例中，各第一、第二和第三子像素101、102和103相对于彼此基本等距地布置。在一些变型中，第三子像素103可以被不同地布置。例如，各第三子像素103可以相对于彼此基本等距地布置，并且各第一子像素101和各第二子像素102相对于彼此基本等距地布置。将理解的是，在本文档中，与“等距”、“平行”、“相同”、“等于”、“对称”等相结合使用的术语“基本”意图涵盖由于制造工艺导致的偏差。
图2为图1的像素排布结构100的局部区域的示意性平面图。
如图2所示，各第三子像素103每个具有基本轴对称的形状。具体地，每个第一组G1中的各第三子像素103关于第一方向D1基本对称而关于第二方向D2不对称，即，它们具有沿着第一方向D1的对称轴并且关于垂直于该对称轴的方向不对称；每个第二组G2中的各第三子像素103关于第二方向D2基本对称而关于第一方向D1不对称，即，它们具有沿第二方向D2的对称轴并且关于垂直于该对称轴的方向不对称。基本轴对称的第三子像素103可以降低用于蒸镀像素排布结构100的掩模板的图案的复杂度。
在该示例中，第三子像素103每个具有长条的形状。具体地，第一组G1中的各第三子像素103每个沿着第一方向D1延伸，并且第二组G2中的各第三子像素103每个沿着第二方向D2延伸。这样的长条状的第三子像素103允许第二子像素102的面积的增大。在增大的面积的情况下，第二子像素102可以有利地充当发光效率较低的子像素(例如，蓝色子像素)。
第三子像素103每个还具有不同外形轮廓的两端。具体地，所述两端中的一端具有圆弧形的外形轮廓，并且所述两端中的另一端具有由至少一条直线形成的的外形轮廓(在该图2的示例中为梯形)。这允许子像素图案的灵活设计，如后面将更详细地描述的。
在该示例中，第一组G1中的各第三子像素103具有基本相同的取向，并且第三组各中的各第三子像素103也具有基本相同的取向。如图2所示，第一组G1中的各第三子像素103的圆弧形的端均指向该图的右上角，并且第三组各中的各第三子像素103的圆弧形的端均指向该图的右下角。这提供了一种特定的子像素图案。
图2还示出了由连接四个角落处的第一子像素101的虚线所限定 的大矩形(下文中称为“第一虚拟矩形”)。该第一虚拟矩形包括四个小矩形(下文中称为“第二虚拟矩形”)，其每一个由所述第一虚拟矩形的四个顶角位置中的一个相应顶角位置、所述第一虚拟矩形的四条侧边中包含该相应顶角位置的两条相邻侧边的相应中心位置、以及所述第一虚拟矩形的中心位置限定。下面参考第一虚拟矩形和第二虚拟矩形来描述图2的像素排布结构。
该像素排布结构包括：分别位于第一虚拟矩形的中心位置处和四个顶角位置处的五个第一子像素101、位于所述第一虚拟矩形的四条侧边的相应中心位置处的四个第二子像素102、以及位于相应的四个第二虚拟矩形内的四个第三子像素103。将理解的是，短语“子像素位于某一位置处”是指子像素与该位置重叠而不一定需要子像素的中心与该位置重叠。子像素的中心可以为子像素的几何中心，也可以为子像素的发光区域的中心。
图3为图1的像素排布结构100的一种变型的局域区域的示意性平面图。
与图2的实施例相比，各第一子像素101在该实施例中具有四个圆形角，而不是四个直角形角。这提供了一种特定的子像素图案。
图4为图1的像素排布结构100的另一种变型的局域区域的示意性平面图。
与图2的实施例相比，像素排布结构作为整体在该实施例中被顺时针旋转90度。这提供了子像素图案的灵活设计。
在该实施例中，各第一子像素101中的第一多个第一子像素中的每一个具有分别与第一方向D1和第二方向D2上各第三子像素103中的四个直接相邻的第三子像素相对的四条边，所述四条边中的每一条具有与所述四个直接相邻的第三子像素103中的相应一个的与该条边相对的一端的外形轮廓相匹配的相应外形轮廓。
这在图5中更清楚地示出，该图为图4的像素排布结构的局部放大示意图并且示出了一个第一子像素101和在第一方向D1和第二方向D2上与该第一子像素101直接相邻的四个第三子像素103A、103B、103C和103D。
如图5所示，该第一子像素101具有分别与第三子像素103A、103B、103C、103D相对的四条边缘s1、s2、s3、s4，所述四条边缘中 的每一条具有与第三子像素103A、103B、103C、103D中的相应一个的与该条边缘相对的一端的外形轮廓相匹配的相应外形轮廓。具体地，边缘s1具有与第三子像素103A的圆弧形端相匹配的外形轮廓，边缘s2具有与第三子像素103B的圆弧形端相匹配的外形轮廓，边缘s3具有与第三子像素103C的梯形端相匹配的外形轮廓，并且边缘s4具有与第三子像素103D的梯形端相匹配的外形轮廓。更具体地，四条边缘s1、s2、s3、s4具有相应的凹陷部分，其具有与长条状的第三子像素103A、103B、103C、103D的相应端基本相同的形状。这允许第一子像素101与第三子像素103A、103B、103C、103D的更紧密的排列，从而在避免混色的同时提供所要求的子像素面积。
在该实施例中，第一子像素101和各第三子像素103A、103B、103C、103D每一个均不具有小于90度的内角。子像素的内角越大，蒸镀越容易实现；反之，如果子像素的内角较小，可能需要对掩模板的图案进行补偿。因此，根据本实施例的子像素图案可以降低掩模板的图案的复杂度。
另外，由于第一子像素101与第三子像素103C、103D的匹配的外形轮廓，第三子像素103C与第一子像素101具有相互基本平行的相对的侧边，并且第三子像素103D与第一子像素101具有相互基本平行的相对的侧边。具体地，边缘s3的凹陷部分与第三子像素103C的梯形端的外形轮廓平行，并且边缘s4的凹陷部分与第三子像素103D的梯形端的外形轮廓平行。虽然图5中未示出，但是在可替换的实施例中边缘s1和s2的凹陷部分可以具有这样的曲率使得这两个凹陷部分分别与第三子像素103A、103B的圆弧形端的外形轮廓平行。
返回参考图4，第二组子像素G2中的各第三子像素103中的每一个与第一方向D1上直接相邻的第二子像素102具有相互基本平行的相对的侧边，并且第四组子像素G4中的各第三子像素103中的每一个与第二方向D2上直接相邻的第二子像素102具有相互基本平行的相对的侧边。这提供了第三子像素103与直接相邻的第二子像素102之间的间隙的一致宽度，有利于防止混色。
而且，由于第三子像素103与直接相邻的第二子像素102的相对的侧边为直线状，简化了掩模板的图案的复杂度。本公开不限于此。例如，第三子像素103与直接相邻的第二子像素102的相对的侧边可 以不是直线状。
图6为图1的像素排布结构100的一种变型的局域区域的示意性平面图。
与图4的实施例相比，各第一子像素101在该实施例中具有四个圆形角，而不是四个直角形角。这提供了一种特定的子像素图案。
图7为图1的像素排布结构100的另一种变型的局域区域的示意性平面图。
与上面描述的各实施例不同，各第一子像素101在该实施例中每个均具有矩形的形状，从而简化了掩模板的图案的复杂度。
在该实施例中，每个第一组G1中的各第三子像素103中的每两个相邻的第三子像素具有彼此基本相反的取向。如图7所示，第三子像素103B和103D具有彼此基本相反的取向，其中第三子像素103B的圆弧形端指向该图的右上角并且第三子像素103D的圆弧形端指向该图的左下角。
在该实施例中，每个第三组G3中的各第三子像素103中的每两个相邻的第三子像素具有彼此基本相反的取向。如图7所示，第三子像素103A和103C具有彼此基本相反的取向，其中第三子像素103A的圆弧形端指向该图的左上角并且第三子像素103C的圆弧形端指向该图的右下角。这提供了子像素图案的灵活设计。
图8为图1的像素排布结构100的另一种变型的局域区域的示意性平面图。
在该实施例中，各第三子像素103具有与图7的实施例相比不同的形状。如图8所示，第三子像素103A、103B、103C、103D每个仍然为长条状，但是具有圆弧形的外形轮廓的一端和平坦的外形轮廓的另一端。这简化了掩模板的图案的复杂度。
虽然在上面结合图1-8描述了第一子像素101、第二子像素102和第三子像素103的各种各样的变型，但是本公开不限于此。例如，第一子像素101和第二子像素102可以具有从矩形、椭圆形、凸多边形、凹多边形、三角形和圆形所组成的组中选择的至少一个的形状，并且第三子像素103可以具有与所示出的不同的形状。其他实施例是可能的。各所述第三子像素103可以或可以不具有基本相同的面积和基本相同的形状，各所述第一子像素101可以或可以不具有基本相同的面 积和基本相同的形状，并且各所述第二子像素102可以或可以不具有基本相同的面积和基本相同的形状。在实践中，第一子像素101、第二子像素102和第三子像素103的形状、取向和相对位置可以根据需要进行设计。
在上面描述的各实施例中，第三子像素103可以为绿色子像素。在一些实施例中，第一子像素101可以为红色子像素，并且第二子像素102可以为蓝色子像素。其他实施例是可能的。替换地，第一子像素101可以为蓝色子像素，并且第二子像素102可以为红色子像素。由于人眼对绿光比较敏感，第三子像素103的面积可以相对较小。在一些实施例中，绿色子像素的面积小于红色子像素的面积，且红色子像素的面积小于蓝色子像素的面积。替换地，红色子像素的面积小于绿色子像素的面积，并且绿色子像素的面积小于蓝色子像素的面积。所述红色子像素具有第一总面积，所述绿色子像素具有第二总面积，并且所述蓝色子像素具有第三总面积。在一些实施例中，所述第一总面积、所述第二总面积和所述第三总面积具有1∶(1.1～1.5)∶(1.2～1.7)、进一步地1∶(1.2～1.35)∶(1.4～1.55)、或更进一步地1∶1.27∶1.46的比率。与其中红色子像素、绿色子像素和蓝色子像素具有相同的总面积的像素图案相比，这提供了不同水平的视觉质量改善。在一些实施例中，各所述红色子像素、各所述绿色子像素和各所述蓝色子像素在数量上的比率大约为1∶2∶1。这可以通过在第一方向D1和第二方向D2上充分地延展像素排布结构的图案来实现。术语“大约”在此处意图涵盖一定的误差范围，例如±10％(以红色或蓝色子像素的数目为基准)。例如，1∶1.9∶1被认为是“大约为1∶2∶1”。
将理解的是，在上面描述的各实施例中，各第一子像素101、各第二子像素102以及各第三子像素103中的任意两个之间的距离需要大于或等于工艺极限距离。此处，两个子像素之间的距离被定义为该两个子像素中的一个的各点与该两个子像素中的另一个的各点之间的各个距离中最短的距离。工艺极限距离与使用的制作工艺有关。在采用高精度金属掩模板(FMM)配合刻蚀工艺的实施例中，该工艺极限距离约在16μm左右。在采用激光或电铸等工艺的实施例中，该工艺极限距离会更小。在一些实施例中，第三子像素103与第一子像素101之间的距离等于第三子像素103与第二子像素102之间的距离。
图9一般地示出了根据本公开实施例的像素排布结构的借色原理。
在该示例中，第一子像素101为红色子像素，第二子像素102为蓝色子像素，并且第三子像素103为绿色子像素。第二子像素102的面积与第一子像素101的面积相同，即红色子像素的面积与蓝色子像素的面积相同。
如图9所示，位于每个虚线三角形的顶点的绿色子像素G、红色子像素R和蓝色子像素B构成一个虚拟的像素。有利地，在直接相邻的虚线三角形之间总是存在公共的子像素。这提供了比物理分辨率更高的虚拟分辨率，从而改善了显示效果。此外，如上面描述的，第一子像素101、第二子像素102和第三子像素103被允许更紧密地排列，从而提供比现有的像素排布结构更大的每子像素面积。
图10为根据本公开实施例的显示装置1000的示意性平面图。
参照图10，显示装置1000包括显示面板1010、扫描驱动器1020、数据驱动器1030、以及时序控制器1040。
显示面板1010包括显示基板1012和形成在显示基板1012上的像素排布结构1014。像素排布结构1014可以采取上面关于图1-9描述的像素排布结构100及其各种变型中的任一个的形式。像素排布结构1014被布置使得所述第一方向D1和所述第二方向D2(根据其描述了像素排布结构100及其各种变型的配置)中的每一个与显示基板1012的长度方向D3成大约45度相交。术语“大约”在此处意图涵盖一定的误差范围，例如±10％。例如，40.5度被认为是“大约45度”。像素排布结构1014中的子像素可以是有机电致发光子像素，尽管本公开不限于此。
从第一虚拟矩阵的视角来看，像素排布结构1014包括多个邻接的(adjoining)第一虚拟矩阵。在行方向(图10中，水平方向)上，各所述第一虚拟矩形中直接相邻的每两个第一虚拟矩形具有共用侧边，使得该共用侧边上的子像素被该直接相邻的两个第一虚拟矩形共用。在列方向(图10中，垂直方向)上，各所述第一虚拟矩形中直接相邻的每两个第一虚拟矩形具有共用侧边，使得该共用侧边上的子像素被该直接相邻的两个第一虚拟矩形共用。
扫描驱动器1020向显示面板1010输出栅极扫描信号。在一些示例性实施例中，扫描驱动器1020可以被直接集成在显示基板1012中 作为阵列基板行驱动(GOA)电路。替换地，扫描驱动器1020可以通过带式载体封装(Tape Carrier Package，TCP)连接至显示面板1010。扫描驱动器1020的实现可以是已知的，其详细描述因此被省略。
数据驱动器1030向显示面板1010输出数据电压。在一些实施例中，数据驱动器1030可以包括多个并行操作的数据驱动芯片。数据驱动器1030的实现可以是已知的，其详细描述因此被省略。
时序控制器1040控制扫描驱动器1020和数据驱动器1030的操作。具体地，时序控制器1040输出数据控制信号和图像数据以控制数据驱动器1030的驱动操作，并且输出栅极控制信号以控制扫描驱动器1020的驱动操作。数据控制信号和图像数据被施加至数据驱动器1030。栅极控制信号被施加至扫描驱动器1020。时序控制器1040的实现可以是已知的，其详细描述因此被省略。
显示装置1000具有与上面关于图109描述的像素排布结构的实施例相同的优点，其在此不再赘述。作为示例而非限制，该显示装置1000可以为手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
图11A、11B和11C为根据本公开实施例的一组掩模板的示意性平面图。该组掩模板包括第一掩模板1100A、第二掩模板1100B和第三掩模板1100C。
参考图11A，第一掩模板1100A的仅一部分被示出。第一掩模板1100A限定多个第一开口1112。所述多个第一开口1112被布置成具有与上面关于图1-9描述的像素排布结构100或其各种变型中的任一个的各第一子像素的图案相对应的图案。在该示例中，所述多个第一开口1112被布置为具有与图1的像素排布结构100的各第一子像素的图案相对应的图案。在一些实施例中，掩模板1100A为高精度金属掩模板，其可以用于蒸镀工艺中来形成期望的像素图案。
参考图11B，第二掩模板1100B的仅一部分被示出。第二掩模板1100B限定多个第二开口1114。所述多个第二开口1114被布置成具有与上面关于图1-9描述的像素排布结构100或其各种变型中的任一个的各第二子像素的图案相对应的图案。在该示例中，所述多个第二开口1114被布置为具有与图1的像素排布结构100的各第二子像素的图案相对应的图案。在一些实施例中，掩模板1100B为高精度金属掩模板， 其可以用于蒸镀工艺中来形成期望的像素图案。
参考图11C，第三掩模板1100C的仅一部分被示出。第三掩模板1100C限定多个第三开口1116。所述多个第三开口1116被布置成具有与上面关于图1-9描述的像素排布结构100或其各种变型中的任一个的各第三子像素的图案相对应的图案。在该示例中，所述多个第三开口1116被布置为具有与图1的像素排布结构100的各第三子像素的图案相对应的图案。在一些实施例中，掩模板1100C为高精度金属掩模板，其可以用于蒸镀工艺中来形成期望的像素图案。
掩模板1100A、1100B和1100C可以提供与上面关于图1-9描述的像素排布结构的实施例相同的优点，其在此不再赘述。
图12为根据本公开实施例的制作像素排布结构的方法1200的流程图。上面关于图1-9描述的像素排布结构的实施例可以利用方法1200和掩模板1100A、1100B和1100C来实现。
参考图12，在步骤1210处，提供显示基板。显示基板典型地是已经被提供有由例如薄膜晶体管(TFT)形成的驱动电路的背板。在步骤1220处，蒸发第一电致发光材料并通过使所蒸发的第一电致发光材料穿过第一掩模板1100A的所述多个第一开口1112而将所蒸发的第一电致发光材料沉积到所述显示基板上以形成第一子像素101。在步骤1230处，蒸发第二电致发光材料并通过使所蒸发的第二电致发光材料穿过第二掩模板1100B的所述多个第二开口1114而将所蒸发的第二电致发光材料沉积到所述显示基板上以形成第二子像素102。在步骤1240处，蒸发第三电致发光材料并通过使所蒸发的第三电致发光材料穿过第三掩模板1100C的所述多个第三开口1116而将所蒸发的第三电致发光材料沉积到所述显示基板上以形成第三子像素103。步骤1220至1240通常被称为蒸镀，通过其像素图案将被形成在显示基板的预定位置上。将理解的是，步骤1220至1240可以以不同于所图示和描述的顺序被执行。在一些实施例中，电致发光材料可以为有机电致发光材料。其他电致发光材料是可能的。
通过研究附图、公开内容和所附的权利要求书，本领域技术人员在实践所要求保护的主题时，能够理解和实现对于所公开的实施例的变型。虽然各个操作在附图中被描绘为按照特定的顺序，但是这不应理解为要求这些操作必须以所示的特定顺序或者按顺行次序执行，也 不应理解为要求必须执行所有示出的操作以获得期望的结果。在权利要求书中，词语“包括”不排除其他元件或步骤，并且不定冠词“一”或“一个”不排除多个。在相互不同的从属权利要求中记载了某些措施的仅有事实并不表明这些措施的组合不能用来获利。

Claims (43)

  1. 一种像素排布结构，包括：
    在第一方向上排列的多个第一组子像素，所述多个第一组中的每一个包括交替排列的多个第一子像素和多个第三子像素；以及
    在第一方向上排列的多个第二组子像素，所述多个第二组中的每一个包括交替排列的多个第三子像素和多个第二子像素，
    其中所述多个第一组和所述多个第二组在垂直于所述第一方向的第二方向上交替排列，并且
    其中所述多个第一组和所述多个第二组被排列使得形成在所述第二方向上排列的多个第三组子像素和在所述第二方向上排列的多个第四组子像素，所述多个第三组和所述多个第四组在所述第一方向上交替排列，所述多个第三组中的每一个包括交替排列的多个第一子像素和多个第三子像素，所述多个第四组中的每一个包括交替排列的多个第三子像素和多个第二子像素。
  2. 如权利要求1所述的像素排布结构，其中所述第三子像素中的每一个关于所述第一方向或所述第二方向中的至少一个方向不对称。
  3. 如权利要求2所述的像素排布结构，其中所述第三子像素中的每一个具有基本轴对称的形状，且关于垂直于该第三子像素的对称轴的方向不对称。
  4. 如权利要求3所述的像素排布结构，其中所述第三子像素中的每一个关于所述第一方向和所述第二方向中的一个方向基本对称并且关于所述第一方向和所述第二方向中的另一个方向不对称。
  5. 如权利要求4所述的像素排布结构，其中所述第三子像素中的每一个具有长条的形状。
  6. 如权利要求5所述的像素排布结构，其中所述多个第一组中的每一个中的各第三子像素每个沿着所述第一方向延伸，并且其中所述多个第二组中的每一个中的各第三子像素每个沿着所述第二方向延伸。
  7. 如权利要求6所述的像素排布结构，其中所述第三子像素中的每一个具有不同外形轮廓的两端。
  8. 如权利要求7所述的像素排布结构，其中所述两端中的一端具 有圆弧形的外形轮廓，并且所述两端中的另一端具有由至少一条直线形成的外形轮廓。
  9. 如权利要求7所述的像素排布结构，其中所述多个第一组中的每一个中的所述多个第三子像素中的每两个相邻的第三子像素具有彼此基本相反的取向。
  10. 如权利要求7所述的像素排布结构，其中所述多个第三组中的每一个中的所述多个第三子像素中的每两个相邻的第三子像素具有彼此基本相反的取向。
  11. 如权利要求7所述的像素排布结构，其中所述多个第一组中的每一个中的所述多个第三子像素具有基本相同的取向。
  12. 如权利要求7所述的像素排布结构，其中所述多个第三组中的每一个中的所述多个第三子像素具有基本相同的取向。
  13. 如权利要求7所述的像素排布结构，
    其中所述多个第一组子像素中的所述第三子像素中的每一个与所述第一方向上各所述第一子像素中的直接相邻的第一子像素具有相互基本平行的相对的侧边；
    其中所述多个第二组子像素中的所述第三子像素中的每一个与所述第一方向上各所述第二子像素中的直接相邻的第二子像素具有相互基本平行的相对的侧边；
    其中所述多个第三组子像素中的所述第三子像素中的每一个与所述第二方向上各所述第一子像素中的直接相邻的第一子像素具有相互基本平行的相对的侧边；并且
    其中所述多个第四组子像素中的所述第三子像素中的每一个与所述第二方向上各所述第二子像素中的直接相邻的第二子像素具有相互基本平行的相对的侧边。
  14. 如权利要求7所述的像素排布结构，其中各所述第一子像素中的第一多个第一子像素中的每一个具有分别与所述第一方向和所述第二方向上各所述第三子像素中的四个直接相邻的第三子像素相对的四条边缘，所述四条边缘中的每一条具有与所述四个直接相邻的第三子像素中的相应一个的与该条边缘相对的一端的外形轮廓相匹配的相应外形轮廓。
  15. 如权利要求14所述的像素排布结构，其中各所述第一子像素 和各所述第三子像素每一个均不具有小于90度的内角。
  16. 如权利要求1所述的像素排布结构，其中各所述第一子像素、各所述第二子像素和各所述第三子像素相对于彼此基本等距地布置。
  17. 如权利要求1所述的像素排布结构，其中各所述第三子像素相对于彼此基本等距地布置，并且其中各所述第一子像素和各所述第二子像素相对于彼此基本等距地布置。
  18. 如权利要求1所述的像素排布结构，其中所述第一子像素为红色像素，其中所述第二子像素为蓝色像素，并且其中所述第三子像素为绿色像素。
  19. 如权利要求1所述的像素排布结构，其中所述第一子像素为蓝色像素，其中所述第二子像素为红色像素，并且其中所述第三子像素为绿色像素。
  20. 如权利要求18或19所述的像素排布结构，其中所述蓝色子像素每个具有第一面积，其中所述红色子像素每个具有小于所述第一面积的第二面积，并且其中所述绿色子像素每个具有小于所述第二面积的第三面积。
  21. 如权利要求18或19所述的像素排布结构，其中所述蓝色子像素每个具有第一面积，其中所述绿色子像素每个具有小于所述第一面积的第二面积，并且其中所述红色子像素每个具有小于所述第二面积的第三面积。
  22. 如权利要求18或19所述的像素排布结构，其中所述红色子像素具有第一总面积，所述绿色子像素具有第二总面积，并且所述蓝色子像素具有第三总面积，并且其中所述第一总面积、所述第二总面积和所述第三总面积具有1∶(1.1～1.5)∶(1.2～1.7)、进一步地1∶(1.2～1.35)∶(1.4～1.55)、或更进一步地1∶1.27∶1.46的比率。
  23. 如权利要求18或19所述的像素排布结构，其中各所述红色子像素、各所述绿色子像素和各所述蓝色子像素在数量上的比率大约为1∶2∶1。
  24. 如权利要求1所述的像素排布结构，其中各所述第三子像素具有基本相同的面积和基本相同的形状。
  25. 如权利要求1所述的像素排布结构，其中各所述第一子像素具有基本相同的面积和基本相同的形状。
  26. 如权利要求1所述的像素排布结构，其中各所述第二子像素具有基本相同的面积和基本相同的形状。
  27. 一种显示面板，包括：
    显示基板；以及
    如权利要求1-26中任一项所述的像素排布结构，所述像素排布结构形成在所述显示基板上，
    其中所述像素排布结构被布置使得所述第一方向和所述第二方向中的每一个与所述显示基板的长度方向成大约45度相交。
  28. 如权利要求27所述的显示面板，其中所述第一子像素、所述第二子像素和所述第三子像素为有机电致发光子像素。
  29. 一种显示装置，包括如权利要求27或28所述的显示面板。
  30. 一组用于制作如权利要求1-26中任一项所述的像素排布结构的掩模板，包括：
    第一掩模板，其限定多个第一开口，所述多个第一开口被布置成具有与各所述第一子像素的图案对应的图案；
    第二掩模板，其限定多个第二开口，所述多个第二开口被布置成具有与各所述第二子像素的图案对应的图案；以及
    第三掩模板，其限定多个第三开口，所述多个第三开口被布置成具有与各所述第三子像素的图案对应的图案。
  31. 一种使用如权利要求30所述的一组掩模板制作像素排布结构的方法，包括：
    提供显示基板；
    蒸发第一电致发光材料并通过使所蒸发的第一电致发光材料穿过所述第一掩模板的所述多个第一开口而将所蒸发的第一电致发光材料沉积到所述显示基板上以形成各第一子像素；
    蒸发第二电致发光材料并通过使所蒸发的第二电致发光材料穿过所述第二掩模板的所述多个第二开口而将所蒸发的第二电致发光材料沉积到所述显示基板上以形成各第二子像素；并且
    蒸发第三电致发光材料并通过使所蒸发的第三电致发光材料穿过所述第三掩模板的所述多个第三开口而将所蒸发的第三电致发光材料沉积到所述显示基板上以形成各第三子像素。
  32. 一种像素排布结构，包括：
    五个第一子像素，分别位于第一虚拟矩形的中心位置处和四个顶角位置处；
    四个第二子像素，位于所述第一虚拟矩形的四条侧边的相应中心位置处；以及
    四个第三子像素，位于相应的四个第二虚拟矩形内，各所述第二虚拟矩形中的每一个由所述第一虚拟矩形的所述四个顶角位置中的一个相应顶角位置、所述第一虚拟矩形的所述四条侧边中包含该相应顶角位置的两条侧边的相应中心位置、以及所述第一虚拟矩形的中心位置限定，所述四个第二虚拟矩形构成所述第一虚拟矩形。
  33. 如权利要求32所述的像素排布结构，其中所述第三子像素中的每一个关于所述第一方向或所述第二方向中的至少一个方向不对称。
  34. 一种显示面板，包括：
    显示基板；以及
    多个邻接的如权利要求32-33中任一项所述的像素排布结构，所述像素排布结构形成在所述显示基板上，
    其中在行方向上各所述第一虚拟矩形中直接相邻的每两个第一虚拟矩形具有共用侧边，使得该共用侧边上的子像素被该直接相邻的两个第一虚拟矩形共用，并且
    其中在列方向上各所述第一虚拟矩形中直接相邻的每两个第一虚拟矩形具有共用侧边，使得该共用侧边上的子像素被该直接相邻的两个第一虚拟矩形共用。
  35. 如权利要求34所述的显示面板，其中所述第一子像素为红色像素，其中所述第二子像素为蓝色像素，并且其中所述第三子像素为绿色像素。
  36. 如权利要求34所述的显示面板，其中所述第一子像素为蓝色像素，其中所述第二子像素为红色像素，并且其中所述第三子像素为绿色像素。
  37. 如权利要求35或36所述的显示面板，其中所述蓝色子像素每个具有第一面积，其中所述红色子像素每个具有小于所述第一面积的第二面积，并且其中所述绿色子像素每个具有小于所述第二面积的第三面积。
  38. 如权利要求35或36所述的显示面板，其中所述蓝色子像素每个具有第一面积，其中所述绿色子像素每个具有小于所述第一面积的第二面积，并且其中所述红色子像素每个具有小于所述第二面积的第三面积。
  39. 如权利要求35或36所述的显示面板，其中所述红色子像素具有第一总面积，所述绿色子像素具有第二总面积，并且所述蓝色子像素具有第三总面积，并且其中所述第一总面积、所述第二总面积和所述第三总面积具有1∶(1.1～1.5)∶(1.2～1.7)、进一步地1∶(1.2～1.35)∶(1.4～1.55)、或更进一步地1∶1.27∶1.46的比率。
  40. 如权利要求35或36所述的显示面板，其中各所述红色子像素、各所述绿色子像素和各所述蓝色子像素在数量上的比率大约为1∶2∶1。
  41. 一种像素排布结构，包括：
    在第一方向上排列的多个第一重复单元，所述多个第一重复单元中的每一个包括交替排列的多个第一子像素和多个第三子像素；以及
    在第一方向上排列的多个第二重复单元，所述多个第二重复单元中的每一个包括交替排列的多个第三子像素和多个第二子像素，
    其中所述多个第一重复单元和所述多个第二重复单元在垂直于所述第一方向的第二方向上交替排列，并且
    其中所述多个第一重复单元和所述多个第二重复单元被排列使得各所述第一子像素中的每个第一子像素与各所述第三子像素中的四个第三子像素直接相邻并且各所述第二子像素中的每个第二子像素与各所述第三子像素中的四个第三子像素直接相邻。
  42. 如权利要求41所述的像素排布结构，其中所述第三子像素中的每一个关于所述第一方向或所述第二方向中的至少一个方向不对称。
  43. 一种显示面板，包括：
    显示基板；以及
    如权利要求41或42所述的像素排布结构，所述像素排布结构形成在所述显示基板上，
    其中所述像素排布结构被布置使得所述第一方向和所述第二方向中的每一个与所述显示基板的长度方向成大约45度相交。
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