WO2019127751A1 - 液晶显示器及其驱动方法 - Google Patents

液晶显示器及其驱动方法 Download PDF

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WO2019127751A1
WO2019127751A1 PCT/CN2018/073455 CN2018073455W WO2019127751A1 WO 2019127751 A1 WO2019127751 A1 WO 2019127751A1 CN 2018073455 W CN2018073455 W CN 2018073455W WO 2019127751 A1 WO2019127751 A1 WO 2019127751A1
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sub
liquid crystal
crystal display
pixel units
pixel
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PCT/CN2018/073455
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English (en)
French (fr)
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陈帅
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深圳市华星光电技术有限公司
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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/13306—Circuit arrangements or driving methods for the control of single liquid crystal cells
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix

Definitions

  • the present invention relates to a liquid crystal display and a method of driving the same.
  • TFT-LCD Thin film transistor liquid crystal display
  • the potential applied to the pixel electrode needs to be alternately inverted with respect to the potential of the common electrode.
  • the potential of the pixel electrode is higher than the potential of the common electrode, it is called positive polarity (+).
  • negative polarity (-) that is, the potential of the pixel electrode. It is repeated between positive and negative polarity and is called reverse driving.
  • the inversion driving may include a driving method such as frame inversion, row inversion, column inversion, and dot inversion. Among the various drive modes, the column inversion drive has the lowest power consumption and is the most common inversion method in the industry.
  • Fig. 1 is a view showing the polarity of a potential of a pixel array of a liquid crystal display driven by column inversion.
  • a pixel array of a liquid crystal display may include a plurality of pixels arranged in a matrix. As shown in FIG. 1, during the Nth frame, the potential of the pixel in the odd column may have a positive polarity, the potential of the pixel in the even column may have a negative polarity; during the N+1 frame, the pixel in the odd column The potential polarity can be reversed to a negative polarity, and the potential polarity of a pixel in an even column can be reversed to a positive polarity.
  • FIG. 2A shows an example image to be displayed
  • FIG. 2B shows an actual display image obtained by a top-down scanning method.
  • the luminance of the area A is brighter than the predetermined value
  • the luminance of the area B is darker than the predetermined value, and there is a significant vertical crosstalk phenomenon. Therefore, it is necessary to eliminate or reduce the vertical crosstalk phenomenon of the liquid crystal display.
  • the present invention is intended to provide a liquid crystal display and a driving method thereof capable of eliminating or reducing a vertical crosstalk phenomenon, thereby improving display quality.
  • the liquid crystal display includes: a pixel array including a plurality of pixel units arranged in a matrix, each of the pixel units including at least three sub-pixel units arranged in a horizontal direction; a plurality of data lines arranged in a vertical direction, each data line being connected Up to one column of sub-pixel units; and a plurality of scan lines arranged in a horizontal direction, each scan line being connected to one row of sub-pixel units.
  • the driving method includes: first applying a scan signal to a scan line located in the middle of the pixel array during a frame period, and then sequentially applying scan signals to the respective scan lines alternately from the middle to the both sides, and applying corresponding data signals To the data line.
  • the liquid crystal display can be driven by column inversion.
  • the polarity of the driving potentials of adjacent two columns of sub-pixel units may be reversed during each frame period.
  • the polarity of the driving potential of each column of sub-pixel units can be inverted in accordance with the frame frequency.
  • Each of the sub-pixel units may include at least one thin film transistor having a gate connected to a horizontal scanning line, a drain connected to the vertical data line, and a source connected to the pixel electrode.
  • a liquid crystal display comprising: a pixel array including a plurality of pixel units arranged in a matrix, each pixel unit including at least three sub-pixel units arranged in a horizontal direction; a plurality of data lines, in a vertical direction Arranged, each data line is connected to one column of sub-pixel units; and a plurality of scan lines are arranged in a horizontal direction, and each of the scan lines is connected to one row of sub-pixel units.
  • the liquid crystal display is configured to: first apply a scan signal to a scan line located in the middle of the pixel array during a frame period, and then sequentially apply scan signals to the respective scan lines alternately from the middle to the sides, and the corresponding data The signal is applied to the data line.
  • the liquid crystal display can employ column inversion driving.
  • the polarity of the driving potentials of adjacent two columns of sub-pixel units may be reversed during each frame period.
  • the polarity of the driving potential of each column of sub-pixel units can be inverted in accordance with the frame frequency.
  • Each of the sub-pixel units may include at least one thin film transistor having a gate connected to a horizontal scanning line, a drain connected to the vertical data line, and a source connected to the pixel electrode.
  • Fig. 1 is a view showing the polarity of a potential of a pixel array of a liquid crystal display driven by column inversion.
  • FIG. 2A shows an example image to be displayed.
  • Fig. 2B shows an actual display image obtained by a top-down scanning method.
  • FIG. 3 shows a schematic diagram of a pixel array of a liquid crystal display according to an exemplary embodiment of the present invention.
  • FIG. 4 illustrates a schematic diagram of a driving method of a liquid crystal display according to an exemplary embodiment of the present invention.
  • Fig. 5 is a graph showing changes in pixel potential of the area A and the area B in the actual display image obtained by the top-down scanning method.
  • FIG. 3 shows a schematic diagram of a pixel array in a liquid crystal display according to an exemplary embodiment of the present invention.
  • a pixel array of a liquid crystal display according to an exemplary embodiment of the present invention may include a plurality of pixel units 100 arranged in a matrix, a plurality of scanning lines S arranged in a horizontal direction, and a plurality of pieces of data arranged in a vertical direction. Line D.
  • each of the pixel units 100 may include at least three sub-pixel units arranged in a horizontal direction, each of the sub-pixel units may be defined by a scan line S and a data line D, wherein each data line D may be connected to one column
  • each scan line S can be connected to one row of sub-pixel units.
  • the three sub-pixel units may be the red sub-pixel unit 101, the green sub-pixel unit 102, and the blue sub-pixel unit 103, respectively, but the invention is not limited thereto.
  • Each of the sub-pixel units may include at least one thin film transistor whose gate may be connected to the scanning line S in the horizontal direction, the drain thereof may be connected to the data line D in the vertical direction, and the source thereof may be connected to the pixel electrode .
  • the pixel array of the liquid crystal display may employ column inversion driving, and adjacent data lines D will be respectively given different polarities such as positive polarity (+) or negative polarity (-). Potential. Therefore, the sub-pixels of the same column have the same polarity, and the sub-pixels of the adjacent columns have opposite polarities, and the polarity of the driving potential of each column of sub-pixels can be inverted according to the frame frequency.
  • FIG. 4 illustrates a schematic diagram of a driving method of a liquid crystal display according to an exemplary embodiment of the present invention.
  • a thin film transistor of each sub-pixel may be turned on line by line through the scan line S, and a data voltage may be input through the data line D to display an image.
  • the scanning signals are input line by line using a scanning manner from the middle to the both sides. Specifically, a sufficiently large positive potential is first applied to the first scan line S1 located in the middle of the pixel array, so that the thin film transistors connected to the first scan line S1 are both turned on, and the corresponding image is input to the thin film transistor via the data line D. Data to charge the pixel electrode to the appropriate potential. After the charging is completed, a sufficiently large negative potential is applied to the first scan line S1 to turn off the corresponding thin film transistors. The second scan line S2 located below the first scan line S1 is then activated, and image data is input.
  • the third scan line S3 located above the first scan line S1 is activated, so that the fourth scan line S4, the fifth scan line S5, ..., the 2nth scan line S2n, and the 2n are sequentially activated from the middle to the sides, respectively.
  • the scan line S2n+1 is +1 until the image data of the entire image is written, and the signal is rewritten from the first scan line S1 located in the middle.
  • the invention is not limited to the above.
  • the third scan line S3 located above the first scan line S1 may be subsequently activated, and then the second scan located under the first scan line S1 may be activated.
  • the line S2 sequentially activates the fifth scanning line S5, the fourth scanning line S4, ..., the 2n+1th scanning line S2n+1, and the 2nth scanning line S2n, respectively.
  • the conventional liquid crystal display usually adopts a top-down or bottom-up scanning mode, but the above scanning method may cause a serious vertical crosstalk phenomenon.
  • the scanning direction is from top to bottom, and the area A and the area B are positive polarity potentials in the Nth frame, and the area A and the area B in the N+1th frame are Negative potential.
  • the potential of the intermediate window image is set to 14V in the positive half cycle and 0V in the negative half cycle, and the potential of the grayscale image of the region A and the region B is set to 9V in the positive half cycle and 5V in the negative half cycle, wherein the common electrode potential is 7V.
  • the gate off potential is -6V.
  • Vg in Vgs represents an off-state potential value of a scan line
  • Vs represents a potential value at a lower potential in a source and a drain.
  • Table 1 shows the potential changes of the area A and the area B during the frame period.
  • the thin film transistor of the region A was charged to the positive half cycle potential 9 V immediately during the first 1/3 time.
  • the window image is charged to a positive potential of 14V, and the thin film transistor of the region A cannot be completely turned off. Therefore, the gate is at the off potential -6V, the source potential is 9V, and the drain potential is received from the data line.
  • the window potential of the D input is 14V, and thus, the Vgs of the region A is -15V and the Vds is 5V.
  • the thin film transistor of region B is charged to a positive potential of 9V, and the thin film transistor of region A cannot be completely turned off during this period, and its gate is at the off potential -6V, the source potential is 9V, and its drain
  • the potential of the region B input from the data line is affected by 9V. Therefore, the Vgs of the region A at this time is -15V, and Vds is 0V. Similar to the positive half cycle, in the negative half cycle of the Nth frame, the thin film transistor of the region A is charged to the negative half cycle potential 5V immediately during the first 1/3 time.
  • the window image is charged to the negative half cycle potential 0V, the thin film transistor of the region A cannot be completely turned off, the gate is at the off potential -6V, the source potential is 5V, and the drain potential is input from the data line.
  • the window potential has an effect of 0V, so the Vgs of the region A is -6V and the Vds is 5V.
  • the thin film transistor of region B is charged to the negative half cycle potential of 5V, and the thin film transistor of region A cannot be completely turned off.
  • the gate of the region is still at the off potential -6V, the source potential is 5V, and the drain is affected.
  • the potential of the region B input from the data line has an influence of 5 V, and therefore, the Vgs of the region A at this time is -11 V, and Vds is 0 V.
  • the potential change of the thin film transistor in the region B is similar to that of the region A.
  • the region A In the first 1/3 of the positive half cycle, the region A is charged to the positive half cycle potential of 9V, and the region B is still at the negative half cycle potential, so that the gate is at the off potential -6V, the source potential is 5V, and the drain potential is 9V, at this time, the Vgs of the area B is -11V, and the Vds is 4V.
  • the window image is charged to a positive potential of 14V.
  • the Vgs of the region B is -11V
  • the Vds is 9V.
  • the region B was charged with a positive half cycle potential of 9V.
  • the region B In the negative half cycle, in the first 1/3 time, the region B is still in the positive half cycle potential, the gate is at the off potential -6V, the source potential is 9V, and the drain is 5V. At this time, the Vgs of the region B is -11V. Vds is 4V. In the middle 1/3 time, the window image is charged to the negative half cycle potential 0V, the Vgs of the region B is -6V, and the Vds is 9V. During the last 1/3 of the time, region B is charged with a negative half cycle potential.
  • Fig. 5 is a graph showing changes in pixel potential of the area A and the area B in the actual display image obtained by the top-down scanning method.
  • the region A is charged to the positive potential immediately after the first 1/3 time.
  • the thin film transistor cannot be completely turned off and Vds ⁇ 0, it leaks to a more positive potential, and the pixel potential becomes high.
  • the potential of the region A at this time is not significantly changed.
  • the area A is charged to the negative potential immediately after the first 1/3 time.
  • the thin film transistor cannot be completely turned off and leaks to a more negative potential, and therefore, the difference between the actual pixel potential of the region A and the common potential Vcom becomes larger than the set value. Therefore, the display brightness of the area A becomes brighter. Contrary to the change of the area A, during the Nth frame, the region B in the negative polarity leaks to the positive potential due to the fact that the thin film transistor cannot be completely turned off during the first 2/3 time. During the (N+1)th frame, the region B in the positive polarity leaks toward the negative potential at the first 2/3 time, and thus the difference between the actual pixel potential of the region B and the common potential Vcom is smaller than the set value, and thus the region B The display brightness becomes darker.
  • the actual leakage time of the area A is only 1/3 of the time, and the actual leakage time of the area B is 1/3 of the start and the middle.
  • the leakage time region B is twice the region A, but the Vgs of the region A have two potentials of -15V and -6V, and the Vgs of the region B have two potentials of -11V and -6V.
  • the Vgs of the area A differ greatly, and therefore, the vertical crosstalk of the area A is more serious than the area B.
  • the leakage of the A region in the positive half cycle Vgs is -15V is the main influencing factor of serious vertical crosstalk. In fact, the above situation coincides with the I-V curve of the thin film transistor.
  • Vgs is -15V
  • the thin film transistor has been operated in the Poole-Frankel region, so there is a larger leakage current. Therefore, in order to improve the vertical crosstalk phenomenon, it is necessary to reduce the value of Vgs as much as possible.
  • a scanning method from the middle to the both sides is employed in the driving method according to an exemplary embodiment of the present invention.
  • the potential variation of the region A and the region B using the driving method of the present invention is also analyzed below by taking an example image showing FIGS. 2A and 2B as an example.
  • the pixel region corresponding to the intermediate window image is immediately charged to the positive potential 14V, and at this time, the region A and the region B have not been charged with a positive potential, and thus the source potential of the thin film transistor is 5V.
  • the drain potential is affected by the window potential of the data line input by 14V, and the gate off potential is -6V. Therefore, the Vgs of the area A and the area B at this time are -11V.
  • Zone A and Zone B are then charged to a positive potential.
  • the intermediate window image is immediately charged to the negative potential 0V, and at this time, the region A and the region B are not charged with a negative potential, so that the thin film transistor has a source potential of 9V, and the drain thereof
  • the potential is affected by the window potential input from the data line as 0V, and the gate off potential is -6V. Therefore, the Vgs of the area A and the area B at this time are -6V. It can be seen that when the example image of FIG. 2A is displayed, the Vgs of the thin film transistor in the sub-pixel can be kept small by scanning from the middle to the two sides, thereby effectively preventing the thin film transistor from operating at a large off current. The area, which in turn effectively improves the vertical crosstalk of the liquid crystal display and improves the display quality.

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Abstract

一种液晶显示器及驱动方法。液晶显示器包括：像素阵列，包括以矩阵布置的多个像素单元100，每个像素单元100包括沿水平方向布置的至少三个子像素单元；多条数据线D，沿竖直方向布置，每条数据线D连接至一列子像素单元；以及多条扫描线S，沿水平方向布置，每条扫描线S连接至一行子像素单元。驱动方法包括：在帧时段期间，首先将扫描信号施加到位于像素阵列中间的扫描线S1，随后从中间交替地向两侧依次将扫描信号施加到各条扫描线，并将相应的数据信号施加到数据线D。

Description

液晶显示器及其驱动方法 技术领域
本发明涉及液晶显示器及其驱动方法。
背景技术
薄膜晶体管液晶显示器(TFT-LCD)因其功耗低、体积小、画质高、响应速度快等优势而在显示器中占主流位置，其广泛应用于日常生活的各个方面，诸如，小尺寸的手机、摄像机、数码相机，中尺寸的笔记本电脑、台式机，大尺寸的家用电视以及大型投影设备等。
在薄膜晶体管液晶显示器中，为了避免液晶极化，施加于像素电极的电位需要相对于公共电极的电位交替反转。当像素电极的电位高于公共电极的电位时，称之为正极性(+)，当像素电极的电位低于公共电极的电位时，称之为负极性(-)，即，像素电极的电位在正负极性之间反复变化，称之为反转驱动。反转驱动可以包括帧反转驱动(frame inversion)、行反转驱动(row inversion)、列反转驱动(column inversion)及点反转驱动(dot inversion)等驱动方式。在各种驱动方式中，列反转驱动的功耗最低，也是业界最常用的反转方式。
图1示出列反转驱动下液晶显示器的像素阵列的电位极性的示意图。通常，液晶显示器的像素阵列可以包括以矩阵布置的多个像素。如图1所示，在第N帧期间，处于奇数列的像素的电位可以具有正极性，处于偶数列的像素的电位可以具有负极性；在第N+1帧期间，处于奇数列的像素的电位极性可以反转为负极性，处于偶数列的像素的电位极性可以反转为正极性。
列反转驱动的液晶显示器通常采用自上而下的扫描方式。然而，由于像素内的薄膜晶体管在截止状态下漏电流不能完全为0，因此在采用自上而下的扫描方式时，图像显示会出现垂直串扰现象。图2A示出待显示的示例图像，图2B示出采用自上而下的扫描方式得到的实际显示图像。从图2B可以看出，区域A的亮度比预定值偏亮，而区域B的亮度比预定值偏暗，存在明显的垂直 串扰现象。因此，需要消除或减少液晶显示器的垂直串扰现象。
发明内容
为了解决上述技术问题，本发明意图提供一种液晶显示器及其驱动方法，其能够消除或减少垂直串扰现象，从而提高显示质量。
提供了一种液晶显示器的驱动方法。该液晶显示器包括：像素阵列，包括以矩阵布置的多个像素单元，每个像素单元包括沿水平方向布置的至少三个子像素单元；多条数据线，沿竖直方向布置，每条数据线连接至一列子像素单元；以及多条扫描线，沿水平方向布置，每条扫描线连接至一行子像素单元。该驱动方法包括：在帧时段期间，首先将扫描信号施加到位于像素阵列中间的扫描线，随后从中间交替地向两侧依次将扫描信号施加到各条扫描线，并将相应的数据信号施加到数据线。
可采用列反转驱动所述液晶显示器。
在每个帧时段期间，相邻两列子像素单元的驱动电位的极性可以相反。
每列子像素单元的驱动电位的极性可按照帧频率进行反转。
每个子像素单元可包括至少一个薄膜晶体管，所述薄膜晶体管的栅极连接至水平方向的扫描线，其漏极连接至竖直方向的数据线，其源极连接至像素电极。
提供了一种液晶显示器，该液晶显示器包括：像素阵列，包括以矩阵布置的多个像素单元，每个像素单元包括沿水平方向布置的至少三个子像素单元；多条数据线，沿竖直方向布置，每条数据线连接至一列子像素单元；以及多条扫描线，沿水平方向布置，每条扫描线连接至一行子像素单元。该液晶显示器被配置为：在帧时段期间，首先将扫描信号施加到位于像素阵列中间的扫描线，随后从中间交替地向两侧依次将扫描信号施加到各条扫描线，并将相应的数据信号施加到数据线。
所述液晶显示器可采用列反转驱动。
在每个帧时段期间，相邻两列子像素单元的驱动电位的极性可以相反。
每列子像素单元的驱动电位的极性可按照帧频率进行反转。
每个子像素单元可包括至少一个薄膜晶体管，所述薄膜晶体管的栅极连接至水平方向的扫描线，其漏极连接至竖直方向的数据线，其源极连接至像素电极。
附图说明
图1示出列反转驱动下液晶显示器的像素阵列的电位极性的示意图。
图2A示出待显示的示例图像。
图2B示出采用自上而下的扫描方式得到的实际显示图像。
图3示出根据本发明的示例性实施例的液晶显示器的像素阵列的示意图。
图4示出根据本发明的示例性实施例的液晶显示器的驱动方法的示意图。
图5示出采用自上而下的扫描方式得到的实际显示图像中的区域A和区域B的像素电位变化的曲线图。
具体实施方式
在下面的描述中，出于说明的目的，阐述了许多具体细节以提供对各种示例性实施例的彻底理解。然而，明显的是，可以不用这些具体细节来实践各种示例性实施例，或者可以用一种或更多种等同布置来实践各种示例性实施例。下面，将参照附图描述本发明的示例性实施例。
图3示出了根据本发明的示例性实施例的液晶显示器中的像素阵列的示意图。参照图3，根据本发明的示例性实施例的液晶显示器的像素阵列可以包括以矩阵布置的多个像素单元100、沿水平方向布置的多条扫描线S以及沿竖直方向布置的多条数据线D。在像素阵列中，每个像素单元100可以包括沿水平方向布置的至少三个子像素单元，每个子像素单元可以由扫描线S和数据线D限定，其中，每条数据线D可以连接至一列子像素单元，每条扫描线S可以连接至一行子像素单元。所述三个子像素单元可以分别为红色子像素单元101、绿色子像素单元102和蓝色子像素单元103，但是本发明不限于此。每个子像素单元可以包括至少一个薄膜晶体管，所述薄膜晶体管的栅极可以连接至水平方向的扫描线S，其漏极可以连接至竖直方向的数据线D，其源极可以连接至像素电极。
此外，根据本发明的示例性实施例的液晶显示器的像素阵列可以采用列反 转驱动，相邻的数据线D将被分别赋予诸如正极性(+)或负极性(-)的不同极性的电位。因此，同一列的子像素具有相同的极性，而相邻列的子像素具有相反的极性，并且每列子像素的驱动电位的极性可以按照帧频率进行反转。
图4示出根据本发明的示例性实施例的液晶显示器的驱动方法的示意图。在图像显示期间，可以通过扫描线S输入扫描信号来逐行导通各子像素的薄膜晶体管，并通过数据线D输入数据电压以显示图像。
在根据本发明的示例性实施例中，采用从中间至两侧的扫描方式来逐行输入扫描信号。具体地，首先对位于像素阵列中部的第一扫描线S1施加足够大的正电位，因此连接至第一扫描线S1的薄膜晶体管均导通，此时经由数据线D向薄膜晶体管输入对应的图像数据，以将像素电极充电至适当的电位。在充电完成后，向第一扫描线S1施加足够大的负电位以使相应的薄膜晶体管截止。随后启动位于第一扫描线S1下方的第二扫描线S2，并输入图像数据。接下来，启动位于第一扫描线S1上方的第三扫描线S3，如此依序从中间到两侧分别启动第四扫描线S4、第五扫描线S5、…、第2n扫描线S2n和第2n+1扫描线S2n+1，直至将整个图像的图像数据写入，再重新自位于中部的第一扫描线S1重新写入信号。
然而，本发明不限于上面所述。在另一示例性实施例中，在启动第一扫描线S1后，可以随后启动位于第一扫描线S1上方的第三扫描线S3，接下来再启动位于第一扫描线S1下方的第二扫描线S2，如此顺次分别启动第五扫描线S5、第四扫描线S4、…、第2n+1扫描线S2n+1和第2n扫描线S2n。
与本发明的驱动方法不同，传统的液晶显示器通常采用自上而下或者自下而上的扫描方式，然而采用上述扫描方式会出现较为严重的垂直串扰现象。
以显示图2A和图2B所示的示例图像为例，扫描方向为自上而下，并且第N帧时区域A和区域B为正极性电位，第N+1帧时区域A和区域B为负极性电位。并且，将中间窗口图像的电位设定为正半周14V、负半周0V，将区域A和区域B的灰度图像的电位设定为正半周9V、负半周5V，其中，共电极电位为7V，栅极关态电位为-6V。此外，在下文中，Vgs中的Vg表示扫描线的关态电位值，Vs表示源极、漏极中电位更低的电位值。
表1示出了帧时段期间区域A和区域B的电位变化。
如表1所示，对于区域A，在帧时段的正半周中，区域A的薄膜晶体管在前1/3时间立即被充入正半周电位9V。在中间1/3时间，窗口图像被充入正电位14V，区域A的薄膜晶体管不能完全截止，因此，其栅极处于关态电位-6V，源极电位为9V，漏极电位受从数据线D输入的窗口电位影响为14V，因而，区域A的Vgs为-15V，Vds为5V。在最后1/3时间，区域B的薄膜晶体管被充入正电位9V，区域A的薄膜晶体管在此期间仍不能完全截止，其栅极处于关态电位-6V，源极电位9V，其漏极受从数据线输入的区域B的电位影响为9V，因此，此时区域A的Vgs为-15V，Vds为0V。与正半周类似，在第N帧的负半周中，区域A的薄膜晶体管在前1/3时间立即被充入负半周电位5V。在中间1/3时间，窗口图像被充入负半周电位0V，区域A的薄膜晶体管不能完全截止，其栅极处于关态电位-6V，源极电位为5V，漏极电位受从数据线输入的窗口电位影响为0V，因而区域A的Vgs为-6V，Vds为5V。在最后1/3时间期间，区域B的薄膜晶体管被充入负半周电位5V，区域A的薄膜晶体管仍不能完全截止，其栅极处于关态电位-6V，源极电位5V，其漏极受从数据线输入的区域B的电位影响为5V，因此，此时区域A的Vgs为-11V，Vds为0V。
区域B中薄膜晶体管的电位变化与区域A类似。在正半周的前1/3时间，区域A被充电至正半周电位9V，区域B仍处于负半周电位，因而其栅极处于关态电位-6V，源极电位为5V，其漏极电位为9V，此时区域B的Vgs为-11V，Vds为4V。在中间1/3时间，窗口图像被充入正电位14V，此时，区域B的Vgs为-11V，Vds为9V。在最后1/3时间期间，区域B被充入正半周电位9V。在负半周中，前1/3时间，区域B仍处于正半周电位，其栅极处于关态电位-6V，源极电位为9V，其漏极为5V，此时区域B的Vgs为-11V，Vds为4V。在中间1/3时间，窗口图像被充入负半周电位0V，区域B的Vgs为-6V，Vds为9V。在最后1/3时间期间，区域B被充入负半周电位。
表1
Figure PCTCN2018073455-appb-000001
图5示出了采用自上而下的扫描方式得到的实际显示图像中的区域A和区域B的像素电位变化的曲线图。如图5中所示，在第N帧期间，区域A在前1/3时间立即被充入正极性电位。在中间1/3时间由于薄膜晶体管不能完全关闭且Vds≠0，因而向更正极性电位漏电，像素电位变高。在后1/3时间虽然薄膜晶体管不能完全关闭但Vds≈0，因而不会明显改变此时区域A的电位。同样地，在第N+1帧期间，区域A在前1/3时间立即被充入负极性电位。在之后的1/3时间内，薄膜晶体管不能完全关闭而向更负极性电位漏电，因此，区域A的实际像素电位与公共电位Vcom的差值比设定值变大。因而区域A的显示亮度变得更亮。与区域A的改变相反，在第N帧期间，处于负极性的区域B在前2/3时间由于薄膜晶体管不能完全关闭而向正极性电位漏电。在第N+1帧期间，处于正极性的区域B在前2/3时间向负极性电位漏电，因而区域B的实际像素电位与公共电位Vcom的差值比设定值小，因此区域B的显示亮度变得更暗。
结合表1的数据可知，区域A实际的漏电时间仅为中间的1/3时间，而区域B实际的漏电时间为开始和中间的1/3时间。漏电时间区域B是区域A的2倍，但是区域A的Vgs存在-15V、-6V两种电位、区域B中Vgs为-11V、-6V两种电位。区域A的Vgs相差较大，因此，区域A比区域B的垂直串扰更为严重。A区在正半周Vgs为-15V时的漏电是造成垂直串扰严重的主要影响因素。实际上，上述情况与薄膜晶体管的I-V曲线相吻合。Vgs为-15V时薄膜晶体管已经工作在蒲尔-弗朗克(Poole-Frankel)区域，因此而存在更大的漏电电流。因此，为了改善垂直串扰现象，需要尽可能减小Vgs的值。
在根据本发明的示例性实施例的驱动方法中采用了从中间至两侧的扫描方式。下面仍以显示图2A和图2B的示例图像为例，分析采用本发明的驱动方法的区域A和区域B的电位变化。在帧时段的正半周中，中间窗口图像对应的像素区域立即被充入正电位14V，而此时区域A和区域B还未被充入正电位，因而其薄膜晶体管的源极电位为5V，漏极电位受数据线输入的窗口电位的影响为14V，栅极关态电位为-6V。因此，此时区域A和区域B的Vgs为-11V。随后区域A和区域B被充电至正电位。在帧时段负半周中，中间的窗口图像立即被充入负电位0V，而此时区域A和区域B由于还未被充入负电位，因而其薄膜晶体管具有9V的源极电位，其漏极电位受从数据线输入的窗口电位的影响为0V，栅极关态电位为-6V。因此，此时区域A和区域B的Vgs为-6V。由此可见，在显示图2A的示例图像时，采用自中间向两侧扫描的方式可以使子像素中的薄膜晶体管的Vgs保持为较小，从而有效地避免了薄膜晶体管工作在截止电流较大的区域，进而有效地改善了液晶显示器的垂直串扰现象并提高显示质量。
应理解的是，在此描述的示例性实施例应仅以描述性含义来考虑，而不是出于限制的目的。虽然已经参照附图描述了本发明的技术构思，但是本领域的普通技术人员应该理解，在不脱离由权利要求限定的精神和范围的情况下，可以对其进行形式和细节的各种改变。

Claims (10)

  1. 一种液晶显示器的驱动方法，所述液晶显示器包括：
    像素阵列，包括以矩阵布置的多个像素单元，每个像素单元包括沿水平方向布置的至少三个子像素单元；
    多条数据线，沿竖直方向布置，每条数据线连接至一列子像素单元；以及
    多条扫描线，沿水平方向布置，每条扫描线连接至一行子像素单元，
    其中，所述液晶显示器的驱动方法包括：
    在帧时段期间，首先将扫描信号施加到位于像素阵列中间的扫描线，随后从中间交替地向两侧依次将扫描信号施加到各条扫描线，并将相应的数据信号施加到数据线。
  2. 如权利要求1所述的驱动方法，其中，采用列反转驱动所述液晶显示器。
  3. 如权利要求2所述的驱动方法，其中，在每个帧时段期间，相邻两列子像素单元的驱动电位的极性相反。
  4. 如权利要求2所述的驱动方法，其中，每列子像素单元的驱动电位的极性按照帧频率进行反转。
  5. 如权利要求1所述的驱动方法，其中，每个子像素单元包括至少一个薄膜晶体管，所述薄膜晶体管的栅极连接至水平方向的扫描线，其漏极连接至竖直方向的数据线，其源极连接至像素电极。
  6. 一种液晶显示器，所述液晶显示器包括：
    像素阵列，包括以矩阵布置的多个像素单元，每个像素单元包括沿水平方向布置的至少三个子像素单元；
    多条数据线，沿竖直方向布置，每条数据线连接至一列子像素单元；以及
    多条扫描线，沿水平方向布置，每条扫描线连接至一行子像素单元，
    其中，所述液晶显示器被配置为：
    在帧时段期间，首先将扫描信号施加到位于像素阵列中间的扫描线，随后从中间交替地向两侧依次将扫描信号施加到各条扫描线，并将相应的数据信号施加到数据线。
  7. 如权利要求6所述的液晶显示器，其中，所述液晶显示器采用列反转驱动。
  8. 如权利要求7所述的液晶显示器，其中，在每个帧时段期间，相邻两列子像素单元的驱动电位的极性相反。
  9. 如权利要求7所述的液晶显示器，其中，每列子像素单元的驱动电位的极性按照帧频率进行反转。
  10. 如权利要求6所述的液晶显示器，其中，每个子像素单元包括至少一个薄膜晶体管，所述薄膜晶体管的栅极连接至水平方向的扫描线，其漏极连接至竖直方向的数据线，其源极连接至像素电极。
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