WO2019104531A1 - 一种基于查询方式模拟串口通信的方法和装置 - Google Patents

一种基于查询方式模拟串口通信的方法和装置 Download PDF

Info

Publication number
WO2019104531A1
WO2019104531A1 PCT/CN2017/113591 CN2017113591W WO2019104531A1 WO 2019104531 A1 WO2019104531 A1 WO 2019104531A1 CN 2017113591 W CN2017113591 W CN 2017113591W WO 2019104531 A1 WO2019104531 A1 WO 2019104531A1
Authority
WO
WIPO (PCT)
Prior art keywords
bit
timer
time
data
interrupt time
Prior art date
Application number
PCT/CN2017/113591
Other languages
English (en)
French (fr)
Inventor
龚铭
吴志明
刘光林
Original Assignee
深圳和而泰智能控制股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 深圳和而泰智能控制股份有限公司 filed Critical 深圳和而泰智能控制股份有限公司
Priority to PCT/CN2017/113591 priority Critical patent/WO2019104531A1/zh
Priority to CN201780009007.1A priority patent/CN108701112B/zh
Publication of WO2019104531A1 publication Critical patent/WO2019104531A1/zh

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0002—Serial port, e.g. RS232C

Definitions

  • the present application relates to the field of communications technologies, and in particular, to a method and apparatus for simulating serial port communication based on a query mode.
  • serial port In the field of industrial control, the serial port is very common because it is easy to use and easy to use.
  • the serial interface uses an extended interface of serial communication to transmit data one bit at a time.
  • MCU Microcontroller Unit
  • the existing software analog serial port method generally detects the edge signal on the communication line by using the interruptable IO interface of the microcontroller, which not only increases the limitation of the selection of the microcontroller, but also requires the clock precision of the microcontroller. Higher.
  • the existing analog serial communication method requires an IO interface with external interrupt capability to be used as a communication port.
  • the special requirements for the IO interface increase the selection limitations of the microcontroller of the product.
  • using the interrupt edge to record the level waveform will record the idle time between the two data messages in the data time, and an additional data parsing handler is required.
  • the data parsing processing program needs to extract the data packet from the level waveform and determine whether the data packet of one frame is accepted. Therefore, the data communication processing process is complicated, which affects the serial communication efficiency.
  • the clock of the microcontroller generally has errors, and the clock error of the microcontroller also brings unstable factors to the analog serial communication, and communication abnormalities or data errors occur.
  • the present application provides a method and device for simulating serial port communication based on the query mode, and adopts a general-purpose timer and a general-purpose IO interface to implement the analog serial port communication function, and dynamically adjust the data message start bit.
  • the timing interrupt time, the data reception is completed with a longer second interrupt time, and then the first interrupt time is restored to perform the detection and sampling, thereby avoiding the abnormality of the communication data caused by the clock error of the microcontroller, and improving the data reception accuracy.
  • the embodiment of the present application provides a method for simulating serial communication based on a query mode, and the serial port communication is simulated by a timer and a general IO interface, including the following steps:
  • the timer is controlled to sample the level of the general-purpose IO interface at a first interrupt time (T 1 );
  • the first interrupt time of the timer is adjusted to be the second interrupt time (T 2 ) Sampling, receiving the data message in bits;
  • the timer After receiving the stop bit of the data message, the timer is resumed to query the level of the general-purpose IO interface at the first interrupt time (T 1 ).
  • the third interrupt time (T 3 ) of the timer is set according to the bit rate of the general IO interface, and the simulation is set according to the data bit of the transmitted data message in each third interrupt time period.
  • the level status of the serial port stops the timer when a data message is sent.
  • the second interrupt time (T 2 ) of the timer is: Where A is the communication bit rate;
  • the third interrupt time (T 3 ) of the timer is: Where A is the communication bit rate.
  • the delay time, the analog serial reception data, the first timer interruption time (T 1) the generic sampling timing IO interface level, when the first interruption time (T 1) sampling point just At the falling edge of the start bit, the timer is turned off, the first interrupt time (T 1 ) is delayed by a specified time (T), and then the timer is reset to the second interrupt time (T 2 ) for sampling.
  • the sampling point that is sampled by the timer at the first interrupt time (T 1 ) falls close to the falling edge in the start bit, and the timer is turned off. Determining the first interrupt time (T 1 ) by a specified time (T), and then resetting the timer to the second interrupt time (T 2 ) for sampling,
  • the analog serial port When the analog serial port receives data, it also includes the following steps:
  • the second interrupt time (T 2 ) is, the start bit is received, and the modified state is the received data bit;
  • the second interrupt time (T 2 ) is, the data bit is received, and the number of readings is recorded. If the number of readings is equal to the effective number of bits of the data message, the modified state is the received check digit;
  • the second interrupt time (T 2 ) is, the check bit is received, and the check result is determined according to the received data content and the check bit; when the check result is incorrect, an error flag is set; when the check result is correct, the modified state is the receive stop bit. ;
  • the second interrupt time (T 2 ) is reached, the stop bit is received; when the error stop bit is received, the error flag is set; when the correct stop bit is received, the modified state is the receive start bit.
  • the embodiment of the present application further provides an apparatus for simulating serial communication based on a query mode, including a timer setting unit, a timing query unit, a delay module, and a receiving module.
  • the timer setting unit is configured to sample the level of the general IO interface at a timing of the first interrupt time (T 1 );
  • the delay module is configured to delay the sampling point of the first interruption time (T 1 ) by a specified time (T), and the timer setting unit further The first interruption time is used to sample the second interruption time (T 2 ), and the receiving module is configured to receive the data message in bits;
  • the timer setting unit is further configured to resume querying the level of the general-purpose IO interface at the first interrupt time (T 1 ).
  • the device further includes a sending module, when the analog serial port transmits data, the timer setting unit is configured to set a third interrupt time (T 3 ) according to a bit rate of the universal IO interface, and the sending module is used in each third During the interrupt time period, the level status of the analog serial port is set according to the data bit of the transmitted data message, and the timer is stopped when a data message is sent.
  • T 3 third interrupt time
  • the second interrupt time (T 2 ) of the timer is: Where A is the communication bit rate;
  • the third interrupt time (T 3 ) of the timer is: Where A is the communication bit rate.
  • the received analog serial data the means for setting a first timer interruption time (T 1) the generic sampling timing IO interface level, when the first interruption time (T 1) at the sampling point
  • the falling module is configured to delay the first interrupt time (T 1 ) by a specified time (T), and then reset the timer to the second interrupt time (T 2 ) for sampling.
  • the delay module when the analog serial port receives the data, is configured to: when the sampling point sampled by the timer at the first interruption time (T 1 ) falls in a position close to the falling edge in the start bit, the An interrupt time (T 1 ) is delayed by a specified time (T), and then the timer is reset to the second interrupt time (T 2 ) for sampling,
  • the receiving module is configured to receive the data message in bits, including a start bit receiving unit, a data bit receiving unit, a check bit receiving unit, and a stop bit receiving unit.
  • the start bit receiving unit is configured to receive a start bit, and the modified state is a receive data bit;
  • the data bit receiving unit is configured to receive the data bit, and record the number of readings. If the number of readings is equal to the effective number of bits of the data message, the modified state is the receiving check digit;
  • the check bit receiving unit is configured to receive the check bit, determine the check result according to the received data content and the check bit; set an error flag when the check result is incorrect; and modify the state to receive the stop bit when the check result is correct;
  • the stop bit receiving unit is configured to receive the stop bit; when the error stop bit is received, the error flag is set; when the correct stop bit is received, the modified state is the receive start bit.
  • the utility model has the beneficial effects of providing a method and a device for simulating serial port communication based on a query mode, and realizing analog serial port communication function by using a general-purpose timer and a general-purpose IO interface, There are no restrictions on the selection and the hardware resources of the microcontroller can be saved.
  • the timing interrupt time of the data message start bit the data reception is completed with a longer second interrupt time, and then the first interrupt time is restored to detect and sample, thereby avoiding the communication data caused by the clock error of the microcontroller. Abnormal, improve data reception accuracy.
  • the method and apparatus for simulating serial communication based on the query mode can increase the allowable clock error range of the microcontroller by setting a specified time for delay.
  • FIG. 1 is a flowchart of a method for simulating serial port communication based on a query mode according to an embodiment of the present application
  • FIG. 2 is a block diagram of an apparatus for simulating serial port communication based on a query mode according to an embodiment of the present application
  • FIG. 3 is a schematic diagram of timing interrupt sampling of received data in a method for simulating serial communication based on a query mode according to an embodiment of the present application
  • FIG. 4 is a schematic diagram of timing interrupted delay sampling when receiving data based on a query mode analog serial communication method according to an embodiment of the present application
  • FIG. 5 is a schematic diagram of another timing interrupt delay sampling when receiving data according to the query mode analog serial communication method provided by the embodiment of the present application;
  • FIG. 6 is a flow chart of receiving a single data packet according to a method for simulating serial port communication based on a query mode according to an embodiment of the present application
  • FIG. 7 is a flowchart of sending a single data packet according to a method for simulating serial port communication according to a query mode according to an embodiment of the present application.
  • the method and device for simulating serial communication based on query mode in the present application can realize analog serial communication function by using universal timer and general IO interface, and there is no limitation on the selection of the microcontroller, and the hardware of the microcontroller can be saved. Resources.
  • the timer is controlled to sample the level of the general-purpose IO interface at a first interrupt time (T 1 ); when the start bit of the data message is queried, the first interrupt time (T) 1 ) delay the specified time (T), adjust the first interrupt time of the timer to sample the second interrupt time (T 2 ), receive the data message in bitwise; after receiving the stop bit of the data message, The timer is resumed to query the level of the general-purpose IO interface at the first interrupt time (T 1 ).
  • the data reception is completed with a longer second interrupt time (T 2 ), and then resumes to the first interrupt time (T 1 ) to continue detecting the sample.
  • T 2 the timing interrupt time of the data message start bit
  • the first interruption time (T 1 ) is set to be smaller than the second interruption time (T 2 ) required by the communication protocol.
  • T 1 the sampling point of the first interrupt time (T 1 ) of the device is just at the falling edge of the start bit
  • the first interrupt time (T 1 ) is delayed by a specified time (T) and the interrupt time of the timer is changed to The second interrupt time (T 2 ) required by the communication protocol to avoid the communication error caused by the instability of the microcontroller's clock, such as the internal clock of the microcontroller.
  • the time T 2 1/A seconds required for receiving one bit of data.
  • the allowed clock error of the microcontroller is X%
  • the allowed error time T T 2 ⁇ X%. That is, after detecting the start bit, the delay time T, and then switching the timing interrupt sampling time is the second interrupt time T 2 .
  • the first interruption time T 1 of the timing interrupt sampling start bit is calculated, wherein the reasoning process is as follows:
  • the communication bit rate of 9600 bits/second the start bit is 1 bit
  • the data bit is 8 bits
  • the check bit is 1 bit
  • the stop bit is 1 bit
  • the allowable error range is 10% as an example.
  • the following embodiments are described by taking the first interruption time T 1 , 83 microseconds; the second interruption time T 2 , 104 microseconds; and the specified time (T) 10 microseconds as an example. It can be understood that when other microcontrollers receive data messages of different data formats, the interrupt time correspondingly changes.
  • the embodiment relates to an apparatus for simulating serial communication based on a query mode, including a receiving module 10, a buffer unit 17, a delay module 20, a timer setting unit 40, a timing query unit 30, and a sending module 50.
  • the timer setting unit 40 is configured to periodically sample the level of the general-purpose IO interface with the first interrupt time T 1 .
  • the timer setting unit 40 is further configured to adjust the first interrupt time to be sampled for the second interrupt time T 2 , and the receiving module 10 is configured to press The bit receives the data message.
  • the timer setting unit 40 is further configured to restore the first interrupt timer time T 1 level of the generic query IO interface.
  • FIG. 3 is a schematic diagram of terminal sampling of a normally received waveform.
  • the query unit 30 a timing a timing IO interface level query, the query when the start bit, the first timer setting unit 40 disposed interruption time T 1 is 80 sec, 3 short solid-line arrows shown in FIG.
  • the specified time T is delayed, for example, 10 microseconds, and the timer interrupt time is reset to the second interrupt time T 2 104 microseconds, as indicated by the long solid arrow in the figure.
  • the timing interrupt sampling time is reset to the first interruption time T 1 80 microseconds, and the previous query step is repeated.
  • the second interrupt time T 2 of the timer is: Where A is the communication bit rate;
  • the third interrupt time T 3 of the timer is: Where A is the communication bit rate.
  • the delay module 20 is also used to avoid data errors at specific sampling points.
  • the delay module 20 delays the first interrupt time T 1 by a specified time T, and then restarts.
  • the sampling point of the first interruption time (T 1 ) just falls on the falling edge of the level signal.
  • the timing inquiry unit 30 periodically interrupts sampling the IO interface level.
  • the sampling point of the first interruption time (T 1 ) is just at the falling edge, the first interruption time T 1 is delayed by a specified time T 10 microseconds, and then the timing interrupt sampling is set.
  • T 2 the time is the second interrupt time T 2 104 microseconds, it can be guaranteed that each sampling point is about 10 microseconds away from the falling edge, avoiding the instability of the microcontroller clock and sampling twice in one clock cycle.
  • the setting of the delay module 20 can prevent the sampling point from falling on the falling edge of the start bit, and avoid sampling the signal twice in one pulse due to the clock error of the microcontroller, resulting in data error.
  • the delay module 20 when the sampling point sampled by the timer at the first interruption time T 1 falls in a position close to the falling edge in the start bit, The first interruption time T 1 is delayed by a specified time T, and then the timer is reset to the second interruption time T 2 for sampling.
  • the sample points shown are close to the falling edge of the level signal.
  • the timing query unit 30 interrupts the sampling of the IO interface level by the first interrupt time T 1 , and when the sampling point is 80 microseconds from the right side of the first falling edge, the actual time is less than 80 microseconds.
  • the delay module 20 Delay 10 microseconds, and then reset the timing interrupt sampling time to the second interrupt time T 2 104 microseconds, then each sample point has a margin of 14 microseconds from the rising edge of the waveform, and will not appear in the same pulse. The case of repeated sampling within the signal.
  • the analog serial communication method of the present application can increase the error range of the microcontroller clock by delay time. Reduce the problem that the microcontroller cannot simulate serial communication due to large clock error.
  • the receiving module 10 includes a start bit receiving unit 12, a data bit receiving unit 14, a check bit receiving unit 15, and a stop bit receiving unit 16.
  • the start bit receiving unit 12 determines and receives the start bit, and after the start bit is received, the modified state is the received data bit.
  • the data bit receiving unit 14 determines and receives the data bit, and records the number of readings. If the number of readings is equal to the effective number of bits of the data message, the modified state is the received parity bit.
  • the check bit receiving unit 15 determines and receives the check bit, determines the check result according to the received data content and the check bit; sets an error flag when the check result is incorrect; and the modified state is the receive stop bit when the check result is correct.
  • the stop bit receiving unit 16 determines and receives the stop bit; when the error stop bit is received, the error flag is set; when the correct stop bit is received, the modified state is the receive start bit.
  • the method for simulating serial communication based on the query mode in the embodiment the serial port communication is simulated by the timer and the general IO interface, and the improvement part is mainly in the data receiving process, and mainly includes the following steps:
  • Step 101 When the analog serial port receives data, the timer is controlled to periodically sample the level of the general-purpose IO interface by using the first interrupt time T 1 ;
  • Step 102 When the start bit of the data message is queried through the sampling point, delay the current sampling point with the first interruption time T 1 by a specified time T, and then adjust the first interruption time of the timer to be the second time.
  • the interruption time T 2 continues to be sampled;
  • Step 103 Receive the data message by bit.
  • the data message includes a start bit of 1 bit, a data bit of 8 bits, a check bit of 1 bit, and a stop bit of 1 bit;
  • Step 104 After completing the receiving the stop bit of the data message, the timer is resumed to periodically query the level of the general-purpose IO interface by the first interrupt time T 1 .
  • the second interrupt time (T 2 ) to, the start bit is received, the modified state is the received data bit; the second interrupt time (T 2 ) is received, the data bit is received, and the record is read.
  • the result is incorrect; when the verification result is incorrect, the error flag is set; when the verification result is correct, the modification state is the reception stop bit; the second interruption time (T 2 ) is reached, the stop bit is received; when the error stop bit is received, the error flag is set; When the correct stop bit is received, the modification status is the reception start bit.
  • Step 1 Set the first interruption time T 1 to 80 microseconds. Set the IO interface mode to data reception mode and go to step 2.
  • Step 2 The timing of the first interrupt time T 1 is interrupted, and the IO interface level is read. If it is low, the start bit is read. The timer is turned off, the specified time T is delayed, and the timer interrupt time is reset to the second interrupt time T 2 104 microseconds, and the timer interrupt sampling is started, and the process proceeds to step 3. If it is high, go to step 2.
  • Step 3 The timing of the second interrupt time T 2 is interrupted, the IO interface level is read, and the number of readings is recorded. If the number of readings is equal to the set effective number of data packets, such as N bits, Determined by the data bits specified in the communication protocol, go to step 4 to execute, otherwise go to step 3.
  • the set effective number of data packets such as N bits, Determined by the data bits specified in the communication protocol
  • Step 4 The timing of the second interrupt time T 2 is interrupted, the IO interface level is read, and the checksum is determined according to the received valid data and the check digit. If the checksum is incorrect, set the parity error flag. If the verification is correct, go to step 5 to execute.
  • Step 5 The timer interrupt time sampled by the second interrupt time T 2 is reached, and the read valid data message is saved to the serial port receive buffer buffer unit 17. Read the IO interface level to determine if the end bit is correct. If the end bit is low, set the receive data error flag. If the end bit is high, go to step 1.
  • the method for simulating serial communication based on the query mode further includes a data sending process: when the analog serial port transmits data, the third interrupt time T 3 of the timer is set according to a bit rate of the general IO interface, at each third interrupt time. During the period, the level status of the analog serial port is set according to the data bit of the transmitted data message, and the timer is stopped when a data message is sent.
  • FIG. 7 shows a flow chart of sending a single data message
  • Step 1 Set the timer interrupt time to the third interrupt time T 3 104 microseconds. Set the IO interface mode to send mode, go to step 2.
  • Step 2 The timing of the third interrupt time T 3 is interrupted, the start bit is transmitted, and the process proceeds to step 3.
  • Step 3 The timing of the third interrupt time T 3 is interrupted, the data bit of the data message is sent, and the number of times of transmission is recorded. If the number of times of transmission is equal to the effective number of bits of the data message N, the data specified by the communication protocol If the bit is determined, go to step 4 to execute, otherwise continue with step 3.
  • Step 4 The timing of the third interrupt time T 3 is interrupted, and the check digit is calculated according to the transmitted data content and the check mode, and transmitted. Go to step 5 to execute.
  • Step 5 a third timer interrupt to time T 3 to time the sampling interrupt, stop bit. Set the send completion flag. Go to step 1 to execute.
  • the second interruption time T 2 is: Where A is the communication bit rate;
  • the third interruption time T 3 is: Where A is the communication bit rate.
  • the timer When the analog serial port receives data, the timer periodically samples the level of the general-purpose IO interface with the first interrupt time T 1 , and when the sampling point of the first interrupt time (T 1 ) is just at the falling edge of the start bit, the timer is turned off. The timer delays the first interrupt time T 1 by a specified time T, and then resets the timer to the second interrupt time T 2 for sampling.
  • the error range of the microcontroller clock can be increased. Reduce the problem that the microcontroller cannot simulate serial communication due to large clock error.
  • the method for simulating serial communication based on the query mode can implement the analog serial port communication function by using the general-purpose timer and the general-purpose IO interface, and has no limitation on the selection of the microcontroller, and can save the hardware of the microcontroller. Resources.
  • the timing interrupt time of the data message start bit the data reception is completed with a longer second interrupt time, and then the first interrupt time is restored to detect and sample, thereby avoiding the communication data caused by the clock error of the microcontroller. Abnormal, improve data reception accuracy.
  • the method and apparatus for simulating serial communication based on the query mode can increase the allowable clock error range of the microcontroller by setting a specified time for delay.

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

一种基于查询方式模拟串口通信的方法，由定时器以及通用IO接口来模拟串口通信，包括以下步骤：模拟串口接收数据时，控制该定时器以第一中断时间(T1)定时采样该通用IO接口的电平；当查询到数据报文的起始位时，对该第一中断时间(T1)的采样点延时指定时间(T)后，调整该定时器的第一中断时间为第二中断时间(T2)进行采样，按位接收该数据报文；完成接收该数据报文的停止位后，恢复该定时器以该第一中断时间(T1)定时查询该通用IO接口的电平。

Description

一种基于查询方式模拟串口通信的方法和装置 技术领域
本申请涉及通信技术领域，具体涉及一种基于查询方式模拟串口通信的方法和装置。
背景技术
在工业控制领域，串口因为协议简单使用方便，因此使用非常普遍。串行接口采用串行通信方式的扩展接口，将数据一位一位地顺序传送。
随着工业控制终端的功能集成和扩展，很多工业控制终端会碰到微控制器(Microcontroller Unit,MCU)硬件串口资源不足的情况。而更换微控制器或者使用串口扩展芯片会产生额外的硬件开销，从而增加产品的研发和生产成本，因此，就需要用软件来模拟串口通信。
现有的软件模拟串口的方法，一般通过使用微控制器的可中断IO接口来检测通信线上的边沿信号，不仅增加了微控制器选型的局限性，同时对于微控制器的时钟精度要求较高。
现有的模拟串口通信方法，需要具有外部中断能力的IO接口才可作为通信口使用，对IO接口的要求特殊，会增加产品的微控制器的选型局限性。并且，利用中断边沿来录制电平波形，会将两个数据报文之间的空闲时间记录在数据时间中，还需要额外增加数据解析处理程序。该数据解析处理程序需从该电平波形中提取出数据报文，并判断一帧数据报文是否接受完毕，因此数据通信处理过程复杂，影响串口通信效率。并且微控制器的时钟一般都存在误差，微控制器的时钟误差也会给模拟串口通信带来不稳定因素，出现通信异常或者数据出错。
因此，现有技术的模拟串口技术还有待于改进。
发明内容
本申请针对以上要解决的技术问题，提供一种基于查询方式模拟串口通信的方法和装置，采用通用定时器和通用IO接口即可实现模拟串口通信功能，同时通过动态调整数据报文起始位的定时中断时间，以较长的第二中断时间完成数据接收，再恢复回第一中断时间进行检测采样，避免了微控制器时钟误差造成的通信数据异常，提高数据接收准确率。
第一方面，本申请实施例提供了一种基于查询方式模拟串口通信的方法，由定时器以及通用IO接口来模拟串口通信，包括以下步骤：
模拟串口接收数据时，控制该定时器以第一中断时间(T1)定时采样该通用IO接口的电平；
当查询到数据报文的起始位时，对第一中断时间(T1)的采样点延时指定时间(T)后，调整该定时器的第一中断时间为第二中断时间(T2)进行采样，按位接收该数据报文；
完成接收该数据报文的停止位后，恢复该定时器以该第一中断时间(T1)定时查询该通用IO接口的电平。
该模拟串口发送数据时，根据通用IO接口的比特率设定该定时器的第三中断时间(T3)，在每个第三中断时间的周期内根据发送数据报文的数据位设定模拟串口的电平状态，当一个数据报文发送完成后停止定时器。
其中，该定时器的第一中断时间(T1)为：T1＝T2-2T；
该定时器的第二中断时间(T2)为：
Figure PCTCN2017113591-appb-000001
其中A为通信比特率；
该定时器的第三中断时间(T3)为：
Figure PCTCN2017113591-appb-000002
其中A为通信比特率。
在一种延时实施例中，模拟串口接收数据时，该定时器以第一中断时间(T1)定时采样该通用IO接口的电平，当第一中断时间(T1)的采样点正好在起始位的下降沿时，关闭该定时器，对该第一中断时间(T1)延时指定时间(T)，之后重新设置该定时器至该第二中断时间(T2)进行采样，
其中，该指定时间(T)为：T＝T2*X％，X％是系统允许的时钟误差。
在另一种延时实施例中，模拟串口接收数据时，该定时器以第一中断时间(T1)定时采样的采样点落在起始位中接近下降沿的位置时，关闭该定时器，对该第一中断时间(T1)延时指定时间(T)，之后重新设置该定时器至该第二中断时间(T2)进行采样，
其中，该指定时间(T)为：T＝T2*X％，X％是系统允许的时钟误差。
模拟串口接收数据时，还包括以下步骤：
第二中断时间(T2)到，接收起始位，修改状态为接收数据位；
第二中断时间(T2)到，接收数据位，并记录读取次数，若读取次数等于数据报文的有效位数，修改状态为接收校验位；
第二中断时间(T2)到，接收校验位，根据接收到的数据内容以及校验位确定校验结果；校验结果错误时设置错误标志；校验结果正确时修改状态为接收停止位；
第二中断时间(T2)到，接收停止位；收到错误的停止位时，设置错误标志；收到正确的停止位时，修改状态为接收起始位。
第二方面，本申请实施例还提供了一种基于查询方式模拟串口通信的装置，包括定时器设定单元、定时查询单元、延时模块以及接收模块，
模拟串口接收数据时，该定时器设定单元用于以第一中断时间(T1)定时采样通用IO接口的电平；
当该定时查询单元查询到数据报文的起始位时，该延时模块用于对该第一中断时间(T1)的采样点延时指定时间(T)，该定时器设定单元还用于调整该第一中断时间为第二中断时间(T2)进行采样，该接收模块用于按位接收该数据报文；
该接收模块完成接收该数据报文的停止位后，该定时器设定单元还用于恢复以该第一中断时间(T1)定时查询该通用IO接口的电平。
该装置还包括发送模块，该模拟串口发送数据时，该定时器设定单元用于根据通用IO接口的比特率设定第三中断时间(T3)，该发送模块用于在每个第三中断时间的周期内根据发送数据报文的数据位设定模拟串口的电平状态，当 一个数据报文发送完成后停止定时器。
其中，该定时器的第一中断时间(T1)为：T1＝T2-2T；
该定时器的第二中断时间(T2)为：
Figure PCTCN2017113591-appb-000003
其中A为通信比特率；
该定时器的第三中断时间(T3)为：
Figure PCTCN2017113591-appb-000004
其中A为通信比特率。
具体实施时，模拟串口接收数据时，该定时器设定单元用于以第一中断时间(T1)定时采样该通用IO接口的电平，当第一中断时间(T1)的采样点在起始位的下降沿时，该延时模块用于对该第一中断时间(T1)延时指定时间(T)，然后重新设置该定时器至该第二中断时间(T2)进行采样，
其中，该指定时间(T)为：T＝T2*X％，X％是系统允许的时钟误差。
具体实施时，模拟串口接收数据时，该延时模块用于在该定时器以第一中断时间(T1)定时采样的采样点落在起始位中接近下降沿的位置时，对该第一中断时间(T1)延时指定时间(T)，之后重新设置该定时器至该第二中断时间(T2)进行采样，
其中，该指定时间(T)为：T＝T2*X％，X％是系统允许的时钟误差。
该接收模块用于按位接收该数据报文，包括起始位接收单元、数据位接收单元、校验位接收单元以及停止位接收单元，
该起始位接收单元用于接收起始位，修改状态为接收数据位；
该数据位接收单元用于接收数据位，并记录读取次数，若读取次数等于数据报文的有效位数，修改状态为接收校验位；
该校验位接收单元用于接收校验位，根据接收到的数据内容以及校验位确定校验结果；校验结果错误时设置错误标志；校验结果正确时修改状态为接收停止位；
该停止位接收单元用于接收停止位；收到错误的停止位时，设置错误标志；收到正确的停止位时，修改状态为接收起始位。
本申请的有益效果在于：提供一种基于查询方式模拟串口通信的方法和装置，采用通用定时器和通用IO接口即可实现模拟串口通信功能，对微控制器的 选型没有任何限制，并能够节省微控制器的硬件资源。同时通过动态调整数据报文起始位的定时中断时间，以较长的第二中断时间完成数据接收，再恢复回第一中断时间进行检测采样，避免了微控制器因时钟误差造成的通信数据异常，提高数据接收准确率。并且，该基于查询方式模拟串口通信的方法和装置，通过设置用于延时的指定时间，可增大微控制器允许的时钟误差范围。
附图说明
一个或多个实施例通过与之对应的附图中的图片进行示例性说明，这些示例性说明并不构成对实施例的限定，附图中具有相同参考数字标号的元件表示为类似的元件，除非有特别申明，附图中的图不构成比例限制。
图1是本申请实施例提供的基于查询方式模拟串口通信的方法的流程图；
图2是本申请实施例提供的基于查询方式模拟串口通信的装置的模块图；
图3是本申请实施例提供的基于查询方式模拟串口通信的方法的接收数据的定时中断采样示意图；
图4是本申请实施例提供的基于查询方式模拟串口通信方法的接收数据时定时中断延时采样的示意图；
图5是本申请实施例提供的基于查询方式模拟串口通信方法的接收数据时另一定时中断延时采样的示意图；
图6是本申请实施例提供的基于查询方式模拟串口通信的方法的单个数据报文接收流程图；以及
图7是本申请实施例提供的基于查询方式模拟串口通信的方法的单个数据报文发送流程图。
具体实施方式
为了使本申请的目的、技术方案及优点更加清楚明白，以下结合附图及实施例，对本申请进行进一步详细说明。应当理解，此处所描述的具体实施例仅 用以解释本发明，并不用于限定本发明。
本申请涉及的基于查询方式模拟串口通信的方法和装置，采用通用定时器和通用IO接口即可实现模拟串口通信功能，对微控制器的选型没有任何限制，并能够节省微控制器的硬件资源。
在模拟串口接收数据时，控制该定时器以第一中断时间(T1)定时采样该通用IO接口的电平；当查询到数据报文的起始位时，对该第一中断时间(T1)延时指定时间(T)，调整该定时器的第一中断时间为第二中断时间(T2)进行采样，按位接收该数据报文；完成接收该数据报文的停止位后，恢复该定时器以该第一中断时间(T1)定时查询该通用IO接口的电平。
通过调整数据报文起始位的定时中断时间，以较长的第二中断时间(T2)完成数据接收，再恢复至第一中断时间(T1)继续检测采样。避免了微控制器因时钟误差造成的通信数据异常。
并且，为了提高数据接收准确率，设置用于延时的指定时间，可增大微控制器允许的时钟误差范围。本实施例中，该第一中断时间(T1)设置为小于通信协议要求的第二中断时间(T2)。当设备的第一中断时间(T1)的采样点正好在起始位的下降沿时，将该第一中断时间(T1)延时指定时间(T)再将定时器的中断时间改为通信协议要求的第二中断时间(T2)，以避免微控制器的时钟，比如微控制器的内部时钟，不稳定造成的通信异常。
本实施例中，假设通信比特率为A位/秒，则每接收一位数据需要的时间T2＝1/A秒。每发送一位数据需要的时间T3＝1/A秒。假设微控制器允许的时钟误差为X％，则允许的误差时间T＝T2×X％。即检测到起始位后，延时T，再切换定时中断采样的时间为第二中断时间T2。
比特率A是单片机或计算机在串口通信时的速率。指的是信号被调制以后在单位时间内的变化，即单位时间内载波参数变化的次数。比如，每秒钟传送240个字符，而每个字符格式包含10位，比如包括1个起始位、1个停止位、7个数据位和1个校验位。这时的波特率为240波特，比特率为10位*240个/秒＝2400位/秒。
依据通信比特率A以及允许的时钟误差X％，计算出定时中断采样起始位的 第一中断时间T1，其中，推理过程如下：
T1＝T2-2T；T1＝T2-2T2×X％；T1＝T2(1-2×X％)
比如，以9600位/秒的通信比特率，起始位1位，数据位8位，校验位1位，停止位1位，校验方式为偶校验为例加以说明。即相邻数据位之间的时间间隔T2＝104微秒。同时以允许误差范围为10％为例加以说明。
计算各个中断时间的过程如下：
T2＝1/9600＝104微秒；
T＝T2×X％＝104*10％＝10.4微秒，为便于微控制器处理计算，可四舍五入取整，即T＝10微秒；
T1＝T2(1-2×X％)＝T2*(1-2*10％)＝83微秒。
以下实施例均以第一中断时间T1,83微秒；第二中断时间T2,104微秒；指定时间(T)10微秒为例加以说明。可以理解的是，其它微控制器在接收不同数据格式的数据报文时，则中断时间对应发生改变。
实施例1
请参考图2，本实施例涉及基于查询方式模拟串口通信的装置，包括接收模块10、缓存单元17、延时模块20、定时器设定单元40、定时查询单元30以及发送模块50。
模拟串口接收数据时，该定时器设定单元40用于以第一中断时间T1定时采样通用IO接口的电平。
当该定时查询单元30查询到数据报文的起始位时，该定时器设定单元40还用于调整该第一中断时间为第二中断时间T2进行采样，该接收模块10用于按位接收该数据报文。
该接收模块10完成接收该数据报文的停止位后，该定时器设定单元40还用于恢复该第一中断时间T1定时查询该通用IO接口的电平。
请参考图3，所示为正常接收的波形的终端采样示意图。该定时查询单元 30定时查询IO接口的电平，当查询起始位时，该定时器设定单元40设置第一中断时间T1为80微秒，如图3中短实线箭头所示。当检测到起始位后延时指定时间T，比如10微秒再重新设置定时中断时间为第二中断时间T2104微秒，如图中长实线箭头所示。当一帧数据接收完成后，再重新设置定时中断采样时间为第一中断时间T180微秒，重复之前的查询步骤。
该发送模块50用于在该模拟串口发送数据，该定时器设定单元40用于根据通用IO接口的比特率设定第三中断时间T3，该发送模块50在每个第三中断时间的周期内根据发送数据报文的数据位设定模拟串口的电平状态，当一个数据报文发送完成后停止定时器。
其中，该定时器的第一中断时间T1为：T1＝T2-2T；
该定时器的第二中断时间T2为：
Figure PCTCN2017113591-appb-000005
其中A为通信比特率；
该定时器的第三中断时间T3为：
Figure PCTCN2017113591-appb-000006
其中A为通信比特率。
在特定采样点该延时模块20还用于避免数据出错。
比如，模拟串口接收数据时，当第一中断时间(T1)的采样点在起始位的下降沿时，该延时模块20对该第一中断时间T1延时指定时间T，然后重新设置该定时器至该第二中断时间T2进行采样，其中，该指定时间T为：T＝T2*X％，X％是系统允许的时钟误差。
请参考图4，所示的第一中断时间(T1)的采样点刚好落在在电平信号的下降沿。
定时查询单元30定时中断采样IO接口电平，当第一中断时间(T1)采样点刚好在下降沿时，对第一中断时间T1延时指定时间T 10微秒，再设置定时中断采样时间为第二中断时间T2104微秒，则可以保证每次采样点都在离下降沿10微秒左右的地方，避免微控制器时钟不稳定，在一个时钟周期内采样两次。该延时模块20的设置可以避免采样点刚好落在起始位的下降沿，避免由于微控制器时钟误差，在一个脉冲内采样两次信号，导致数据错误。
在另一延时情形中，模拟串口接收数据时，该延时模块20在该定时器以第一中断时间T1定时采样的采样点落在起始位中接近下降沿的位置时，对该第一中 断时间T1延时指定时间T，之后重新设置该定时器至该第二中断时间T2进行采样。
如图5所示，所示的采样点接近电平信号的下降沿。
该定时查询单元30以第一中断时间T1定时中断采样IO接口电平，当采样点在离第一个下降沿右边80微秒的地方时，实际会小于80微秒，该延时模块20延时10微秒，再重新设置定时中断采样时间为第二中断时间T2104微秒，则每次的采样点离波形上升沿还有14微秒的余量，不会出现在同一个脉冲信号内重复采样的情况。
本申请的模拟串口通信方法，通过延时时间，可以增大微控制器时钟的误差范围。减少微控制器因时钟误差较大而无法模拟串口通信的问题。
请一并参考图2和图6，该接收模块10包括起始位接收单元12、数据位接收单元14、校验位接收单元15以及停止位接收单元16。
该起始位接收单元12判断并接收起始位，完成起始位接收后修改状态为接收数据位。该数据位接收单元14判断并接收数据位，并记录读取次数，若读取次数等于数据报文的有效位数，修改状态为接收校验位。该校验位接收单元15判断并接收校验位，根据接收到的数据内容以及校验位确定校验结果；校验结果错误时设置错误标志；校验结果正确时修改状态为接收停止位。该停止位接收单元16判断并接收停止位；收到错误的停止位时，设置错误标志；收到正确的停止位时，修改状态为接收起始位。
实施例2
请一并参考图1和图3，本实施例的基于查询方式模拟串口通信的方法，由定时器以及通用IO接口来模拟串口通信，其改进部分主要在数据接收过程，主要包括以下步骤：
步骤101：模拟串口接收数据时，控制该定时器以第一中断时间T1定时采样该通用IO接口的电平；
步骤102：当通过采样点查询到数据报文的起始位时，对以第一中断时间T1 的当前采样点延时指定时间T，然后，调整该定时器的第一中断时间为第二中断时间T2继续进行采样；
步骤103：按位接收该数据报文，比如，该数据报文包括起始位1位，数据位8位，校验位1位，停止位1位；
步骤104：完成接收该数据报文的停止位后，恢复该定时器以该第一中断时间T1定时查询该通用IO接口的电平。
模拟串口接收数据时，包括以下步骤：第二中断时间(T2)到，接收起始位，修改状态为接收数据位；第二中断时间(T2)到，接收数据位，并记录读取次数，若读取次数等于数据报文的有效位数，修改状态为接收校验位；第二中断时间(T2)到，接收校验位，根据接收到的数据内容以及校验位确定校验结果；校验结果错误时设置错误标志；校验结果正确时修改状态为接收停止位；第二中断时间(T2)到，接收停止位；收到错误的停止位时，设置错误标志；收到正确的停止位时，修改状态为接收起始位。
请同时参考图6，所示为单个数据报文的接收流程图：
步骤1：设置第一中断时间T1为80微秒。设置IO接口模式为数据接收模式，转至步骤2。
步骤2：以第一中断时间T1采样的定时中断时间到，读取IO接口电平，若为低电平，表示读取到起始位。关闭定时器，延时指定时间T，再重新设置定时器中断时间为第二中断时间T2104微秒，并开启定时器中断采样，转到步骤3执行。若为高电平，执行步骤2。
步骤3：以第二中断时间T2采样的定时中断时间到，读取IO接口电平，并记录读取次数，若读取次数等于数据报文的设定有效位数，比如N位，具体由通信协议中指定的数据位决定，则转到步骤4执行，否则执行步骤3。
步骤4：以第二中断时间T2采样的定时中断时间到，读取IO接口电平，根据接收到的有效数据以及校验位来判断校验和是否正确。若校验错误，设置奇偶校验错误标志。若校验正确，转到步骤5执行。
步骤5：以第二中断时间T2采样的定时中断时间到，将读取到的有效数据报 文保存到串口接收缓冲区缓存单元17。读取IO接口电平，判断结束位是否正确，若结束位为低电平，则设置接收数据错误标志。若结束位为高电平，转到步骤1执行。
该基于查询方式模拟串口通信的方法还包括数据发送过程：该模拟串口发送数据时，根据通用IO接口的比特率设定该定时器的第三中断时间T3，在每个第三中断时间的周期内根据发送数据报文的数据位设定模拟串口的电平状态，当一个数据报文发送完成后停止定时器。
请参考图7，所示为单个数据报文的发送流程图：
步骤1：设置定时中断时间为第三中断时间T3104微秒。设置IO接口模式为发送模式，转到步骤2执行。
步骤2：以第三中断时间T3采样的定时中断时间到，发送起始位，转到步骤3执行。
步骤3：以第三中断时间T3采样的定时中断时间到，发送数据报文的数据位，并记录发送次数，若发送次数等于数据报文的有效位数N，由通信协议中指定的数据位决定，则转到步骤4执行，否则继续执行步骤3。
步骤4：以第三中断时间T3采样的定时中断时间到，根据发送的数据内容和校验方式，计算校验位，并发送。转到步骤5执行。
步骤5：以第三中断时间T3采样的定时中断时间到，发送停止位。设置发送完成标志。转到步骤1执行。
其中，该第一中断时间T1、第二中断时间T2以及第三中断时间T3的计算关系如下：该第一中断时间T1为：T1＝T2-2T；
该第二中断时间T2为：
Figure PCTCN2017113591-appb-000007
其中A为通信比特率；
该第三中断时间T3为：
Figure PCTCN2017113591-appb-000008
其中A为通信比特率。
模拟串口接收数据时，该定时器以第一中断时间T1定时采样该通用IO接口的电平，当第一中断时间(T1)的采样点正好在起始位的下降沿时，关闭该定时器，对该第一中断时间T1延时指定时间T，之后重新设置该定时器至该第二中断时间T2进行采样，
其中，该指定时间T为：T＝T2*X％，X％是系统允许的时钟误差。
模拟串口接收数据时，该定时器以第一中断时间T1定时采样的采样点落在起始位中接近下降沿的位置时，关闭该定时器，对该第一中断时间T1延时指定时间T，之后重新设置该定时器至该第二中断时间T2进行采样。
通过延时指定时间T，可以增大微控制器时钟的误差范围。减少微控制器因时钟误差较大而无法模拟串口通信的问题。
本申请实施例提供的基于查询方式模拟串口通信的方法，采用通用定时器和通用IO接口即可实现模拟串口通信功能，对微控制器的选型没有任何限制，并能够节省微控制器的硬件资源。同时通过动态调整数据报文起始位的定时中断时间，以较长的第二中断时间完成数据接收，再恢复回第一中断时间进行检测采样，避免了微控制器因时钟误差造成的通信数据异常，提高数据接收准确率。并且，该基于查询方式模拟串口通信的方法和装置，通过设置用于延时的指定时间，可增大微控制器允许的时钟误差范围。
通过以上的实施方式的描述，本领域普通技术人员可以清楚地了解到各实施方式可借助软件加通用硬件平台的方式来实现，当然也可以通过硬件。本领域普通技术人员可以理解实现上述实施例方法中的全部或部分流程是可以通过计算机程序来指令相关的硬件来完成，所述的程序可存储于一计算机可读取存储介质中，该程序在执行时，可包括如上述各方法的实施例的流程。
最后应说明的是：以上实施例仅用以说明本申请的技术方案，而非对其限制；在本申请的思路下，以上实施例或者不同实施例中的技术特征之间也可以进行组合，步骤可以以任意顺序实现，并存在如上所述的本申请的不同方面的许多其它变化，为了简明，它们没有在细节中提供；尽管参照前述实施例对本申请进行了详细的说明，本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本申请各实施例技术方案的范围。

Claims (12)

  1. 一种基于查询方式模拟串口通信的方法，由定时器以及通用IO接口来模拟串口通信，其特征在于，包括以下步骤：
    模拟串口接收数据时，控制所述定时器以第一中断时间(T1)定时采样所述通用IO接口的电平；
    当查询到数据报文的起始位时，对所述第一中断时间(T1)的采样点延时指定时间(T)后，调整所述定时器的所述第一中断时间(T1)为第二中断时间(T2)进行采样，按位接收所述数据报文；
    完成接收所述数据报文的停止位后，恢复所述定时器以第一中断时间(T1)定时查询所述通用IO接口的电平。
  2. 根据权利要求1所述的方法，其特征在于，还包括：
    模拟串口发送数据时，根据通用IO接口的比特率设定所述定时器的第三中断时间(T3)，在每个第三中断时间的周期内根据发送数据报文的数据位设定模拟串口的电平状态，当一个数据报文发送完成后停止定时器。
  3. 根据权利要求2所述的方法，其特征在于，
    所述定时器的第一中断时间(T1)为：T1＝T2-2T；
    所述定时器的第二中断时间(T2)为：
    Figure PCTCN2017113591-appb-100001
    其中A为通信比特率；
    所述定时器的第三中断时间(T3)为：
    Figure PCTCN2017113591-appb-100002
    其中A为通信比特率。
  4. 根据权利要求1-3任意一项所述的方法，其特征在于，模拟串口接收数据时，所述定时器以第一中断时间(T1)定时采样所述通用IO接口的电平，当第一中断时间(T1)的采样点在起始位的下降沿时，关闭所述定时器，对所述第一中断时间(T1)延时指定时间(T)，之后重新设置所述定时器至所述第二中断时间(T2)进行采样，
    其中，所述指定时间(T)为：T＝T2*X％，X％是系统允许的时钟误差。
  5. 根据权利要求4所述的方法，其特征在于，模拟串口接收数据时，所述 定时器以第一中断时间(T1)定时采样的采样点落在起始位中接近下降沿的位置时，关闭所述定时器，对所述第一中断时间(T1)延时指定时间(T)，之后重新设置所述定时器至所述第二中断时间(T2)进行采样，
    其中，所述指定时间(T)为：T＝T2*X％，X％是系统允许的时钟误差。
  6. 根据权利要求5所述的方法，其特征在于，模拟串口接收数据时，包括以下步骤：
    第二中断时间(T2)到，接收起始位，修改状态为接收数据位；
    第二中断时间(T2)到，接收数据位，并记录读取次数，若读取次数等于数据报文的有效位数，修改状态为接收校验位；
    第二中断时间(T2)到，接收校验位，根据接收到的数据内容以及校验位确定校验结果；校验结果错误时设置错误标志；校验结果正确时修改状态为接收停止位；
    第二中断时间(T2)到，接收停止位；收到错误的停止位时，设置错误标志；收到正确的停止位时，修改状态为接收起始位。
  7. 一种基于查询方式模拟串口通信的装置，其特征在于，包括定时器设定单元、定时查询单元、延时模块以及接收模块，
    模拟串口接收数据时，所述定时器设定单元用于以第一中断时间(T1)定时采样通用IO接口的电平；
    当所述定时查询单元查询到数据报文的起始位时，所述延时模块用于对所述第一中断时间(T1)的采样点延时指定时间(T)，所述定时器设定单元还用于调整所述第一中断时间为第二中断时间(T2)进行采样，所述接收模块用于按位接收所述数据报文；
    所述接收模块完成接收所述数据报文的停止位后，所述定时器设定单元还用于恢复所述第一中断时间(T1)定时查询所述通用IO接口的电平。
  8. 根据权利要求7所述的装置，其特征在于，还包括发送模块，所述模拟串口发送数据时，所述定时器设定单元用于根据通用IO接口的比特率设定第三中断时间(T3)，所述发送模块用于在每个第三中断时间的周期内根据发送数据 报文的数据位设定模拟串口的电平状态，当一个数据报文发送完成后停止定时器。
  9. 根据权利要求8所述的装置，其特征在于，
    所述定时器的第一中断时间(T1)为：T1＝T2-2T；
    所述定时器的第二中断时间(T2)为：
    Figure PCTCN2017113591-appb-100003
    其中A为通信比特率；
    所述定时器的第三中断时间(T3)为：
    Figure PCTCN2017113591-appb-100004
    其中A为通信比特率。
  10. 根据权利要求7-9任意一项所述的装置，其特征在于，模拟串口接收数据时，所述定时器设定单元用于以第一中断时间(T1)定时采样所述通用IO接口的电平，当第一中断时间(T1)的采样点在起始位的下降沿时，所述延时模块用于对所述第一中断时间(T1)延时指定时间(T)，然后重新设置所述定时器至所述第二中断时间(T2)进行采样，
    其中，所述指定时间(T)为：T＝T1*X％，X％是系统允许的时钟误差。
  11. 根据权利要求7-9任意一项所述的装置，其特征在于，模拟串口接收数据时，所述延时模块用于在所述定时器以第一中断时间(T1)定时采样的采样点落在起始位中接近下降沿的位置时，对所述第一中断时间(T1)延时指定时间(T)，之后重新设置所述定时器至所述第二中断时间(T2)进行采样，
    其中，所述指定时间(T)为：T＝T1*X％，X％是系统允许的时钟误差。
  12. 根据权利要求11所述的装置，其特征在于，所述接收模块用于按位接收所述数据报文，包括起始位接收单元、数据位接收单元、校验位接收单元以及停止位接收单元，
    所述起始位接收单元用于接收起始位，修改状态为接收数据位；
    所述数据位接收单元用于接收数据位，并记录读取次数，若读取次数等于数据报文的有效位数，修改状态为接收校验位；
    所述校验位接收单元用于接收校验位，根据接收到的数据内容以及校验位确定校验结果；校验结果错误时设置错误标志；校验结果正确时修改状态为接收停止位；
    所述停止位接收单元用于接收停止位；收到错误的停止位时，设置错误标志；收到正确的停止位时，修改状态为接收起始位。
PCT/CN2017/113591 2017-11-29 2017-11-29 一种基于查询方式模拟串口通信的方法和装置 WO2019104531A1 (zh)

Priority Applications (2)

Application Number Priority Date Filing Date Title
PCT/CN2017/113591 WO2019104531A1 (zh) 2017-11-29 2017-11-29 一种基于查询方式模拟串口通信的方法和装置
CN201780009007.1A CN108701112B (zh) 2017-11-29 2017-11-29 一种基于查询方式模拟串口通信的方法和装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2017/113591 WO2019104531A1 (zh) 2017-11-29 2017-11-29 一种基于查询方式模拟串口通信的方法和装置

Publications (1)

Publication Number Publication Date
WO2019104531A1 true WO2019104531A1 (zh) 2019-06-06

Family

ID=63844115

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2017/113591 WO2019104531A1 (zh) 2017-11-29 2017-11-29 一种基于查询方式模拟串口通信的方法和装置

Country Status (2)

Country Link
CN (1) CN108701112B (zh)
WO (1) WO2019104531A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11905626B2 (en) 2014-12-24 2024-02-20 The Lycra Company Llc Easily settable stretch fabrics including low-melt fiber

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110879791B (zh) * 2019-09-30 2021-03-19 湖南格兰博智能科技有限责任公司 一种非阻塞的两线串口通讯模拟方法
CN110908940B (zh) * 2019-10-14 2021-03-19 百富计算机技术（深圳）有限公司 串口通讯参数调整的方法及终端设备
CN111610359B (zh) * 2020-05-29 2021-05-14 上海挚达科技发展有限公司 一种充电桩控制引导电路电压采集的滤波方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102521183A (zh) * 2011-12-02 2012-06-27 深圳市科陆电子科技股份有限公司 用于嵌入式系统的模拟串口方法
CN103699509A (zh) * 2014-01-03 2014-04-02 烟台东方威思顿电气有限公司 基于定时器录波的串口通讯方法
CN107357742A (zh) * 2017-07-14 2017-11-17 上海瀚银信息技术有限公司 一种串口模拟方法和计算机设备

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102521183A (zh) * 2011-12-02 2012-06-27 深圳市科陆电子科技股份有限公司 用于嵌入式系统的模拟串口方法
CN103699509A (zh) * 2014-01-03 2014-04-02 烟台东方威思顿电气有限公司 基于定时器录波的串口通讯方法
CN107357742A (zh) * 2017-07-14 2017-11-17 上海瀚银信息技术有限公司 一种串口模拟方法和计算机设备

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
JIA, ZHENGXUE ET AL.: "Realization and Optimization of Serial Port Data Receiving Program Based on MCU", MICROCONTROLLERS & EMBEDDED SYSTEMS, 31 August 2016 (2016-08-31), pages 1 - 4 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11905626B2 (en) 2014-12-24 2024-02-20 The Lycra Company Llc Easily settable stretch fabrics including low-melt fiber

Also Published As

Publication number Publication date
CN108701112A (zh) 2018-10-23
CN108701112B (zh) 2020-04-28

Similar Documents

Publication Publication Date Title
WO2019104531A1 (zh) 一种基于查询方式模拟串口通信的方法和装置
EP2832051B1 (en) Method, device, and system for delaying packets during a network-triggered wake of a computing device
US20190213166A1 (en) Methods and apparatus for reduced-latency data transmission with an inter-processor communication link between independently operable processors
WO2014201990A1 (zh) 唤醒控制方法、装置和终端设备
TW201217964A (en) Method and system of adapting communication links to link conditions on a platform
WO2019105143A1 (zh) 一种基于蓝牙的数据通讯的方法、设备及存储介质
US11243560B2 (en) Methods and apparatus for synchronization of time between independently operable processors
WO2017065923A1 (en) Methods to avoid i2c void message in i3c
CN104461972A (zh) 一种数据信号采样的方法和设备
Liu et al. A flexible hardware architecture for slave device of i2c bus
CN109471588B (zh) 一种同步方法及设备
WO2020063782A1 (zh) 一种通信方法及装置
CN109062850B (zh) 一种单片机的数据发送和接收方法
CN102546033A (zh) 采用脉冲调制结合串口方式实现的多机通信装置
US11175397B2 (en) Wireless fidelity Wi-Fi ranging method and system, and related device
CN103577378A (zh) 一种全双工异步串行通信方法
WO2023273048A1 (zh) 通信时延确定方法和电子设备
CN212969687U (zh) 异步串口通信波特率自动检测装置
WO2017091963A1 (zh) 一种信息处理方法及装置
CN114500204B (zh) Fsk数据发送控制装置、方法、定时器、mcu及设备
US20210109887A1 (en) I3c pending read with retransmission
CN105446863A (zh) 具有记录能力的电子装置与电路状态记录方法
TWI791977B (zh) 伺服系統、資料傳輸系統及其資料傳輸之方法
CN116860672B (zh) 一种数字处理SMBus通讯系统及方法
CN114253879B (zh) 一种基于软件模拟的多通道串口通信方法及系统

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 17933411

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 17933411

Country of ref document: EP

Kind code of ref document: A1

32PN Ep: public notification in the ep bulletin as address of the adressee cannot be established

Free format text: NOTING OF LOSS OF RIGHTS PURSUANT TO RULE 112(1) EPC (EPO FORM 1205A DATED 22.01.2021)

122 Ep: pct application non-entry in european phase

Ref document number: 17933411

Country of ref document: EP

Kind code of ref document: A1