WO2019090895A1 - 有机薄膜晶体管及其制备方法 - Google Patents

有机薄膜晶体管及其制备方法 Download PDF

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WO2019090895A1
WO2019090895A1 PCT/CN2017/116285 CN2017116285W WO2019090895A1 WO 2019090895 A1 WO2019090895 A1 WO 2019090895A1 CN 2017116285 W CN2017116285 W CN 2017116285W WO 2019090895 A1 WO2019090895 A1 WO 2019090895A1
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film transistor
organic
thin film
organic thin
charge injection
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French (fr)
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徐洪远
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
    • H10K10/40—Organic transistors
    • H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
    • H10K10/462—Insulated gate field-effect transistors [IGFETs]
    • H10K10/464—Lateral top-gate IGFETs comprising only a single gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
    • H10K10/40—Organic transistors
    • H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
    • H10K10/462—Insulated gate field-effect transistors [IGFETs]
    • H10K10/468—Insulated gate field-effect transistors [IGFETs] characterised by the gate dielectrics
    • H10K10/471—Insulated gate field-effect transistors [IGFETs] characterised by the gate dielectrics the gate dielectric comprising only organic materials

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  • the present invention relates to the field of transistor technologies, and in particular, to an organic thin film transistor and a method of fabricating the same.
  • OFT Organic Thin Film Transistor
  • Array New array
  • the OTFT organic semiconductor (OSC) layer material mainly has two kinds of polymers and small molecules, and the organic insulating (OGI) layer material is generally poly(4-ethylphenol) (PVP, poly). 4-vinylphenol), polyvinyl alcohol (PVA, poly vinyl alcohol) or perfluoro resin (cytop) and other organic materials.
  • PVP poly(4-ethylphenol)
  • PVA polyvinyl alcohol
  • cytop perfluoro resin
  • the conventional organic thin film transistor mainly includes: a substrate 10; a source/drain electrode layer 11 formed on the substrate 10; and an organic semiconductor layer 12 formed on the source and drain On the electrode layer 11, an organic insulating layer 13 formed on the organic semiconductor layer 12; a gate electrode layer 14 formed on the organic insulating layer 13; and the rest may further include, for example, being formed on the gate electrode layer 14.
  • the organic planarization layer (not shown) and the like are not described herein.
  • FIG. 2 is a schematic diagram showing a Vth left drift of a conventional organic thin film transistor, and is an example of a Vth left drift of a TFT under a negative bias thermal stress (NBTS, Negative Bias Thermal Stress).
  • NBTS Negative Bias Thermal Stress
  • the horizontal axis represents the gate voltage Vg (in volts)
  • the vertical axis represents the drain current Id (in amps).
  • the Vth curve corresponds to a time from 0 seconds to 2000 seconds, and the Vth curve drifts to the left.
  • the object of the present invention is to provide a novel organic thin film transistor structure that solves the problem of poor stability of an organic thin film transistor device.
  • Another object of the present invention is to provide a method for preparing an organic thin film transistor, and to fabricate a novel organic thin film transistor structure to solve the problem of poor stability of the organic thin film transistor device.
  • the present invention provides an organic thin film transistor comprising: a substrate; a source/drain electrode layer formed on the substrate; an organic semiconductor layer formed on the source/drain electrode layer; and an organic insulating layer And formed on the organic semiconductor layer; a charge injection layer formed on the organic insulating layer; and a gate electrode layer formed on the charge injection layer.
  • the source/drain electrode layer material is gold, silver or indium tin oxide.
  • the organic semiconductor layer material is pentacene or poly(3-hexylthiophene).
  • the material of the organic insulating layer is poly(4-ethylphenol) or a perfluoro resin.
  • the charge injection layer material is silica prepared by a sol-gel method.
  • the charge injection layer material is prepared by mixing tetraethyl orthosilicate, ethanol, water and HCL in a mass ratio of 1:10:3.5:0.003.
  • the gate electrode layer material is gold, aluminum or copper.
  • the invention also provides a method for preparing an organic thin film transistor, comprising:
  • Step 1 forming a source/drain electrode layer on the substrate
  • Step 2 forming an organic semiconductor layer on the source/drain electrode layer, and then covering the organic insulating layer;
  • Step 3 forming a charge injection layer on the organic insulating layer
  • Step 4 Form a gate electrode layer on the charge injection layer.
  • the charge injection layer material is silica prepared by a sol-gel method.
  • the charge injection layer material is prepared by mixing tetraethyl orthosilicate, ethanol, water and HCL in a mass ratio of 1:10:3.5:0.003.
  • the present invention also provides an organic thin film transistor comprising: a substrate; a source/drain electrode layer formed on the substrate; an organic semiconductor layer formed on the source/drain electrode layer; and an organic insulating layer formed at the substrate On the organic semiconductor layer; a charge injection layer formed on the organic insulating layer; a gate electrode layer formed on the charge injection layer;
  • the source/drain electrode layer material is gold, silver or indium tin oxide
  • organic semiconductor layer material is pentacene or poly(3-hexylthiophene);
  • the material of the organic insulating layer is poly(4-ethylphenol) or a perfluoro resin
  • the charge injection layer material is silica prepared by a sol-gel method.
  • the organic thin film transistor of the present invention provides a novel organic thin film transistor structure, which improves the stability of the organic film transistor device; the novel organic thin film transistor structure prepared by the organic thin film transistor manufacturing method of the present invention enables the organic film transistor Device stability is improved.
  • 1 is a schematic structural view of a conventional organic thin film transistor
  • FIG. 2 is a schematic diagram showing a Vth left drift of a conventional organic thin film transistor
  • FIG. 3 is a schematic structural view of a preferred embodiment of an organic thin film transistor of the present invention.
  • FIG. 4 is a schematic diagram of Vth drift of a preferred embodiment of an organic thin film transistor of the present invention.
  • FIG. 8 are schematic diagrams showing a preparation process of a preferred embodiment of a method for fabricating an organic thin film transistor according to the present invention.
  • the organic thin film transistor of the present invention mainly comprises: a substrate 20; a source/drain electrode layer 21 formed on the substrate 20; an organic semiconductor layer 22 formed on the source/drain electrode layer 21; and an organic insulating layer 23 Formed on the organic semiconductor layer 22; a charge injection layer (CIL) 24 formed on the organic insulating layer 23; and a gate electrode layer 25 formed on the charge injection layer 24.
  • CIL charge injection layer
  • a charge injection layer 24 is interposed between the gate electrode layer 25 and the organic insulating layer 23, so that the OTFT traps electrons in the charge injection layer 24 at the NBTS to shift Vth to the right, thereby compensating for the organic semiconductor.
  • the Vth left bias caused by the hole trapping at the interface of the layer 22/organic insulating layer 23 eventually reduces the total offset of the device Vth.
  • FIG. 4 is a schematic diagram of Vth drift of a preferred embodiment of the organic thin film transistor of the present invention.
  • the horizontal axis is the gate voltage Vg (in volts)
  • the vertical axis is the drain current Id (unit amps)
  • the Vth curve is shown.
  • the corresponding time is increased from 0 seconds to 2000 seconds.
  • the charge injection layer is depressed and trapped at the interface of the gate electrode layer/charge injection layer.
  • FIG. 8 are schematic diagrams showing a preparation process of a preferred embodiment of a method for fabricating an organic thin film transistor according to the present invention.
  • the preparation method of the organic thin film transistor of the invention mainly comprises:
  • Step 1 forming a source/drain electrode layer 21 on the substrate 20; the source/drain electrode layer 21 corresponds to a source/drain electrode of the organic thin film transistor, and the material may be gold (Au), silver (Ag) or indium tin oxide (ITO). High work function conductive material, as shown in Figure 5;
  • Step 2 forming an organic semiconductor layer 22 on the source/drain electrode layer 21, and then covering the organic insulating layer 23; forming a patterned organic semiconductor layer material such as pentacene on the source/drain electrode layer 21 by vacuum evaporation or the like Pentacene), poly(3-hexylthiophene) (P3HT), etc., and then covered with an organic insulating layer, such as poly(4-ethylphenol) (PVP), perfluoro resin (cytop), etc., as shown in FIG. 6;
  • a patterned organic semiconductor layer material such as pentacene on the source/drain electrode layer 21 by vacuum evaporation or the like Pentacene), poly(3-hexylthiophene) (P3HT), etc.
  • an organic insulating layer such as poly(4-ethylphenol) (PVP), perfluoro resin (cytop), etc., as shown in FIG. 6;
  • Step 3 forming a charge injection layer 24 on the organic insulating layer 23;
  • the material of the charge injection layer 24 may be a silica prepared by a sol-gel method (Sol-gel Silica), and the material may be prepared by using orthosilicate Ethyl ester (TEOS, tetraethylorthosilicate), ethanol, water and HCL are mixed in a mass ratio of 1:10:3.5:0.003, as shown in Figure 7;
  • TEOS orthosilicate Ethyl ester
  • HCL orthosilicate Ethyl ester
  • Step 4 forming a gate electrode layer 25 on the charge injection layer 24; correspondingly forming a gate electrode, the material may be a metal material such as gold (Au), aluminum (Al) or copper (Cu), as shown in FIG.
  • the organic thin film transistor of the present invention provides a novel organic thin film transistor structure, which improves the stability of the organic film transistor device; the novel organic thin film transistor structure prepared by the organic thin film transistor manufacturing method of the present invention enables the organic film transistor Device stability is improved.

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Abstract

一种有机薄膜晶体管及其制备方法。该有机薄膜晶体管包括：基板（20）；源漏电极层（21），其形成在所述基板（20）上；有机半导体层（22），其形成在所述源漏电极层（21）上；有机绝缘层（23），其形成在所述有机半导体层（22）上；电荷注入层（24），其形成在所述有机绝缘层（23）上；栅电极层（25），其形成在所述电荷注入层（24）上。该有机薄膜晶体管结构及制备方法，使有机膜晶体管器件稳定性得以提升。

Description

有机薄膜晶体管及其制备方法 技术领域
本发明涉及晶体管技术领域，尤其涉及一种有机薄膜晶体管及其制备方法。
背景技术
有机薄膜晶体管(OTFT，Organic Thin Film Transistor)是一种使用有机物作为半导体材料的薄膜晶体管，多用于塑料基板，因其具有可卷曲、制程成本低等特点，成为当前最具潜力的下一代柔性显示器的新型阵列(Array)板技术。有机薄膜晶体管制作方法相对传统无机薄膜晶体管更为简单，其对成膜气氛的条件及纯度的要求都很低，因此其制作成本更低；有机薄膜晶体管有优异的柔韧性，适用于柔性显示、电子皮肤、柔性传感器等领域。
OTFT有机半导体(OSC)层材料主要有聚合物(polymer)和小分子(small molecule)两种，与之搭配的有机绝缘(OGI)层材料一般为聚(4-乙基苯酚)(PVP，poly 4-vinylphenol)、聚乙烯醇(PVA，poly vinyl alcohol)或全氟树脂(cytop)等有机材料。OSC层与OGI层之间的界面存在缺陷态，在OTFT受到栅极(Gate)电压长时间应力(Stress)时经常会在界面处俘获(trap)电荷，而导致器件阈值电压(Vth)发生漂移(shift)，使器件性能恶化。
图1所示为传统有机薄膜晶体管结构示意图，传统的有机薄膜晶体管主要包括：基板10；源漏电极层11，其形成在所述基板10上；有机半导体层12，其形成在所述源漏电极层11上；有机绝缘层13，其形成在所述有机半导体层12上；栅电极层14，其形成在所述有机绝缘层13上；其余还可以包括诸如形成于栅电极层14上的有机平坦化层(图未示)等，在此不再赘述。
在薄膜晶体管(TFT)长时间处于开态时，栅电极层14的栅极电极会长时间处于负偏置电压(比如Vgs＝-40V)的状态，此时在有机半导体层12/有机绝缘层13界面处会发生载流子(hole)俘获(trapping)，使器件难以打开，导致Vth向左偏移。
图2为传统有机薄膜晶体管发生Vth左漂移的示意图，是TFT在负偏压热应力(NBTS，Negative Bias Thermal Stress)下发生Vth左漂移的一个示例。图2中横轴为栅极电压Vg(单位伏特)，纵轴为漏极电流Id(单位 安培)，Vth曲线对应时间由0秒增至2000秒，Vth曲线向左漂移。
发明内容
因此，本发明的目的在于提出一种新型有机薄膜晶体管结构，解决有机薄膜晶体管器件稳定性不佳的问题。
本发明的另一目的在于提供一种有机薄膜晶体管制备方法，制备一种新型有机薄膜晶体管结构，解决有机薄膜晶体管器件稳定性不佳的问题。
为实现上述目的，本发明提供了一种有机薄膜晶体管，包括：基板；源漏电极层，其形成在所述基板上；有机半导体层，其形成在所述源漏电极层上；有机绝缘层，其形成在所述有机半导体层上；电荷注入层，其形成在所述有机绝缘层上；栅电极层，其形成在所述电荷注入层上。
其中，所述源漏电极层材料为金、银或氧化铟锡。
其中，所述有机半导体层材料为并五苯或聚(3-己基噻吩)。
其中，所述有机绝缘层材料为聚(4-乙基苯酚)或全氟树脂。
其中，所述电荷注入层材料为溶胶-凝胶法制备的二氧化硅。
其中，所述电荷注入层材料的制作方法为将正硅酸乙酯、乙醇、水和HCL按1:10:3.5:0.003的质量比例混合。
其中，所述栅电极层材料为金、铝或铜。
本发明还提供了一种有机薄膜晶体管制备方法，包括：
步骤1、在基板上形成源漏电极层；
步骤2、在源漏电极层上形成有机半导体层，再覆盖有机绝缘层；
步骤3、在有机绝缘层上形成电荷注入层；
步骤4、在电荷注入层上形成栅电极层。
其中，所述电荷注入层材料为溶胶-凝胶法制备的二氧化硅。
其中，所述电荷注入层材料的制作方法为将正硅酸乙酯、乙醇、水和HCL按1:10:3.5:0.003的质量比例混合。
本发明还提供一种有机薄膜晶体管，包括：基板；源漏电极层，其形成在所述基板上；有机半导体层，其形成在所述源漏电极层上；有机绝缘层，其形成在所述有机半导体层上；电荷注入层，其形成在所述有机绝缘层上；栅电极层，其形成在所述电荷注入层上；
其中，所述源漏电极层材料为金、银或氧化铟锡；
其中，所述有机半导体层材料为并五苯或聚(3-己基噻吩)；
其中，所述有机绝缘层材料为聚(4-乙基苯酚)或全氟树脂；
其中，所述电荷注入层材料为溶胶-凝胶法制备的二氧化硅。
综上，本发明的有机薄膜晶体管提供了一种新型有机薄膜晶体管结构，使有机膜晶体管器件稳定性得以提升；本发明的有机薄膜晶体管制备方法所制备的新型有机薄膜晶体管结构，使有机膜晶体管器件稳定性得以提升。
附图说明
下面结合附图，通过对本发明的具体实施方式详细描述，将使本发明的技术方案及其他有益效果显而易见。
附图中，
图1为传统有机薄膜晶体管结构示意图；
图2为传统有机薄膜晶体管发生Vth左漂移的示意图；
图3为本发明有机薄膜晶体管一较佳实施例的结构示意图；
图4为本发明有机薄膜晶体管一较佳实施例的Vth漂移示意图；
图5至图8为本发明有机薄膜晶体管制备方法一较佳实施例的制备流程示意图。
具体实施方式
参见图3，其为本发明有机薄膜晶体管一较佳实施例的结构示意图。本发明的有机薄膜晶体管主要包括：基板20；源漏电极层21，其形成在所述基板20上；有机半导体层22，其形成在所述源漏电极层21上；有机绝缘层23，其形成在所述有机半导体层22上；电荷注入层(CIL，Charge Injection Layer)24，其形成在所述有机绝缘层23上；栅电极层25，其形成在所述电荷注入层24上。一般有机薄膜晶体管所包括的其余结构在此不再赘述，重点说明与本发明目的相关的部分。
本发明的发明点是在栅电极层25与有机绝缘层23之间加入一层电荷注入层24，使OTFT在NBTS时在电荷注入层24中俘获住电子使Vth向右漂移，从而补偿有机半导体层22/有机绝缘层23界面因空穴俘获而带来的Vth左偏，最终使器件Vth总偏移量减少。
参见图4，其为本发明有机薄膜晶体管一较佳实施例的Vth漂移示意图，图4中横轴为栅极电压Vg(单位伏特)，纵轴为漏极电流Id(单位安培)，Vth曲线对应时间由0秒增至2000秒。本发明通过在栅电极层/有机绝缘层之间插入一层电荷注入层，在栅极电极长时间处于负偏置电压(比如Vgs＝-40V)状态时，栅极电极中的电子在负偏压下注入电荷注入层并在栅电极层/电荷注入层界面处俘获住，当Vgs＝0V时，这些俘获在电荷注入层界面中的电子会在有机半导体层中感应积累出空穴，使器件提前打开，Vth 向右漂移。同时，有机半导体层/有机绝缘层界面发生的空穴俘获会导致Vth向左漂移，最终器件总Vth偏移量减小。
参见图5至图8，其为本发明有机薄膜晶体管制备方法一较佳实施例的制备流程示意图。
本发明有机薄膜晶体管制备方法主要包括：
步骤1、在基板20上形成源漏电极层21；源漏电极层21对应于有机薄膜晶体管的源/漏电极，材料可以为金(Au)、银(Ag)或氧化铟锡(ITO)等高功函数导电材料，如图5所示；
步骤2、在源漏电极层21上形成有机半导体层22，再覆盖有机绝缘层23；在源漏电极层21上可以通过真空蒸发等方式形成图形化的有机半导体层材料，如并五苯(pentacene)、聚(3-己基噻吩)(P3HT)等，再覆盖一层有机绝缘层，如聚(4-乙基苯酚)(PVP)、全氟树脂(cytop)等，如图6所示；
步骤3、在有机绝缘层23上形成电荷注入层24；电荷注入层24材料可以为溶胶-凝胶法制备的二氧化硅(Sol-gel Silica)，该材料的制作方法可以为将正硅酸乙酯(TEOS，tetraethylorthosilicate)、乙醇、水和HCL按1:10:3.5:0.003的质量比例混合，如图7所示；
步骤4、在电荷注入层24上形成栅电极层25；对应形成栅极电极，材料可以为金(Au)、铝(Al)或铜(Cu)等金属材料，如图8所示。
综上，本发明的有机薄膜晶体管提供了一种新型有机薄膜晶体管结构，使有机膜晶体管器件稳定性得以提升；本发明的有机薄膜晶体管制备方法所制备的新型有机薄膜晶体管结构，使有机膜晶体管器件稳定性得以提升。
以上所述，对于本领域的普通技术人员来说，可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形，而所有这些改变和变形都应属于本发明后附的权利要求的保护范围。

Claims (13)

  1. 一种有机薄膜晶体管，包括：基板；源漏电极层，其形成在所述基板上；有机半导体层，其形成在所述源漏电极层上；有机绝缘层，其形成在所述有机半导体层上；电荷注入层，其形成在所述有机绝缘层上；栅电极层，其形成在所述电荷注入层上。
  2. 如权利要求1所述的有机薄膜晶体管，其中，所述源漏电极层材料为金、银或氧化铟锡。
  3. 如权利要求1所述的有机薄膜晶体管，其中，所述有机半导体层材料为并五苯或聚(3-己基噻吩)。
  4. 如权利要求1所述的有机薄膜晶体管，其中，所述有机绝缘层材料为聚(4-乙基苯酚)或全氟树脂。
  5. 如权利要求1所述的有机薄膜晶体管，其中，所述电荷注入层材料为溶胶-凝胶法制备的二氧化硅。
  6. 如权利要求5所述的有机薄膜晶体管，其中，所述电荷注入层材料的制作方法为将正硅酸乙酯、乙醇、水和HCL按1:10:3.5:0.003的质量比例混合。
  7. 如权利要求1所述的有机薄膜晶体管，其中，所述栅电极层材料为金、铝或铜。
  8. 一种有机薄膜晶体管制备方法，包括：
    步骤1、在基板上形成源漏电极层；
    步骤2、在源漏电极层上形成有机半导体层，再覆盖有机绝缘层；
    步骤3、在有机绝缘层上形成电荷注入层；
    步骤4、在电荷注入层上形成栅电极层。
  9. 如权利要求8所述的有机薄膜晶体管制备方法，其中，所述电荷注入层材料为溶胶-凝胶法制备的二氧化硅。
  10. 如权利要求9所述的有机薄膜晶体管制备方法，其中，所述电荷注入层材料的制作方法为将正硅酸乙酯、乙醇、水和HCL按1:10:3.5:0.003的质量比例混合。
  11. 一种有机薄膜晶体管，包括：基板；源漏电极层，其形成在所述基板上；有机半导体层，其形成在所述源漏电极层上；有机绝缘层，其形成在所述有机半导体层上；电荷注入层，其形成在所述有机绝缘层上；栅电极层，其形成在所述电荷注入层上；
    其中，所述源漏电极层材料为金、银或氧化铟锡；
    其中，所述有机半导体层材料为并五苯或聚(3-己基噻吩)；
    其中，所述有机绝缘层材料为聚(4-乙基苯酚)或全氟树脂；
    其中，所述电荷注入层材料为溶胶-凝胶法制备的二氧化硅。
  12. 如权利要求11所述的有机薄膜晶体管，其中，所述电荷注入层材料的制作方法为将正硅酸乙酯、乙醇、水和HCL按1:10:3.5:0.003的质量比例混合。
  13. 如权利要求11所述的有机薄膜晶体管，其中，所述栅电极层材料为金、铝或铜。
PCT/CN2017/116285 2017-11-07 2017-12-14 有机薄膜晶体管及其制备方法 Ceased WO2019090895A1 (zh)

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CN1992370A (zh) * 2005-12-29 2007-07-04 Lg.菲利浦Lcd株式会社 有机薄膜晶体管及其制造方法
CN101308904A (zh) * 2008-07-16 2008-11-19 电子科技大学 一种有机薄膜晶体管及其制备方法
CN101654279A (zh) * 2008-08-20 2010-02-24 财团法人工业技术研究院 两亲性可分散纳米二氧化钛材料
CN207009479U (zh) * 2017-11-07 2018-02-13 深圳市华星光电半导体显示技术有限公司 有机薄膜晶体管

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KR100669752B1 (ko) * 2004-11-10 2007-01-16 삼성에스디아이 주식회사 유기 박막 트랜지스터, 이의 제조 방법 및 이를 구비한평판표시장치

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CN1992370A (zh) * 2005-12-29 2007-07-04 Lg.菲利浦Lcd株式会社 有机薄膜晶体管及其制造方法
CN101308904A (zh) * 2008-07-16 2008-11-19 电子科技大学 一种有机薄膜晶体管及其制备方法
CN101654279A (zh) * 2008-08-20 2010-02-24 财团法人工业技术研究院 两亲性可分散纳米二氧化钛材料
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