WO2019080688A1 - 数据写入方法和存储设备 - Google Patents

数据写入方法和存储设备

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Publication number
WO2019080688A1
WO2019080688A1 PCT/CN2018/107798 CN2018107798W WO2019080688A1 WO 2019080688 A1 WO2019080688 A1 WO 2019080688A1 CN 2018107798 W CN2018107798 W CN 2018107798W WO 2019080688 A1 WO2019080688 A1 WO 2019080688A1
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WIPO (PCT)
Prior art keywords
storage
type
written
data
page
Prior art date
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PCT/CN2018/107798
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English (en)
French (fr)
Inventor
周猛
周建华
Original Assignee
华为技术有限公司
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Publication date
Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to EP18869589.4A priority Critical patent/EP3686728A4/en
Publication of WO2019080688A1 publication Critical patent/WO2019080688A1/zh
Priority to US16/854,109 priority patent/US11237765B2/en
Priority to US17/562,783 priority patent/US11880602B2/en
Priority to US18/529,831 priority patent/US20240103769A1/en

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/061—Improving I/O performance
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0673—Single storage device
    • G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0604—Improving or facilitating administration, e.g. storage management
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0638—Organizing or formatting or addressing of data
    • G06F3/064—Management of blocks
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0638—Organizing or formatting or addressing of data
    • G06F3/0644—Management of space entities, e.g. partitions, extents, pools
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0659—Command handling arrangements, e.g. command buffers, queues, command scheduling
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0673—Single storage device
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5628—Programming or writing circuits; Data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate

Definitions

  • the present application relates to the field of computers, and more particularly to data writing methods and storage devices.
  • NAND Flash is a non-volatile random access storage medium.
  • the storage medium is characterized in that data does not disappear after power off.
  • NAND Flash stores data in multiple blocks in the order of reception to increase concurrency.
  • data is randomly stored in each page (Page) inside the Block.
  • Page can be divided into three types, the least significant bit LSB Page, the central significant bit CSB Page, the most significant bit MSB Page, and the performance of the LSB Page, CSB Page, MSB Page. Decrease in turn.
  • the current storage mode makes the storage device less efficient when storing data of applications having different processing requirements.
  • the present application provides a data writing method and a storage device, which can improve the efficiency of data processing.
  • a data writing method comprising: receiving a write command, the write command carrying a type of data to be written; determining, according to the type of the data to be written, writing the data to be written a type of a storage area in the SSD, the SSD includes a plurality of types of storage areas; determining, according to the type of the storage area, a target storage area in which the data to be written is written; writing the data to be written to the target storage area .
  • the storage device receives the write command of the type of the data to be written, and determines the type of the storage area to be written into the data to be written according to the type of the data to be written, and then determines to write the read area according to the type of the storage area.
  • Write the target storage area of the data so that the storage device can store the data in a suitable storage area, that is, the storage device can meet the different needs of the application, improve data processing efficiency, and system performance.
  • the SSD stores a correspondence between a data type and a storage area type, and determining, according to the type of the data to be written, a type of the storage area in the SSD in which the data to be written is written includes: And determining, according to the type of the data to be written and the correspondence, the type of the target storage area in which the data to be written is written.
  • the storage device can determine the type of the target storage area for writing the data to be written according to the correspondence between the data type and the storage area type, and the type of the data to be written, thereby further improving the data writing storage device. s efficiency.
  • the SSD includes a plurality of storage blocks, and the SSDs are divided into different types of storage areas according to the types of the storage blocks, where the correspondence relationship is a correspondence between the data types and the types of the storage blocks.
  • the storage device can determine the type of the target storage block to be written into the data to be written according to the correspondence between the data type and the type of the storage block, and the type of the data to be written, thereby enabling the data to be written into the storage device. Efficiency, and the reliability of data writing.
  • the SSD includes a plurality of storage blocks, each of the storage blocks includes at least one type of storage page, and the SSD is divided into different types of storage areas according to the type of the storage page, and the corresponding relationship is a data type. Correspondence with the type of the storage page.
  • the storage device can determine the type of the target storage page to be written to the data to be written according to the correspondence between the data type and the type of the storage page, and the type of the data to be written, thereby enabling read latency and write latency. And an improvement in at least one of read and write reliability.
  • different types of storage pages respectively correspond to one storage list, and each storage list records one type of storage page; and according to the type of the storage area, determines a target for writing the data to be written.
  • the storage area includes: searching for an available storage page in the storage list corresponding to the storage page type as the target storage area according to the type of the storage page; if there is a storage page available in the storage list, using the available storage page as the a target storage area; if there is no available storage page in the storage list, a free storage block is obtained in the SSD, and the first storage page of the free storage block is used as the target storage area.
  • the storage device can be compatible with the writing manner of the data written by the Block in the order of the page in the conventional scheme, thereby improving the reliability of writing data to the storage device in a case compatible with the conventional scheme.
  • the SSD includes at least two of an SLC area, an MLC area, a TLC area, and a QLC area, and performance of the SLC area, the MLC area, the TLC area, and the QLC area are sequentially decreased.
  • the method further includes: if the storage block in the storage area corresponding to the type of the storage area in the SSD of the data to be written is written Does not include a free memory page, converting a type of at least one block including a free memory page of a storage area of a type lower than a storage area in the SSD to which the data to be written is written to be written with the The type of the storage area of the storage area in the SSD in which the data is written is the same type.
  • the storage device may block the MLC area, the TLC area, or the QLC area. Switching to a block in the SLC area, that is, the storage device can switch the block in the low-performance storage area to the block in the higher-performance storage area, avoiding waste of idle resources in the high-performance priority storage area, and improving the resources of the storage device. Utilization rate.
  • the storage block includes at least two of an LSB page, a CSB page, and the MSB page, and performance of the LSB page, the CSB page, and the MSB page are sequentially decreased, according to the storage area.
  • determining to write the target storage area of the data to be written includes: if the storage area of the type of the storage area in the SSD in which the data to be written is written is the MSB page or the CSB page, and the writing The storage area of the type of the storage area in the SSD of the data to be written does not have an available storage page, and the performance is higher than at least one of the types of the storage area in the SSD in which the data to be written is written.
  • the storage page is determined as the target storage area.
  • the higher-performance idle available page can be determined as the target storage area, thereby avoiding waste of idle resources of the high-performance available page, and improving the Resource utilization of the storage device.
  • a storage device comprising means for performing the method of the first aspect or any of the possible implementations of the first aspect.
  • a storage device comprising: a processor, a memory, and a communication interface.
  • the processor is coupled to the memory and communication interface.
  • the memory is for storing instructions for the processor to execute, and the communication interface is for communicating with other network elements under the control of the processor.
  • the processor executes the instructions stored by the memory, the execution causes the processor to perform the method of the first aspect or any of the possible implementations of the first aspect.
  • a fourth aspect a computer storage medium storing program code for indicating an instruction to perform the method of any of the first aspect or the first possible implementation of the first aspect is stored in the computer storage medium .
  • a system chip in a fifth aspect, includes an input and output interface, at least one processor, at least one memory, and a bus, the at least one memory is configured to store an instruction, and the at least one processor is configured to invoke the at least one memory
  • the instructions are to perform the operations of the methods of the various aspects described above.
  • the storage device receives the write command of the type of the data to be written, and determines the type of the storage area to be written into the data to be written according to the type of the data to be written, and then determines according to the type of the storage area.
  • the target storage area of the data to be written is written, so that the storage device can store the data in a suitable storage area, that is, the storage device can meet different requirements of the application, improve data processing efficiency, and system performance.
  • 1 is a schematic structural view of a floating gate transistor
  • FIG. 2 is a schematic structural diagram of a LUN
  • FIG. 3 is a schematic diagram showing characteristics of different memory cells in a NAND Flash
  • FIG. 4 is a schematic diagram showing the level distribution of different memory cells in the block
  • FIG. 5 is a schematic diagram of a sharing relationship of Pages in a certain block
  • FIG. 6 is a schematic diagram of data storage of current NAND Flash
  • FIG. 7 is a schematic flowchart of a data writing method according to an embodiment of the present application.
  • FIG. 9 is a schematic diagram of data storage of an embodiment of the present application.
  • FIG. 10 is a schematic diagram of reading data according to another embodiment of the present application.
  • FIG. 11 is a schematic flow chart of a data writing method according to another embodiment of the present application.
  • FIG. 12 is a schematic diagram of a data writing method according to another embodiment of the present application.
  • FIG. 13 is a schematic diagram of a data writing method according to another embodiment of the present application.
  • FIG. 14 is a schematic block diagram of a storage device according to an embodiment of the present application.
  • FIG. 15 is a schematic structural diagram of a storage device according to an embodiment of the present application.
  • SSD Solid State Disk
  • NAND Flash is a non-volatile random access storage medium with data after power failure. Disappeared, large capacity, fast read and write speed, and features for large-capacity data storage.
  • the performance of SSDs has a qualitative leap compared to the performance of traditional magnetic media hard disk drives (HDDs). Specifically, the number of commands that an SSD can process per second reaches hundreds of thousands.
  • the current mainstream NAND Flash is based on a floating gate transistor design.
  • the floating gate latches the charge, and the charge is stored in the floating gate. The charge can still be maintained without power supply.
  • 1 is a schematic diagram of the basic structure of a floating gate transistor.
  • the NAND flash is a dual gate transistor design including a source, a drain, a gate, a floating gate, a silicon substrate, and Insulation.
  • the floating gate is located between the gate and the silicon substrate, and is blocked by the insulating layer, and the insulating layer may be composed of oxygen-nitrogen-oxygen or silicon dioxide (SiO2).
  • the floating gate transistor can form a charge potential well for storing charges, and the floating gate realizes recording of information by latching charges.
  • the floating gate transistor can acquire the threshold voltage of the transistor by using whether the charge or the stored charge is stored on the floating gate, and realize the characterization of the data information by the threshold voltage of the obtained transistor.
  • a floating gate transistor corresponds to a cell of NAND Flash.
  • the process of writing data to the cell is the process of injecting charge into the charge well.
  • NAND Flash adopts FN tunneling (Fowler Nordheim Tunneling) through the silicon base layer. Charge the floating gate. However, before programming the NAND Flash, the original data must be erased. The erase process is to release the charge in the floating gate through the F-N tunneling effect.
  • the threshold voltage read is low. For example, it can be characterized by “1”; when programmed, the cell is injected with a charge and the threshold is read. The voltage is high and can be characterized by a "0" data.
  • Block Block is the smallest unit that NAND flash can perform erase operations. It is usually composed of multiple Pages.
  • Page is the smallest unit capable of performing programming and read operations. The size is usually 4KB/8KB/16KB, as shown in Figure 2.
  • Cell is the minimum operation erase write unit in Page, corresponding to a floating gate transistor, which can store 1 bit or multiple bits.
  • the operation of reading and writing data of NAND Flash mainly involves erasing, programming (or writing) and reading.
  • the basic operation unit of programming and reading is Page
  • the basic operation unit of erasing is block.
  • the storage area in the NAND Flash can be classified into a single level storage unit (SLC), a multi-level storage unit (MLC), and three according to different cell storage bit data.
  • SLC single level storage unit
  • MLC multi-level storage unit
  • TLC Triple Level Cell
  • QLC Quad Level Cell
  • the storage area of different structures may be different in performance and reliability.
  • the storage area of different structures shown in FIG. 3 is in read rate, write rate, erasure rate, number of erasing, data retention capability, cost, Density and operating current.
  • the SLC stores only 1 bit of data, that is, one information bit is represented by dividing the charge in the floating gate into two levels corresponding to 0, 1, as shown in FIG.
  • the number of erasures of the SLC is 50K times or 100K times, and has the characteristics of long life, high performance, and high price.
  • the MLC can store 2 bits of data, and the data density is large.
  • Two information bits can be represented by four levels corresponding to 00, 01, 10, and 11 in the floating gate.
  • the number of erasing and writing of MLC is about 3K, which has the characteristics of low life, slow performance, and low price.
  • TLC can store 3 bits of data, and the data density is larger.
  • Three information bits can be represented by eight levels corresponding to 000, 001, 010, 011, 100, 101, 110, and 111 in the floating gate.
  • the number of writes is several hundred times, with low life, slow performance, and low price.
  • QLC can store 4 bits of data, and can pass 16 times of 0000, 0001, 0010, 0011, 0100, 0101, 0110, 0111, 1000, 1001, 1010, 1011, 1100, 1101, 1110, 1111 in the floating gate.
  • Flat to characterize 4 information bits usually QLC performance is weaker than TLC performance.
  • Page 48 corresponds to the least significant bit LSB Page
  • Page 49 corresponds to the central valid bit CSB Page
  • Page 112 corresponds to the most significant bit MSB Page.
  • the read latency of the LSB Page is 40us and the data retention capability is the strongest.
  • the read latency of the CSB Page is 70us and the data retention capability is second.
  • the read latency of the MSB Page is 112us and the data retention capability is weak.
  • NAND Flash stores data in multiple blocks in order of reception to increase concurrency. As shown in FIG. 6, the NAND Flash sequentially stores data in the order of receiving data, that is, write commands (CMD) 1, CMD2, and CMD3. Among them, data is randomly stored in each page inside the block.
  • CMD write commands
  • CMD2 CMD2
  • CMD3 CMD3
  • data is randomly stored in each page inside the block.
  • the current storage method makes the storage device less efficient when storing data of applications with different processing requirements.
  • FIG. 7 is a schematic flowchart of a data writing method of an embodiment of the present application. The method includes:
  • the storage device receives a write command sent by an upper layer application, where the write command carries a type of data to be written.
  • the storage device of the embodiment of the present application is an SSD including NAND Flash.
  • the storage device communicates with the host where the upper-layer application is located through the Non-Volatile Memory Express (NVMe) protocol, and carries the type of data to be written in the write command defined by the NVMe protocol.
  • the type of the data to be written is identified by a write latency requirement for the write request.
  • a write delay field is defined in a write command of the NVMe, and the write delay field defines different delay requirements, and the delay of the write command is identified by 00b, 01b, 10b, and 11b, respectively.
  • 00b indicates that the write request does not require delay (No latency information provided), that is, the application does not require the length of time for writing the data
  • 01b indicates that the write request can accept Longer latency acceptable, that is, the application can accept
  • the time for writing data is longer
  • 10b is the normal latency, that is, the length of time required for the application to write data is a relatively common length of time
  • 11b is the minimum latency of latency, that is, the application requires writing.
  • the length of the data is relatively short.
  • the write command also carries the logical address of the data to be written and the length of the data to be written. 702.
  • the storage device determines, according to the type of data to be written carried in the write command, a type of a storage area in which the data to be written is written.
  • the storage device may determine the type of the target storage area in which the data to be written is written according to the type of data to be written and the correspondence between the type of data stored in the SSD and the type of the storage area.
  • the storage device may directly determine the target storage area of the data to be written according to the type and corresponding relationship of the data to be written, or indirectly determine the target storage area of the data to be written.
  • the type of the storage area corresponding to the type of the data to be written in the corresponding relationship may be determined as the type of the target storage area. If the type of the data to be written does not exist in the correspondence, the type of the storage area corresponding to the other types of the data to be written may be determined as the target storage area type.
  • the bits for storing data in the blocks included in the storage area corresponding to the types of different storage areas are different.
  • the storage area may be a single-layer storage unit SLC area in which bits for storing data are two bits, or a multi-layer storage unit MLC area in which bits for storing data are 4 bits, or may be
  • the bit space for storing data is an 8-bit three-layer memory cell TLC region, or may be a four-layer memory cell QLC region for storing data with 16 bits.
  • the storage area may also be another storage area for storing data bits greater than 16 bits, which is not limited in this application.
  • the SSD includes a plurality of storage blocks, and the SSD is divided into different types of storage areas according to the type of the storage block, and the correspondence relationship is a correspondence between the data type and the type of the storage block.
  • storage devices include different types of storage areas, and different types of storage areas have different storage capabilities.
  • the mapping relationship between the data type of the data to be written and the type of the storage block may be set in advance.
  • the type of the storage block corresponding to 00b in the write delay field may be set as the SLC storage area, and the storage corresponding to 01b.
  • the type of the block is an MLC storage area
  • the type of the storage block corresponding to 10b is a TLC storage area
  • the type of the corresponding storage block of 11b is a QLC area.
  • the SSD may include at least one of an SLC storage area, an MLC storage area, a TLC storage area, and a QLC storage area. All cells included in a block may belong to the same type. Blocks of the same type form a type of storage area. For example, multiple blocks of the SLC type form an SLC storage area, and multiple blocks of the MLC type form an MLC storage area, and a TLC type. The block forms the TLC storage area.
  • the application in the host stores the data to be written into the storage area in the SSD, and the storage area can be divided into four levels: an SLC area, an MLC area, a TLC area, and a QLC area.
  • the performance of the SLC area, the MLC area, the TCL area, and the QLC area may be classified according to efficiency, reliability, and the like of data processing.
  • the SLC area has the highest efficiency in data processing compared to the other three types of areas, and the area has the highest performance.
  • Block storage area the storage area divided by the block may be referred to as a "Block storage area" in the following embodiments.
  • a free area in the storage area can be selected to write the data to be written in the corresponding type of storage area. For example, at least one free block Block in the block storage area of the type of the storage area in the SSD in which the data is to be written is written as the target storage area.
  • the storage device may convert the Blcok type in other types of storage areas into and write.
  • the storage area of the type of the storage area in the SSD of the data to be written includes a type of Block consistent.
  • an MLC area, a TLC area, or a QLC area can switch a partial block to an SLC type of block, thereby improving storage performance.
  • the storage device may reduce the storage capacity of the partial block in the MLC area, the TLC area, or the QLC area, thereby improving the storage performance of the part of the block.
  • the storage device may reduce the amount of storage of a portion of the Block in the MLC region, thereby converting this portion of Blcok into a Block of the SCL type.
  • the storage device writes the to-be-written data into the target storage area.
  • the storage device may return confirmation information to the application.
  • the application may send the data to be written to the storage device, and after receiving the data to be written, the storage device stores the data to be written in the target storage area.
  • the storage device may further receive a read command for requesting to read data, and the read command carries a type of data requested to be read, and determines a scheduling type of the data requested to be read according to the type of the data. .
  • the storage device puts the read command into a different scheduling queue according to the type of the data carried by the read command, where the storage device preferentially schedules the data of the high priority type, and the data of the high priority type is stored to the high.
  • the storage area of the priority level type makes the read response time shorter, thus further meeting the application requirements.
  • the priority level type of the data carried by the read command 8 and the read command 1 is a high priority type
  • the priority level type of the data carried by the read command 2 and the read command 3 is a medium priority type
  • the priority level type of the data carried by the read command 5 and the read command 0 is a low priority type, and the storage device can preferentially schedule the read command 8 and the read command 1, followed by the read command 2 and the read command 3, and finally the read command. 5 and read command 0.
  • the storage device receives a write command of a type carrying the data to be written, and determines a type of the storage block in which the data to be written is written according to the type of the data to be written, and then Determining, according to the type of the storage block, a target storage block that writes the data to be written, so that the storage device can store the data to a suitable storage block, that is, the storage device can meet different requirements of the application, and improve data processing efficiency, and System performance.
  • FIG. 11 is a schematic flowchart of a data writing method according to another embodiment of the present application.
  • the storage device receives a write command sent by an upper layer application, where the write command carries a type of data to be written.
  • the storage device determines, according to the type of data to be written carried in the write command, a type of a storage area in which the data to be written is written.
  • the storage device may determine the type of the target storage area in which the data to be written is written according to the type of data to be written and the correspondence between the type of data stored in the SSD and the type of the storage area.
  • the read latency, write latency, and/or read/write reliability of the Pages in the blocks included in the storage area corresponding to the types of different storage areas are different.
  • the SSD since the SSD includes different types of memory blocks, such as SLC memory blocks, MLC memory blocks, TLC memory blocks.
  • Each type of memory block may in turn include different types of memory pages, for example, the SLC memory block includes at least one of an SLB Page, a CSB Page, and an MSB Page.
  • the storage area type of the storage device is the type of the storage page.
  • the SSD may include an LSB Page, a CSB Page, and an MSB Page.
  • the storage performance of the LSB Page is the lowest, the storage performance of the CSB Page is higher than that of the LSB Page, and the storage performance of the most significant bit MSB Page is higher than that of the CSB Page.
  • the mapping relationship between the data type of the data to be written and the storage page type may be set in advance. For example, the page type corresponding to 00b and 01b in the write delay field may be set to the LSB Page, and the page type corresponding to 10b is The Page type corresponding to CSB Page, 11b is MSB Page.
  • the page type of the data to be written can be determined according to the type of data to be written in the write command. That is to say, the storage device can write the data to be written into the appropriate Page, thereby improving the data storage performance.
  • the Page may be the least significant bit LSB Page, the central valid bit CSB Page, the most significant bit MSB Page, or may be another Page or the like.
  • the storage device may divide the storage area into at least two performance levels in units of Pages according to performance and reliability performance. Among them, the least significant bit LSB Page has the lowest performance, the central effective bit CSB Page has higher performance than the LSB Page, and the most significant bit MSB Page has higher performance than the CSB Page. In this way, the storage device can select the corresponding Page type according to the correspondence between the type of the data to be written and the Page type, so that the storage device can serve at least two different requirements and improve the system performance.
  • the four storage area SLC areas, the MLC area, the TLC area, and the QLC area in the storage area may be replaced with three types of areas: LSB Page, CSB Page, and MSB Page.
  • each block may include a different type of Page.
  • the storage device determines to write a target storage area of the data to be written according to the type of the storage area.
  • a free area in the storage area can be selected to write the data to be written in the corresponding type of storage area. For example, at least one free page corresponding to the Page type of the type of the storage area written in the SSD of the data to be written is used as the target storage area.
  • different types of memory pages may respectively correspond to one storage list, and one type of storage page is recorded in each storage list.
  • the storage device may look for a free storage page as the target storage area in the storage list corresponding to the storage page type according to the type of the storage page. If there is a storage page usable in the storage list, the usable storage page is used as the target storage area, and the data to be written is written in the usable storage page. If there is no storage page that can be used in the storage list, acquire a free storage block in the SSD, use the first storage page in the free storage block as the target storage area, and write the data to be written into the first In a storage page.
  • the next storage page is added to the corresponding storage list. For example, in the case where there is a storage page usable in the storage list, after the data writing is completed, the next page of the usable storage page is added to the storage list. In the case where there is no storage page that can be used in the storage list, after the completion data is written to the first storage page, the second storage page is added to the storage list.
  • the storage list in the embodiment of the present application may be referred to as a “stack”.
  • the storage list corresponding to the LSB Page type is referred to as “LSB stack”
  • the storage list corresponding to the CSB Page type is referred to as “CSB stack”
  • MSB Page type The corresponding storage list is called the "MSB Stack”.
  • the storage device may divide the Block storage area into three Page types, as shown in FIGS. 12 and 13. Specifically, in FIG. 12, the storage device may hang multiple pages to the corresponding type area, and Block13Page50, Block18Page48, Block33Page1, and Block5Page0 are hung to the LSB stack, and Block98Page49, Block22Page43, Block76Page35, and Block66Page17 are hung to the CSB stack. Block1Page157, Block27Page139, Block39Page121, and Block9Page112 are hooked up to the MSB stack.
  • the storage device may store the data to be written into at least one free page below the corresponding stack according to the type of data to be written.
  • the storage device divides the currently usable pages into different storage lists within the block.
  • the pages in the block are numbered sequentially, and the storage device stores the data in the order of Page. In other words, if you do not use Page48 in a certain block, you cannot use Page49 for data storage.
  • the storage device records the currently usable Page into the storage list. If a page of the storage device has data written in a certain page, the other pages in the block are unavailable pages. After the storage device completes writing to the Page, the storage device can store the next Page to the corresponding storage list.
  • pages belonging to different types may alternately appear.
  • the page in Block 18 shown in FIG. 5 is taken as an example.
  • Block 18Page 48 belonging to the LSB area the next data needs to be Stored to Block 18Page50, and Block 18Page49 belongs to the CSB area. If Block 18Page49 does not store data, it cannot be directly stored in Block 18Page50 belonging to the LSB area. In this way, the storage device can hook the Block 18Page 49 that can be used for data storage into the CSB stack, which can be used to write data.
  • a new block may be searched, and Page0 is logged to the corresponding In the storage list, the data storage begins.
  • the storage device may determine the higher performance Page as the target storage. region. That is to say, the data is processed by the higher performance Page, so that resources can be fully utilized to avoid data waiting for a suitable storage area, resulting in data congestion.
  • the storage device may use at least one of the CSB Pages.
  • the Page is determined as the target storage area, or at least one available Page of the MSB Page is determined as the target storage area. If the storage area of the type of the storage area written in the SSD of the data to be written is the CSB Page, and the CSB Page does not have the idle page, at least one idle page of the LSB Page is determined as the target storage area.
  • the storage device can also determine the page of the lower performance type as the target storage area, and can improve the data processing efficiency even if there is no free storage area in the page of the higher performance type, which is not performed by this application. limited.
  • the storage device may determine, according to the type of data to be written, an idle block that satisfies the data request to be written and an idle page that satisfies the data request to be written. For example, the storage device may use at least one page belonging to the LSB Page area in a certain block in the MLC area as the target storage area.
  • the determining, by the storage device, the target storage area in the storage area according to the type of the data to be written may be selecting an area of the update type from the storage area according to the type of the data to be written, and writing the to-be-written At least one of the areas of the update type of the type of the storage area in the data SSD is taken as the target storage area.
  • the storage area includes at least two types of update types, and the frequency of updating the stored data by any two of the at least two update type areas is different.
  • the storage device divides the storage area into a plurality of storage areas according to the frequency of updating the stored data, and obtains areas of various update types. Since the time at which the storage device stores data is limited, the storage device may choose to store the data to an area of a suitable update type depending on the type of data to be written. For example, the storage device may pre-set a mapping relationship between the type of the data to be written and the area of the update type, and the storage device may determine the area of the update type according to the mapping relationship and the type of the data to be written. This avoids the frequent patrol refresh data caused by selecting an inappropriate update type area, which affects system performance, or the patrol refresh rate is too low, resulting in a decrease in data reliability. Therefore, the embodiments of the present application can realize the reliability of different data without affecting system performance.
  • the four storage area SLC areas, the MLC areas, the TLC areas, and the QLC areas in the storage area may be replaced with areas of various update types.
  • each update type may be in the unit of the page, or may be in any one of the Device, the Target, the LUN, the Plane, and the Block, which is not limited in this application.
  • the capacity of the regions of the various update types may be the same, or the capacity of the regions of the partial update type may be different or different.
  • the storage device may also use, as the target storage area, at least two types of storage areas satisfying the three types of the above-mentioned Block storage area, Page, and update type.
  • the storage device may use at least one of the blocks in the MLC region that belong to both the LSB Page and the certain update type as the target storage area.
  • the storage device writes the data to be written into the target storage area.
  • the storage device receives a write command of a type carrying the data to be written, and determines a type of the storage page to be written into the data to be written according to the type of the data to be written, and then Determining, according to the type of the storage page, a target storage page to be written to the data to be written, so that the storage device can store the data to a suitable storage page, that is, the storage device can meet different requirements of the application, thereby improving data processing efficiency, and System performance.
  • FIG. 14 is a schematic block diagram of a storage device 1400 according to an embodiment of the present application. As shown in FIG. 14, the storage device 1400 includes:
  • the receiving module 1410 is configured to receive a write command, where the write command carries a type of data to be written;
  • the processing module 1420 is configured to determine, according to the type of the data to be written, a type of a storage area in the SSD in which the data to be written is written, where the SSD includes multiple types of storage areas;
  • the processing module 1420 is further configured to determine, according to the type of the storage area, a target storage area in which the data to be written is written;
  • the processing module 1420 is further configured to write the data to be written into the target storage area.
  • the SSD stores a correspondence between the data type and the storage area type
  • the processing module 1420 is specifically configured to: determine, according to the type of the data to be written and the corresponding relationship, the writing of the data to be written.
  • the type of target storage area is specifically configured to: determine, according to the type of the data to be written and the corresponding relationship, the writing of the data to be written. The type of target storage area.
  • the SSD includes multiple storage blocks, and the SSD is divided into different types of storage areas according to the type of the storage block, where the correspondence relationship is a correspondence between the data type and the type of the storage block.
  • the SSD includes a plurality of storage blocks, each storage block includes at least one type of storage page, and the SSD is divided into different types of storage areas according to a type of the storage page, where the correspondence relationship is a data type and the storage page. The correspondence of the types.
  • different types of storage pages respectively correspond to one storage list, and one storage page is recorded in each storage list;
  • the processing module 1420 is specifically configured to:
  • the available storage page is taken as the target storage area
  • a free storage block is obtained in the SSD, and the first storage page of the free storage block is used as the target storage area.
  • the SSD includes at least two of an SLC area, an MLC area, a TLC area, and a QLC area, and performance of the SLC area, the MLC area, the TLC area, and the QLC area are sequentially decreased, if The storage block in the storage area corresponding to the type of the storage area in the SSD in which the data to be written is written does not include the free storage page, and the processing module 1420 lowers the performance to write the data to be written.
  • the type of at least one block including the free storage page of the storage area of the storage area type in the SSD is converted to the same type as the storage area of the type of the storage area in the SSD in which the data to be written is written.
  • the storage block includes at least two of an LSB page, a CSB page, and the MSB page, and performance of the LSB page, the CSB page, and the MSB page are sequentially decreased, and the processing module 1420 Specifically used for:
  • the storage area of the type of the storage area in the SSD in which the data to be written is written is the MSB page or the CSB page, and the type of the storage area in the SSD in which the data to be written is written is written
  • the storage area does not have an available storage page, and the at least one available storage page corresponding to the type of the storage area in the SSD in which the data to be written is written is determined as the target storage area.
  • the storage device receives a write command of a type that carries data to be written, and determines a type of a storage area in which the data to be written is written according to the type of the data to be written, and according to the The type of the storage area determines the target storage area to be written to the data to be written, so that the storage device can store the data in a suitable storage area, that is, the storage device can meet different requirements of the application, improve data processing efficiency, and system performance. .
  • the storage device 1400 may correspond to the storage device in the data writing method of the embodiment shown in FIG. 7, and the above and other management operations and/or other management operations of the respective modules in the storage device 1400.
  • the functions are respectively implemented in order to implement the corresponding steps of the foregoing various methods, and are not described herein for brevity.
  • the receiving module 1410 in the embodiment of the present application may be implemented by a transceiver, and the processing module 1420 may be implemented by a processor.
  • storage device 1500 can include a transceiver 1510, a processor 1520, and a memory 1530.
  • the memory 1530 can be used to store indication information, and can also be used to store code, instructions, and the like executed by the processor 1520.
  • the processor 1520 can be an integrated circuit chip with signal processing capabilities.
  • each step of the foregoing method embodiment may be completed by an integrated logic circuit of hardware in a processor or an instruction in a form of software.
  • the processor may be a general-purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a Field Programmable Gate Array (FPGA), or the like. Programming logic devices, discrete gates or transistor logic devices, discrete hardware components.
  • the methods, steps, and logical block diagrams disclosed in the embodiments of the present invention may be implemented or carried out.
  • the general purpose processor may be a microprocessor or the processor or any conventional processor or the like.
  • the steps of the method disclosed in the embodiments of the present invention may be directly implemented by the hardware decoding processor, or may be performed by a combination of hardware and software modules in the decoding processor.
  • the software module can be located in a conventional storage medium such as random access memory, flash memory, read only memory, programmable read only memory or electrically erasable programmable memory, registers, and the like.
  • the storage medium is located in the memory, and the processor reads the information in the memory and combines the hardware to complete the steps of the above method.
  • the memory 1530 in the embodiments of the present invention may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memory.
  • the non-volatile memory may be a read-only memory (ROM), a programmable read only memory (PROM), an erasable programmable read only memory (Erasable PROM, EPROM), or an electric Erase programmable read only memory (EEPROM) or flash memory.
  • the volatile memory can be a Random Access Memory (RAM) that acts as an external cache.
  • RAM Random Access Memory
  • many forms of RAM are available, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (Synchronous DRAM). SDRAM), Double Data Rate SDRAM (DDR SDRAM), Enhanced Synchronous Dynamic Random Access Memory (ESDRAM), Synchronous Link DRAM (Synchronous Link DRAM) SLDRAM) and Direct Memory Bus Random Access Memory (DR RAM).
  • memories of the embodiments of the present application are intended to include, but are not limited to, these and any other suitable types of memory.
  • the embodiment of the present application further provides a computer storage medium, which can store program instructions for indicating any of the above methods.
  • the storage medium may be specifically a memory 1530.
  • the embodiment of the present application further provides a system chip, where the system chip includes an input and output interface, at least one processor, at least one memory, and a bus, the at least one memory is configured to store an instruction, and the at least one processor is configured to invoke the at least one
  • the instructions of the memory are operative to perform the methods of the various embodiments described above.
  • the chip system of the embodiment of the present application includes a processor for supporting a distributed unit, a centralized unit, and a storage device to implement the functions involved in the foregoing embodiments, for example, generating or processing data involved in the foregoing method and / or information.
  • the chip system further comprises a memory for storing the distributed program, the centralized unit and the necessary program instructions and data of the terminal device.
  • the chip system can be composed of chips, and can also include chips and other discrete devices. It should be understood that the data and/or information processed by the chip may be from an application, and the processed data and/or information may also be sent to the application, which is not limited in this application.
  • the disclosed systems, devices, and methods may be implemented in other manners.
  • the device embodiments described above are merely illustrative.
  • the division of the unit is only a logical function division.
  • there may be another division manner for example, multiple units or components may be combined or Can be integrated into another system, or some features can be ignored or not executed.
  • the mutual coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection through some interface, device or unit, and may be in an electrical, mechanical or other form.
  • the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, may be located in one place, or may be distributed to multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of the embodiment.
  • each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.
  • the functions may be stored in a computer readable storage medium if implemented in the form of a software functional unit and sold or used as a standalone product.
  • the technical solution of the present application which is essential or contributes to the prior art, or a part of the technical solution, may be embodied in the form of a software product, which is stored in a storage medium, including
  • the instructions are used to cause a computer device (which may be a personal computer, server, or network device, etc.) to perform all or part of the steps of the methods described in various embodiments of the present application.
  • the foregoing storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk, and the like, which can store program codes. .

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Abstract

本申请提供了一种数据写入方法和存储设备。该方法应用于固态存储设备SSD，该方法包括：接收写命令，该写命令携带待写入数据的类型；根据该待写入数据的类型，确定写入该待写入数据的SSD中的存储区域的类型，该SSD包括多种类型的存储区域；根据该存储区域的类型，确定写入该待写入数据的目标存储区域；将该待写入数据写入该目标存储区域。本申请实施例能够提高数据处理的效率。

Description

数据写入方法和存储设备 技术领域
本申请涉及计算机领域，更具体地，涉及数据写入方法和存储设备。
背景技术
随着存储技术的不断发展，以快闪记忆体(NAND Flash)为存储介质的固态硬盘(solid state drive，SSD)逐渐成为主流存储形态。NAND Flash是一种非易失性随机访问存储介质，该存储介质的特点是断电后数据不消失。
目前，NAND Flash将数据按照接收顺序存储到多个块(Block)中以提高并发度。其中，在Block内部的各个页(Page)中随机存储数据。但是，由于不同Page存储数据的性能不同，例如，Page可以分为三种类型，最低有效位LSB Page、中央有效位CSB Page、最高有效位MSB Page，且LSB Page、CSB Page、MSB Page的性能依次降低。
因此，目前的存储方式，使得存储设备在存储具有不同处理需求的应用的数据时，处理效率较低。
发明内容
本申请提供一种数据写入方法和存储设备，能够提高数据处理的效率。
第一方面，提供了一种数据写入方法，该方法包括：接收写命令，该写命令携带待写入数据的类型；根据该待写入数据的类型，确定写入该待写入数据的SSD中的存储区域的类型，该SSD包括多种类型的存储区域；根据该存储区域的类型，确定写入该待写入数据的目标存储区域；将该待写入数据写入该目标存储区域。
存储设备接收携带待写入数据的类型的写命令，并根据该待写入数据的类型确定写入该待写入数据的存储区域的类型，再根据该存储区域的类型，确定写入该待写入数据的目标存储区域，这样存储设备能够将数据存储到合适的存储区域，即存储设备能够满足应用的不同需求，提高了数据处理效率，以及系统性能。
在一些可能的实现方式中，该SSD中存储有数据类型与存储区域类型的对应关系，该根据该待写入数据的类型，确定写入该待写入数据的SSD中的存储区域的类型包括：根据该待写入数据的类型及该对应关系，确定该写入该待写入数据的目标存储区域的类型。
存储设备能够根据数据类型与存储区域类型的对应关系，以及该待写入数据的类型确定出确定该写入该待写入数据的目标存储区域的类型，从而更进一步实现提高数据写入存储设备的效率。
在一些可能的实现方式中，该SSD包括多个存储块，该SSD按照存储块的类型分为不同类型的存储区域，该对应关系为数据类型与存储块的类型的对应关系。
存储设备能够根据数据类型与存储块的类型的对应关系，以及该待写入数据的类型确定出该写入该待写入数据的目标存储块的类型，从而能够实现提高数据写入存储设备的效率，以及数据写入的可靠性。
在一些可能的实现方式中，该SSD包括多个存储块，每个存储块包括至少一种类型的存储页，该SSD按照存储页的类型划分为不同类型的存储区域，该对应关系为数据类型与该存储页的类型的对应关系。
存储设备能够根据数据类型与存储页的类型的对应关系，以及该待写入数据的类型确定出该写入该待写入数据的目标存储页的类型，从而能够实现读时延、写时延和读写可靠性中的至少一项的提高。
在一些可能的实现方式中，不同类型的存储页分别对应一个存储列表，每个存储列表中记录有一种类型的存储页；该根据该存储区域的类型，确定写入该待写入数据的目标存储区域包括：根据存储页的类型在该存储页类型对应的存储列表中找可用的存储页作为该目标存储区域；如果该存储列表中有可用的存储页，则将该可用的存储页作为该目标存储区域；如果该存储列表中没有可用的存储页，则在该SSD中获取一个空闲存储块，将该空闲存储块的第一个存储页作为该目标存储区域。
存储设备可以兼容传统方案中Block按照Page的顺序进行写入数据的写入方式，从而在兼容传统方案的情况下，提高数据写入存储设备的可靠性。
在一些可能的实现方式中，该SSD包括SLC区域、MLC区域、TLC区域和QLC区域中的至少两项，且该SLC区域、该MLC区域、该TLC区域和该QLC区域的性能依次降低，在根据该存储区域的类型确定写入该待写入数据的目标存储区域之前，该方法还包括：若该写入该待写入数据的SSD中的存储区域的类型对应的存储区域中的存储块都不包括空闲存储页，将性能低于该写入该待写入数据的SSD中的存储区域的类型的存储区域的至少一个包括空闲存储页的块的类型转换为与该写入所述待写入数据的SSD中的存储区域的类型的存储区域的类型相同。
若存储设备为数据写入所述待写入数据的SSD中的存储区域的类型的存储区域不存在包括可以使用的空闲Page的Block，存储设备可以将MLC区域、TLC区域或QLC区域中的Block切换为SLC区域的Block，即存储设备可以将低性能的存储区域中的Block切换到更高性能的存储区域中的Block，避免高性能优先级存储区域的空闲资源浪费，提高了存储设备的资源利用率。
在一些可能的实现方式中，该存储块包括LSB页、CSB页和该MSB页中的至少两项，且该LSB页、该CSB页和该MSB页的性能依次降低，该根据该存储区域的类型，确定写入该待写入数据的目标存储区域包括：若该写入所述待写入数据的SSD中的存储区域的类型的存储区域为该MSB页或该CSB页，且该写入所述待写入数据的SSD中的存储区域的类型的存储区域不存在可用的存储页，将该性能高于该写入该待写入数据的SSD中的存储区域的类型对应的至少一个可用的存储页确定为该目标存储区域。
存储设备在低性能的Page类型对应的Page中没有空闲的可用Page的情况下，可以将更高性能的空闲的可用Page确定为目标存储区域，避免高性能的可用Page的空闲资源浪费，提高了存储设备的资源利用率。
第二方面，提供了一种存储设备，该存储设备包括用于执行第一方面或第一方面的任意可能的实现方式中的方法的模块。
第三方面，提供了一种存储设备，该存储设备包括：处理器、存储器和通信 接口。处理器与存储器和通信接口连接。存储器用于存储指令，处理器用于执行该指令，通信接口用于在处理器的控制下与其他网元进行通信。该处理器执行该存储器存储的指令时，该执行使得该处理器执行第一方面或第一方面的任意可能的实现方式中的方法。
第四方面，提供了一种计算机存储介质，该计算机存储介质中存储有程序代码，该程序代码用于指示执行上述第一方面或第一方面的任一种可能的实现方式中的方法的指令。
第五方面，提供了一种系统芯片，该系统芯片包括输入输出接口、至少一个处理器、至少一个存储器和总线，该至少一个存储器用于存储指令，该至少一个处理器用于调用该至少一个存储器的指令，以进行上述各个方面的方法的操作。
基于上述方案，存储设备接收携带待写入数据的类型的写命令，并根据该待写入数据的类型确定写入该待写入数据的存储区域的类型，再根据该存储区域的类型，确定写入该待写入数据的目标存储区域，这样存储设备能够将数据存储到合适的存储区域，即存储设备能够满足应用的不同需求，提高了数据处理效率，以及系统性能。
附图说明
图1是浮栅晶体管的结构示意图；
图2是LUN的结构示意图；
图3是NAND Flash中不同存储单元的特性示意图；
图4是Block中不同存储单元的电平分布示意图；
图5是某个Block中Page的共享关系的示意图；
图6是目前NAND Flash的数据存储的示意图；
图7是本申请一个实施例的数据写入方法的示意性流程图；
图8是本申请实施例的比特位取值与时延的映射关系表；
图9是本申请一个实施例的数据存储的示意图；
图10是本申请另一个实施例的读取数据的的示意图；
图11是本申请另一个实施例的数据写入方法的示意流程图；
图12是本申请另一个实施例的数据写入方法的示意图；
图13是本申请另一个实施例的数据写入方法的示意图；
图14是本申请实施例的存储设备的示意性框图；
图15是本申请实施例的存储设备的示意性结构图。
具体实施方式
下面将结合附图，对本申请中的技术方案进行描述。
随着存储技术的不断发展，以NAND Flash为存储介质的固态硬盘(Solid State Disk，SSD)逐渐成为主流存储形态，NAND Flash是一种非易失性随机访问存储介质，具有断电后数据不消失、容量大、读写速度快、以及适用于大容量数据存储的特点。SSD的性能相比传统磁介质的硬盘驱动器(hard disk drive，HDD)的性能有了质的飞跃。具体地，SSD每秒可以处理的命令数达到几十万个。
目前主流的NAND Flash是基于浮栅(Floating Gate)晶体管设计，通过浮栅来锁存电荷，电荷被存储在浮栅中，在无电源供应的情况下电荷仍然可以保持。图1是浮栅晶体管的基本结构的示意图，如图1所示，NAND Flash为双栅极晶体管设计，包括一个源极，一个漏极，一个门极，一个浮置栅极，硅衬底以及绝缘层。其中，浮置栅极位于门极和硅衬底之间，并被绝缘层隔断，绝缘层可以是由氧-氮-氧或者二氧化硅(SiO2)构成。该浮栅晶体管可以形成存储电荷的电荷势阱，浮栅通过锁存电荷来实现信息的记录。
浮栅晶体管可以利用浮栅上是否存储有电荷或存储电荷的多少来获取晶体管的阈值电压，并通过获取到的晶体管的阈值电压来实现数据信息的表征。一个浮栅晶体管对应NAND Flash的一个单元(cell)，向该单元写入数据的过程(编程过程)就是向电荷势阱注入电荷的过程，NAND Flash采取F-N隧道效应(Fowler Nordheim Tunneling)通过硅基层给浮栅充电。但在对NAND Flash编程前，必须要先擦除掉原有的数据，擦除过程就是将浮栅中的电荷通过F-N隧道效应释放掉。
当NAND Flash被擦除后，cell中没有电荷，读取到的阈值电压为低电平，例如，可以通过数据为“1”表征；当编程后，cell中注入了电荷，读取到的阈值电压为高电平，可以通过数据为“0”表征。
块Block是NAND flash能够执行擦除操作的最小单元，通常由多个Page组成，Page为能够执行编程和读操作的最小单元，通常大小为4KB/8KB/16KB等，如图2所示。Cell为Page中的最小操作擦写读单元，对应一个浮栅晶体管，可以存储1bit或多bit。
NAND Flash的读写数据的操作主要涉及擦除、编程(或写)和读。其中，编程和读的基本操作单位是Page，擦除的基本操作单位是block。
本申请实施例中，NAND Flash中的存储区域根据cell存储bit数据的不同，可以分为单层式储存单元(Single Level Cell，SLC)、多层式储存单元(Multi Level Cell，MLC)、三层式储存单元(Triple Level Cell，TLC)和四层式储存单元(Quad Level Cell，QLC)等类型。不同结构的存储区域，在性能和可靠性等方面也会不相同，例如，如图3所示不同结构的存储区域在读速率、写速率、擦除速率、擦写次数、数据保持能力、成本、密度和工作电流。
具体地，SLC只存1bit数据，即通过将浮栅门中的电荷区分为0、1对应的两个电平来表征1个信息bit，如图4所示。通常SLC的擦除次数为50K次或100K次，具有寿命长、性能快、价格高等特性。MLC可以存2bit数据，数据密度较大，可以通过浮栅门中的00、01、10、11对应的四个电平来表征2个信息bit。通常MLC的擦写次数为3K左右，具有寿命较低、性能较慢、价格较低等特性。TLC可以存3bit数据，数据密度更大，可以通过浮栅门中的000、001、010、011、100、101、110、111对应的八个电平来表征3个信息bit，通常TLC的擦写次数为几百次，具有寿命低、性能慢、价格低等特性。QLC可以存4bit数据，可以通过浮栅门中的0000、0001、0010、0011、0100、0101、0110、0111、1000、1001、1010、1011、1100、1101、1110、1111对应的十六个电平来表征4个信息bit，通常QLC的性能相比TLC的性能更弱一些。
在16nm MLC中，一个Block内部大多数是3个Page共享一组存储空间，如图5所示，Page 48、Page 49和Page 112共享一组存储空间。共享一组存储空间的Page又可以分为三种类型。Page 48对应最低有效位LSB Page，Page 49对应中央有效位CSB Page，Page 112对应最高有效位MSB Page。其中，LSB Page的读时延为40us且数据保持能力最强，CSB Page的读时延为70us且数据保持能力次之，MSB Page的读时延为112us且 数据保持能力较弱。
目前，NAND Flash将数据按照接收顺序存储到多个Block中以提高并发度。如图6所示，NAND Flash按照接收数据的顺序即写命令(CMD)1、CMD2和CMD3依次存储数据。其中，在Block内部的各个Page中随机存储数据。但是，由于不同Page存储数据的性能不同，因此目前的存储方式，使得存储设备在存储具有不同处理需求的应用的数据时，处理效率较低。
图7示出了本申请实施例的数据写入方法的示意性流程图。该方法包括：
701，存储设备接收上层应用发送的写命令，该写命令携带待写入数据的类型。
本申请实施例的存储设备是包括NAND Flash的SSD。
该存储设备与上层应用所在主机通过非易失内存控制(Non-Volatile Memory Express，NVMe)协议通讯，在NVMe协议定义的写命令中会携带待写入数据的类型。本实施例中，该待写入数据的类型为通过对写请求的写时延要求标识。具体地，如图8所示，在NVMe的写命令中定义了写时延字段，该写时延字段定义了不同的时延要求，分别用00b，01b，10b和11b标识写命令的时延要求，其中00b表示写请求不要求时延(No latency information provided)，即应用对写入数据的时间长短没有要求，01b表示写请求可以接受较长时延(Longer latency acceptable)，即应用可以接受写入数据的时间较长，10b表示普通时延(Typical latency)，即应用要求写入数据的时间长度为较为普遍的时间长度，11b表示最短时延(Smallest possible latency)，即应用要求写入数据的时间长度比较短。在上层应用下发命令时，即可选择其中一种时延要求，以表示待写入数据的类型。
需要说明的是，该写命令还携带待写入的数据的逻辑地址，以及待写入数据的长度。702，该存储设备根据该写命令中携带的待写入数据的类型，确定写入该待写入数据的存储区域的类型。
在一个实施例中，存储设备可以根据待写入数据的类型，以及SSD中存储的数据类型与存储区域类型的对应关系，确定写入该待写入数据的目标存储区域的类型。
具体地，存储设备根据待写入数据的类型和对应关系，可以直接确定待写入数据的目标存储区域，也可以间接确定待写入数据的目标存储区域。
例如，若对应关系中存在该待写入数据的类型，则可以将对应关系中该待写入数据的类型对应的存储区域的类型，确定为目标存储区域的类型。若对应关系中不存在该待写入数据的类型，则可以将于该待写入数据的类型相近的其他类型对应的存储区域的类型确定为目标存储区域类型。
可选地，不同存储区域的类型对应的存储区域中包括的块中用于存储数据的比特位不同。
例如，存储区域可以是用于存储数据的比特位为两位的单层式储存单元SLC区域、也可以是用于存储数据的比特位为4位的多层式储存单元MLC区域、也可以是用于存储数据的比特位为8位的三层式存储单元TLC区域，或者也可以是用于存储数据的比特位为16位的四层式存储单元QLC区域。
应理解，该存储区域还可以是用于存储数据的比特位大于16位的其他存储区域，本申请对此不进行限定。
在另一个实施例中，该SSD包括多个存储块，该SSD按照存储块的类型分为不同类型的存储区域，该对应关系为数据类型与存储块的类型的对应关系。
具体地，存储设备包括不同类型的存储区域，且不同类型的存储区域具有不同的存 储性能。在存储设备中，可预先设置待写入数据的数据类型与存储块的类型的映射关系，例如，可以设置写时延字段中的00b对应的存储块的类型为SLC存储区域，01b对应的存储块的类型为MLC存储区域，10b对应的存储块的类型为TLC存储区域，11b对应的存储块的类型为QLC区域。这样，在存储设备接收到该写命令时，即可根据写命令中的待写入数据的类型确定写入该待写入数据的存储块的类型。
例如，SSD可以包括SLC存储区域、MLC存储区域、TLC存储区域、QLC存储区域中的至少一项。一个Block包括的所有cell可以属于同一类型，相同类型的Block形成一种类型的存储区域，例如SLC型的多个Block即形成SLC存储区域、MLC型的多个Block即形成MLC存储区域、TLC型的Block即形成TLC存储区域。
如图9所示，主机中的应用将待写入数据存储到SSD中的存储区域，存储区域可以划分为4个等级的区域：SLC区域、MLC区域、TLC区域和QLC区域。
需要说明的是，SLC区域、MLC区域、TCL区域和QLC区域的性能可以是根据数据处理的效率，可靠性等进行划分的。例如，SLC区域相比其他三种类型区域的数据处理的效率最高就可以认为该区域的性能最高。
应理解，下述实施例中可以将按照Block为单位划分的存储区域称为“Block存储区域”。
703，根据该存储区域的类型确定写入该待写入数据的目标存储区域。
在确定了写入该待写入数据的存储区域的类型后，即可在相应类型的存储区域选择一个该存储区域中的空闲区域写入该待写入数据。例如，将写入所述待写入数据的SSD中的存储区域的类型的块存储区域中的至少一个空闲块Block作为目标存储区域。
可选地，若写入所述待写入数据的SSD中的存储区域的类型的存储区域中不存在空闲的Block，则存储设备可以将其他类型的存储区域中的Blcok类型转换为与写入所述待写入数据的SSD中的存储区域的类型类型的存储区域包括的Block一致的类型。
例如，MLC区域、TLC区域或QLC区域可以将部分Block切换为SLC类型的Block，从而提升存储性能。
可选地，存储设备可以降低MLC区域、TLC区域或QLC区域中部分Block的存储量，从而将这部分Block的存储性能提高。例如，存储设备可以将MLC区域中的部分Block的存储量降低，进而将这部分Blcok转换为SCL类型的Block。
704，存储设备将该待写入数据写入该目标存储区域。
可选地，存储设备在确定目标存储区域后，可以向应用返回确认信息。应用可以向存储设备发送待写入数据，存储设备接收到该待写入数据后，将该待写入数据存储到该目标存储区域。
可选地，存储设备还可以接收读命令，该读命令用于请求读取数据，且该读命令携带请求读取的数据的类型，并根据该数据的类型确定请求读取的数据的调度类型。
具体地，存储设备根据读命令携带的数据的类型，将该读命令放入不同的调度队列中，其中存储设备优先调度优先级等级高类型的数据，同时优先级等级高类型的数据存储到高优先级等级类型的存储区域，使得读取响应时间更短，从而更一步满足应用需求。
例如，如图10所示，若读命令8和读命令1携带的数据的优先级等级类型为高优先级类型，读命令2和读命令3携带的数据的优先级等级类型为中等优先级类型，读命令5和读命令0携带的数据的优先级等级类型为低优先级类型，则存储设备可以优先调度读命令8和读命令1，其次是读命令2和读命令3，最后调度读命令5和读命令0。
因此，本申请实施例的数据写入方法，存储设备接收携带待写入数据的类型的写命令，并根据该待写入数据的类型确定写入该待写入数据的存储块的类型，再根据该存储块的类型，确定写入该待写入数据的目标存储块，这样存储设备能够将数据存储到合适的存储块，即存储设备能够满足应用的不同需求，提高了数据处理效率，以及系统性能。
图11示出本申请另一个实施例的数据写入方法的示意性流程图。
1101，存储设备接收上层应用发送的写命令，该写命令携带待写入数据的类型。
应理解，该步骤的实现方式可以与上述实施例中的步骤701相同，为避免重复，在此不进行赘述。
1102，该存储设备根据该写命令中携带的待写入数据的类型，确定写入该待写入数据的存储区域的类型。
在一个实施例中，存储设备可以根据待写入数据的类型，以及SSD中存储的数据类型与存储区域类型的对应关系，确定写入该待写入数据的目标存储区域的类型。
可选地，不同存储区域的类型对应的存储区域中包括的块中的Page的读时延、写时延和/或读写可靠性不同。
在另一个实施例中，由于SSD包括不同类型的存储块，例如SLC存储块、MLC存储块、TLC存储块。每种类型的存储块又可以包括不同类型的存储页，例如，SLC存储块包括SLB Page、CSB Page以及MSB Page中的至少一项。在本实施例中，存储设备的存储区域类型为该存储页的类型。
具体地，SSD可以包括LSB Page、CSB Page，MSB Page。LSB Page的存储性能最低、CSB Page相比LSB Page的存储性能高，而最高有效位MSB Page的存储性能比CSB Page的存储性能更高。在存储设备中，可预先设置待写入数据的数据类型与存储页类型的映射关系，例如，可以设置写时延字段中的00b和01b对应的Page类型为LSB Page，10b对应的Page类型为CSB Page，11b对应的Page类型为MSB Page。这样，在存储设备接收到该写命令时，即可根据写命令中的待写入数据的类型确定写入该待写入数据的Page类型。也就是说，存储设备能够将待写入数据写入合适的Page中，从而提高了数据存储性能。
可选地，Page可以是最低有效位LSB Page、中央有效位CSB Page、最高有效位MSB Page，或者还可以是其他的Page等。
具体地，存储设备按照性能和可靠性表现可以将存储区域以Page为单位划分为至少两个性能等级。其中，最低有效位LSB Page的性能最低、中央有效位CSB Page相比LSB Page的性能高，而最高有效位MSB Page的性能比CSB Page的性能更高。这样存储设备可以根据待写入数据的类型与Page类型的对应关系，选择相应的Page类型，从而使得存储设备能够很好的服务至少两个不同需求的应用，提高了系统性能。
例如，如图9所示，存储区域中的4个存储区域SLC区域、MLC区域、TLC区域和QLC区域可以换为3种类型的区域：LSB Page、CSB Page和MSB Page。
应理解，每个block可以包括不同类型的Page。
1103，该存储设备根据该存储区域的类型确定写入该待写入数据的目标存储区域。
在确定了写入该待写入数据的存储区域的类型后，即可在相应类型的存储区域选择一个该存储区域中的空闲区域写入该待写入数据。例如，将写入所述待写入数据的SSD中的存储区域的类型的Page类型对应的至少一个空闲Page作为目标存储区域。
可选地，不同类型的存储页可以分别对应一个存储列表，每个存储列表中记录有一 种类型的存储页。存储设备可以根据存储页的类型在存储页类型对应的存储列表中寻找空闲的存储页作为该目标存储区域。如果该存储列表中存在可以使用的存储页，则将该可以使用的存储页作为目标存储区域，并将待写入数据写入该可以使用的存储页中。如果该存储列表中不存在可以使用的存储页，则在该SSD中获取一个空闲存储块，将该空闲存储块中的第一存储页作为目标存储区域，并将待写入数据写入该第一个存储页中。
在存储设备在当前的存储页完成待写入数据的写入之后，将下一个存储页添加到相应的存储列表中。例如，在该存储列表中存在可以使用的存储页的情况下，完成数据写入之后，将该可以使用的存储页的下一页添加到存储列表中。在该存储列表中不存在可以使用的存储页的情况下，完成数据写入到第一个存储页之后，将第二个存储页添加到存储列表中。
应理解，本申请实施例中存储列表可以称为“堆栈”，例如，LSB Page类型对应的存储列表称为“LSB堆栈”，CSB Page类型对应的存储列表称为“CSB堆栈”，MSB Page类型对应的存储列表称为“MSB堆栈”。
例如，存储设备可以将Block存储区域划分为3种Page类型，如图12和图13所示。具体地，图12中，存储设备可以将多个Page分别挂到相应地类型区域，Block13Page50、Block18Page48、Block33Page1，以及Block5Page0挂到LSB堆栈下，Block98Page49、Block22Page43、Block76Page35，以及Block66Page17挂到CSB堆栈下，Block1Page157、Block27Page139、Block39Page121，以及Block9Page112挂到MSB堆栈下。存储设备可以根据待写入数据的类型将待写入数据存储到对应的堆栈下面的至少一个空闲Page中。
可选地，存储设备在Block内将当前可以使用的Page划分到不同的存储列表中。
具体地，Block内的Page按顺序进行编号，且存储设备按照Page顺序存储数据。也就是说，若对于某一个Block中的Page48没有使用，则不能直接使用Page49进行数据存储。
存储设备对当前可以使用的Page记录到存储列表中。若存储设备的Block内存在某一个Page正在进行数据写入，则该Block内的其他Page为不可用Page。在存储设备完成在该Page的写入后，存储设备可以将下一个Page存储到相应的存储列表。
例如，属于不同类型(LSB、CSB和MSB)的Page可以是交替出现的，以图5所示的Block18内的Page为例进行说明，数据存储到属于LSB区域的Block 18Page48后，下一个数据需要存储到Block 18Page50，而Block 18Page49属于CSB区域，若Block 18Page49没有进行数据存储，则不能直接存储到属于LSB区域的Block 18Page50。这样，存储设备可以将能够用于数据存储的Block 18Page49挂到CSB堆栈中，进而能够用于写入数据。
需要说明的是，在本实施例中，对于不能用于存储数据的Page不会存储到存储列表中。
应理解，不同Block内可以使用的相同类型的Page存储在同一个存储列表中。
可选地，若写入所述待写入数据的SSD中的存储区域的类型的Page类型对应的存储列表中不存在可以使用的Page，则可以寻找一个全新的Block，并将Page0挂到相应的存储列表中，进而开始进行数据存储。
可选地，若写入所述待写入数据的SSD中的存储区域的类型的Page类型对应的存储列表中不存在可以使用的Page，则存储设备可以将更高性能的Page确定为目标存储区 域。也就是说，通过更高性能的Page处理数据，这样可以充分利用资源，避免数据等待合适的存储区域，造成数据拥塞。
例如，若写入所述待写入数据的SSD中的存储区域的类型的Page类型为MSB Page，该MSB Page对应的存储列表中不存在空闲Page，则存储设备可以将CSB Page的至少一个可用的Page确定为目标存储区域，或者将MSB Page的至少一个可用的Page确定为目标存储区域。若写入所述待写入数据的SSD中的存储区域的类型的存储区域为CSB Page，该CSB Page不存在空闲Page，则将LSB Page的至少一个空闲Page确定为目标存储区域。
应理解，存储设备也可以将更低性能类型的Page确定为目标存储区域，在更高性能类型的Page都不存在空闲存储区域的情况下，也能够提高数据处理效率，本申请对此不进行限定。
可选地，存储设备根据待写入数据的类型可以确定出既满足该待写入数据需求的空闲Block，又满足该待写入数据需求的空闲Page。例如，存储设备可以将MLC区域中的某个Block中的属于LSB Page区域的至少一个Page作为目标存储区域。
可选地，存储设备根据待写入数据的类型确定存储区域中的目标存储区域可以是根据待写入数据的类型从存储区域中选择一种更新类型的区域，并将写入所述待写入数据的SSD中的存储区域的类型的更新类型的区域中的至少一个Page作为该目标存储区域。其中，该存储区域包括至少两种更新类型的区域，且该至少两种更新类型区域中任意两种更新类型区域更新存储数据的频率不相同。
具体地，存储设备将存储区域按照更新存储数据的频率划分为多个存储区域，得到多种更新类型的区域。由于存储设备存储数据的时间有限，存储设备根据待写入数据的类型可以选择将数据存储到合适的更新类型的区域。例如，存储设备可以预先设置待写入数据的类型与更新类型的区域的映射关系，存储设备根据该映射关系和待写入数据的类型，可以确定更新类型的区域。这样避免了选择不合适的更新类型区域导致的频繁的巡检刷新数据对系统性能造成影响，或者巡检刷新速率太低造成数据的可靠性下降。因此，本申请实施例能够在不影响系统性能的情况下，实现不同数据的可靠性。
例如，如图9所示，存储区域中的4个存储区域SLC区域、MLC区域、TLC区域和QLC区域可以换为多种更新类型的区域。
应理解，每种更新类型的区域可以以Page为单位，也可以是以Device、Target、LUN、Plane、和Block中的任一项为单位，本申请对此不进行限定。
还应理解，多种更新类型的区域的容量可以相同，也可以部分更新类型的区域的容量不同，也可以都不相同。
可选地，存储设备还可以将满足上述Block存储区域、Page、和更新类型的区域这三种类型至少两种类型的存储区域作为目标存储区域。例如，存储设备可以将MLC区域中的某个Block中的既属于LSB Page又属于某一种更新类型的区域中的至少一个Page作为目标存储区域。
1104，存储设备将该待写入数据写入该目标存储区域。
因此，本申请实施例的数据写入方法，存储设备接收携带待写入数据的类型的写命令，并根据该待写入数据的类型确定写入该待写入数据的存储页的类型，再根据该存储页的类型，确定写入该待写入数据的目标存储页，这样存储设备能够将数据存储到合适的存储页，即存储设备能够满足应用的不同需求，提高了数据处理效率，以及系统性能。
图14为本申请实施例的存储设备1400的示意性框图。如图14所示，该存储设备1400包括：
接收模块1410，用于接收写命令，该写命令携带待写入数据的类型；
处理模块1420，用于根据该待写入数据的类型，确定写入该待写入数据的SSD中的存储区域的类型，该SSD包括多种类型的存储区域；
该处理模块1420，还用于根据该存储区域的类型，确定写入该待写入数据的目标存储区域；
该处理模块1420，还用于将该待写入数据写入该目标存储区域。
可选地，该SSD中存储有数据类型与存储区域类型的对应关系，该处理模块1420具体用于：根据该待写入数据的类型及该对应关系，确定该写入该待写入数据的目标存储区域的类型。
可选地，该SSD包括多个存储块，该SSD按照存储块的类型分为不同类型的存储区域，该对应关系为数据类型与存储块的类型的对应关系。
可选地，该SSD包括多个存储块，每个存储块包括至少一种类型的存储页，该SSD按照存储页的类型划分为不同类型的存储区域，该对应关系为数据类型与该存储页的类型的对应关系。
可选地，不同类型的存储页分别对应一个存储列表，每个存储列表中记录有一种类型的存储页；
该处理模块1420具体用于：
根据存储页的类型在该存储页类型对应的存储列表中找可用的存储页作为该目标存储区域；
如果该存储列表中有可用的存储页，则将该可用的存储页作为该目标存储区域；
如果该存储列表中没有可用的存储页，则在该SSD中获取一个空闲存储块，将该空闲存储块的第一个存储页作为该目标存储区域。
可选地，该SSD包括SLC区域、MLC区域、TLC区域和QLC区域中的至少两项，且该SLC区域、该MLC区域、所述TLC区域和所述QLC区域的性能依次降低，若所述写入所述待写入数据的SSD中的存储区域的类型对应的存储区域中的存储块都不包括空闲存储页，所述处理模块1420将性能低于所述写入所述待写入数据的SSD中的存储区域的类型的存储区域的至少一个包括空闲存储页的块的类型转换为与所述写入所述待写入数据的SSD中的存储区域的类型的存储区域的类型相同。
可选地，所述存储块包括LSB页、CSB页和所述MSB页中的至少两项，且所述LSB页、所述CSB页和所述MSB页的性能依次降低，所述处理模块1420具体用于：
若所述写入所述待写入数据的SSD中的存储区域的类型的存储区域为该MSB页或该CSB页，且该写入所述待写入数据的SSD中的存储区域的类型的存储区域不存在可用的存储页，将该性能高于该写入该待写入数据的SSD中的存储区域的类型对应的至少一个可用的存储页确定为该目标存储区域。
因此，本申请实施例的存储设备，存储设备接收携带待写入数据的类型的写命令，并根据该待写入数据的类型确定写入该待写入数据的存储区域的类型，再根据该存储区域的类型，确定写入该待写入数据的目标存储区域，这样存储设备能够将数据存储到合适的存储区域，即存储设备能够满足应用的不同需求，提高了数据处理效率，以及系统性能。
应理解，根据本申请实施例的存储设备1400可对应于图7所示的实施例的数据写入方法的中的存储设备，并且存储设备1400中的各个模块的上述和其它管理操作和/或功能分别为了实现前述各个方法的相应步骤，为了简洁，在此不再赘述。
本申请实施例中的接收模块1410可以由收发器实现，处理模块1420可以由处理器实现。如图15所示，存储设备1500可以包括收发器1510，处理器1520和存储器1530。其中，存储器1530可以用于存储指示信息，还可以用于存储处理器1520执行的代码、指令等。
应理解，处理器1520可以是集成电路芯片，具有信号的处理能力。在实现过程中，上述方法实施例的各步骤可以通过处理器中的硬件的集成逻辑电路或者软件形式的指令完成。上述的处理器可以是通用处理器、数字信号处理器(Digital Signal Processor，DSP)、专用集成电路(Application Specific Integrated Circuit，ASIC)、现成可编程门阵列(Field Programmable Gate Array，FPGA)或者其他可编程逻辑器件、分立门或者晶体管逻辑器件、分立硬件组件。可以实现或者执行本发明实施例中的公开的各方法、步骤及逻辑框图。通用处理器可以是微处理器或者该处理器也可以是任何常规的处理器等。结合本发明实施例所公开的方法的步骤可以直接体现为硬件译码处理器执行完成，或者用译码处理器中的硬件及软件模块组合执行完成。软件模块可以位于随机存储器，闪存、只读存储器，可编程只读存储器或者电可擦写可编程存储器、寄存器等本领域成熟的存储介质中。该存储介质位于存储器，处理器读取存储器中的信息，结合其硬件完成上述方法的步骤。
可以理解，本发明实施例中的存储器1530可以是易失性存储器或非易失性存储器，或可包括易失性和非易失性存储器两者。其中，非易失性存储器可以是只读存储器(Read-Only Memory，ROM)、可编程只读存储器(Programmable ROM，PROM)、可擦除可编程只读存储器(Erasable PROM，EPROM)、电可擦除可编程只读存储器(Electrically EPROM，EEPROM)或闪存。易失性存储器可以是随机存取存储器(Random Access Memory，RAM)，其用作外部高速缓存。通过示例性但不是限制性说明，许多形式的RAM可用，例如静态随机存取存储器(Static RAM，SRAM)、动态随机存取存储器(Dynamic RAM，DRAM)、同步动态随机存取存储器(Synchronous DRAM，SDRAM)、双倍数据速率同步动态随机存取存储器(Double Data Rate SDRAM，DDR SDRAM)、增强型同步动态随机存取存储器(Enhanced SDRAM，ESDRAM)、同步连接动态随机存取存储器(Synchronous link DRAM，SLDRAM)和直接内存总线随机存取存储器(Direct Rambus RAM，DR RAM)。
应注意，本申请实施例的存储器旨在包括但不限于这些和任意其它适合类型的存储器。
本申请实施例还提供一种计算机存储介质，该计算机存储介质可以存储用于指示上述任一种方法的程序指令。
可选地，该存储介质具体可以为存储器1530。
本申请实施例还提供了一种系统芯片，该系统芯片包括输入输出接口、至少一个处理器、至少一个存储器和总线，该至少一个存储器用于存储指令，该至少一个处理器用于调用该至少一个存储器的指令，以进行上述各个实施例的方法的操作。
本申请实施例的芯片系统包括的处理器，用于支持分布式单元、集中式单元以及存储设备以实现上述实施例中所涉及的功能，例如，例如生成或处理上述方法中所涉及的 数据和/或信息。
在一种可能的设计中，所述芯片系统还包括存储器，所述存储器，用于保存分布式单元、集中式单元以及终端设备必要的程序指令和数据。该芯片系统，可以由芯片构成，也可以包含芯片和其他分立器件。应当理解的是，该芯片处理的数据和/或信息可来自应用，处理后的数据和/或信息也可发送给应用，本申请对此不进行限定。
本领域普通技术人员可以意识到，结合本文中所公开的实施例描述的各示例的单元及算法步骤，能够以电子硬件、或者计算机软件和电子硬件的结合来实现。这些功能究竟以硬件还是软件方式来执行，取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能，但是这种实现不应认为超出本申请的范围。
所属领域的技术人员可以清楚地了解到，为描述的方便和简洁，上述描述的系统、装置和单元的具体工作过程，可以参考前述方法实施例中的对应过程，在此不再赘述。
在本申请所提供的几个实施例中，应该理解到，所揭露的系统、装置和方法，可以通过其它的方式实现。例如，以上所描述的装置实施例仅仅是示意性的，例如，所述单元的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个单元或组件可以结合或者可以集成到另一个系统，或一些特征可以忽略，或不执行。另一点，所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口，装置或单元的间接耦合或通信连接，可以是电性，机械或其它的形式。
所述作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例方案的目的。
另外，在本申请各个实施例中的各功能单元可以集成在一个处理单元中，也可以是各个单元单独物理存在，也可以两个或两个以上单元集成在一个单元中。
所述功能如果以软件功能单元的形式实现并作为独立的产品销售或使用时，可以存储在一个计算机可读取存储介质中。基于这样的理解，本申请的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质中，包括若干指令用以使得一台计算机设备(可以是个人计算机，服务器，或者网络设备等)执行本申请各个实施例所述方法的全部或部分步骤。而前述的存储介质包括：U盘、移动硬盘、只读存储器(Read-Only Memory，ROM)、随机存取存储器(Random Access Memory，RAM)、磁碟或者光盘等各种可以存储程序代码的介质。
以上所述，仅为本申请的具体实施方式，但本申请的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本申请揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本申请的保护范围之内。因此，本申请的保护范围应以所述权利要求的保护范围为准。

Claims (14)

  1. 一种数据写入方法，应用于固态存储设备SSD，其特征在于，所述方法包括：
    接收写命令，所述写命令携带待写入数据的类型；
    根据所述待写入数据的类型，确定写入所述待写入数据的SSD中的存储区域的类型，所述SSD包括多种类型的存储区域；
    根据所述存储区域的类型，确定写入所述待写入数据的目标存储区域；
    将所述待写入数据写入所述目标存储区域。
  2. 根据权利要求1所述的方法，其特征在于，所述SSD中存储有数据类型与存储区域类型的对应关系，所述根据所述待写入数据的类型，确定写入所述待写入数据的SSD中的存储区域的类型包括：
    根据所述待写入数据的类型及所述对应关系，确定所述写入所述待写入数据的目标存储区域的类型。
  3. 根据权利要求2所述的方法，其特征在于，所述SSD包括多个存储块，所述SSD按照存储块的类型分为不同类型的存储区域，所述对应关系为数据类型与存储块的类型的对应关系。
  4. 根据权利要求3所述的方法，其特征在于，所述SSD包括SLC区域、MLC区域、TLC区域和QLC区域中的至少两项，且所述SLC区域、所述MLC区域、所述TLC区域和所述QLC区域的性能依次降低，在根据所述存储区域的类型确定写入所述待写入数据的目标存储区域之前，所述方法还包括：
    若所述写入所述待写入数据的SSD中的存储区域的类型对应的存储区域中的存储块都不包括空闲存储页，将性能低于所述写入所述待写入数据的SSD中的存储区域的类型的存储区域的至少一个包括空闲存储页的块的类型转换为与所述写入所述待写入数据的SSD中的存储区域的类型的存储区域的类型相同。
  5. 根据权利要求2所述的方法，其特征在于，所述SSD包括多个存储块，每个存储块包括至少一种类型的存储页，所述对应关系为数据类型与所述存储页的类型的对应关系。
  6. 根据权利要求5所述的方法，其特征在于，不同类型的存储页分别对应一个存储列表，每个存储列表中记录有一种类型的存储页；
    所述根据所述存储区域的类型，确定写入所述待写入数据的目标存储区域包括：
    根据存储页的类型在所述存储页类型对应的存储列表中找可用的存储页作为所述目标存储区域；
    如果所述存储列表中有可用的存储页，则将所述可用的存储页作为所述目标存储区域；
    如果所述存储列表中没有可用的存储页，则在所述SSD中获取一个空闲存储块，将所述空闲存储块的第一个存储页作为所述目标存储区域。
  7. 根据权利要求5或6所述的方法，其特征在于，所述存储块包括LSB页、CSB页和所述MSB页中的至少两项，且所述LSB页、所述CSB页和所述MSB页的性能依次降低，所述根据所述存储区域的类型，确定写入所述待写入数据的目标存储区域包括：
    若所述写入所述待写入数据的SSD中的存储区域的类型的存储区域为所述MSB页 或所述CSB页，且所述写入所述待写入数据的SSD中的存储区域的类型的存储区域不存在可用的存储页，将所述性能高于所述写入所述待写入数据的SSD中的存储区域的类型对应的至少一个可用的存储页确定为所述目标存储区域。
  8. 一种存储设备，应用于固态存储设备SSD，其特征在于，所述存储设备包括：
    接收模块，用于接收写命令，所述写命令携带待写入数据的类型；
    处理模块，用于根据所述待写入数据的类型，确定写入所述待写入数据的SSD中的存储区域的类型，所述SSD包括多种类型的存储区域；
    所述处理模块，还用于根据所述存储区域的类型，确定写入所述待写入数据的目标存储区域；
    所述处理模块，还用于将所述待写入数据写入所述目标存储区域。
  9. 根据权利要求8所述的存储设备，其特征在于，所述SSD中存储有数据类型与存储区域类型的对应关系，所述处理模块具体用于：
    根据所述待写入数据的类型及所述对应关系，确定所述写入所述待写入数据的目标存储区域的类型。
  10. 根据权利要求9所述的存储设备，其特征在于，所述SSD包括多个存储块，所述SSD按照存储块的类型分为不同类型的存储区域，所述对应关系为数据类型与存储块的类型的对应关系。
  11. 根据权利要求10所述的存储设备，其特征在于，所述SSD包括SLC区域、MLC区域、TLC区域和QLC区域中的至少两项，且所述SLC区域、所述MLC区域、所述TLC区域和所述QLC区域的性能依次降低，若所述写入所述待写入数据的SSD中的存储区域的类型对应的块存储区域中的存储块都不包括空闲存储页，所述处理模块还用于将性能低于所述写入所述待写入数据的SSD中的存储区域的类型的存储区域的至少一个包括空闲存储页的块的类型转换为与所述写入所述待写入数据的SSD中的存储区域的类型的存储区域的类型相同。
  12. 根据权利要求9所述的存储设备，其特征在于，所述SSD包括多个存储块，每个存储块包括至少一种类型的存储页，所述SSD按照存储页的类型划分为不同类型的存储区域，所述对应关系为数据类型与所述存储页的类型的对应关系。
  13. 根据权利要求12所述的存储设备，其特征在于，不同类型的存储页分别对应一个存储列表，每个存储列表中记录有一种类型的存储页；
    所述处理模块具体用于：
    根据存储页的类型在所述存储页类型对应的存储列表中找可用的存储页作为所述目标存储区域；
    如果所述存储列表中有可用的存储页，则将所述可用的存储页作为所述目标存储区域；
    如果所述存储列表中没有可用的存储页，则在所述SSD中获取一个空闲存储块，将所述空闲存储块的第一个存储页作为所述目标存储区域。
  14. 根据权利要求12或13所述的存储设备，其特征在于，所述存储块包括LSB页、CSB页和所述MSB页中的至少两项，且所述LSB页、所述CSB页和所述MSB页的性能依次降低，所述处理模块具体用于：
    若所述写入所述待写入数据的SSD中的存储区域的类型的存储区域为所述MSB页 或所述CSB页，且所述写入所述待写入数据的SSD中的存储区域的类型的存储区域不存在可用的存储页，将所述性能高于所述写入所述待写入数据的SSD中的存储区域的类型对应的至少一个可用的存储页确定为所述目标存储区域。
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