WO2019080256A1 - Oled像素驱动电路及其驱动方法 - Google Patents

Oled像素驱动电路及其驱动方法

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Publication number
WO2019080256A1
WO2019080256A1 PCT/CN2017/113717 CN2017113717W WO2019080256A1 WO 2019080256 A1 WO2019080256 A1 WO 2019080256A1 CN 2017113717 W CN2017113717 W CN 2017113717W WO 2019080256 A1 WO2019080256 A1 WO 2019080256A1
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signal
node
thin film
film transistor
phase
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PCT/CN2017/113717
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English (en)
French (fr)
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王珊
温亦谦
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Priority to US15/741,824 priority Critical patent/US10460665B2/en
Publication of WO2019080256A1 publication Critical patent/WO2019080256A1/zh
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]

Definitions

  • the present invention relates to the field of display technologies, and in particular, to an OLED pixel driving circuit and a driving method thereof.
  • organic light-emitting diode (OLED) display panels are favored by the market because of their low power consumption, high color gamut, high brightness, high resolution, wide viewing angle, and high response speed.
  • the OLED display device can be classified into two types: passive matrix OLED (PMOLED) and active matrix OLED (AMOLED) according to the driving method.
  • PMOLED passive matrix OLED
  • AMOLED active matrix OLED
  • the AMOLED has pixels arranged in an array, belongs to an active display type, has high luminous efficiency, and is generally used as a high-definition large-sized display device.
  • FIG. 1 is a schematic diagram of a 2T1C pixel driving circuit of a conventional OLED, the existing driving method and pixel structure, by applying different DC driving voltages to the OLED, the OLED displays the required color and color under different gray scale values.
  • the 2T1C refers to a circuit mainly comprising two thin film transistors and a capacitor.
  • One of the thin film transistors T2 is a switching TFT controlled by a scan signal Gate for controlling the entry of the data signal Data, a charging switch for controlling the capacitance Cst, and another thin film transistor T1.
  • both T1 and T2 employ a P-type TFT.
  • the scan signal Gate may be from a gate driver corresponding to a certain row of scan lines
  • the data signal Data may be from a source driver corresponding to a column of data lines.
  • OVDD is the high potential of the power supply
  • OVSS is the low potential of the power supply.
  • the voltage Vdata of the data signal Data is connected to the driving TFT T1, and stored on the capacitor Cst, so that T1 is always in a conducting state, and the OLED is in a DC bias state for a long time, and internal ion polarization is formed.
  • the electric field is built, and the threshold voltage of the OLED is continuously increased, and the luminance of the OLED is continuously reduced. Long-term illumination shortens the life of the OLED.
  • the aging degree of each sub-pixel OLED is different, so that the screen display screen is uneven, which affects the display effect.
  • FIG. 2a it is a schematic diagram of a 6T1C pixel driving circuit of the existing OLED
  • FIG. 2b is a timing diagram of the circuit shown in FIG. 2a.
  • the circuit mainly includes 6 thin film transistors and 1 capacitor C1 from T1 to T6, wherein T6 is an N-type TFT.
  • T6 is an N-type TFT.
  • the driving process of the OLED is by letter. No. S1 ⁇ S3 control, divided into three stages of t1 ⁇ t3.
  • the above existing 6T1C pixel driving circuit driving method has the following disadvantages: the pixel structure has both an N-type TFT and a P-type TFT, and the structure process is relatively complicated; and the 6T1C structure has a small effective light-emitting area.
  • the existing OLED pixel driving circuits each have defects and need to be improved.
  • FIG. 1 in the 2T1C pixel driving circuit of the existing OLED, after the Gate is turned on, the Vdata potential is stored in the capacitor Cst, and the driving TFT is kept turned on, so that the OLED is always in a DC bias state, and the driving method is easy to cause the OLED. senescence.
  • FIG. 2a and FIG. 2b the conventional OLED 6T1C pixel driving circuit has a large number of TFTs and different types, and the process is complicated.
  • Another object of the present invention is to provide a driving method of an OLED pixel driving circuit, which eliminates a phenomenon in which light emission is uneven due to a difference in threshold voltage caused by a process of driving a transistor.
  • an OLED pixel driving circuit including:
  • a first thin film transistor having a gate connected to the second node, and a source and a drain connected to the third node and the fourth node, respectively;
  • a second thin film transistor having a gate connected to the first signal, and a source and a drain connected to the second node and the fourth node, respectively;
  • a third thin film transistor having a gate connected to the second signal, the source and the drain being respectively connected to the first node and the second node;
  • a fourth thin film transistor having a gate connected to the third signal, the source and the drain being respectively connected to the fourth node and the anode of the OLED;
  • the cathode of the OLED is connected to the power source at a low potential
  • the third node is connected to the power supply high potential
  • the first node is connected to the voltage input terminal to input a data voltage or a reference voltage
  • the first thin film transistor, the second thin film transistor, the third thin film transistor, and the fourth thin film transistor are P-type transistors.
  • the timing of the first signal, the second signal, and the third signal is configured to include a data voltage storage phase, a threshold voltage compensation phase, and an illumination phase.
  • the voltage input terminal inputs a data voltage.
  • the voltage input terminal inputs a reference voltage.
  • the first signal is a high level
  • the second signal is a low level
  • the third signal is a high level
  • the first signal is a low level
  • the second signal is a high level
  • the third signal is a high level
  • the first signal is a high level
  • the second signal is a high level
  • the third signal is a low level.
  • the present invention also provides a driving method of the above OLED pixel driving circuit, wherein timings of the first signal, the second signal, and the third signal are configured to include a data voltage storage phase, a threshold voltage compensation phase, and an illumination phase.
  • the voltage input terminal inputs a data voltage.
  • the voltage input terminal inputs a reference voltage.
  • the invention also provides an OLED pixel driving circuit, comprising:
  • a first thin film transistor having a gate connected to the second node, and a source and a drain connected to the third node and the fourth node, respectively;
  • a second thin film transistor having a gate connected to the first signal, and a source and a drain connected to the second node and the fourth node, respectively;
  • a third thin film transistor having a gate connected to the second signal, the source and the drain being respectively connected to the first node and the second node;
  • a fourth thin film transistor having a gate connected to the third signal, the source and the drain being respectively connected to the fourth node and the anode of the OLED;
  • the cathode of the OLED is connected to the power source at a low potential
  • the third node is connected to the power supply high potential
  • the first node is connected to the voltage input terminal to input a data voltage or a reference voltage
  • the first thin film transistor, the second thin film transistor, the third thin film transistor, and the fourth thin film transistor are P-type transistors
  • the timing of the first signal, the second signal, and the third signal is configured to include a data voltage storage phase, a threshold voltage compensation phase, and an illumination phase;
  • the voltage input terminal inputs a data voltage
  • the voltage input terminal inputs a reference voltage
  • the first signal is a high level
  • the second signal is a low level
  • the third signal is a high level
  • the OLED pixel driving circuit and the driving method thereof of the present invention eliminate the phenomenon of uneven illumination caused by the difference in threshold voltage caused by the process of driving the transistor, improve the display quality of the panel, and use the same type of TFT to make the panel process Simple process.
  • FIG. 1 is a schematic diagram of a 2T1C pixel driving circuit of a conventional OLED
  • 2a is a schematic diagram of a 6T1C pixel driving circuit of a conventional OLED
  • Figure 2b is a timing diagram of the circuit shown in Figure 2a;
  • FIG. 3 is a circuit diagram of a preferred embodiment of an OLED pixel driving circuit of the present invention.
  • Figure 4 is a timing diagram of the circuit shown in Figure 3;
  • Figure 5a is a schematic diagram of the circuit state of the circuit of Figure 3 in a data voltage storage phase
  • Figure 5b is a timing diagram of circuit driving signals of the circuit of Figure 3 in a data voltage storage phase
  • 6a is a schematic diagram of a circuit state of the circuit of FIG. 3 in a threshold voltage compensation phase
  • 6b is a timing diagram of circuit driving signals of the circuit of FIG. 3 in a threshold voltage compensation phase
  • Figure 7a is a schematic view showing the circuit state of the circuit shown in Figure 3 in the light-emitting phase
  • Figure 7b is a timing diagram of the circuit drive signal of the circuit of Figure 3 during the illumination phase.
  • FIG. 3 is a circuit diagram of a preferred embodiment of the OLED pixel driving circuit of the present invention
  • FIG. 4 is a timing diagram of the circuit of FIG.
  • the present invention provides a 4T1C OLED pixel circuit and a pixel driving method for driving an organic light emitting diode.
  • the circuit of the preferred embodiment mainly includes:
  • the thin film transistor T1 has a gate connected to the node B, a source and a drain connected to the node C and the node D, respectively; a thin film transistor T2 having a gate connection signal S1, a source and a drain connected to the node B and the node D, respectively; a thin film transistor T3, its gate connection signal S2, the source and the drain are respectively connected to the node A and the node B; the thin film transistor T4 has a gate connection signal S3, and the source and the drain are respectively connected to the node D and the anode of the OLED;
  • the cathode of the OLED is connected to the power supply low potential OVSS;
  • Capacitor C1 the two ends of which are respectively connected to node A and node B;
  • Node C is connected to the power supply high potential OVDD;
  • Node A is connected to the voltage input terminal Vdata/Vref to input the data voltage Vdata or the reference voltage. Vref;
  • T1, T2, T3, and T4 are P-type transistors.
  • the timings of the signal S1, the signal S2, and the signal S3 are configured to include a data voltage storage phase, a threshold voltage compensation phase, and an illumination phase to respectively correspond to three phases included in the driving process, respectively being the first phase: the OLED data voltage Vdata Storage phase, second phase: OLED threshold voltage compensation phase, third phase: OLED illumination phase.
  • the voltage input terminal Vdata/Vref inputs a data voltage Vdata, which in this preferred embodiment is at this time the data voltage Vdata is at a high level.
  • the voltage input terminal Vdata/Vref is input with a reference voltage Vref, which in this preferred embodiment is now a high level.
  • FIG. 5a is a schematic diagram of a circuit state of the circuit shown in FIG. 3 in a data voltage storage phase
  • FIG. 5b is a timing diagram of a corresponding circuit driving signal.
  • the signal S1 is at a high level
  • the signal S2 is at a low level
  • the signal S3 is at a high level.
  • FIG. 6a is a schematic diagram of a circuit state of the circuit shown in FIG. 3 in a threshold voltage compensation phase
  • FIG. 6b is a timing diagram of a corresponding circuit driving signal.
  • the signal S1 is at a low level
  • the signal S2 is at a high level
  • the signal S3 is at a high level.
  • This stage completes the OLED threshold voltage compensation.
  • FIG. 7a is a schematic diagram of a circuit state of the circuit shown in FIG. 3 in an illuminating phase
  • FIG. 7b is a timing diagram of a corresponding circuit driving signal.
  • the signal S1 is at a high level
  • the signal S2 is at a high level
  • the signal S3 is at a low level.
  • This stage completes the luminescent display of the OLED.
  • the present invention also provides a driving method of the pixel driving circuit described above, which eliminates the phenomenon that the luminance is uneven due to the difference in threshold voltage caused by the process of driving the transistor, and improves the display quality of the panel.
  • the OLED pixel driving circuit and the driving method thereof of the present invention eliminate the phenomenon of uneven illumination caused by the difference in threshold voltage caused by the process of driving the transistor, improve the display quality of the panel, and use the same type of TFT to make the panel process Simple process.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Electroluminescent Light Sources (AREA)
  • Control Of El Displays (AREA)

Abstract

一种OLED像素驱动电路及其驱动方法。OLED像素驱动电路包括：第一薄膜晶体管(T1)，栅极连接第二节点(B)，源极和漏极连接第三节点(C)和第四节点(D)；第二薄膜晶体管(T2)，栅极连接第一信号(S1)，源极和漏极连接第二节点(B)和第四节点(D)；第三薄膜晶体管(T3)，栅极连接第二信号(S2)，源极和漏极连接第一节点(A)和第二节点(B)；第四薄膜晶体管(T4)，栅极连接第三信号(S3)，源极和漏极连接第四节点(D)和OLED的阳极；OLED，阴极连接电源低电位(OVSS)；电容(C1)，两端连接第一节点(A)和第二节点(B)；第三节点(C)连接电源高电位(OVDD)；第一节点(A)连接电压输入端(Vdata/Vref)。驱动方法消除了因阈值电压的不同导致发光不均匀的现象。

Description

OLED像素驱动电路及其驱动方法 技术领域
本发明涉及显示技术领域，尤其涉及一种OLED像素驱动电路及其驱动方法。
背景技术
作为新一代显示技术，有机发光二极管(OLED)显示面板具有低功耗、高色域、高亮度、高分辨率、宽视角、高响应速度等优点，因此备受市场的青睐。
OLED显示装置按照驱动方式可以分为无源矩阵型OLED(Passive Matrix OLED，PMOLED)和有源矩阵型OLED(Active Matrix OLED，AMOLED)两大类。其中，AMOLED具有呈阵列式排布的像素，属于主动显示类型，发光效能高，通常用作高清晰度的大尺寸显示装置。
参见图1，其为现有OLED的2T1C像素驱动电路示意图，现有的驱动方法及像素结构，通过对OLED施加不同的直流驱动电压，使得OLED在不同的灰阶值下显示所需要的色彩和亮度。2T1C指电路主要包括两个薄膜晶体管和一个电容，其中一个薄膜晶体管T2为开关TFT，由扫描信号Gate控制，用于控制数据信号Data的进入，是控制电容Cst的充电开关，另一个薄膜晶体管T1为驱动TFT，用于驱动OLED，控制通过OLED的电流，电容Cst主要是用来存储Data信号进而控制T1对OLED的驱动电流。在图1所示电路中，作为举例，T1和T2均采用了P型TFT。扫描信号Gate可以来自于栅极驱动器，对应于某一行扫描线，数据信号Data可以来自于源极驱动器，对应于某一列数据线。OVDD为电源高电位，OVSS为电源低电位。
扫描信号Gate打开后，数据信号Data的电压Vdata接入到驱动TFT T1，存储在电容Cst上，使得T1一直处于导通状态，OLED长时间处于直流偏置状态，内部的离子极性化形成内建电场，导致OLED的阈值电压不断增大，OLED的发光亮度不断降低。长时间发光缩短了OLED的寿命。每个子像素OLED的衰老程度不同，使得屏幕显示画面不均，影响显示效果。
如图2a所示，其为现有OLED的6T1C像素驱动电路示意图，图2b为图2a所示电路的时序图。电路主要包括T1～T6共6个薄膜晶体管和1个电容C1，其中T6为N型TFT。按照时序图示意，OLED的驱动过程由信 号S1～S3控制，划分为t1～t3共三个阶段。但是以上现有6T1C像素驱动电路驱动方法存在以下不足：像素结构既有N型TFT又有P型TFT，结构工艺较为复杂；6T1C结构，有效发光面积较小。
总之，现有OLED像素驱动电路各自均存在缺陷，亟需改进。如图1所示，现有OLED的2T1C像素驱动电路中，Gate打开后，Vdata电位存储在电容Cst中，驱动TFT保持导通，使得OLED一直处于直流偏置状态，此驱动方法容易引起OLED的衰老。如图2a和图2b所示，现有OLED的6T1C像素驱动电路TFT数量较多且类型不同，工艺复杂。
发明内容
因此，本发明的目的在于提供一种OLED像素驱动电路，消除因驱动晶体管的工艺造成的阈值电压的不同导致发光不均匀的现象。
本发明的另一目的在于提供一种OLED像素驱动电路的驱动方法，消除因驱动晶体管的工艺造成的阈值电压的不同导致发光不均匀的现象。
为实现上述目的，本发明提供了一种OLED像素驱动电路，包括：
第一薄膜晶体管，其栅极连接第二节点，源极和漏极分别连接第三节点和第四节点；
第二薄膜晶体管，其栅极连接第一信号，源极和漏极分别连接第二节点和第四节点；
第三薄膜晶体管，其栅极连接第二信号，源极和漏极分别连接第一节点和第二节点；
第四薄膜晶体管，其栅极连接第三信号，源极和漏极分别连接第四节点和OLED的阳极；
OLED的阴极连接电源低电位；
电容，其两端分别连接第一节点和第二节点；
第三节点连接电源高电位；
第一节点连接电压输入端以输入数据电压或参考电压；
所述第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管及第四薄膜晶体管为P型晶体管。
其中，所述第一信号、第二信号以及第三信号的时序配置为包括数据电压存储阶段，阈值电压补偿阶段，以及发光阶段。
其中，在所述数据电压存储阶段和阈值电压补偿阶段，电压输入端输入数据电压。
其中，在所述发光阶段，电压输入端输入参考电压。
其中，在所述数据电压存储阶段，第一信号为高电平，第二信号为低电平，第三信号为高电平。
其中，在所述阈值电压补偿阶段，第一信号为低电平，第二信号为高电平，第三信号为高电平。
其中，在所述发光阶段，第一信号为高电平，第二信号为高电平，第三信号为低电平。
本发明还提供了上述OLED像素驱动电路的驱动方法，所述第一信号、第二信号以及第三信号的时序配置为包括数据电压存储阶段，阈值电压补偿阶段，以及发光阶段。
其中，在所述数据电压存储阶段和阈值电压补偿阶段，电压输入端输入数据电压。
其中，在所述发光阶段，电压输入端输入参考电压。
本发明还提供一种OLED像素驱动电路，包括：
第一薄膜晶体管，其栅极连接第二节点，源极和漏极分别连接第三节点和第四节点；
第二薄膜晶体管，其栅极连接第一信号，源极和漏极分别连接第二节点和第四节点；
第三薄膜晶体管，其栅极连接第二信号，源极和漏极分别连接第一节点和第二节点；
第四薄膜晶体管，其栅极连接第三信号，源极和漏极分别连接第四节点和OLED的阳极；
OLED的阴极连接电源低电位；
电容，其两端分别连接第一节点和第二节点；
第三节点连接电源高电位；
第一节点连接电压输入端以输入数据电压或参考电压；
所述第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管及第四薄膜晶体管为P型晶体管；
其中，所述第一信号、第二信号以及第三信号的时序配置为包括数据电压存储阶段，阈值电压补偿阶段，以及发光阶段；
其中，在所述数据电压存储阶段和阈值电压补偿阶段，电压输入端输入数据电压；
其中，在所述发光阶段，电压输入端输入参考电压；
其中，在所述数据电压存储阶段，第一信号为高电平，第二信号为低电平，第三信号为高电平。
综上，本发明的OLED像素驱动电路及其驱动方法消除了因驱动晶体管的工艺造成的阈值电压的不同导致发光不均匀的现象，提高面板的显示质量；使用同一种类型的TFT，使面板制程工艺简单。
附图说明
下面结合附图，通过对本发明的具体实施方式详细描述，将使本发明的技术方案及其他有益效果显而易见。
附图中，
图1为现有OLED的2T1C像素驱动电路示意图；
图2a为现有OLED的6T1C像素驱动电路示意图；
图2b为图2a所示电路的时序图；
图3为本发明OLED像素驱动电路一较佳实施例的电路示意图；
图4为图3所示电路的时序图；
图5a为图3所示电路在数据电压存储阶段的电路状态示意图；
图5b为图3所示电路在数据电压存储阶段的电路驱动信号时序图；
图6a为图3所示电路在阈值电压补偿阶段的电路状态示意图；
图6b为图3所示电路在阈值电压补偿阶段的电路驱动信号时序图；
图7a为图3所示电路在发光阶段的电路状态示意图；
图7b为图3所示电路在发光阶段的电路驱动信号时序图。
具体实施方式
参见图3，其为本发明OLED像素驱动电路一较佳实施例的电路示意图，图4为图3所示电路的时序图。本发明提出一种4T1C的OLED像素电路及像素驱动方法，用于驱动有机发光二极管，该较佳实施例的电路主要包括：
薄膜晶体管T1，其栅极连接节点B，源极和漏极分别连接节点C和节点D；薄膜晶体管T2，其栅极连接信号S1，源极和漏极分别连接节点B和节点D；薄膜晶体管T3，其栅极连接信号S2，源极和漏极分别连接节点A和节点B；薄膜晶体管T4，其栅极连接信号S3，源极和漏极分别连接节点D和OLED的阳极；
OLED的阴极连接电源低电位OVSS；
电容C1，其两端分别连接节点A和节点B；
节点C连接电源高电位OVDD；
节点A连接电压输入端Vdata/Vref以输入数据电压Vdata或参考电压 Vref；
在此较佳实施例中，T1、T2、T3及T4为P型晶体管。
信号S1、信号S2以及信号S3的时序配置为包括数据电压存储阶段，阈值电压补偿阶段，以及发光阶段，以分别对应驱动过程所包括的三个阶段，分别为第一阶段：OLED数据电压Vdata的存储阶段、第二阶段：OLED阈值电压补偿阶段、第三阶段：OLED发光阶段。
在数据电压存储阶段和阈值电压补偿阶段，电压输入端Vdata/Vref输入数据电压Vdata，在此较佳实施例中此时数据电压Vdata为高电平。在发光阶段，电压输入端Vdata/Vref输入参考电压Vref，在此较佳实施例中此时参考电压Vref为高电平。
参见图5a及图5b，图5a为图3所示电路在数据电压存储阶段的电路状态示意图，图5b为相应的电路驱动信号时序图。
在第一阶段，OLED数据电压Vdata的存储阶段，信号S1为高电平，信号S2为低电平，信号S3为高电平。
由于电路中晶体管为P型晶体管，因此，S2为低电位时，所以T3导通，S1、S3为高电位时，T2、T4关闭，节点A处的电位VA＝节点B处的电位VB＝数据电压Vdata。
此阶段完成对OLED数据电压Vdata的存储。
参见图6a及图6b，图6a为图3所示电路在阈值电压补偿阶段的电路状态示意图，图6b为相应的电路驱动信号时序图。
在第二阶段，OLED阈值电压补偿阶段，信号S1为低电平，信号S2为高电平，信号S3为高电平。
S2为高电位，所以T3关闭，S1为低电位，T2导通，因电容C1的作用，节点C处放电，T1导通，直到截止电压关闭，即VB＝OVDD-Vth，VA＝Vdata，Vth表示T1的截止电压。
此阶段完成OLED阈值电压补偿。
参见图7a及图7b，图7a为图3所示电路在发光阶段的电路状态示意图，图7b为相应的电路驱动信号时序图。
在第三阶段，OLED发光显示阶段，信号S1为高电平，信号S2为高电平，信号S3为低电平。
S3低电位，T4导通，由于节点A电位突变为参考电压Vref，电压变化ΔV＝Vref－Vdata,由于电容C1的耦合作用，节点B电位会随之改变，由原来的OVDD－Vth变为OVDD－Vth+ΔV＝OVDD－Vth+Vref－Vdata，因T1为P型，所以驱动电流Ioled＝k(Vsg-Vth)2＝k(OVDD－OVDD+Vth－ Vref+Vdata－Vth)2＝k(Vdata－Vref)2，消除了因驱动晶体管的工艺造成的阈值电压的不同导致发光不均匀的现象，发光二极管OLED发光。
此阶段完成OLED的发光显示。
本发明还相应提供了上述像素驱动电路的驱动方法，消除了因驱动晶体管的工艺造成的阈值电压的不同导致发光不均匀的现象，改善面板的显示质量。
综上，本发明的OLED像素驱动电路及其驱动方法消除了因驱动晶体管的工艺造成的阈值电压的不同导致发光不均匀的现象，提高面板的显示质量；使用同一种类型的TFT，使面板制程工艺简单。
以上所述，对于本领域的普通技术人员来说，可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形，而所有这些改变和变形都应属于本发明后附的权利要求的保护范围。

Claims (13)

  1. 一种OLED像素驱动电路，包括：
    第一薄膜晶体管，其栅极连接第二节点，源极和漏极分别连接第三节点和第四节点；
    第二薄膜晶体管，其栅极连接第一信号，源极和漏极分别连接第二节点和第四节点；
    第三薄膜晶体管，其栅极连接第二信号，源极和漏极分别连接第一节点和第二节点；
    第四薄膜晶体管，其栅极连接第三信号，源极和漏极分别连接第四节点和OLED的阳极；
    OLED的阴极连接电源低电位；
    电容，其两端分别连接第一节点和第二节点；
    第三节点连接电源高电位；
    第一节点连接电压输入端以输入数据电压或参考电压；
    所述第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管及第四薄膜晶体管为P型晶体管。
  2. 如权利要求1所述的OLED像素驱动电路，其中，所述第一信号、第二信号以及第三信号的时序配置为包括数据电压存储阶段，阈值电压补偿阶段，以及发光阶段。
  3. 如权利要求2所述的OLED像素驱动电路，其中，在所述数据电压存储阶段和阈值电压补偿阶段，电压输入端输入数据电压。
  4. 如权利要求2所述的OLED像素驱动电路，其中，在所述发光阶段，电压输入端输入参考电压。
  5. 如权利要求2所述的OLED像素驱动电路，其中，在所述数据电压存储阶段，第一信号为高电平，第二信号为低电平，第三信号为高电平。
  6. 如权利要求2所述的OLED像素驱动电路，其中，在所述阈值电压补偿阶段，第一信号为低电平，第二信号为高电平，第三信号为高电平。
  7. 如权利要求2所述的OLED像素驱动电路，其中，在所述发光阶段，第一信号为高电平，第二信号为高电平，第三信号为低电平。
  8. 一种如权利要求1所述的OLED像素驱动电路的驱动方法，包括：所述第一信号、第二信号以及第三信号的时序配置为包括数据电压存储阶段，阈值电压补偿阶段，以及发光阶段。
  9. 如权利要求8所述的OLED像素驱动电路的驱动方法，其中，在所述数据电压存储阶段和阈值电压补偿阶段，电压输入端输入数据电压。
  10. 如权利要求8所述的OLED像素驱动电路的驱动方法，其中，在所述发光阶段，电压输入端输入参考电压。
  11. 一种OLED像素驱动电路，包括：
    第一薄膜晶体管，其栅极连接第二节点，源极和漏极分别连接第三节点和第四节点；
    第二薄膜晶体管，其栅极连接第一信号，源极和漏极分别连接第二节点和第四节点；
    第三薄膜晶体管，其栅极连接第二信号，源极和漏极分别连接第一节点和第二节点；
    第四薄膜晶体管，其栅极连接第三信号，源极和漏极分别连接第四节点和OLED的阳极；
    OLED的阴极连接电源低电位；
    电容，其两端分别连接第一节点和第二节点；
    第三节点连接电源高电位；
    第一节点连接电压输入端以输入数据电压或参考电压；
    所述第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管及第四薄膜晶体管为P型晶体管；
    其中，所述第一信号、第二信号以及第三信号的时序配置为包括数据电压存储阶段，阈值电压补偿阶段，以及发光阶段；
    其中，在所述数据电压存储阶段和阈值电压补偿阶段，电压输入端输入数据电压；
    其中，在所述发光阶段，电压输入端输入参考电压；
    其中，在所述数据电压存储阶段，第一信号为高电平，第二信号为低电平，第三信号为高电平。
  12. 如权利要求11所述的OLED像素驱动电路，其中，在所述阈值电压补偿阶段，第一信号为低电平，第二信号为高电平，第三信号为高电平。
  13. 如权利要求11所述的OLED像素驱动电路，其中，在所述发光阶段，第一信号为高电平，第二信号为高电平，第三信号为低电平。
PCT/CN2017/113717 2017-10-24 2017-11-30 Oled像素驱动电路及其驱动方法 Ceased WO2019080256A1 (zh)

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