WO2019056440A1 - 显示装置的驱动装置及其驱动方法 - Google Patents

显示装置的驱动装置及其驱动方法 Download PDF

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Publication number
WO2019056440A1
WO2019056440A1 PCT/CN2017/107021 CN2017107021W WO2019056440A1 WO 2019056440 A1 WO2019056440 A1 WO 2019056440A1 CN 2017107021 W CN2017107021 W CN 2017107021W WO 2019056440 A1 WO2019056440 A1 WO 2019056440A1
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Prior art keywords
module
gamma correction
display
code
storage unit
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PCT/CN2017/107021
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English (en)
French (fr)
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黄北洲
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惠科股份有限公司
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Priority to US15/738,738 priority Critical patent/US20190086730A1/en
Publication of WO2019056440A1 publication Critical patent/WO2019056440A1/zh

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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals

Definitions

  • the present application relates to a method for improving the performance of a driving device for a display device, and more particularly to a driving device for a display device and a driving method thereof.
  • LCDs Liquid crystal displays
  • driving technology With the improvement of driving technology, they have the advantages of low power consumption, light weight, low voltage driving, etc., and have been widely used in video recording and playback.
  • a liquid crystal display device usually has a gate driving circuit, a source driving circuit, and a pixel array.
  • the pixel array has a plurality of pixel circuits, each of which is turned on and off according to a scan signal provided by the gate driving circuit, and displays a data picture according to the data signal provided by the source driving circuit.
  • the large-sized models basically adopt a separate structure of a circuit board (X_Board, XB) and a control board (CB), and the software codes corresponding to the main unit respectively exist in different memories, and are all on the control board.
  • X_Board, XB circuit board
  • CB control board
  • the problem with this is that each panel has a slight difference because of the process. If you want to achieve the best quality for each panel, you need each panel with a separate gamma. Correction, common electrode voltage setting, etc., make the open component and the control panel have a one-to-one correspondence, but this is a problem for packaging, transportation, and assembly.
  • an object of the present invention is to provide a driving device for a display device and a driving method thereof, which can improve a panel caused by a process by separating a circuit board and a control panel. The difference between the films, thus improving the overall product quality, without adding additional difficulties such as packaging or computing.
  • a driving device for a display device includes: a first substrate comprising: a storage unit electrically connected to a display module, wherein the storage unit stores display parameters of the display module, wherein the display The parameter is a gamma correction code, a common electrode voltage setting code, and a compensation display module brightness distribution uneven module code; a second substrate comprises: a control module electrically coupled to the storage unit, the control module reads Taking the display parameters stored in the storage unit, and adjusting driving parameters of the display module; wherein the first substrate is electrically coupled through a serial peripheral device interface; and an integrated circuit bus, electrical A timing control unit and a programmable gamma correction buffer circuit unit are coupled respectively.
  • Another object of the present application is a driving method of a display device, comprising: disposing a memory unit through a first substrate, wherein The storage unit stores a gamma correction code, a common electrode voltage setting code, and a compensation display module brightness distribution unevenness module code; electrically coupled to the storage unit through a control module in a second substrate, The control module reads the display parameters stored by the storage unit, adjusts driving parameters to the display module, and sets a timing control unit and a programmable gamma correction buffer circuit unit, wherein the timing control unit is embedded a compensation display module brightness distribution unevenness module, and a programmable gamma correction buffer circuit unit embedded with a gamma correction module and a common electrode voltage setting module; providing a serial peripheral device interface, electrically coupled respectively a timing control unit and the storage unit; and an integrated circuit bus electrically coupled to the timing control unit and the programmable gamma correction buffer circuit unit, respectively.
  • Still another object of the present application is a driving device for a display device, comprising: a first substrate comprising: a storage unit electrically connected to a display module, wherein the storage unit stores display parameters of the display module;
  • the second substrate includes: a control module electrically coupled to the storage unit, the control module reads the display parameters stored by the storage unit, and adjusts driving parameters of the display module; Controlling the order in which a pixel appears, and transmitting the signal to a driving unit on the display module; a programmable gamma correction buffer circuit unit, adjusting the voltage by a software dynamic detection; a serial peripheral interface Electrically coupled to the timing control unit and the storage unit; an integrated circuit bus electrically coupled to the timing control unit and the programmable gamma correction buffer circuit unit; and a power control unit, Providing power to the timing control unit; wherein the storage unit further includes a gamma correction code, a common electrode voltage setting code, and a compensation display
  • the storage unit further includes a gamma correction code, a common electrode voltage setting code, and a compensation display module brightness distribution unevenness module code; the common electrode voltage setting code electrical respectively The gamma correction code and the compensation display module luminance distribution uneven module code are coupled.
  • the method further includes: a timing control unit, configured to control a sequence of pixel display, and transmit the signal to a driving unit on the display module; a programmable gamma correction buffer circuit unit Adjusting the voltage by a software dynamic detection; a serial peripheral device interface electrically coupled to the timing control unit and the storage unit; and an integrated circuit bus electrically coupled to the timing control A unit and a programmable gamma correction buffer circuit unit.
  • a timing control unit configured to control a sequence of pixel display, and transmit the signal to a driving unit on the display module
  • a programmable gamma correction buffer circuit unit Adjusting the voltage by a software dynamic detection
  • a serial peripheral device interface electrically coupled to the timing control unit and the storage unit
  • an integrated circuit bus electrically coupled to the timing control A unit and a programmable gamma correction buffer circuit unit.
  • the timing control unit further includes a compensation display module brightness distribution unevenness module.
  • the programmable gamma correction buffer circuit unit further includes a gamma correction module and a common electrode voltage setting module.
  • the gamma correction module is electrically coupled to the common electrode voltage setting module.
  • the driving method, the providing a serial peripheral device interface, electrically coupling the timing control unit and the storage unit respectively includes: timing control when power is on Passing through the serial peripheral device interface bus; reading the brightness distribution unevenness module code of the compensation display module in the storage unit according to the storage address; and then transmitting to the compensation display module brightness distribution uneven module module The data matches.
  • the driving method, the step of providing an integrated circuit bus, electrically coupling the timing control unit and the programmable gamma correction buffer circuit unit respectively includes: reading Decoding the gamma correction code and the common electrode voltage setting code in the memory unit; then passing through the integrated circuit bus; and transmitting the gamma correction module and the program in the programmable gamma correction buffer circuit unit
  • the common electrode voltage setting module performs data matching.
  • FIG. 1 is a schematic diagram of an exemplary liquid crystal display panel formed by a display pixel array.
  • FIG. 2 is a schematic diagram showing the equivalent capacitive load of a liquid crystal display pixel associated with an associated switch assembly in an exemplary display panel.
  • FIG. 3 is a schematic diagram showing the equivalent capacitive load of a liquid crystal display pixel associated with an exemplary switch panel and associated switch components in another exemplary display panel.
  • FIG. 4 is a schematic diagram of a display device according to an embodiment of the present application.
  • FIG. 5 is a schematic diagram of a communication architecture according to an embodiment of the present application.
  • the word “comprising” is to be understood to include the component, but does not exclude any other component.
  • “on” means located above or below the target component, and does not mean that it must be on the top based on the direction of gravity.
  • the liquid crystal panel of the present application may include an LCD (Liquid Crystal Display) panel including: a thin film transistor (TFT) substrate, a color filter (CF) substrate, and a liquid crystal layer formed between the two substrates or It is an OLED (Organic Light-Emitting Diode) panel or a QLED (Quantum Dots Light-Emitting Diode) panel.
  • LCD Liquid Crystal Display
  • TFT thin film transistor
  • CF color filter
  • OLED Organic Light-Emitting Diode
  • QLED Quadantum Dots Light-Emitting Diode
  • the liquid crystal panel of the present application may be a curved display panel.
  • the active array (TFT) and the color filter layer (CF) of the present application may be formed on the same substrate.
  • FIG. 1 is a schematic diagram of an exemplary liquid crystal display panel formed by a display pixel array.
  • a liquid crystal display panel 10 includes a display module 20 composed of a plurality of pixels 22 arranged in a two-dimensional array. These pixels are controlled and driven by a plurality of data lines D1, D2, ... Dn and a plurality of gate lines G1, G2, ..., Gm.
  • the data signals of each data line are provided by a data driving unit 30 and the gate signals of each of the gate lines are provided by a gate driving unit 40.
  • FIG. 2 is a schematic diagram showing an equivalent capacitive load of a liquid crystal display pixel associated with an exemplary display panel and associated switch components
  • FIG. 3 is a diagram showing the equivalent of a liquid crystal display pixel and related switch components in another exemplary display panel. Schematic diagram of capacitive load.
  • each of the pixels 22 is associated with a plurality of capacitors, for example, a capacitor Clc formed by a liquid crystal layer capacitor located between the upper and lower electrodes and associated with the gate line signal.
  • the total pixel capacitance of a liquid crystal display panel may vary due to pixel size, thickness of the liquid crystal layer, size of the storage capacitor, and other techniques well known to those skilled in the art.
  • Clc and Cgs are connected to a common voltage Vcom.
  • Cst is connected to a gate line.
  • a driving device 11 of a display device includes: a display module 160; a first substrate 50 includes: a storage unit 110, and a display module 160
  • the storage unit 110 stores the display parameters of the display module 160, wherein the display parameters are a gamma correction code 112, a common electrode voltage setting code 114, and a compensation display module brightness distribution uneven module code.
  • a second substrate 60 includes: a control module (not shown) electrically coupled to the storage unit 110, the control module reads the display parameters stored by the storage unit 110, and adjusts the The driving parameters of the display module are electrically coupled to the first substrate 50 through a serial peripheral device interface 150; and an integrated circuit bus 140 electrically coupled to a timing control unit 120 and a programmable gamma The calibrated buffer circuit unit 130.
  • a control module (not shown) electrically coupled to the storage unit 110, the control module reads the display parameters stored by the storage unit 110, and adjusts the The driving parameters of the display module are electrically coupled to the first substrate 50 through a serial peripheral device interface 150; and an integrated circuit bus 140 electrically coupled to a timing control unit 120 and a programmable gamma The calibrated buffer circuit unit 130.
  • the method further includes: a timing control unit 120, configured to control a sequence of pixel display, and transmit the signal to a driving unit on the display module 160; a programmable gamma correction buffer circuit unit 130, by a software dynamic Detect and adjust the voltage; a serial peripheral interface 150, electrical points
  • the integrated circuit bus 140 is electrically coupled to the timing control unit 120 and the programmable gamma correction buffer circuit unit 130, respectively.
  • the storage unit 110 further includes a gamma correction code 112, a common electrode voltage setting code 114, and a compensation display module luminance distribution unevenness module code 116.
  • the common electrode voltage setting code 114 is electrically coupled to the gamma correction code 112 and the compensation display module luminance distribution unevenness module code 116, respectively.
  • the timing control unit 120 further includes a compensation display module luminance distribution unevenness module 122.
  • the programmable gamma correction buffer circuit unit 130 further includes a gamma correction module 132 and a common electrode voltage setting module 134.
  • a driving device 11 of a display device includes: a display module 160; a first substrate 50 includes: a storage unit 110, and the display module 160 is electrically
  • the storage unit 110 stores the display parameters of the display module 160.
  • the second substrate 60 includes a control module (not shown) electrically coupled to the storage unit 110.
  • the control module reads The display parameter stored in the storage unit 110 is adjusted to the driving parameter of the display module 160, and a timing control unit 120 is configured to control the order in which a pixel appears, and transmit the signal to the display module 160.
  • a driving unit a programmable gamma correction buffer circuit unit 130, wherein the voltage is adjusted by a software dynamic detection; a serial peripheral device interface 150 electrically coupled to the timing control unit 120 and the storage unit
  • An integrated circuit bus 140 electrically coupled to the timing control unit 120 and the programmable gamma correction buffer circuit unit 130; and a power control unit (not shown) for providing power to the power supply
  • the timing control unit 120 wherein the storage unit 110 further includes a gamma correction code 112, a common electrode voltage setting code 114, and a compensation display module brightness distribution unevenness module code 116; the common electrode voltage setting code 114
  • the gamma correction code 112 and the compensation display module brightness distribution unevenness module code 116 are coupled to each other;
  • the timing control unit 120 further includes a compensation display module brightness distribution unevenness module 122;
  • the correction buffer circuit unit 130 further includes a gamma correction module 132 and a common electrode voltage setting module 134; the gamm
  • the optimal common electrode voltage is adjusted for each panel, and the common electrode voltage setting code 114 is stored in the storage unit 110, and then gamma is performed. Correcting and mura compensation, and storing the generated gamma correction code 112 and the compensation display module luminance distribution unevenness module code 116 in the storage unit 110, the different codes are stored in different addresses, which is convenient for the timing control unit 120 to read. No mistakes. In this way, the matching information of each panel will follow the panel without deliberately supporting a control panel.
  • a driving method of a display device includes: disposing a storage unit 110 through a first substrate 50, wherein the storage unit 110 stores a gamma Correction code 112, a common electrode voltage setting code 114 and a compensation display module brightness distribution unevenness module code 116; electrically coupled to the storage unit 110 through a control module (not shown) in a second substrate 60, the control module reads the storage
  • the display parameter stored in the unit 110 adjusts the driving parameter of the display module 160; and sets a timing control unit 120 and a programmable gamma correction buffer circuit unit 130, wherein the timing control unit 120 embeds a compensation a display module brightness distribution unevenness module 122, and a programmable gamma correction buffer circuit unit 130 embedding a gamma correction module 132 and a common electrode voltage setting module 134; providing a serial peripheral device interface 150, respectively
  • the timing control unit 120 and the storage unit 110 are coupled to each other; and an integrated circuit bus 140 is electrical
  • the driving method, the providing a serial peripheral device interface 150, electrically coupling the timing control unit 120 and the storage unit 110 respectively includes: timing control when power is on
  • the unit 120 reads the compensation display module brightness distribution unevenness module code 116 in the storage unit 110 according to the storage address through the serial peripheral device interface bus 150, and then transmits the brightness distribution to the compensation display module.
  • the parity module 122 performs data matching.
  • the driving method, the step of providing an integrated circuit bus 140 electrically coupled to the timing control unit 120 and the programmable gamma correction buffer circuit unit 130 respectively includes:
  • the gamma correction code 112 and the common electrode voltage setting code 114 in the memory unit 110 are then retransmitted to the gamma in the programmable gamma correction buffer circuit unit 130 through the integrated circuit bus 140.
  • the correction module 132 and the common electrode voltage setting module 134 perform data matching.
  • the display panel may be, for example, a TN, OCB, or VA type TFT liquid crystal display panel, but is not limited thereto.
  • the display panel of the display device may be a liquid crystal display panel having a curved panel.
  • the display panel may also be, for example, an OLED display panel, a QLED display panel, a curved display panel, or other display panel.
  • the application can also improve the panel-to-panel difference caused by the process, thereby improving the overall product quality without additional difficulty in packaging or calculation.

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Abstract

一种显示装置的驱动装置(11)及其驱动方法,驱动装置(11)包括:第一基板(50)包括:存储单元(110),与显示模块(160)电性连接,此存储单元(110)存有此显示模块(160)的显示参数,此显示参数为伽玛修正码(112)、共电极电压设定码(114)及补偿显示模块亮度分布不均模块码(116);第二基板(60)包括:控制模块,电性耦接此存储单元(110),此控制模块读取此存储单元(110)储存的此显示参数,调整对此显示模块(160)的驱动参数;其中透过串行外围设备接口(150),电性耦接此第一基板(50);集成电路总线(140),电性分别耦接时序控制单元(120)及可编程伽玛校正缓冲电路单元(130),其可使电路板及控制板分离的机种也改善因制程所造成的面板片间差异,提升整体产品质量,不额外增加包装或运算等难度。

Description

显示装置的驱动装置及其驱动方法 技术领域
本申请涉及一种改善显示装置的驱动装置效能方法,特别是涉及一种显示装置的驱动装置及其驱动方法。
背景技术
液晶显示器(Liquid Crystal Display,LCD)近来已被广泛的运用,随着驱动技术的改良,使其具有低的消耗电功率、薄型量轻、低电压驱动等优点,目前已经广泛的应用在摄录放影机、笔记本电脑、桌上型显示器及各种投影设备上。
且液晶显示装置中通常具有栅极驱动电路、源极驱动电路和像素阵列。像素阵列中具有多个像素电路,每一个像素电路依据栅极驱动电路提供的扫描讯号开启和关闭,并依据源极驱动电路提供的数据讯号,显示数据画面。
而目前大尺寸机种基本都采用电路板(X_Board,XB),控制板(control board,CB)分离的架构,而且主单元对应的软件码分别存在不同的内存中,且均在控制板上。这样存在的问题是:因为制程原因,每片面板(panel)都会有些许差异,如果要让每片面板(panel)都达到最佳的质量,就需要每片面板(panel)搭配独立的伽玛修正、共电极电压设定等,使得开放组件和所述控制板要一一对应,但是这样对于包装、运输和组装都是难题。
发明内容
为了解决上述技术问题,本申请的目的在于,提供一种显示装置的驱动装置及其驱动方法,可使一电路板及一控制板分离的机种也可以改善因制程所造成的面板(panel)片间差异,因而提升整体产品质量,且不额外增加包装或运算等难度。
本申请的目的及解决其技术问题是采用以下技术方案来实现的。依据本申请提出的一种显示装置的驱动装置包括:一第一基板包括:一存储单元,与一显示模块电性连接,所述储存单元存有所述显示模块的显示参数,其中所述显示参数为一伽玛修正码、一共电极电压设定码及一补偿显示模块亮度分布不均模块码;一第二基板包括:一控制模块,电性耦接所述存储单元,所述控制模块读取所述存储单元储存的所述显示参数,调整对所述显示模块的驱动参数;其中透过一串行外围设备接口,电性耦接所述第一基板;以及一集成电路总线,电性分别耦接一时序控制单元及一可编程伽玛校正缓冲电路单元。
本申请的另一目的一种显示装置的驱动方法,包括:透过一第一基板设置一存储单元,其中所 述存储单元存储一伽玛修正码、一共电极电压设定码及一补偿显示模块亮度分布不均模块码;透过一第二基板中一控制模块,电性耦接所述存储单元,所述控制模块读取所述存储单元储存的所述显示参数,调整对所述显示模块的驱动参数;并设置一时序控制单元及一可编程伽玛校正缓冲电路单元,其中所述时序控制单元内嵌一补偿显示模块亮度分布不均模块,及所述可编程伽玛校正缓冲电路单元内嵌一伽玛修正模块及一共电极电压设定模块;提供一串行外围设备接口,电性分别耦接所述时序控制单元及所述存储单元;以及提供一集成电路总线,电性分别耦接所述时序控制单元及所述可编程伽玛校正缓冲电路单元。
本申请的又一目的一种显示装置的驱动装置,包括:一第一基板包括:一存储单元,与一显示模块电性连接,所述储存单元存有所述显示模块的显示参数;一第二基板包括:一控制模块,电性耦接所述储存单元,所述控制模块读取所述存储单元储存的所述显示参数,调整对所述显示模块的驱动参数;一时序控制单元,用以控制一像素显现的顺序,并将讯号传输给所述显示模块上的一驱动单元;一可编程伽玛校正缓冲电路单元,藉由一软件动态侦测而调节电压;一串行外围设备接口,电性分别耦接所述时序控制单元及所述存储单元;一集成电路总线,电性分别耦接所述时序控制单元及所述可编程伽玛校正缓冲电路单元;以及一电源控制单元,用以提供电源给所述时序控制单元;其中所述存储单元更包括一伽玛修正码、一共电极电压设定码及一补偿显示模块亮度分布不均模块码;所述共电极电压设定码电性分别耦接所述伽玛修正码及所述补偿显示模块亮度分布不均模块码;所述时序控制单元更包括一补偿显示模块亮度分布不均模块;所述可编程伽玛校正缓冲电路单元更包括一伽玛修正模块及一共电极电压设定模块;所述伽玛修正模块电性耦接所述共电极电压设定模块。
本申请解决其技术问题还可采用以下技术措施进一步实现。
在本申请的一实施例中,所述存储单元更包括一伽玛修正码、一共电极电压设定码及一补偿显示模块亮度分布不均模块码;所述共电极电压设定码电性分别耦接所述伽玛修正码及所述补偿显示模块亮度分布不均模块码。
在本申请的一实施例中,更包括:一时序控制单元,用以控制一像素显现的顺序,并将讯号传输给所述显示模块上的一驱动单元;一可编程伽玛校正缓冲电路单元,藉由一软件动态侦测而调节电压;一串行外围设备接口,电性分别耦接所述时序控制单元及所述存储单元;以及一集成电路总线,电性分别耦接所述时序控制单元及一可编程伽玛校正缓冲电路单元。
在本申请的一实施例中,所述时序控制单元更包括一补偿显示模块亮度分布不均模块。
在本申请的一实施例中,所述可编程伽玛校正缓冲电路单元更包括一伽玛修正模块及一共电极电压设定模块。
在本申请的一实施例中,所述伽玛修正模块电性耦接所述共电极电压设定模块。
在本申请的一实施例中,所述驱动方法,所述提供一串行外围设备接口,电性分别耦接所述时序控制单元及所述存储单元的步骤包括:通电时,所述时序控制单元通过所述串行外围设备接口总线;根据存储地址先读取所述存储单元里面的所述补偿显示模块亮度分布不均模块码;之后传输到所述补偿显示模块亮度分布不均模块模块进行数据匹配。
在本申请的一实施例中,所述驱动方法,所述提供一集成电路总线,电性分别耦接所述时序控制单元及所述可编程伽玛校正缓冲电路单元的步骤包括:读取所述存储单元里面的所述伽玛修正码及所述共电极电压设定码;之后通过集成电路总线;再传输给所述可编程伽玛校正缓冲电路单元中的所述伽玛修正模块及所述共电极电压设定模块进行数据匹配。
附图说明
图1是范例性的由显示像素阵列形成的液晶显示面板示意图。
图2是显示范例性的显示面板内液晶显示像素相关以及相关的开关组件的等效电容负载示意图。
图3是显示另一范例性的显示面板内液晶显示像素相关以及相关的开关组件的等效电容负载示意图。
图4是本申请一实施例的显示装置示意图。
图5是本申请一实施例的通信架构示意图。
具体实施方式
以下各实施例的说明是参考附加的图式,用以例示本申请可用以实施的特定实施例。本申请所提到的方向用语,例如「上」、「下」、「前」、「后」、「左」、「右」、「内」、「外」、「侧面」等,仅是参考附加图式的方向。因此,使用的方向用语是用以说明及理解本申请,而非用以限制本申请。
附图和说明被认为在本质上是示出性的,而不是限制性的。在图中,结构相似的单元是以相同标号表示。另外,为了理解和便于描述,附图中示出的每个组件的尺寸和厚度是任意示出的,但是本申请不限于此。
在附图中,为了清晰起见,夸大了层、膜、面板、区域等的厚度。在附图中,为了理解和便于描述,夸大了一些层和区域的厚度。将理解的是,当例如层、膜、区域或基底的组件被称作“在”另一组件“上”时,所述组件可以直接在所述另一组件上,或者也可以存在中间组件。
另外,在说明书中,除非明确地描述为相反的,否则词语“包括”将被理解为意指包括所述组件,但是不排除任何其它组件。此外,在说明书中,“在......上”意指位于目标组件上方或者下方,而不意指必须位于基于重力方向的顶部上。
为更进一步阐述本申请为达成预定申请目的所采取的技术手段及功效,以下结合附图及较佳实施例,对依据本申请提出的一种显示装置的驱动装置及其驱动方法,其具体实施方式、结构、特征及其功效,详细说明如后。
本申请的液晶面板可包括一LCD(Liquid Crystal Display)面板包括:开关阵列(thin film transistor,TFT)基板、彩色滤光层(color filter,CF)基板与形成于两基板之间的液晶层或为一OLED(Organic Light-Emitting Diode)面板或一QLED(Quantum Dots Light-Emitting Diode)面板。
在一实施例中,本申请的液晶面板可为曲面型显示面板。
在一实施例中,本申请的主动阵列(TFT)及彩色滤光层(CF)可形成于同一基板上。
图1为范例性的由显示像素阵列形成的液晶显示面板示意图。请参照图1,一种液晶显示面板10包括有一个排列成二维阵列的多个像素22组成的显示模块20。这些像素由多条资料线D1、D2...Dn以及多条栅极线G1、G2...Gm所控制及驱动。每一条数据线的数据讯号是由一数据驱动单元30所提供以及每一条栅极线的栅极讯号是由一栅极驱动单元40所提供。
图2为显示范例性的显示面板内液晶显示像素相关以及相关的开关组件的等效电容负载示意图及图3为显示另一范例性的显示面板内液晶显示像素相关以及相关的开关组件的等效电容负载示意图。请参照图2及图3,每一像素22是与多个电容相关,例如,一个由位于上下层电极间的液晶层电容所形成并与其相关的电容Clc、一个于栅极线讯号通过后维持电压在Vpixel值的额外的电荷储存电容Cst,以及与开关组件(一主动开关,TFT)的栅极端以及源极端相关的电容Cgs。一个液晶显示面板的像素总电容值可能会因为像素大小、液晶层的厚度、储存电容器的大小以及其他数种熟悉此技艺者所熟知的技术的影响而产生变化。如第2图,Clc以及Cgs均连接到一共通电压Vcom。如第3图,Cst是连接到一条栅极线。
图4为本申请一实施例的显示装置示意图及图5为本申请一实施例的通信架构示意图。请参照图4及图5,在本申请的一实施例中,一种显示装置的驱动装置11包括:一显示模块160;一第一基板50包括:一存储单元110,与一显示模块160电性连接,所述储存单元110存有所述显示模块160的显示参数,其中所述显示参数为一伽玛修正码112、一共电极电压设定码114及一补偿显示模块亮度分布不均模块码116;一第二基板60包括:一控制模块(图未示),电性耦接所述存储单元110,所述控制模块读取所述存储单元110储存的所述显示参数,调整对所述显示模块的驱动参数;其中透过一串行外围设备接口150,电性耦接所述第一基板50;以及一集成电路总线140,电性分别耦接一时序控制单元120及一可编程伽玛校正缓冲电路单元130。更包括:一时序控制单元120,用以控制一像素显现的顺序,并将讯号传输给所述显示模块160上的一驱动单元;一可编程伽玛校正缓冲电路单元130,藉由一软件动态侦测而调节电压;一串行外围设备接口150,电性分 别耦接所述时序控制单元120及所述存储单元110;一集成电路总线140,电性分别耦接所述时序控制单元120及所述可编程伽玛校正缓冲电路单元130。
在一实施例中,所述存储单元110更包括一伽玛修正码112、一共电极电压设定码114及一补偿显示模块亮度分布不均模块码116。
在一实施例中,所述共电极电压设定码114电性分别耦接所述伽玛修正码112及所述补偿显示模块亮度分布不均模块码116。
在一实施例中,所述时序控制单元120更包括一补偿显示模块亮度分布不均模块122。
在一实施例中,所述可编程伽玛校正缓冲电路单元130更包括一伽玛修正模块132及一共电极电压设定模块134。
请参照图4及图5,在一实施例中,一种显示装置的驱动装置11,包括:一显示模块160;一第一基板50包括:一存储单元110,与所述显示模块160电性连接,所述储存单元110存有所述显示模块160的显示参数;一第二基板60包括:一控制模块(图未示),电性耦接所述储存单元110,所述控制模块读取所述存储单元110储存的所述显示参数,调整对所述显示模块160的驱动参数、一时序控制单元120,用以控制一像素显现的顺序,并将讯号传输给所述显示模块160上的一驱动单元;一可编程伽玛校正缓冲电路单元130,藉由一软件动态侦测而调节电压;一串行外围设备接口150,电性分别耦接所述时序控制单元120及所述存储单元110;一集成电路总线140,电性分别耦接所述时序控制单元120及所述可编程伽玛校正缓冲电路单元130;以及一电源控制单元(图未示),用以提供电源给所述时序控制单元120;其中所述存储单元110更包括一伽玛修正码112、一共电极电压设定码114及一补偿显示模块亮度分布不均模块码116;所述共电极电压设定码114电性分别耦接所述伽玛修正码112及所述补偿显示模块亮度分布不均模块码116;所述时序控制单元120更包括一补偿显示模块亮度分布不均模块122;所述可编程伽玛校正缓冲电路单元130更包括一伽玛修正模块132及一共电极电压设定模块134;所述伽玛修正模块132电性耦接所述共电极电压设定模块134。
请参照图5,在一实施例中,在生产线,针对每一片面板(panel)去调整最佳共电极电压,将所述共电极电压设定码114存储于存储单元110中,然后进行伽玛校正和mura补偿,并将生成的伽玛修正码112和补偿显示模块亮度分布不均模块码116也存储于存储单元110中,不同的码存储于不同的地址,方便时序控制单元120读取时不会出错。这样,每片面板(panel)的相搭配的信息就会跟随面板(panel),不用刻意配套一控制板。
请参照图4及图5,在本申请的一实施例中,一种显示装置的驱动方法,包括:透过一第一基板50设置一存储单元110,其中所述存储单元110存储一伽玛修正码112、一共电极电压设定码 114及一补偿显示模块亮度分布不均模块码116;透过一第二基板60中一控制模块(图未示),电性耦接所述存储单元110,所述控制模块读取所述存储单元110储存的所述显示参数,调整对所述显示模块160的驱动参数;并设置一时序控制单元120及一可编程伽玛校正缓冲电路单元130,其中所述时序控制单元120内嵌一补偿显示模块亮度分布不均模块122,及所述可编程伽玛校正缓冲电路单元130内嵌一伽玛修正模块132及一共电极电压设定模块134;提供一串行外围设备接口150,电性分别耦接所述时序控制单元120及所述存储单元110;以及提供一集成电路总线140,电性分别耦接所述时序控制单元120及所述可编程伽玛校正缓冲电路单元130。
在一实施例中,所述驱动方法,所述提供一串行外围设备接口150,电性分别耦接所述时序控制单元120及所述存储单元110的步骤包括:通电时,所述时序控制单元120通过所述串行外围设备接口总线150,根据存储地址先读取所述存储单元110里面的所述补偿显示模块亮度分布不均模块码116,之后传输到所述补偿显示模块亮度分布不均模块122进行数据匹配。
在一实施例中,所述驱动方法,所述提供一集成电路总线140,电性分别耦接所述时序控制单元120及所述可编程伽玛校正缓冲电路单元130的步骤包括:读取所述存储单元110里面的所述伽玛修正码112及所述共电极电压设定码114,之后通过集成电路总线140再传输给所述可编程伽玛校正缓冲电路单元130中的所述伽玛修正模块132及所述共电极电压设定模块134进行数据匹配。
在一实施例中,所述显示面板可例如为采用TN、OCB、VA型TFT液晶显示面板,但并不限于此。所述显示装置的显示面板可以为具有曲面面板的液晶显示面板。其中,显示面板还可例如为OLED显示面板、QLED显示面板、曲面显示面板或其他显示面板。
本申请可使一电路板及一控制板分离的机种也可以改善因制程所造成的面板(panel)片间差异,因而提升整体产品质量,且不额外增加包装或运算等难度。
“在一些实施例中”及“在各种实施例中”等用语被重复地使用。所述用语通常不是指相同的实施例;但它亦可以是指相同的实施例。“包含”、“具有”及“包括”等用词是同义词,除非其前后文意显示出其它意思。
以上所述,仅是本申请的实施例而已,并非对本申请作任何形式上的限制,虽然本申请已以具体实施例揭露如上,然而并非用以限定本申请,任何熟悉本专业的技术人员,在不脱离本申请技术方案范围内,当可利用上述揭示的技术内容作出些许更动或修饰为等同变化的等效实施例,但凡是未脱离本申请技术方案的内容,依据本申请的技术实质对以上实施例所作的任何简单修改、等同变化与修饰,均仍属于本申请技术方案的范围内。

Claims (20)

  1. 一种显示装置的驱动装置,包括:
    一第一基板包括:
    一存储单元,与一显示模块电性连接,所述储存单元存有所述显示模块的显示参数,其中所述显示参数为一伽玛修正码、一共电极电压设定码及一补偿显示模块亮度分布不均模块码;
    一第二基板包括:
    一控制模块,电性耦接所述存储单元,所述控制模块读取所述存储单元储存的所述显示参数,调整对所述显示模块的驱动参数;其中透过一串行外围设备接口,电性耦接所述第一基板;以及一集成电路总线,电性分别耦接一时序控制单元及一可编程伽玛校正缓冲电路单元。
  2. 如权利要求1所述的显示装置的驱动装置,其中,所述存储单元更包括一伽玛修正码、一共电极电压设定码及一补偿显示模块亮度分布不均模块码。
  3. 如权利要求2所述的显示装置的驱动装置,其中,所述共电极电压设定码电性分别耦接所述伽玛修正码及所述补偿显示模块亮度分布不均模块码。
  4. 如权利要求1所述的显示装置的驱动装置,更包括:一时序控制单元,用以控制一像素显现的顺序,并将讯号传输给所述显示模块上的一驱动单元。
  5. 如权利要求4所述的显示装置的驱动装置,更包括:一可编程伽玛校正缓冲电路单元,藉由一软件动态侦测而调节电压。
  6. 如权利要求4所述的显示装置的驱动装置,更包括:一串行外围设备接口,电性分别耦接所述时序控制单元及所述存储单元。
  7. 如权利要求5所述的显示装置的驱动装置,更包括:一集成电路总线,电性分别耦接所述时序控制单元及一可编程伽玛校正缓冲电路单元。
  8. 如权利要求1所述的显示装置的驱动装置,所述时序控制单元更包括一补偿显示模块亮度分布不均模块。
  9. 如权利要求1所述的显示装置的驱动装置,所述可编程伽玛校正缓冲电路单元更包括一伽玛修正模块。
  10. 如权利要求9所述的显示装置的驱动装置,所述可编程伽玛校正缓冲电路单元更包括一共电极电压设定模块。
  11. 如权利要求10所述的显示装置的驱动装置,其中,所述伽玛修正模块电性耦接所述共电极电压设定模块。
  12. 一种显示装置的驱动方法,包括:
    透过一第一基板设置一存储单元,其中所述存储单元存储一伽玛修正码、一共电极电压设定码及一补偿显示模块亮度分布不均模块码;
    透过一第二基板中一控制模块,电性耦接所述存储单元,所述控制模块读取所述存储单元储存的所述显示参数,调整对所述显示模块的驱动参数;并设置一时序控制单元及一可编程伽玛校正缓冲电路单元,其中所述时序控制单元内嵌一补偿显示模块亮度分布不均模块,及所述可编程伽玛校正缓冲电路单元内嵌一伽玛修正模块及一共电极电压设定模块;
    提供一串行外围设备接口,电性分别耦接所述时序控制单元及所述存储单元;以及
    提供一集成电路总线,电性分别耦接所述时序控制单元及所述可编程伽玛校正缓冲电路单元。
  13. 如权利要求12所述的显示装置的驱动方法,其中,所述共电极电压设定码电性分别耦接所述伽玛修正码及所述补偿显示模块亮度分布不均模块码。
  14. 如权利要求12所述的显示装置的驱动方法,其中,所述时序控制单元用以控制一像素显现的顺序,并将讯号传输给所述显示模块上的一驱动单元。
  15. 如权利要求12所述的显示装置的驱动方法,其中,所述可编程伽玛校正缓冲电路单元,藉由一软件动态侦测而调节电压。
  16. 如权利要求12所述的显示装置的驱动方法,所述可编程伽玛校正缓冲电路单元更包括一伽玛修正模块。
  17. 如权利要求16所述的显示装置的驱动方法,所述可编程伽玛校正缓冲电路单元更包括一共电极电压设定模块,其中,所述伽玛修正模块电性耦接所述共电极电压设定模块。
  18. 如权利要求12所述的显示装置的驱动方法,其中,所述提供一串行外围设备接口,电性分别耦接所述时序控制单元及所述存储单元的步骤包括:
    通电时,所述时序控制单元通过所述串行外围设备接口总线;
    根据存储地址先读取所述存储单元里面的所述补偿显示模块亮度分布不均模块码;
    之后传输到所述补偿显示模块亮度分布不均模块进行数据匹配。
  19. 如权利要求12所述的显示装置的驱动方法,其中,所述提供一集成电路总线,电性分别耦接所述时序控制单元及所述可编程伽玛校正缓冲电路单元的步骤包括:
    读取所述存储单元里面的所述伽玛修正码及所述共电极电压设定码;
    之后通过集成电路总线;
    再传输给所述可编程伽玛校正缓冲电路单元中的所述伽玛修正模块及所述共电极电压设定模块进行数据匹配。
  20. 一种显示装置的驱动装置,包括:
    一第一基板包括:
    一存储单元,与一显示模块电性连接,所述储存单元存有所述显示模块的显示参数;
    一第二基板包括:
    一控制模块,电性耦接所述储存单元,所述控制模块读取所述存储单元储存的所述显示参数,调整对所述显示模块的驱动参数;
    一时序控制单元,用以控制一像素显现的顺序,并将讯号传输给所述显示模块上的一驱动单元;
    一可编程伽玛校正缓冲电路单元,藉由一软件动态侦测而调节电压;
    一串行外围设备接口,电性分别耦接所述时序控制单元及所述存储单元;
    一集成电路总线,电性分别耦接所述时序控制单元及所述可编程伽玛校正缓冲电路单元;以及
    一电源控制单元,用以提供电源给所述时序控制单元;
    其中,所述存储单元更包括一伽玛修正码、一共电极电压设定码及一补偿显示模块亮度分布不均模块码;所述共电极电压设定码电性分别耦接所述伽玛修正码及所述补偿显示模块亮度分布不均模块码;所述时序控制单元更包括一补偿显示模块亮度分布不均模块;所述可编程伽玛校正缓冲电路单元更包括一伽玛修正模块及一共电极电压设定模块;所述伽玛修正模块电性耦接所述共电极电压设定模块。
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