WO2019049876A1 - Silicon substrate to be used for production of epitaxial silicon thin film, and method for producing same - Google Patents

Abstract

The present invention addresses: the problem of providing a high-quality epitaxial silicon thin film having few defects in the production of an epitaxial silicon thin film using double layer porous silicon (DLPS); and the problem of providing a highly efficient single crystal silicon solar cell or the like at low cost. The problems are solved by a silicon substrate having a double layer porous silicon layer (DLPS) that is composed of a low porosity layer (LPL) and a high porosity layer (HPL), which is configured such that the low porosity layer (LPL) has a surface roughness (Rms) of 0.3 nm or less, said surface roughness being represented by formula (1). (In formula (1), l represents the standard length; and Z(x) represents the height difference from the reference line at the position x.)

Description

Silicon substrate used for manufacturing epitaxial silicon thin film and method for manufacturing the same

The present invention relates to a silicon substrate for manufacturing an epitaxial silicon thin film used for a single crystal silicon solar cell or the like and a method for manufacturing the same.
The present invention also relates to a method of reducing defects, which reduces crystal defects in an epitaxial silicon thin film used for a single crystal silicon solar cell or the like.

As solar cells that generate electric power by converting solar light energy into electric energy, various materials and configurations have been developed with increasing interest in environmental issues.
A single crystal silicon solar cell using a high purity silicon single crystal wafer as a semiconductor substrate has been used since the oldest, and has high energy conversion efficiency, but has a drawback that the cost tends to be high.
A single crystal thin film silicon solar cell has been proposed in which the raw material cost and the like are reduced by thinning the silicon layer.

As a method of manufacturing a single crystal thin film silicon solar cell, a method using double layer porous silicon (DLPS; Double Layer Porous Silicon) has been reported (Non-patent document 1 and Non-patent document 2).
The two-layer porous silicon (DLPS) is a porous silicon formed on a single crystal silicon substrate (wafer) and composed of two layers with different pore densities. The silicon substrate side of DLPS is a high porosity layer (HPL; High Porosity Layer), and the surface side is a low porosity layer (LPL; Low Porosity Layer).
The low porosity layer (LPL) acts as a seed layer for epitaxially growing a silicon thin film thereon, and the high porosity layer (HPL) is a sacrificial layer for exfoliation. The underlying single crystal silicon substrate after peeling off the high porosity layer (HPL) can be reused.

Further, as a method of epitaxially growing a single crystal silicon thin film, there are a physical vapor deposition (PVD) method, a chemical vapor deposition (CVD) method, and the like.
Among CVD methods, a rapid vapor deposition (RVD; Rapid Vapor Deposition) method capable of achieving a growth rate of about 10 times or more compared to the conventional method has been reported (Non-patent Document 3). The RVD method is a method of heating a silicon source to about 2000 ° C., which is much higher than the melting point of silicon, and a film forming speed of about 10 to 20 μm / min can be realized.

The present inventors conducted zone heating recrystallization (ZHR; Zone-Heating Recrystallization) which smoothes the low porosity layer (LPL) surface by scanning the surface of two-layer porous silicon (DLPS) with a lamp heater at high speed. ) The method was reported previously (nonpatent literature 4).
The zone heating recrystallization (ZHR) method is an application of the zone melting recrystallization method described in Patent Literature 1 and Patent Literature 2 and the like. The zone melting recrystallization method is also called zone melting recrystallization (ZMR; Zone-Melting Recrystallization) method, and a layer of amorphous silicon thin film sandwiched between silicon oxide layers at the top and bottom is the melting point of silicon (1414 ° C.) It is a method of improving the crystallinity of the amorphous silicon layer by heating and melting to a temperature exceeding and recrystallizing.
The zone heating recrystallization (ZHR) method is a method of smoothing the low porosity layer (LPL) surface by high-speed scanning and heating the surface of the two-layer porous silicon (DLPS) with a lamp heater. In the ZHR method, an apparatus similar to the apparatus used in the ZMR method can be used.

There is a strong demand for development of a technology for manufacturing highly efficient single crystal silicon solar cells while reducing costs. Since the quality of the single crystal silicon thin film greatly affects the performance as a solar cell, it is possible to manufacture a highly efficient single crystal silicon solar cell by establishing a technology for manufacturing a good single crystal silicon thin film Become.
There is still room for improvement in the quality of the single crystal silicon thin film manufactured by the conventional method, and establishment of a technology for manufacturing a higher quality single crystal silicon thin film is desired.

JP 2001-274084 A Japanese Patent Application Publication No. 2003-160396

The present invention has been made in view of the above background art, and the problem is that the quality is higher in the manufacture of an epitaxial silicon thin film used for a single crystal silicon solar cell or the like using two-layer porous silicon (DLPS). It is an object of the present invention to provide an epitaxial silicon thin film and to provide a highly efficient single crystal silicon solar cell etc. at low cost.

As a result of intensive studies to solve the above-mentioned problems, the inventor of the present invention has found that the low surface roughness of the low porosity layer (LPL) of the two-layer porous silicon (DLPS) is reduced to reduce the surface roughness. It has been found that crystal defects in a silicon thin film formed by epitaxial growth using a porosity layer (LPL) as a seed layer can be reduced.

That is, the present invention is a silicon substrate having a two-layer porous silicon layer composed of a low porosity layer and a high porosity layer for producing an epitaxial silicon thin film,
The present invention provides a silicon substrate characterized in that the surface roughness (R _ms ) represented by the following formula (1) of the low porosity layer is 0.3 nm or less.

In equation (1), l is the reference length, and Z (x) is the height difference from the reference line at position x.

The present invention is also a method for producing a silicon substrate having a two-layer porous silicon layer comprising a low porosity layer and a high porosity layer, for producing an epitaxial silicon thin film,
The surface roughness (R _ms ) represented by the following formula (1) of the low porosity layer is 0.3 nm by subjecting the surface of the low porosity layer to heat treatment by zone heating recrystallization. It is an object of the present invention to provide a method of manufacturing a silicon substrate which is characterized by reducing the temperature to the following.

In equation (1), l is the reference length, and Z (x) is the height difference from the reference line at position x.

The present invention is also a method of reducing defects, which reduces crystal defects in an epitaxial silicon thin film,
Forming a two-layer porous silicon layer comprising a low porosity layer and a high porosity layer on the single crystal silicon substrate by an anodic oxidation method (A);
Heat treating the surface of the low porosity layer by zone heating recrystallization (B);
Forming an epitaxial silicon thin film on the surface of the low porosity layer (C);
To provide a method for reducing defects.

According to the present invention, a higher quality epitaxial silicon thin film can be provided in the manufacture of an epitaxial silicon thin film used for a single crystal silicon solar cell or the like using two-layer porous silicon (DLPS).
The silicon substrate of the present invention can be used not only as a solar cell but also as a substrate for low-cost and high-performance electronic devices such as Si power devices that require high-quality silicon thin films.

In the case of forming an epitaxial silicon thin film by using two-layer porous silicon (DLPS), it is necessary to lower the mechanical strength of the high porosity layer (HPL) to make it easy to peel from the viewpoint of achieving the yield The low porosity layer (LPL), which is a seed layer for thin film growth, is directly linked to the film quality of the growing thin film.
In the present invention, it is possible to achieve both the peeling tendency of the high porosity layer (HPL) and the quality (low defect) of the epitaxial silicon thin film to be formed.
The low defects in the epitaxial silicon thin film reduce the number of recombination centers, and as a result, a highly efficient single crystal silicon solar cell having a long carrier lifetime can be provided. According to the present invention, the thin film The surface of the low porosity layer (LPL) to be the seed layer for growth does not have "surface roughness that causes defects in the epitaxial silicon thin film", so low defects in the epitaxial silicon thin film formed on it are realized Be done.

In the present invention, it has been confirmed that, when the film formation of the epitaxial silicon thin film on the seed layer (LPL) is carried out by the RVD method, a high quality (low defect) thin film can be formed.
The RVD method has high productivity because high-speed film formation of about 10 to 20 μm / min is possible. On the other hand, when film formation is performed at high speed, control of the crystallinity of the thin film tends to be difficult.
In the present invention, high-speed film formation by the RVD method or the like can be achieved by treating the surface of the DLPS which is the base of the epitaxial silicon thin film to a specific surface roughness (R _ms ). A quality epitaxial silicon thin film can be formed.

Also, although the underlying single crystal silicon substrate after peeling off the high porosity layer (HPL) of the two-layer porous silicon (DLPS) can be reused, the silicon substrate (wafer after repeated use) ) Is sufficiently usable as a silicon source of the RVD method even if it can not be reused for DLPS formation due to physical change.
For this reason, in the present invention, if an epitaxial silicon thin film is formed by the RVD method, an expensive silicon wafer can be used without waste.

It is a schematic diagram which shows the manufacturing process of the epitaxial silicon thin film using this invention. It is a FE-SEM (field emission scanning electron microscope) image of the cross section of a two-layer porous silicon (DLPS) layer. It is a schematic diagram which shows the heat processing by the zone heating recrystallization (ZHR) method. It is a graph which shows the relationship of the conditions of the heat processing by a zone heating recrystallization (ZHR) method, (a) surface roughness ( _Rms ), (b) pore diameter ( _Dpore ). It is a graph which shows the XRD spectrum of the silicon thin film formed into a film by rapid vapor deposition (RVD) method. (A) out of plane (b) in plane Is a graph showing the relationship between the surface roughness of the low porosity layer (LPL) and (R _ms) and crystal defects of the epitaxial silicon thin film. Zone Heating recrystallization (ZHR) method by heat treatment conditions and the surface roughness is a graph showing the relationship between (R _ms).

Hereinafter, although this invention is demonstrated, this invention is not limited to the following embodiment, It can deform | transform arbitrarily and can implement.

The present invention relates to a silicon substrate for manufacturing an epitaxial silicon thin film, a method of manufacturing the silicon substrate, and a method of reducing defects that reduce crystal defects in the epitaxial silicon thin film.
The silicon substrate of the present invention is used for applications such as single crystal silicon solar cells and silicon power devices.

A schematic view of an example of a manufacturing process of a single crystal epitaxial silicon thin film utilizing the present invention is shown in FIG.

First, on a single crystal silicon substrate (wafer), a two-layer porous silicon (DLPS) layer consisting of a low porosity layer (LPL) and a high porosity layer (HPL) is formed by anodic oxidation (step (A)) ).

Next, the surface of the low porosity layer (LPL) is heat-treated by the zone heating recrystallization (ZHR) method (step (B)). The heat treatment by the ZHR method reduces the crystal defects in the single crystal epitaxial silicon thin film grown on the surface of the LPL by performing the step (C) described later. That is, a high quality silicon thin film used for a single crystal silicon solar cell etc. can be formed.

After heat treatment by ZHR method, after cleaning with hydrofluoric acid (HF) or the like, LPL is used as a seed layer, and an epitaxial silicon thin film is formed on the surface of LPL (step (C)).
Although step (C) may be performed by any method, it is particularly preferable to be performed by a rapid vapor deposition (RVD) method.

Finally, the epitaxial silicon thin film is peeled off from the single crystal silicon substrate (wafer) using HPL as a sacrificial layer (step (D)). The exfoliated epitaxial silicon thin film can be used for single crystal silicon solar cells and the like. In addition, the wafer after peeling can be collected and reused.

When an epitaxial silicon thin film is manufactured using the silicon substrate of the present invention, a porous structure derived from the LPL portion of DLPS remains as a base in the manufactured epitaxial silicon thin film. Epitaxial silicon thin films manufactured using the silicon substrate of the present invention can be easily distinguished from silicon thin films manufactured by other methods.

The present invention is a defect reduction method for reducing crystal defects in an epitaxial silicon thin film.
In the present invention, by reducing the surface roughness of the LPL by the heat treatment in the step (B), crystal defects in the epitaxial silicon thin film formed in the step (C) can be significantly reduced.

The silicon substrate of the present invention is a substrate for producing an epitaxial silicon thin film.

The silicon substrate of the present invention has a layer of two-layer porous silicon (DLPS) consisting of a low porosity layer (LPL) and a high porosity layer (HPL). FIG. 2 shows an example of a FE-SEM (field emission scanning electron microscope) image of the silicon substrate of the present invention.
The layer of DLPS is formed on a single crystal silicon substrate (wafer) by a known method (for example, the two-step anodic oxidation method described in Non-Patent Document 1 and Non-Patent Document 2).

In the present invention, the surface roughness (R _ms ) represented by the following formula (1) of the low porosity layer (LPL) is 0.3 nm or less.

In equation (1), l is the reference length, and Z (x) is the height difference from the reference line at position x.
Hereinafter, in the present specification, the term "surface roughness" refers to the surface roughness represented by the above-mentioned formula (1).

The surface roughness (R _ms ) of the low porosity layer (LPL) is preferably 0.28 nm or less, more preferably 0.26 nm or less, still more preferably 0.24 nm or less, and 0 It is particularly preferable that the wavelength is 0.22 nm or less.

In the present invention, the low porosity layer (LPL) is a seed layer for forming an epitaxial silicon thin film thereon. By smoothing the surface roughness of the low porosity layer (LPL) to the above range at the nano level, crystal defects in the epitaxial silicon thin film formed on the LPL are sufficiently reduced, By using the thin film, it is possible to manufacture a highly efficient single crystal silicon solar cell or the like.

There is no limitation on the method of making the surface roughness (R _ms ) of LPL in the above range, but in the manufacturing process of a single crystal epitaxial silicon thin film using the present invention, after producing an epitaxial silicon thin film on LPL, HPL Peel off as a sacrificial layer. In order to improve the yield, it is desirable that the HPL is easy to be peeled off and the surface roughness of the LPL is reduced. It is preferable to make surface roughness into the said range by heat-processing by ZHR method for coexistence of these.

The average thickness of LPL is preferably 0.5 μm or more, and particularly preferably 0.8 μm or more. Moreover, it is preferable that it is 5 micrometers or less, and it is especially preferable that it is 3 micrometers or less.
When the average thickness is in the above range, an epitaxial silicon thin film with few defects can be stably formed on LPL. Further, LPL can be used as an antireflective film for a silicon thin film for a solar cell, but when the average thickness is in the above range, the antireflective performance tends to be sufficient.

The average pore diameter of the pores in LPL is preferably 15 nm or more, and particularly preferably 20 nm or more. The thickness is preferably 40 nm or less, and particularly preferably 35 nm or less.
20% or more is preferable and, as for the porosity of LPL, 30% or more is especially preferable. Moreover, 50% or less is preferable and 45% or less is especially preferable.
When the average pore diameter and the porosity are in the above ranges, it is easy to stably form an epitaxial silicon thin film with few defects on the LPL.

Since the high porosity layer (HPL) is a sacrificial layer which is exfoliated after epitaxial silicon thin film formation, it is desirable from the viewpoint of yield that the HPL is easily exfoliated.

The average thickness of the HPL is preferably 200 nm or more, more preferably 250 nm or more, and particularly preferably 300 nm or more. The thickness is preferably 600 nm or less, more preferably 550 nm or less, and particularly preferably 500 nm or less.
When the average thickness is at least the above lower limit, mechanical peeling easily occurs, and the yield is improved. In addition, even if it is thicker than the above upper limit, the ease of peeling does not improve so much, so the thickness of the HPL is sufficient at the above upper limit or less from the viewpoint of cost of anodic oxidation and the like.

The average pore diameter of the pores in the HPL is preferably 15 nm or more, and particularly preferably 20 nm or more. The thickness is preferably 40 nm or less, and particularly preferably 35 nm or less.
50% or more is preferable and, as for the porosity of HPL, 60% or more is especially preferable. Further, 90% or less is preferable, and 80% or less is particularly preferable.
When the average pore diameter and the porosity are in the above ranges, it is easy to peel off and easily manufactured in cost.

The two-layer porous silicon (DLPS) layer of the silicon substrate of the present invention may be entirely composed of silicon, or only the high porosity layer (HPL) may be composed of silicon oxide.
As a method of forming only HPL with silicon oxide, there is a method of forming electrochemically.

The HPL is a sacrificial layer for peeling, and can be mechanically peeled off with a scotch (registered trademark) tape or the like as in the examples described later.
By forming the HPL with silicon oxide, in addition to mechanical peeling, it is also possible to chemically peel the HPL by using, for example, hydrofluoric acid or the like.

The silicon substrate of the present invention is preferably one in which the surface of the low porosity layer (LPL) is heat-treated by the zone heating recrystallization (ZHR) method.
By applying the heat treatment by the ZHR method, the surface roughness (R _ms ) of LPL can be easily reduced to 0.3 nm or less.

The heat treatment by the ZHR method is shown in FIG. In the ZHR method, a sample (a silicon substrate having a DLPS layer) is set in the apparatus so that the LPL side is up, and while the sample is preheated by a bottom heater (BH), gas flows The LPL surface is scanned at high speed by an upper lamp heater (ULH), and heat treatment is selectively applied only to the LPL surface.

When the DLPS layer is formed by the anodic oxidation method, the surface roughness of the LPL tends to be larger as the HPL is thicker. If the HPL is thinly formed, the surface roughness of the LPL will be reduced, but if so, peeling using the HPL as a sacrificial layer becomes difficult.
In the heat treatment by the ZHR method, the LPL surface is selectively heat treated by the upper lamp heater to smooth the LPL surface. For this reason, by using the ZHR method, it is easy to smooth the LPL surface and to reduce the defect of the epitaxial thin film while maintaining the ease (yield) of the HPL peeling.

Assuming that the surface roughness of LPL before heat treatment by ZHR method is R _ms 'and the surface roughness of LPL after heat treatment is R _ms , the percentage of the value obtained by dividing R _ms by R _ms ' is 80% or less It is preferably 70% or less, more preferably 60% or less.
As described above, as the surface roughness of LPL after heat treatment is smaller, defects in the epitaxial silicon thin film deposited on LPL are reduced and a good thin film is obtained, but usually when formed by anodic oxidation The fact that the surface roughness of LPL of (ie, the surface roughness of LPL before heat treatment by the ZHR method) is small means that the HPL is thin (that is, it is difficult to peel off).
Therefore, as the “value obtained by dividing R _ms by R _ms ′” is smaller, it is possible to achieve both the quality of the epitaxial silicon thin film and the ease of separation (yield).

In the heat treatment by the ZHR method, the sample is preheated by the lower heater (BH), but when the amount of heating by the lower heater (BH) is large, the surface roughness of LPL may decrease, but the structural change of DLPS The effect is also on HPL and exfoliation may be difficult. For this reason, it is necessary to prevent excessive heating by the lower heater (BH).
Specifically, the lower heater heating amount represented by the following formula (2) _{(H B)} is preferably at 0KJm ^-2 or more, and more preferably 10KJm ^-2 or more. Further, it is preferably 300KJm ^-2 or less, and more preferably 200KJm ^-2 or less.

The upper lamp heater (ULH) is a line heater using, for example, a tungsten wire or the like.

The output of the upper lamp heater (ULH) is preferably 0.1 kW or more, and more preferably 0.5 kW or more. Moreover, it is preferable that it is 20 kW or less, and it is more preferable that it is 10 kW or less.
The scanning speed of the upper lamp heater (ULH) is preferably 0.1 mm / s or more, and more preferably 0.5 mm / s or more. Moreover, it is preferable that it is 100 mm / s or less, and it is more preferable that it is 50 mm / s or less.
By setting the output and the scanning speed within the above range, it becomes easy to selectively heat only the LPL surface, and the reduction effect of the surface roughness by the ZHR method tends to be large.

The mechanism by which the surface roughness of LPL is reduced by heat treatment by ZHR method is not necessarily clear, but (a) smoothing by surface energy, (b) surface oxidation, (c) structural change including inside It is guessed that it progresses with three factors,.
That is, by performing the heat treatment by the ZHR method, the LPL surface is reconstructed and smoothed so that the surface energy is reduced, but when the amount of heating is large, hydrogen atoms on the LPL surface may be released (note that The hydrogen atoms on the LPL surface are derived from hydrofluoric acid (HF) used for cleaning to dissolve excess SiO ₂ after formation of the DLPS layer by anodic oxidation). The surface oxidation due to the elimination of hydrogen atoms may interfere with the surface smoothing. In addition, when the heating amount is large, structural change may extend to the inside of the DLPS layer, which may also affect the LPL surface.

Since the surface roughness may decrease due to surface oxidation or the like due to desorption of hydrogen atoms, it is effective to control the gas atmosphere when performing heat treatment by the ZHR method.
The heat treatment by the ZHR method prevents oxidation of the surface of the low porosity layer (LPL), and is performed in a hydrogen partial pressure controlled gas atmosphere such that the surface of the low porosity layer (LPL) is not hydrogen terminated. Is preferred.

Specifically, it is desirable that the gas atmosphere does not contain oxygen, and the base gas is preferably an inert gas such as nitrogen, argon or helium.
In addition, it is particularly preferable to carry out in a gas atmosphere containing hydrogen gas at a ratio of 0.01% to 4% based on the above-mentioned inert gas.
In general, commercially available inert gases are contaminated with a slight amount of oxygen of the order of ppm or less as an impurity. This slightly mixed oxygen may affect the surface of LPL, but if the concentration of hydrogen gas is above the above lower limit, oxygen is removed as water by the reaction of hydrogen gas and oxygen as an impurity. Can.
In addition, since the hydrogen gas concentration is below the upper limit, it is below the explosion limit, so no special device is required, and the cost can be suppressed.

After heat treatment by the ZHR method, a silicon thin film is epitaxially grown thereon using LPL as a seed layer.
The deposition rate of the epitaxial silicon thin film is preferably 3 μm / min or more, more preferably 5 μm / min or more, and particularly preferably 10 μm / min or more from the viewpoint of productivity, cost and the like. In addition, in order to obtain a thin film with low defects, 20 μm / min or less is preferable. Usually, it becomes difficult to obtain a thin film with low defects when the deposition rate is at least the above lower limit, but if the surface of the low porosity layer (LPL) in the silicon substrate of the present invention is used as a seed layer, the deposition rate is above Even if it is above the lower limit, low defects are realized, and the features of the present invention can be utilized.

There is no particular limitation on the method of epitaxially growing a silicon thin film, and PVD method or CVD method can be used, but the epitaxial silicon thin film formed by LPL is formed by rapid vapor deposition (RVD) method Is preferred. In the RVD method, the film forming speed is large, and it is easy to form silicon at a high speed as described above.
In the present invention, by processing the underlying LPL surface by the ZHR method or the like, an epitaxial silicon thin film with low defects can be obtained even when the film is formed at a high speed using the RVD method or the like. , Both productivity and quality can be achieved. The silicon substrate of the present invention is particularly well matched to the RVD method which enables film formation at high speed.

In the RVD method, silicon is vaporized by heating a silicon source to a temperature much higher than the melting point of silicon, and silicon is deposited on a substrate placed in a reactor. In the RVD method, silicon can be epitaxially grown at a film forming speed of about 10 to 20 μm / min, which is much faster than the CVD method using gas (such as dichlorosilane) as a silicon source, which leads to cost reduction. .
On the other hand, in the case of such high-speed film formation, the effect of the smoothness of the seed layer on the quality (the amount of defects) of the epitaxial silicon thin film to be formed tends to be large. The effect of reducing the surface roughness of the LPL is likely to be large.

In the film formation by the RVD method, it is preferable to heat the silicon source so as to have a temperature of 1800 ° C. or more and 2200 ° C. or less and the temperature of the substrate 900 ° C. or more and 1200 ° C. or less. In addition, it is preferable that the pressure in the reactor be reduced to 5 × 10 ⁻⁴ Pa or less.
The deposition time is preferably 0.1 seconds to 10 seconds.

By forming a film under the above conditions, a silicon thin film of about 5 to 20 μm can be epitaxially grown on a silicon substrate of the present invention.

The epitaxial silicon thin film formed into a film by the RVD method etc. can be used for manufacture of a single crystal silicon solar cell etc. The energy conversion efficiency of the single crystal silicon solar cell depends on the quality of the epitaxial silicon thin film. The epitaxial silicon thin film with few crystal defects provides a highly efficient single crystal silicon solar cell.

In the manufacture of an epitaxial silicon thin film using two-layer porous silicon (DLPS), the surface of the seed layer, low porosity layer (LPL) is smoothed at the nano level to allow growth of the epitaxial silicon thin film thereon. It is possible to dramatically reduce defects.

The crystal defects of the epitaxial silicon thin film can be evaluated, for example, by electron spin resonance (ESR) as in the examples described later.

The epitaxial silicon thin film formed on the substrate of the present invention is easily peeled off by ultrasonic treatment or roll to roll method, and is obtained as a self-supporting 40 μm thick single crystal silicon. If the raw material is p-type, p-type silicon can be obtained, and then a solar cell can be obtained by pn junction formation, electrode deposition, and the like in the same manner as in a conventional single crystal silicon solar cell manufacturing process.

EXAMPLES The present invention will be more specifically described below with reference to examples and comparative examples, but the present invention is not limited to these examples as long as the gist thereof is not exceeded.

Example 1
<Formation of Two-Layer Porous Silicon (DLPS) Layer>
Two-step anodic oxidation was applied to a p-type single crystal Si (100) wafer (1 to 4 mΩ · cm) using a galvanostat apparatus (YR 6163, Advantest) with a platinum mesh as a cathode. A 1: 1 mixed solution of 48% by mass hydrofluoric acid (Wako Pure Chemical Industries, Ltd.) and 95% ethanol (Kanto Chemical Co., Ltd.) was used as the electrolytic solution. After forming LPL at ² mA / cm ² for 415 s, HPL was formed at 200 mA / cm ² for 5 s to fabricate a silicon substrate having DLPS.

The thickness of LPL was about 1 μm, and the thickness of HPL was about 400 nm. The thickness of this HPL is thicker than the value (about 300 nm) previously reported by the present inventors in Non-Patent Document 4 (that is, it is easy to peel but the surface roughness tends to be large).

<Heat treatment by zone heating recrystallization (ZHR) method>
After cleaning the silicon substrate having the DLPS with 10% by mass hydrofluoric acid and removing the oxide layer on the surface, a heat treatment by ZHR method was applied using the apparatus shown in FIG.

Under a nitrogen atmosphere (15 L / min), after preheating the silicon substrate having the DLPS with the lower heater (BH) for 1 minute, the LPL surface was scanned by the upper lamp heater (ULH) using a tungsten wire.
The output of the lower heater (BH) was adjusted within the range of 0 to 17.9 kW, and the lower heater heating amount (H _B ) was calculated by the equation (2).
The output of the upper lamp heater (ULH) was 2.9 kW, and the scanning speed (v _scan ) was adjusted in the range of 1 to 26 mm / s.

The surface or cross section of DLPS is observed by a field emission scanning electron microscope (FE-SEM) (JEOL JEM-6301FZ), and the surface roughness (R _ms ) defined by the above equation (1) is an atomic force microscope (Atomic Force Microscope; AFM) (Bruker MultiMode N3-IHA SPA System).

<Film formation of silicon thin film by rapid vapor deposition (RVD) method>
After the heat treatment by the ZHR method, the silicon substrate having the DLPS was again washed with 10% by mass hydrofluoric acid to remove the oxide layer on the surface, and then the silicon thin film was formed by the RVD method. As an apparatus of the RVD method, the same one as described in Non-Patent Document 3 was used.

The pressure in the reactor provided with the silicon substrate having DLPS was reduced to a pressure lower than 4.0 μTorr (5.3 × 10 ⁻⁴ Pa), and then the temperature of the silicon substrate having DLPS was raised to 1100 ° C. By heating the silicon source n-type silicon wafer to 2000 ° C., the vaporized silicon was deposited on the LPL of the silicon substrate having the DLPS.
It was possible to deposit a silicon thin film of about 9 μm with a deposition time of 1 minute.

<Peeling of silicon thin film>
The silicon thin film obtained on the silicon substrate having DLPS was peeled off with a Scotch (registered trademark) tape, with a portion of HPL as a sacrificial layer.

The crystal orientation of the surface and the cross section of the silicon thin film was observed by an FE-SEM or an X-Ray Diffraction (XRD) apparatus (PANalytical X'Pert-Pro-MRDBruker MultiMode N3-IHA SPA System).
The surface of the silicon thin film was observed by electron spin resonance (ESR) to evaluate crystal defects on the surface. JES-FA100 of JEOL (Nippon Denshi) was used for the measurement of ESR.

Comparative Example 1
After forming a two-layer porous silicon (DLPS) layer on a p-type single crystal Si (100) wafer and washing with hydrofluoric acid, a silicon thin film was formed by RVD without heat treatment by ZHR. In the same manner as in Example 1, a silicon thin film was produced and peeled off from the substrate.

[result]
(A) LPL surface roughness (R _ms ) and (b) LPL pore diameter (D _pore ) with respect to lower heater heating amount (H _B ) at each scanning speed (v _scan ) in heat treatment by ZHR method The dependencies are shown in FIG.
When the heat treatment by the ZHR method was performed, the surface roughness (R _ms ) was reduced as compared to the case where the heat treatment was not performed. Also, the pore diameter _{(D pore)} is with increasing lower heater heating amount _{(H B),} reduced, increased, it showed a trend reduction.
The surface roughness (R _ms ) and the pore diameter (D _pore ) both behaved differently depending on whether the upper lamp heater (ULH) was scanned or not.

As described above, changes in surface roughness (R _ms ) and pore diameter (D _pore ) proceeded by three factors: “smoothing due to surface energy”, “surface oxidation”, and “structural change including inside” it is conceivable that. The surface was smoothed in the direction of decreasing the surface energy, and surface oxidation due to hydrogen desorption proceeded as the lower heater heating amount (H _B ) increased, but not only surface oxidation but also the structural change of the entire DLPS proceeded it is conceivable that. This is because the greater the heating amount, the deeper the melting depth by the upper lamp heater (ULH), and this changes the structure not only on the outermost surface but also on the deep side of the DLPS, and the surface roughness (R _ms ) and It is believed that the _pore size ( _Dpore ) has decreased again.

An example of the XRD spectrum of the silicon thin film formed on LPL by the RVD method is shown in FIG. Since a peak is shown only at (400) as shown in FIG. 5 (a) and a four-fold symmetry is shown for (220) as shown in FIG. 5 (b), epitaxial growth is extremely fast It can be seen that the single crystal silicon thin film was successfully produced.
Under the experimental conditions not shown in FIG. 5, a spectrum substantially similar to that of FIG. 5 was obtained, and a single crystal silicon thin film was obtained.

FIG. 6 shows the relationship between the surface roughness (R _ms ) of the low porosity layer (LPL) and the crystal defects of the epitaxial silicon thin film.
The smaller the surface roughness (R _ms ), the smaller the crystal defects in the silicon thin film, and the heat treatment by the ZHR method is performed to reduce the surface roughness of the LPL, whereby the crystal of the silicon thin film formed by the RVD method. It was suggested that the grain boundaries were reduced, and a good thin film with few crystal defects could be formed.

Example 2
In the same manner as in Example 1 except that the atmosphere of the introduced gas was changed, the DLPS was subjected to a heat treatment by the ZHR method, and the surface roughness (R _ms ) was measured.
The introduced gas was carried out with three types of (a) nitrogen, (b) hydrogen / nitrogen = 3/97 (volume ratio), and (c) hydrogen / nitrogen = 5/95 (volume ratio).
The scanning speed (v _scan ) of the upper lamp heater (ULH) was fixed at 5 mm / s, and the output of the lower heater (BH) was adjusted in the range of 0 to 17.9 kW.
In Example 2, the gas flow path of the apparatus was improved to suppress the oxygen inflow due to the back diffusion of the air.

The dependence of the surface roughness (R _ms ) of LPL on the total heating amount (H _B + H _L ) during the heat treatment by the ZHR method is shown in FIG.
Note that although H _L indicates the heating amount by the upper lamp heater (ULH), most of the heating amount is due to the lower heater (BH), so the value of H _B + H _L is almost the same as the value of H _B does not change.

The surface roughness (R _ms ) of LPL behaves differently depending on the atmosphere of the introduced gas, and as the amount of hydrogen in the introduced gas increases, the minimum value of the surface roughness (R _ms ) shifts to the lower heating side There was a trend towards

Example 3
(1) A silicon thin film 1 having a thickness of about 48 μm was obtained by an RVD method using a silicon substrate obtained by heat-treating DLPS by ZHR method under the following conditions.

<Conditions for producing silicon thin film 1>
With respect to the substrate heated to 1200 ° C., the p-type silicon raw material was evaporated by heating to 2000 ° C. or more under vacuum. The vapor deposition of 8 to 11 μm / 1 min was performed 5 times once to obtain a silicon thin film of 48 μm.

On the silicon thin film 1 thus obtained, a sample in which Al ₂ O ₃ was deposited about 20 nm by ALD as a coating film was obtained.
When the lifetime of this sample was measured by a lifetime measuring apparatus (manufactured by SEMILAB, WT-2000 PVN), the lifetime was about 70 μs.

(2) The silicon thin film 2 having a thickness of about 63 μm was obtained by the RVD method using the silicon substrate obtained without performing the heat treatment by the ZHR method on the DLPS under the following conditions.

<Conditions for producing silicon thin film 2>
With respect to the substrate heated to 1200 ° C., the p-type silicon raw material was evaporated by heating to 2000 ° C. or more under vacuum. A deposition of 8 to 11 μm / 1 min was performed six times once to obtain a silicon thin film of 63 μm.

The lifetime of the silicon thin film 2 measured in the same manner as the silicon thin film 1 was about 36 μs.

Generally, the thicker the film thickness is, the longer the lifetime becomes longer, but the silicon thin film 1 subjected to the heat treatment by the ZHR method is thinner than the silicon thin film 2 not subjected to the heat treatment by the ZHR method. The lifetime was long.
This suggests that the heat treatment by the ZHR method is effective in improving the quality of the silicon thin film.

The process for producing an epitaxial silicon thin film using the present invention can produce a silicon thin film for a single crystal silicon solar cell with high efficiency at low cost. Therefore, the silicon substrate manufactured according to the present invention is widely used as a substrate for single-crystal silicon solar cells for general household use, factory use, etc., a substrate for electronic devices such as Si power devices, and the like.

Claims (18)

1. A silicon substrate having a two-layer porous silicon layer comprising a low porosity layer and a high porosity layer for producing an epitaxial silicon thin film,
   The silicon substrate characterized in that the surface roughness (R _ms ) represented by the following formula (1) of the low porosity layer is 0.3 nm or less.
   

   

   [In equation (1), l is a reference length, and Z (x) is the height difference from the reference line at position x. ]
2. The silicon substrate according to claim 1, wherein the epitaxial silicon thin film is formed by a rapid vapor deposition method.
3. The silicon substrate according to claim 1 or 2, wherein the surface of the low porosity layer is heat-treated by a zone heating recrystallization method.
4. The silicon substrate according to any one of claims 1 to 3, wherein the average thickness of the high porosity layer is 200 nm or more.
5. The silicon substrate according to any one of claims 1 to 4, wherein only the high porosity layer of the two-layered porous silicon layer is composed of silicon oxide.
6. The silicon substrate according to claim 5, wherein the silicon oxide is electrochemically formed.
7. The silicon substrate according to any one of claims 1 to 6, which is for single crystal silicon solar cells.
8. A method for producing a silicon substrate having a two-layer porous silicon layer comprising a low porosity layer and a high porosity layer, for producing an epitaxial silicon thin film,
   The surface roughness (R _ms ) represented by the following formula (1) of the low porosity layer is 0.3 nm by subjecting the surface of the low porosity layer to heat treatment by zone heating recrystallization. A manufacturing method of a silicon substrate characterized by lowering to the following.
   

   

   [In equation (1), l is a reference length, and Z (x) is the height difference from the reference line at position x. ]
9. 9. The heat treatment according to claim 8, wherein the heat treatment is performed in a gas atmosphere controlled to a partial pressure of hydrogen such that oxidation of the surface of the low porosity layer is prevented and the surface of the low porosity layer is not hydrogen terminated. Method of manufacturing silicon substrate.
10. 10. The method of manufacturing a silicon substrate according to claim 8, wherein the heat treatment is performed in a gas atmosphere containing hydrogen gas at a ratio of 0.01% to 4%.
11. The method for producing a silicon substrate according to any one of claims 8 to 10, wherein only the high porosity layer of the two-layered porous silicon layer is composed of silicon oxide.
12. The method for producing a silicon substrate according to claim 11, wherein the silicon oxide is electrochemically formed.
13. The method for manufacturing a silicon substrate according to any one of claims 8 to 12, wherein the silicon substrate is a silicon substrate for a single crystal silicon solar cell.
14. A defect reduction method for reducing crystal defects in an epitaxial silicon thin film, comprising:
    Forming a two-layer porous silicon layer comprising a low porosity layer and a high porosity layer on the single crystal silicon substrate by an anodic oxidation method (A);
    Heat treating the surface of the low porosity layer by zone heating recrystallization (B);
    Forming an epitaxial silicon thin film on the surface of the low porosity layer (C);
    How to reduce defects.
15. The method for reducing defects according to claim 14, wherein the step (C) is performed by a rapid vapor deposition method.
16. The method for reducing defects according to claim 14 or 15, wherein only the high porosity layer of the two-layer porous silicon layer is composed of silicon oxide.
17. The method for reducing defects according to claim 16, wherein the silicon oxide is electrochemically formed.
18. The method for reducing defects according to any one of claims 14 to 17, wherein the single crystal silicon substrate is a silicon substrate for a single crystal silicon solar cell.

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