JPWO2019049876A1 - Silicon substrate used for manufacturing epitaxial silicon thin films and its manufacturing method - Google Patents

Abstract

In the production of epitaxial silicon thin films using two-layer porous silicon (DLPS), the challenge is to provide high-quality epitaxial silicon thin films with few defects, and by extension, to provide highly efficient single crystal silicon solar cells and the like at low cost. In a silicon substrate (DLPS) having a two-layer porous silicon layer composed of a low-porous layer (LPL) and a high-porous layer (HPL), the surface of the low-porous layer (LPL) represented by the following formula (1). The above problem was solved by setting the roughness (Rms) to 0.3 nm or less. [Equation 1] [In the equation (1), l is the reference length, and Z (x) is the height difference from the reference line at the position x. ]

Description

The present invention relates to a silicon substrate for producing an epitaxial silicon thin film used for a single crystal silicon solar cell or the like, and a method for producing the same.
The present invention also relates to a defect reduction method for reducing crystal defects in an epitaxial silicon thin film used in a single crystal silicon solar cell or the like.

Solar cells, which generate electricity by converting the light energy of the sun into electrical energy, have been developed with various materials and configurations in response to growing interest in environmental issues.
Single crystal silicon solar cells that use high-purity silicon single crystal wafers as semiconductor substrates have been used for the longest time, and while they have high energy conversion efficiency, they tend to be costly.
A single crystal thin film silicon solar cell has been proposed in which the cost of raw materials is reduced by making the silicon layer thinner.

As a method for producing a single crystal thin-film silicon solar cell, a method using double-layer porous silicon (DLPS; Double Layer Porous Silicon) has been reported (Non-Patent Document 1 and Non-Patent Document 2).
The two-layer porous silicon (DLPS) is a porous silicon formed on a single crystal silicon substrate (wafer) and composed of two layers having different pore densities. The silicon substrate side of the DLPS is a high porosity layer (HPL; High Porosity Layer), and the surface side is a low porosity layer (LPL; Low Porosity Layer).
The low porosity layer (LPL) acts as a seed layer for epitaxially growing a silicon thin film on it, and the high porosity layer (HPL) is a sacrificial layer for exfoliation. The underlying single crystal silicon substrate after the highly porous layer (HPL) has been peeled off can be reused.

Further, as a method for epitaxially growing a single crystal silicon thin film, there are a physical vapor deposition (PVD) method, a chemical vapor deposition (CVD) method, and the like.
Among the CVD methods, a rapid vapor deposition (RVD) method capable of achieving a growth rate of about 10 times or more that of a conventional method has been reported (Non-Patent Document 3). The RVD method is a method of heating a silicon source to about 2000 ° C., which is much higher than the melting point of silicon, and can realize a film forming speed of about 10 to 20 μm / min.

The present inventors smooth the surface of the low-porous layer (LPL) by scanning the surface of the two-layer porous silicon (DLPS) at high speed with a lamp heater. Zone-Heating Recrystallization (ZHR) ) The method was previously reported (Non-Patent Document 4).
The zone heating recrystallization (ZHR) method is an application of the band melting recrystallization method described in Patent Document 1 and Patent Document 2. The zone melting recrystallization method is also called a zone melting recrystallization (ZMR) method, in which a layer of an amorphous silicon thin film sandwiched between silicon oxide layers is formed at the melting point of silicon (1414 ° C.). This is a method for improving the crystallinity of an amorphous silicon layer by heating and melting to a temperature exceeding the above and recrystallizing.
The zone heating recrystallization (ZHR) method is a method of smoothing the surface of a low-porous layer (LPL) by scanning the surface of two-layer porous silicon (DLPS) at high speed with a lamp heater and heating it. In the ZHR method, a device similar to the device used in the ZMR method can be used.

There is an urgent need to develop a technology for manufacturing highly efficient single crystal silicon solar cells while keeping costs down. Since the quality of a single crystal silicon thin film greatly affects the performance as a solar cell, it is possible to manufacture a highly efficient single crystal silicon solar cell by establishing a technology for manufacturing a high quality single crystal silicon thin film. Become.
There is still room for improvement in the quality of the single crystal silicon thin film produced by the conventional method, and it is desired to establish a technique for producing a higher quality single crystal silicon thin film.

Japanese Unexamined Patent Publication No. 2001-274804 Japanese Unexamined Patent Publication No. 2003-160396

H. Radhakrishnan, R. Martini, V. Depauw, K. Van Nieuwenhuysen, M. Debucquoy, J. Govaerts, I. Gordon, R. Mertens, J. Poortmans, IEEE J. Photovoltaics 4, (2014), 70. J. H. Petermann, D. Zielke, J. Schmidt, F. Haase, E. G. Rojas, R. Brendel, Prog. Photovoltaics: Res. Appl. 20, (2012), 1. Y. Yamasaki, K. Hasegawa, T. Osawa, S. Noda, CrystEngComm, 18, (2016), 3404 A. Lukianov, K. Murakami, C. Takazawa, M. Ihara, Applied Physics Letters 108, (2016), 213904

The present invention has been made in view of the above background technology, and the subject thereof is higher quality in the production of epitaxial silicon thin films used for single crystal silicon solar cells and the like using two-layer porous silicon (DLPS). An object of the present invention is to provide an epitaxial silicon thin film, and thus to provide a highly efficient single crystal silicon solar cell or the like at low cost.

As a result of diligent studies to solve the above problems, the present inventor has reduced the surface roughness of the low porosity layer (LPL) of the two-layer porous silicon (DLPS) at the nano level. It has been found that it is possible to reduce crystal defects of a silicon thin film formed by epitaxial growth using a porous layer (LPL) as a seed layer.

That is, the present invention is a silicon substrate having a two-layer porous silicon layer composed of a low-porous layer and a high-porous layer for producing an epitaxial silicon thin film.
Provided is a silicon substrate characterized in that the surface roughness (R _ms ) of the low porosity layer represented by the following formula (1) is 0.3 nm or less.

In the formula (1), l is the reference length, and Z (x) is the height difference from the reference line at the position x.

Further, the present invention is a method for manufacturing a silicon substrate having a two-layer porous silicon layer composed of a low-porous layer and a high-porous layer for manufacturing an epitaxial silicon thin film.
By heat-treating the surface of the low-porous layer by a zone heating recrystallization method, the surface roughness (R _ms ) of the low-porous layer represented by the following formula (1) is reduced to 0.3 nm. It provides a method for manufacturing a silicon substrate, which is characterized by reducing the amount to the following.

In the formula (1), l is the reference length, and Z (x) is the height difference from the reference line at the position x.

Further, the present invention is a defect reduction method for reducing crystal defects in an epitaxial silicon thin film.
A step (A) of forming a two-layer porous silicon layer composed of a low-porous layer and a high-porous layer on a single crystal silicon substrate by an anodizing method.
The step (B) of heat-treating the surface of the low-porous layer by the zone heating recrystallization method, and
A step (C) of forming an epitaxial silicon thin film on the surface of the low porosity layer,
It provides a method for reducing defects including.

According to the present invention, it is possible to provide a higher quality epitaxial silicon thin film in the production of an epitaxial silicon thin film used for a single crystal silicon solar cell or the like using two-layer porous silicon (DLPS).
The silicon substrate of the present invention can be used not only as a substrate for solar cells but also as a substrate for low-cost and high-performance electronic devices such as Si power devices that require a high-quality silicon thin film.

When forming an epitaxial silicon thin film using two-layer porous silicon (DLPS), it is necessary to reduce the mechanical strength of the highly porous layer (HPL) to make it easier to peel off from the viewpoint of achieving yield. The low-porous layer (LPL), which is the seed layer for thin film growth, is directly linked to the film quality of the growing thin film.
In the present invention, it is possible to achieve both the ease of peeling of the highly porous layer (HPL) and the quality (low defects) of the epitaxial silicon thin film to be formed.
Since the epitaxial silicon thin film has low defects, the number of recombination centers is reduced, and as a result, a highly efficient single crystal silicon solar cell having a long carrier lifetime can be provided. According to the present invention, the thin film Since the surface of the low porosity layer (LPL), which is the seed layer for growth, does not have "surface roughness that causes defects in the epitaxial silicon thin film", low defects of the epitaxial silicon thin film formed on the surface are realized. Will be done.

In the present invention, it has been confirmed that when the epitaxial silicon thin film on the seed layer (LPL) is formed by the RVD method, a high quality (low defect) thin film can be formed.
The RVD method is highly productive because it enables high-speed film formation of about 10 to 20 μm / min. On the other hand, when the film is formed at high speed, it tends to be difficult to control the crystallinity of the thin film.
In the present invention, the surface of DLPS, which is the base of the epitaxial silicon thin film, is treated so as to have a specific surface roughness ( _RMs ), so that the film is high even when high-speed film formation by the RVD method or the like is performed. A high quality epitaxial silicon thin film can be formed.

Further, the underlying single crystal silicon substrate after peeling off the highly porous layer (HPL) of the two-layer porous silicon (DLPS) can be reused, but the silicon substrate (wafer) after being used over and over again. ) Can be sufficiently used as a silicon source for the RVD method even if it cannot be reused for DLPS formation due to physical changes.
Therefore, in the present invention, if the epitaxial silicon thin film is formed by the RVD method, an expensive silicon wafer can be used without waste.

It is a schematic diagram which shows the manufacturing process of the epitaxial silicon thin film using this invention. It is an FE-SEM (field emission scanning electron microscope) image of the cross section of a two-layer porous silicon (DLPS) layer. It is a schematic diagram which shows the heat treatment by the zone heating recrystallization (ZHR) method. It is a graph which shows the relationship between the condition of the heat treatment by the zone heating recrystallization (ZHR) method, (a) surface roughness ( _RMs ), (b) pore diameter (D _pore ). It is a graph which shows the XRD spectrum of the silicon thin film formed by the rapid vapor deposition (RVD) method. (A) out of plane (b) in plane It is a graph showing the relationship between the surface roughness of the low porosity layer (LPL) and (R _ms) and crystal defects of the epitaxial silicon thin film. Zone Heating recrystallization (ZHR) method by heat treatment conditions and the surface roughness is a graph showing the relationship between (R _ms).

Hereinafter, the present invention will be described, but the present invention is not limited to the following embodiments, and can be arbitrarily modified and carried out.

The present invention relates to a silicon substrate for manufacturing an epitaxial silicon thin film, a method for manufacturing the silicon substrate, and a defect reduction method for reducing crystal defects in the epitaxial silicon thin film.
The silicon substrate of the present invention is used for applications such as single crystal silicon solar cells and silicon power devices.

FIG. 1 shows a schematic diagram of an example of a manufacturing process of a single crystal epitaxial silicon thin film using the present invention.

First, a two-layer porous silicon (DLPS) layer composed of a low-porous layer (LPL) and a high-porous layer (HPL) is formed on a single crystal silicon substrate (wafer) by an anodization method (step (A)). ).

Next, the surface of the low porosity layer (LPL) is heat-treated by the zone heating recrystallization (ZHR) method (step (B)). The heat treatment by the ZHR method reduces crystal defects in the single crystal epitaxial silicon thin film that grows on the surface of the LPL by performing the step (C) described later. That is, it is possible to form a high-quality silicon thin film used for a single crystal silicon solar cell or the like.

After heat treatment by the ZHR method, after washing with hydrofluoric acid (HF) or the like, an epitaxial silicon thin film is formed on the surface of the LPL using the LPL as a seed layer (step (C)).
The step (C) may be carried out by any method, but it is particularly preferable to carry out the step (C) by a rapid vapor deposition (RVD) method.

Finally, the epitaxial silicon thin film is peeled from the single crystal silicon substrate (wafer) using the HPL as a sacrificial layer (step (D)). The peeled epitaxial silicon thin film can be used for a single crystal silicon solar cell or the like. In addition, the peeled wafer can be recovered and reused.

When the epitaxial silicon thin film is manufactured using the silicon substrate of the present invention, the porous structure derived from the LPL portion of DLPS remains as a base in the manufactured epitaxial silicon thin film. The epitaxial silicon thin film produced by using the silicon substrate of the above can be easily distinguished from the silicon thin film produced by other methods.

The present invention is a defect reduction method for reducing crystal defects in an epitaxial silicon thin film.
In the present invention, by reducing the surface roughness of the LPL by the heat treatment in the step (B), it is possible to significantly reduce the crystal defects in the epitaxial silicon thin film formed in the step (C).

The silicon substrate of the present invention is a substrate for manufacturing an epitaxial silicon thin film.

The silicon substrate of the present invention has a two-layer porous silicon (DLPS) layer composed of a low-porous layer (LPL) and a high-porous layer (HPL). FIG. 2 shows an example of an FE-SEM (field emission scanning electron microscope) image of the silicon substrate of the present invention.
The DLPS layer is formed on a single crystal silicon substrate (wafer) by a known method (for example, a two-step anodizing method described in Non-Patent Document 1 and Non-Patent Document 2).

In the present invention, the surface roughness (R _ms ) of the low porosity layer (LPL) represented by the following formula (1) is 0.3 nm or less.

In the formula (1), l is the reference length, and Z (x) is the height difference from the reference line at the position x.
Hereinafter, in the present specification, the term "surface roughness" simply means the surface roughness represented by the above formula (1).

The surface roughness (R _ms ) of the low porosity layer (LPL) is preferably 0.28 nm or less, more preferably 0.26 nm or less, further preferably 0.24 nm or less, and 0. It is particularly preferably .22 nm or less.

In the present invention, the low porosity layer (LPL) is a seed layer for forming an epitaxial silicon thin film on the layer. By smoothing the surface roughness of the low porosity layer (LPL) at the nano level until it reaches the above range, crystal defects in the epitaxial silicon thin film formed on the LPL are sufficiently reduced. By using a thin film, it becomes possible to manufacture a highly efficient single crystal silicon solar cell or the like.

The method for keeping the surface roughness (R _ms ) of the LPL within the above range is not limited, but in the manufacturing process of the single crystal epitaxial silicon thin film using the present invention, the HPL is produced after the epitaxial silicon thin film is manufactured on the LPL. Peel off as a sacrificial layer. In order to improve the yield, it is desirable that the HPL is easily peeled off and the surface roughness of the LPL is reduced. In order to achieve both of these, it is preferable to perform heat treatment by the ZHR method so that the surface roughness is within the above range.

The average thickness of the LPL is preferably 0.5 μm or more, and particularly preferably 0.8 μm or more. Further, it is preferably 5 μm or less, and particularly preferably 3 μm or less.
When the average thickness is within the above range, it is easy to stably form an epitaxial silicon thin film having few defects on the LPL. Further, LPL can be used as an antireflection film for a silicon thin film for a solar cell, but when the average thickness is within the above range, the antireflection performance tends to be sufficient.

The average pore diameter of the pores in the LPL is preferably 15 nm or more, and particularly preferably 20 nm or more. Further, it is preferably 40 nm or less, and particularly preferably 35 nm or less.
The porosity of LPL is preferably 20% or more, and particularly preferably 30% or more. Further, 50% or less is preferable, and 45% or less is particularly preferable.
When the average pore size and porosity are within the above ranges, it is easy to stably form an epitaxial silicon thin film having few defects on the LPL.

Since the highly porous layer (HPL) is a sacrificial layer that is peeled off after forming the epitaxial silicon thin film, it is desirable that the HPL is easily peeled off from the viewpoint of yield.

The average thickness of HPL is preferably 200 nm or more, more preferably 250 nm or more, and particularly preferably 300 nm or more. Further, it is preferably 600 nm or less, more preferably 550 nm or less, and particularly preferably 500 nm or less.
When the average thickness is at least the above lower limit, it is easy to peel off mechanically and the yield is improved. Further, even if the thickness exceeds the above upper limit, the ease of peeling does not improve so much. Therefore, from the viewpoint of the cost of anodizing and the like, the thickness of HPL is sufficient at the above upper limit or less.

The average pore diameter of the pores in HPL is preferably 15 nm or more, and particularly preferably 20 nm or more. Further, it is preferably 40 nm or less, and particularly preferably 35 nm or less.
The porosity of HPL is preferably 50% or more, and particularly preferably 60% or more. Further, 90% or less is preferable, and 80% or less is particularly preferable.
When the average pore size and porosity are within the above ranges, it is easy to peel off and it is easy to manufacture in terms of cost.

The two-layer porous silicon (DLPS) layer of the silicon substrate of the present invention may be entirely composed of silicon, or only the highly porous layer (HPL) may be composed of silicon oxide.
As a method of forming only HPL with silicon oxide, there is a method of forming it electrochemically.

The HPL is a sacrificial layer for peeling, and can be mechanically peeled off with a Scotch (registered trademark) tape or the like as in the examples described later.
By constructing the HPL with silicon oxide, in addition to the mechanical peeling, the HPL can be chemically peeled off by using, for example, hydrofluoric acid or the like.

In the silicon substrate of the present invention, it is preferable that the surface of the low porous layer (LPL) is heat-treated by the zone heating recrystallization (ZHR) method.
By performing the heat treatment by the ZHR method, the surface roughness (R _ms ) of LPL can be easily reduced to 0.3 nm or less.

The heat treatment by the ZHR method is shown in FIG. In the ZHR method, a sample (silicon substrate having a DLPS layer) is set in the apparatus so that the LPL side is on the top, and the sample is preheated by a lower heater (Bottom heater; BH) while flowing gas. The LPL surface is scanned at high speed by an upper lamp heater (ULH), and only the LPL surface is selectively heat-treated.

When the DLPS layer is formed by the anodizing method, the thicker the HPL is formed, the larger the surface roughness of the LPL tends to be. If the HPL is formed thin, the surface roughness of the LPL becomes small, but doing so makes it difficult to peel off the HPL as a sacrificial layer.
The heat treatment by the ZHR method smoothes the LPL surface by selectively heat-treating the LPL surface with an upper lamp heater. Therefore, by using the ZHR method, the surface of the LPL is smoothed while maintaining the ease of peeling (yield) of the HPL, and the epitaxial thin film is likely to have low defects.

ZHR _{R ms} the surface roughness of the LPL before heat treatment method ', if the surface roughness of the LPL after heat treatment was set to _{R ms,} the _{R ms R ms'} percentage of value obtained by dividing the is 80% or less It is preferably 70% or less, and particularly preferably 60% or less.
As described above, the smaller the surface roughness of the LPL after the heat treatment, the less the defects of the epitaxial silicon thin film formed on the LPL, and the better the thin film can be obtained. However, usually, when it is formed by anodization If the surface roughness of the LPL (that is, the surface roughness of the LPL before the heat treatment by the ZHR method) is small, it means that the HPL is thin (that is, it is difficult to peel off).
Therefore, the smaller the "value obtained by dividing R _ms by R _ms '", the better the quality of the epitaxial silicon thin film and the ease of peeling (yield) are achieved.

In the heat treatment by the ZHR method, the sample is preheated by the lower heater (BH), but if the amount of heating by the lower heater (BH) is large, the surface roughness of the LPL may decrease, but the structural change of DLPS The effect extends to HPL, which may make peeling difficult. Therefore, it is necessary to prevent excessive heating by the lower heater (BH).
Specifically, the lower heater heating amount represented by the following formula (2) _{(H B)} is preferably at 0KJm ^-2 or more, and more preferably 10KJm ^-2 or more. Further, it is preferably 300KJm ^-2 or less, and more preferably 200KJm ^-2 or less.

The upper lamp heater (ULH) is, for example, a line heater using a tungsten wire or the like.

The output of the upper lamp heater (ULH) is preferably 0.1 kW or more, and more preferably 0.5 kW or more. Further, it is preferably 20 kW or less, and more preferably 10 kW or less.
The scanning speed of the upper lamp heater (ULH) is preferably 0.1 mm / s or more, and more preferably 0.5 mm / s or more. Further, it is preferably 100 mm / s or less, and more preferably 50 mm / s or less.
By setting the output and the scanning speed within the above range, it becomes easy to selectively heat only the LPL surface, and the effect of reducing the surface roughness by the ZHR method tends to be large.

The mechanism by which the surface roughness of LPL is reduced by heat treatment by the ZHR method is not always clear, but (a) smoothing by surface energy, (b) surface oxidation, and (c) structural changes including the inside. It is presumed that it progresses due to three factors.
That is, by performing the heat treatment by the ZHR method, the LPL surface is reconstructed and smoothed so that the surface energy is reduced, but when the amount of heating is large, hydrogen atoms on the LPL surface may be desorbed (note that). , The hydrogen atoms on the surface of the LPL are derived from hydrofluoric acid (HF) used for cleaning to dissolve excess SiO ₂ after the DLPS layer is formed by anodization). Surface oxidation due to desorption of hydrogen atoms may interfere with surface smoothing. Further, when the amount of heating is large, the structural change extends to the inside of the DLPS layer, which may affect the LPL surface.

Since the surface roughness may decrease due to surface oxidation due to desorption of hydrogen atoms, it is effective to control the gas atmosphere when performing the heat treatment by the ZHR method.
The heat treatment by the ZHR method is performed in a gas atmosphere controlled by hydrogen partial pressure so as to prevent oxidation of the surface of the low porosity layer (LPL) and prevent the surface of the low porosity layer (LPL) from being hydrogen-terminated. Is preferable.

Specifically, it is desirable that the gas atmosphere does not contain oxygen, and the base gas is preferably an inert gas such as nitrogen, argon, or helium.
Further, it is particularly preferable to carry out the operation in a gas atmosphere containing the above-mentioned inert gas as a base and hydrogen gas in a proportion of 0.01% or more and 4% or less.
Generally, a commercially available inert gas contains a small amount of oxygen on the order of ppm or less as an impurity. This slightly mixed oxygen may affect the surface of the LPL, but if the concentration of hydrogen gas is equal to or higher than the above lower limit, oxygen is removed as water by the reaction of hydrogen gas and oxygen of impurities. Can be done.
Further, when the concentration of hydrogen gas is not more than the above upper limit, it is not more than the explosion limit, so that no special device is required and the cost can be suppressed.

After the heat treatment by the ZHR method, a silicon thin film is epitaxially grown on the LPL as a seed layer.
From the viewpoint of productivity, cost and the like, the film forming speed of the epitaxial silicon thin film is preferably 3 μm / min or more, more preferably 5 μm / min or more, and particularly preferably 10 μm / min or more. Further, in order to obtain a thin film having low defects, it is preferably 20 μm / min or less. Normally, when the film forming speed is equal to or higher than the above lower limit, it becomes difficult to obtain a thin film having low defects. Even if it is above the lower limit, low defects are realized, and the features of the present invention can be utilized.

The method for epitaxially growing the silicon thin film is not particularly limited, and the PVD method or the CVD method can be used. However, the epitaxial silicon thin film formed on the LPL is formed by the rapid vapor deposition (RVD) method. Is preferable. In the RVD method, the film forming speed is high, and it is easy to form silicon at the high speed as described above.
In the present invention, by treating the LPL surface as a base by the ZHR method or the like, a low-defect epitaxial silicon thin film can be obtained even when a film is formed at a high speed by the RVD method or the like. , Productivity and quality can be compatible. The silicon substrate of the present invention is particularly well matched with the RVD method capable of forming a film at a high speed.

In the RVD method, the silicon source is heated to a temperature much higher than the melting point of the silicon to vaporize the silicon, and the silicon is deposited on the substrate placed in the reactor. In the RVD method, silicon can be epitaxially grown at a film formation rate of about 10 to 20 μm / min, which is significantly faster than the CVD method using gas (dichlorosilane, etc.) as the silicon source, leading to cost reduction. ..
On the other hand, in the case of such high-speed film formation, the smoothness of the seed layer tends to have a large effect on the quality (amount of defects) of the epitaxial silicon thin film to be formed. Therefore, according to the present invention, the seed layer is formed. The effect of reducing the surface roughness of the LPL is likely to be large.

When forming a film by the RVD method, it is preferable to heat the silicon source so that the temperature of the silicon source is 1800 ° C. or higher and 2200 ° C. or lower, and the temperature of the substrate is 900 ° C. or higher and 1200 ° C. or lower. Further, it is preferable to carry out the reaction in a state where the pressure inside the reactor is reduced to 5 × 10 ^-4 Pa or less.
The vapor deposition time is preferably 0.1 seconds or more and 10 seconds or less.

By forming a film under the above conditions, a silicon thin film of about 5 to 20 μm can be epitaxially grown on the silicon substrate of the present invention.

The epitaxial silicon thin film formed by the RVD method or the like can be used for manufacturing a single crystal silicon solar cell or the like. The energy conversion efficiency of a single crystal silicon solar cell depends on the quality of the epitaxial silicon thin film. The epitaxial silicon thin film with few crystal defects provides a highly efficient single crystal silicon solar cell.

In the production of an epitaxial silicon thin film using two-layer porous silicon (DLPS), the surface of the low porous layer (LPL), which is a seed layer, is smoothed at the nano level, so that the epitaxial silicon thin film that grows on the epitaxial silicon thin film is formed. Defects can be dramatically reduced.

Crystal defects in the epitaxial silicon thin film can be evaluated by, for example, an electron spin resonance (ESR) method as in the examples described later.

The epitaxial silicon thin film formed on the substrate of the present invention can be easily peeled off by sonication or the roll-to-roll method to obtain a self-supporting single crystal silicon having a thickness of 40 μm. If the raw material is p-type, p-type silicon is obtained, and then the solar cell is obtained by pn junction formation, electrode deposition, etc. in the same manner as in a normal single crystal silicon solar cell manufacturing process.

Hereinafter, the present invention will be described in more detail with reference to Examples and Comparative Examples, but the present invention is not limited to these Examples as long as the gist thereof is not exceeded.

Example 1
<Formation of 2-layer porous silicon (DLPS) layer>
A galvanostat device (YR6163, Advantest) was used to perform two-step anodization on a p-type single crystal Si (100) wafer (1 to 4 mΩ · cm) using a platinum mesh as a cathode. As the electrolytic solution, a 1: 1 mixed solution of 48% by mass hydrofluoric acid (Wako Pure Chemical Industries, Ltd.) and 95% ethanol (Kanto Chemical Co., Inc.) was used. After forming LPL at ² mA / cm ² , 415 s, HPL was formed at 200 mA / cm ² , 5 s to prepare a silicon substrate having DLPS.

The thickness of LPL was about 1 μm and the thickness of HPL was about 400 nm. The thickness of this HPL is thicker than the value (about 300 nm) in Non-Patent Document 4 previously reported by the present inventors (that is, it is easy to peel off, but the surface roughness tends to be large).

<Heat treatment by zone heating recrystallization (ZHR) method>
The silicon substrate having DLPS was washed with 10% by mass hydrofluoric acid to remove the oxide layer on the surface, and then heat-treated by the ZHR method using the apparatus shown in FIG.

A silicon substrate having DLPS was preheated for 1 minute with a lower heater (BH) under a nitrogen atmosphere (15 L / min), and then the surface of the LPL was scanned with an upper lamp heater (ULH) using a tungsten wire.
The output of the lower heater (BH) was adjusted within the range of 0 to 17.9 kW, and the lower heater heating amount (H _B ) was calculated by the above formula (2).
The output of the upper lamp heater (ULH) was 2.9 kW, and the scanning speed (v _scan ) was adjusted within the range of 1 to 26 mm / s.

The surface and cross section of DLPS, was observed by a field emission scanning electron microscope (FE-SEM) (JEOL JEM -6301FZ), the formula (1) surface defined by the roughness _{(R ms),} atomic force microscopy It was measured by (Atomic Force Microscope; AFM) (Brooker MultiMode N3-IHA SPA System).

<Silicon thin film formation by rapid thin film deposition (RVD) method>
After the heat treatment by the ZHR method, the silicon substrate having DLPS was washed again with 10% by mass hydrofluoric acid to remove the oxide layer on the surface, and then the silicon thin film was formed by the RVD method. As the apparatus for the RVD method, the same equipment as that described in Non-Patent Document 3 was used.

The pressure inside the reactor on which the silicon substrate having DLPS was installed was reduced to a pressure lower than 4.0 μTorr (5.3 × 10 ^-4 Pa), and then the temperature of the silicon substrate having DLPS was raised to 1100 ° C. By heating an n-type silicon wafer, which is a silicon source, to 2000 ° C., vaporized silicon was deposited on the LPL of a silicon substrate having DLPS.
A silicon thin film of about 9 μm could be formed in a film forming time of 1 minute.

<Peeling of silicon thin film>
The silicon thin film obtained on the silicon substrate having DLPS was peeled off with a Scotch (registered trademark) tape using the HPL portion as a sacrificial layer.

The crystal orientation of the surface and cross section of the silicon thin film was observed by an FE-SEM or an X-Ray Diffraction (XRD) device (PANNalytical X'Pert-Pro-MRDBruker MultiMode N3-IHA SPA System).
In addition, the surface of the silicon thin film was observed by electron spin resonance (ESR) to evaluate crystal defects on the surface. JEOL (JEOL Ltd.) JES-FA100 was used for the measurement of ESR.

Comparative Example 1
A two-layer porous silicon (DLPS) layer was formed on a p-type single crystal Si (100) wafer, washed with hydrofluoric acid, and then a silicon thin film was formed by the RVD method without heat treatment by the ZHR method. Made a silicon thin film in the same manner as in Example 1 and peeled off from the substrate.

[result]
During heat treatment ZHR method, lower heater heating amount at each scan rate _{(v scan)} for _{(H B)} of (a) the surface roughness of the LPL _{(R ms)} and (b) LPL pore size _{(D pore)} The dependency is shown in FIG.
When the heat treatment by the ZHR method was performed, the surface roughness (R _ms ) was reduced as compared with the case where the heat treatment was not performed. In addition, the pore diameter (D _pore ) showed a tendency of decrease, increase, and decrease as the lower heater heating amount (H _B ) increased.
Both the surface roughness ( _RMs ) and the pore diameter (D _pore ) behaved differently depending on the presence or absence of scanning of the upper lamp heater (ULH).

Changes in surface roughness (R _ms ) and pore size (D _pore ) proceeded due to three factors: "smoothing by surface energy", "surface oxidation", and "structural change including the inside" as described above. it is conceivable that. Surface energy surface is smoothed in the direction of reducing, the surface oxidation by hydrogen desorption progresses with increasing lower heater heating amount (H _B), not only surface oxidation, structural changes in the overall DLPS proceeded it is conceivable that. This is because the larger the amount of heating, the deeper the melting depth of the upper lamp heater (ULH), which changes the structure not only to the outermost surface of DLPS but also to the deeper part, resulting in surface roughness ( _RMs ) and It is considered that the _pore size (D _pore ) decreased again.

An example of the XRD spectrum of the silicon thin film formed on the LPL by the RVD method is shown in FIG. As shown in FIG. 5 (a), the peak was shown only in (400), and as shown in FIG. 5 (b), the symmetry was shown four times with respect to (220). It can be seen that the single crystal silicon thin film was successfully produced.
Even under experimental conditions not shown in FIG. 5, a spectrum substantially similar to that in FIG. 5 was obtained, and a single crystal silicon thin film was obtained.

Figure 6 shows the relationship between the surface roughness of the low porosity layer (LPL) and (R _ms) and crystal defects of the epitaxial silicon thin film.
The smaller the surface roughness (R _ms ), the fewer crystal defects in the silicon thin film. Crystals of the silicon thin film formed by the RVD method by performing heat treatment by the ZHR method to reduce the surface roughness of the LPL. It was suggested that the grain boundaries were reduced and a good quality thin film with few crystal defects could be formed.

Example 2
The surface roughness (R _ms ) was measured by heat-treating DLPS by the ZHR method in the same manner as in Example 1 except that the atmosphere of the introduced gas was changed.
The introduced gas was (a) nitrogen, (b) hydrogen / nitrogen = 3/97 (volume ratio), and (c) hydrogen / nitrogen = 5/95 (volume ratio).
The scanning speed (v _scan ) of the upper lamp heater (ULH) was fixed at 5 mm / s, and the output of the lower heater (BH) was adjusted within the range of 0 to 17.9 kW.
In Example 2, the gas flow path of the apparatus was improved to suppress the inflow of oxygen due to the back diffusion of the atmosphere.

The total amount of heat during the heat treatment by ZHR method _(H B + H _L) to the surface roughness of the LPL dependencies _{(R ms)} shown in FIG.
Note that _HL indicates the amount of heating by the upper lamp heater (ULH), but since most of the amount of heating is due to the lower heater (BH), the value of H _B + H _L is almost the same as the value of H _B. does not change.

The surface roughness (R _ms ) of LPL behaves differently depending on the atmosphere of the introduced gas, and as the amount of hydrogen in the introduced gas increases, the minimum value of the surface roughness (R _ms ) shifts to the low heating side. There was a tendency to do so.

Example 3
(1) Under the following conditions, a silicon thin film 1 having a thickness of about 48 μm was obtained by the RVD method using a silicon substrate obtained by heat-treating DLPS by the ZHR method.

<Conditions for manufacturing silicon thin film 1>
A p-type silicon raw material was heated to 2000 ° C. or higher under vacuum on a substrate heated to 1200 ° C. for vapor deposition. Evaporation of 8 to 11 μm / 1 min was performed 5 times to obtain a 48 μm silicon thin film.

A sample in which Al ₂ O ₃ was deposited as a coating film at about 20 nm on the obtained silicon thin film 1 by the ALD method was obtained.
When the lifetime of this sample was measured by a lifetime measuring device (WT-2000PVN manufactured by SEMILAB), the lifetime was about 70 μs.

(2) Under the following conditions, a silicon thin film 2 having a thickness of about 63 μm was obtained by the RVD method using a silicon substrate obtained by subjecting DLPS to DLPS without heat treatment by the ZHR method.

<Conditions for manufacturing silicon thin film 2>
A p-type silicon raw material was heated to 2000 ° C. or higher under vacuum on a substrate heated to 1200 ° C. for vapor deposition. Evaporation of 8 to 11 μm / 1 min was performed 6 times to obtain a silicon thin film of 63 μm.

The lifetime of the silicon thin film 2 measured in the same manner as in the case of the silicon thin film 1 was about 36 μs.

Generally, the thicker the film thickness, the longer the lifetime tends to be. However, the silicon thin film 1 subjected to the heat treatment by the ZHR method is thinner than the silicon thin film 2 not subjected to the heat treatment by the ZHR method. The lifetime was long.
This suggests that the heat treatment by the ZHR method is effective in improving the quality of the silicon thin film.

In the manufacturing process of the epitaxial silicon thin film using the present invention, a highly efficient silicon thin film for a single crystal silicon solar cell or the like can be produced at low cost. Therefore, the silicon substrate manufactured by the present invention is widely used as a substrate for a single crystal silicon solar cell for general household use, a factory, etc., a substrate for an electronic device such as a Si power device, and the like.

Claims (18)

A silicon substrate having a two-layer porous silicon layer composed of a low-porous layer and a high-porous layer for producing an epitaxial silicon thin film.
A silicon substrate having a surface roughness (R _ms ) represented by the following formula (1) of the low-porous layer of 0.3 nm or less.
[In the formula (1), l is the reference length, and Z (x) is the height difference from the reference line at the position x. ] The silicon substrate according to claim 1, wherein the epitaxial silicon thin film is formed by a rapid vapor deposition method. The silicon substrate according to claim 1 or 2, wherein the surface of the low-porous layer is heat-treated by a zone heating recrystallization method. The silicon substrate according to any one of claims 1 to 3, wherein the average thickness of the highly porous layer is 200 nm or more. The silicon substrate according to any one of claims 1 to 4, wherein only the highly porous layer of the two-layer porous silicon layer is made of silicon oxide. The silicon substrate according to claim 5, wherein the silicon oxide is electrochemically formed. The silicon substrate according to any one of claims 1 to 6, which is for a single crystal silicon solar cell. A method for manufacturing a silicon substrate having a two-layer porous silicon layer composed of a low-porous layer and a high-porous layer for manufacturing an epitaxial silicon thin film.
By heat-treating the surface of the low-porous layer by a zone heating recrystallization method, the surface roughness (R _ms ) of the low-porous layer represented by the following formula (1) is reduced to 0.3 nm. A method for manufacturing a silicon substrate, which comprises reducing the amount to the following.
[In the formula (1), l is the reference length, and Z (x) is the height difference from the reference line at the position x. ] The eighth aspect of the present invention, wherein the heat treatment is performed in a gas atmosphere controlled to a hydrogen partial pressure so as to prevent oxidation of the surface of the low porosity layer and prevent the surface of the low porosity layer from being hydrogen-terminated. Manufacturing method of silicon substrate. The method for manufacturing a silicon substrate according to claim 8 or 9, wherein the heat treatment is performed in a gas atmosphere containing hydrogen gas at a ratio of 0.01% or more and 4% or less. The method for manufacturing a silicon substrate according to any one of claims 8 to 10, wherein only the highly porous layer of the two-layer porous silicon layer is made of silicon oxide. The method for manufacturing a silicon substrate according to claim 11, wherein the silicon oxide is electrochemically formed. The method for manufacturing a silicon substrate according to any one of claims 8 to 12, wherein the silicon substrate is a silicon substrate for a single crystal silicon solar cell. It is a defect reduction method for reducing crystal defects in an epitaxial silicon thin film.
A step (A) of forming a two-layer porous silicon layer composed of a low-porous layer and a high-porous layer on a single crystal silicon substrate by an anodizing method.
The step (B) of heat-treating the surface of the low-porous layer by the zone heating recrystallization method, and
A step (C) of forming an epitaxial silicon thin film on the surface of the low porosity layer,
Defect reduction method including. The defect reduction method according to claim 14, wherein the step (C) is carried out by a rapid vapor deposition method. The method for reducing defects according to claim 14 or 15, wherein only the highly porous layer of the two-layer porous silicon layer is composed of silicon oxide. The method for reducing defects according to claim 16, wherein the silicon oxide is electrochemically formed. The defect reduction method according to any one of claims 14 to 17, wherein the single crystal silicon substrate is a silicon substrate for a single crystal silicon solar cell.