WO2019047235A1 - Phase modulator and fabrication method therefor, and silicon-substrate electro-optic modulator - Google Patents

Phase modulator and fabrication method therefor, and silicon-substrate electro-optic modulator Download PDF

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Publication number
WO2019047235A1
WO2019047235A1 PCT/CN2017/101286 CN2017101286W WO2019047235A1 WO 2019047235 A1 WO2019047235 A1 WO 2019047235A1 CN 2017101286 W CN2017101286 W CN 2017101286W WO 2019047235 A1 WO2019047235 A1 WO 2019047235A1
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region
type
doped region
type doped
doping
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PCT/CN2017/101286
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French (fr)
Chinese (zh)
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王志仁
周林杰
周砚扬
刘磊
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华为技术有限公司
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Priority to PCT/CN2017/101286 priority Critical patent/WO2019047235A1/en
Priority to CN201780094544.0A priority patent/CN111051969B/en
Publication of WO2019047235A1 publication Critical patent/WO2019047235A1/en

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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/015Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on semiconductor elements having potential barriers, e.g. having a PN or PIN junction
    • G02F1/025Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on semiconductor elements having potential barriers, e.g. having a PN or PIN junction in an optical waveguide structure

Definitions

  • the present application relates to the field of optical signal modulation technologies, and in particular, to a phase modulator and a method for fabricating the same, and a silicon-based electro-optic modulator.
  • an embodiment of the present application provides a phase modulator, including:
  • the PN junction structure including oppositely disposed P regions and N regions; and a PN junction between the P region and the N region;
  • the P-type doped region includes a first P-type doped region and a second P-type doped region, wherein the second P-type doped region is located Between the P region and the first P-type doped region, and a doping concentration of the first P-type doped region is greater than a doping concentration of the second P-type doped region, thereby utilizing the
  • the heavily doped concentration of the first P-type doped region achieves good electrical contact of the phase modulator with the driver circuit and utilizes the second P-type doped region to reduce the P-type doped region close to the PN
  • the doping concentration on one side of the junction structure reduces the optical transmission loss of the phase modulator, thereby reducing the optical transmission loss of the silicon-based electro-optic modulator;
  • the heavily doped concentration of the first N-type doped region achieves good electrical contact of the phase modulator with the driver circuit and utilizes the second N-type doped region to reduce the N-type doped region close to the PN
  • the doping concentration on one side of the junction structure reduces the optical transmission loss of the phase modulator, thereby reducing the optical transmission loss of the silicon-based electro-optic modulator.
  • the doping concentration of the second P-type doping region is greater than the doping concentration of the P region; the doping concentration of the second N-type doping region is greater than the doping of the N region Miscellaneous concentration.
  • the doping concentration of the second P-type doping region is gradually decreased in a direction parallel to the first P-type doping region to the P region to reduce the phase Optical transmission loss due to carrier absorption effects in the modulator.
  • the doping concentration of the second N-type doping region is gradually decreased in a direction parallel to the first N-type doping region to the N region to reduce the phase Optical transmission loss due to carrier absorption effects in the modulator.
  • the doping concentration of the first P-type doping region is on the order of 1*10 20 to ensure good electrical contact between the first P-type doping region and the external driving circuit;
  • the doping concentration of an N-type doping region is on the order of 1*10 20 to ensure good electrical contact of the first N-type doping region and the driving circuit.
  • the doping concentration of the P region is on the order of 1*10 17 -1*10 18
  • the doping concentration of the N region is on the order of 1*10 17 -1*10 18 to The optical transmission loss of the phase modulator is reduced while ensuring the modulation efficiency of the phase modulator.
  • an embodiment of the present application provides a silicon-based electro-optic modulator comprising the phase modulator of any of the above.
  • an embodiment of the present application provides a method for fabricating a phase modulator, including:
  • the silicon wafer comprising a silicon substrate, an isolation layer on a surface of the silicon substrate, and a planar layer on a side of the isolation layer facing away from the silicon substrate;
  • the raised structure comprising a first surface and a second surface and a third surface on opposite sides of the first surface, the first surface being higher than the second a surface and the third surface;
  • the PN junction structure including oppositely disposed P regions and N regions; and a PN junction between the P region and the N region;
  • the second P-type doped region is located in the first P Between the doped region and the P region, and the doping concentration of the second P-doped region is less than the doping concentration of the first P-type doped region; the second N-type doped region Located between the first N-type doped region and the N region, and the doping concentration of the second N-type doped region is less than a doping concentration of the first N-type doped region.
  • a phase modulator fabricated by the method for fabricating a phase modulator according to an embodiment of the present application by dividing the P-type doped region into two portions of the first P-type doping region and the second P-type doping region
  • the doping concentration of the second P-type doping region is smaller than the doping concentration of the first P-type doping region, thereby realizing the using the heavily doped concentration of the first P-type doping region Good electrical contact of the phase modulator with the driver circuit, and using the second P-type doping region to reduce the doping concentration of the P-type doping region near the side of the PN junction structure, lowering the phase modulator
  • the optical transmission loss which in turn reduces the optical transmission loss of the silicon-based electro-optic modulator.
  • the phase modulator fabricated by the phase modulator manufacturing method provided by the embodiment of the present application further divides the N-type doping region into the first N-type doping region and the second N-type doping region. a two-part, wherein a doping concentration of the second N-type doping region is smaller than a doping concentration of the first N-type doping region, thereby realizing utilizing a heavily doped concentration of the first N-type doping region
  • the phase modulator is in good electrical contact with the driving circuit, and uses the second N-type doping region to reduce the doping concentration of the N-type doping region near the side of the PN junction structure, and reduce the phase
  • the optical transmission loss of the modulator which in turn reduces the optical transmission loss of the silicon-based electro-optic modulator.
  • the first The doping concentration of the second P-type doping region is gradually decreased to reduce the optical transmission loss due to the carrier absorption effect in the phase modulator; parallel to the first N-type doping region to the In the direction of the N region, the doping concentration of the second N-type doping region is gradually decreased to reduce the optical transmission loss due to the carrier absorption effect in the phase modulator.
  • forming a second P-type doped region in the second surface and forming a second N-type doped region in the third surface includes:
  • the material of the first mask layer and the second mask layer are different, and the materials of the first mask layer and the third mask layer are different.
  • the material of the first mask layer is silicon nitride, germanium or silicon oxynitride.
  • phase modulator 1 is a schematic structural diagram of a phase modulator according to an embodiment of the present application.
  • phase modulator 2 is a schematic structural diagram of a phase modulator according to another embodiment of the present application.
  • FIG. 3 is a schematic structural diagram of a silicon-based electro-optic modulator according to an embodiment of the present application.
  • FIG. 4 is a flowchart of a method for fabricating a phase modulator according to an embodiment of the present application
  • FIG. 26 are cross-sectional views showing a structure of each step in a method of fabricating a phase modulator according to another embodiment of the present application.
  • phase modulators include a phase modulator (also referred to as a phase shifter), optocouplers on opposite sides of the phase modulator for respectively connecting the input and output, and with the optocoupler and a transmission waveguide between the phase modulators, wherein the phase modulator comprises a PN junction structure and a P-type doped region and an N-type doped region on both sides of the PN junction, wherein the PN junction structure
  • the phase modulator comprises a PN junction structure and a P-type doped region and an N-type doped region on both sides of the PN junction, wherein the PN junction structure
  • the P-region and the N-region including the opposite arrangement and the PN junction between the P-region and the N-region are mainly used for realizing phase modulation of an optical signal
  • the P-doped region and the N-type doped region are mainly used for Electrically connecting an external driving circuit to apply an operating signal to the PN junction structure by using an external driving circuit.
  • the P-type doping is performed in the P-type doping region and the N-type doping region of the phase modulator formed by the prior art.
  • the region is a heavily doped region in which the doping concentration is uniformly distributed, and the N-doped region is also a heavily doped region in which the doping concentration is uniformly distributed, and between the P-doped region and the N-type doped region and the PN junction.
  • the embodiment of the present application provides a phase modulator, as shown in FIG. 1, the phase modulator includes:
  • the PN junction structure 1 includes oppositely disposed P regions 11 and N regions 12, and a PN junction 13 between the P region 11 and the N region 12, wherein the P region 11 is a P-type semiconductor doped region in the PN junction structure, the N region 12 being an N-type semiconductor doped region in the PN junction structure;
  • a P-type doping region 2 electrically connected to the P region 11 , the P-type doping region 2 including a first P-type doping region 21 and a second P-type doping region 22, wherein the second P a doping region 22 is located between the P region 11 and the first P-type doping region 21, and a doping concentration of the first P-type doping region 21 is greater than the second P-type doping region Doping concentration of 22;
  • N-type doped region 3 electrically connected to the N region 12, the N-type doped region 3 includes a first N-type doped region 31 and a second N-type doped region 32, wherein the second N The doped region 32 is located between the first N-type doped region 31 and the N region 12, and the doping concentration of the first N-type doping region 31 is greater than the second N-type doped region Doping concentration of 32.
  • the P-type doping region 2 and the N-type doping region 3 are used for electrically connecting with a driving circuit, thereby passing through the P-type doping region 2 and the N-type doping region. 3 Applying a driving signal supplied from the driving circuit to the PN junction structure 1 to realize phase modulation of the optical signal.
  • the phase modulator provided by the embodiment of the present invention divides the P-type doping region 2 into two parts, the first P-type doping region 21 and the second P-type doping region 22, wherein the The doping concentration of the second P-type doping region 22 is smaller than the doping concentration of the first P-type doping region 21, thereby realizing the phase modulation by using the heavily doped concentration of the first P-type doping region 21.
  • the N-type doping region 3 is divided into a first N-type doping region 31 and a second N-type doping region 32, wherein the doping concentration of the second N-type doping region 32 is similar. Less than the doping concentration of the first N-type doping region 31, thereby achieving good electrical contact between the phase modulator and the driving circuit by using the heavily doped concentration of the first N-type doping region 31, and utilizing the second N
  • the doping region 32 reduces the doping concentration of the N-type doping region 3 near the PN junction structure 1 side, and reduces the optical transmission loss of the phase modulator.
  • the doping concentration of the second P-type doping region 22 is greater than the doping concentration of the P region 11, and the second N-type doping.
  • the doping concentration of the impurity region 32 is greater than the doping concentration of the N region 12 to ensure the bandwidth of the phase modulator on the basis of reducing the optical transmission loss of the phase modulator.
  • the second P-type doping region 22 is in a direction parallel to the first P-type doping region 21 to the P region 11.
  • the doping concentration is gradually reduced to reduce the optical transmission loss due to the carrier absorption effect in the phase modulator.
  • the doping concentration of the second P-type doping region 22 is uniform in a direction parallel to the first P-type doping region 21 to the P region 11. The decrease is such that the second P-type doping region 22 has less influence on the resistance value of the P-type doping region 2, and does not have an excessive influence on the bandwidth of the phase modulator.
  • the second N is in a direction parallel to the first N-type doping region 31 to the N region 12.
  • the doping concentration of the doped region 32 is gradually reduced to reduce the optical transmission loss due to the carrier absorption effect in the phase modulator.
  • the doping concentration of the second N-type doping region 32 is uniform in a direction parallel to the first N-type doping region 31 to the N region 12 The decrease is such that the second N-type doping region 32 has a small influence on the resistance value of the N-type doping region 3, and does not have an excessive influence on the bandwidth of the phase modulator.
  • the phase modulator further includes:
  • the first insulating layer 4 of the PN junction structure 1 Covering the P-type doping region 2, the N-type doping region 3, and the first insulating layer 4 of the PN junction structure 1, the first insulating layer 4 having a first via hole and a second via hole ;
  • the first electrode 5 is used for electrically connecting the driving circuit and the first P-type doping region 21, and the second electrode 6 is for electrically connecting the driving circuit and the first N-type doping region 31,
  • the second insulating layer 7 is used to isolate the silicon substrate 8 and a structure located above the second insulating layer 7.
  • the doping concentration of the first P-type doping region 21 is on the order of 1*10 20 to ensure the first P-type doping region 21 Good electrical contact with the first electrode 5 to achieve good electrical contact of the first P-doped region 21 and the driver circuit.
  • the doping concentration of the first N-type doping region 31 is on the order of 1*10 20 to ensure good electrical contact between the first N-type doping region 31 and the second electrode 6, thereby realizing Good electrical contact of the first N-type doped region 31 with the driver circuit.
  • the phase modulator changes the effective refractive index in the PN junction structure 1 by changing the carrier concentration in the PN junction structure 1 by applying a driving signal, thereby realizing an optical signal.
  • Phase modulation, and the modulation efficiency of the phase modulator increases as the carrier concentration in the PN junction structure 1 increases, and therefore, in one embodiment of the present application, based on any of the above embodiments
  • the doping concentration of the P region 11 is on the order of 1*10 17 -1*10 18 to reduce the optical transmission loss of the phase modulator while ensuring the modulation efficiency of the phase modulator.
  • the embodiment of the present application further provides a silicon-based electro-optic modulator, as shown in FIG. 3, the silicon-based electro-optic modulator includes: a first optical coupler 100 electrically connected to an input terminal for inputting light The signal is divided into two optical signals of the first optical signal and the second optical signal, and the first optical waveguide 200 that is connected to the first optical coupler 100 to transmit the first optical signal is connected to the first optical coupler 100.
  • a second transmission waveguide 300 transmitting the second optical signal
  • a first phase modulator 400 connected to the first transmission waveguide 200
  • a second phase modulator 500 connected to the second transmission waveguide 300
  • a third transmission waveguide 600 connected to the first phase modulator 400
  • a fourth transmission waveguide 700 connected to the second phase modulator 500
  • the second optical coupler 800 The first phase modulator 400 and the second phase modulator 500 are phase modulators provided by any of the above embodiments of the present application.
  • the first optical coupler 100 is configured to divide an input optical signal into a first optical signal and a second optical signal, where the first transmission waveguide 200 is configured to transmit the first optical signal to the first a phase modulator 400, the first phase modulator 400 modulates the first optical signal and outputs the same to the third transmission waveguide 600, and outputs the third transmission waveguide 600 to the second optical coupling
  • the second transmission waveguide 300 is configured to output the second optical signal to the second phase modulator 500, and the second phase modulator 500 modulates the second optical signal and outputs the same
  • the fourth transmission waveguide 700 is output to the second optical coupler 800 via the fourth transmission waveguide 700, and the second optical coupler 800 is configured to transmit the third transmission waveguide 600 and the fourth transmission
  • the optical signals output from the waveguide 700 are combined and output.
  • the phase modulator provided by the embodiment of the present application, the silicon-based electro-optic modulator including the phase modulator, divides the P-type doping region 2 into the first P-type doping region 21 and
  • the second P-type doping region 22 has two portions, wherein a doping concentration of the second P-type doping region 22 is smaller than a doping concentration of the first P-type doping region 21, thereby utilizing the first
  • the heavily doped concentration of a P-type doped region 21 achieves the phase modulator and drive Good electrical contact of the moving circuit, and using the second P-type doping region 22 to reduce the doping concentration of the P-type doping region 2 near the PN junction structure 1 side, reducing the phase modulator Optical transmission loss, which in turn reduces the optical transmission loss of the silicon-based electro-optic modulator.
  • the phase modulator provided by the embodiment of the present application and the silicon-based electro-optic modulator including the phase modulator divide the N-type doping region 3 into the first N-type doping region 31 and the Two portions of the second N-type doping region 32, wherein a doping concentration of the second N-type doping region 32 is smaller than a doping concentration of the first N-type doping region 31, thereby utilizing the first N
  • the heavily doped concentration of the doped region 31 achieves good electrical contact of the phase modulator with the drive circuit and utilizes the second N-type doped region 32 to reduce the N-type doped region 3 near the PN
  • the doping concentration on the side of the junction structure 1 reduces the optical transmission loss of the phase modulator, thereby reducing the optical transmission loss of the silicon-based electro-optic modulator.
  • the embodiment of the present application further provides a method for fabricating a phase modulator. As shown in FIG. 4, the manufacturing method includes:
  • a silicon wafer as shown in FIG. 5, a silicon wafer is provided, the silicon wafer includes a silicon substrate 8, an isolation layer 7 on a surface of the silicon substrate 8, and a side of the isolation layer 7 facing away from the silicon substrate 8.
  • the isolation layer is an insulating layer, such as a silicon dioxide layer, and the planar layer is a silicon material layer.
  • the method for forming a silicon wafer includes: providing a silicon substrate; forming an isolation layer on a surface of the silicon substrate; and facing the isolation layer from the silicon substrate The side surface forms a flat layer.
  • the formation process of the isolation layer may be a deposition process or an oxidation process; the formation process of the planarization layer may also be a deposition process, which is not limited in this application, as the case may be.
  • a part of the flat layer is removed to form a convex structure
  • the convex structure includes a first surface and a second surface and a third surface respectively located on two sides of the first surface a surface, the first surface being higher than the second surface and the third surface comprising:
  • first capping layer Forming a first capping layer on a surface of the flat layer, the first capping layer covering a region where the PN junction structure is to be formed, exposing a region where the P-type doping region and the N-type doping region are to be formed;
  • the raised structure comprising a first surface and a second surface respectively located on opposite sides of the first surface and a third surface, the first surface being higher than the second surface and the third surface, wherein the first surface corresponds to a region where the PN junction structure is to be formed, and the second surface corresponds to a portion to be formed A region of the P-type doped region, the second surface corresponding to a region where the N-type doped region is to be formed.
  • S30 forming a PN junction structure in the first surface, the PN junction structure including oppositely disposed P regions and N regions and a PN junction between the P region and the N region.
  • a PN junction structure is formed in the first surface, the PN junction structure includes oppositely disposed P regions and N regions, and is located in the P region and the N region.
  • a second cover layer 20 is formed on a side of the flat layer 9 facing away from the isolation layer 7, a second cover layer 20 covering a portion of the second surface, the third surface, and a portion of the first surface in which the N region is to be formed, exposing a portion of the first surface where the P region is to be formed, and a portion of the second surface to be formed into the second P-type doped region;
  • a third cover layer 30 is formed on a side of the flat layer 9 facing away from the isolation layer 7, the third cover layer 30 covering the second surface, a portion of the third surface, and the Forming a portion of the P region in the first surface, exposing a portion of the first surface where the N region is to be formed, and a portion of the third surface where the second N-type doping region is to be formed;
  • the N region 12 is formed in a portion of the first surface where the N region is to be formed, and the P region and the N region are Forming the PN junction 13 at a boundary;
  • the third cover layer 30 is removed.
  • forming the first P-type doping region in the second surface includes:
  • a fourth cover layer 40 is formed on the surface of the flat layer 9, the fourth cover layer covering the first surface, the third surface and a portion of the second surface, only exposing the a portion of the second surface to be formed into the first P-type doped region;
  • the fourth P-type doped region is formed on the second surface, and the first P-type doped region 21 is formed on the second surface.
  • the formation process of the first P-type doping region is ion implantation, and the implanted ions are boron.
  • the fourth cover layer 40 is removed.
  • S50 forming a first N-type doping region in the third surface, wherein a doping concentration of the first N-type doping region is greater than a doping concentration of the N region.
  • forming the first N-type doping region in the third surface includes:
  • a fifth cover layer 50 is formed on the surface of the flat layer 9, the fifth cover layer 50 covering the first surface, the second surface and a portion of the third surface, only exposed a portion of the third surface to be formed into the first N-type doped region;
  • the first N-type doped region is formed on a portion of the third surface where the first N-type doping region is to be formed, using the fifth capping layer as a mask.
  • An N-type doped region is formed by ion implantation, and the implanted ions are phosphorus;
  • the fifth cover layer 50 is removed.
  • the order of forming the first P-type doping region and the first N-type doping region may be interchanged, which is not limited in this application. Depending on the situation.
  • S60 forming a second P-type doped region in the second surface, and forming a second N-type in the third surface a doped region, wherein the second P-type doped region is between the first P-type doped region and the P region, and a doping concentration of the second P-type doped region is less than a doping concentration of the first P-type doping region; the second N-type doping region is between the first N-type doping region and the N region, and the second N-type doping region The doping concentration is less than the doping concentration of the first N-type doping region.
  • the doping of the second P-type doping region is in a direction parallel to the first P-type doping region to the P region.
  • the concentration gradually decreases; the doping concentration of the second N-type doped region gradually decreases in a direction parallel to the first N-type doped region to the N region.
  • forming a second P-type doped region in the second surface, and forming a second N-type doped region in the third surface includes :
  • a first mask layer 60 is formed on the first surface of the bump structure, wherein the forming process of the first mask layer may include deposition and etching;
  • a sidewall structure 70 is formed on a side of the convex structure facing the second surface and the third surface, and a projection and a projection of the sidewall structure 70 on the flat layer 9
  • the first P-type doped regions 21 do not overlap and do not overlap the first N-type doped regions 31, wherein, at the second surface, along the first P-type doped regions
  • the thickness of the sidewall structure gradually increases in a direction to the P region; at the third surface, in a direction parallel to the first N-type doping region to the N region, the side The thickness of the wall structure is gradually increased;
  • a second mask layer 80 is formed on a side of the sidewall structure 70 facing away from the flat layer 9, the second mask layer 80 covering the third surface, the first surface And the first P-type doping region 21, exposing the portion of the sidewall structure 70 at the second surface, wherein the forming process of the second mask layer may include depositing and etching;
  • a second P-type doped region 22 is formed in a region of the second surface below the sidewall spacer 70, the second The formation process of the P-type doping region is ion implantation, and the implanted ions are boron;
  • the second mask layer 80 is removed
  • a third mask layer 90 is formed on a side of the sidewall structure 70 facing away from the flat layer 9, the third mask layer 90 covering the second surface, the first surface And the first N-type doping region 31 exposing a portion of the sidewall structure 70 at the third surface;
  • a second N-type doping region 32 is formed in a region of the third surface below the sidewall structure 70, the second The formation process of the N-type doping region is ion implantation, and the implanted ions are phosphorus;
  • the material of the first mask layer and the second mask layer are different, and the materials of the first mask layer and the third mask layer are different.
  • the material of the first mask layer is silicon nitride, germanium or silicon oxynitride
  • the material of the second mask layer is silicon dioxide
  • the third The material of the mask layer is silicon dioxide, but the present application does not limit this, as long as the materials of the first mask layer and the second mask layer are different.
  • the method further includes:
  • the third mask layer 90, the sidewall structure 70, and the first mask layer are sequentially removed. 60.
  • the order of forming the second P-type doping region and the second N-type doping region may be interchanged, which is not limited in this application, as the case may be. And set.
  • the edge can be made The doping concentration of the second P-type doped region gradually decreases in a direction from the first P-type doping region to the PN junction structure.
  • the thickness of the sidewall structure along the direction of the first N-type doping region to the PN junction structure Gradually increasing, therefore, when the second N-type doped region is formed in the third surface by using the sidewall structure and the third mask layer as a mask, the first along the first The doping concentration of the second N-type doped region gradually decreases from the N-type doped region to the direction of the PN junction structure.
  • the manufacturing method further includes:
  • first insulating layer covering the protruding structure, the first insulating layer having a first through hole and a second through hole therein;
  • first electrode is for electrically connecting the driving circuit and the first P-type doping region
  • second electrode is for electrically connecting the driving circuit and the first N-type doping region
  • the phase modulator fabricated by the method for fabricating the phase modulator divides the P-type doped region into the first P-type doped region and the second P-type. Two portions of the doped region, wherein a doping concentration of the second P-type doping region is smaller than a doping concentration of the first P-type doping region, thereby utilizing re-doping of the first P-type doping region
  • the impurity concentration achieves good electrical contact between the phase modulator and the driving circuit, and utilizes the second P-type doping region to reduce the doping concentration of the P-type doping region near the side of the PN junction structure, and reduce The optical transmission loss of the phase modulator, which in turn reduces the optical transmission loss of the silicon-based electro-optic modulator.
  • the phase modulator fabricated by the phase modulator manufacturing method provided by the embodiment of the present application further divides the N-type doping region into the first N-type doping region and the second N-type doping region. a two-part, wherein a doping concentration of the second N-type doping region is smaller than a doping concentration of the first N-type doping region, thereby realizing utilizing a heavily doped concentration of the first N-type doping region
  • the phase modulator is in good electrical contact with the driving circuit, and uses the second N-type doping region to reduce the doping concentration of the N-type doping region near the side of the PN junction structure, and reduce the phase
  • the optical transmission loss of the modulator which in turn reduces the optical transmission loss of the silicon-based electro-optic modulator.
  • the manufacturing method of the phase modulator provided in the embodiment of the present application the forming process of each component structure is widely applied to the fabrication of a CMOS (Complementary Metal Oxide Semiconductor), and therefore, the present application
  • the fabrication method of the phase modulator provided by the embodiment has high stability and reliability.
  • the manufacturing process and the tradition of the phase modulator provided by the embodiment of the present application The VLSI CMOS process is compatible and requires no special processes, which facilitates large-scale manufacturing and cost reduction of the device.

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  • Nonlinear Science (AREA)
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  • Optical Modulation, Optical Deflection, Nonlinear Optics, Optical Demodulation, Optical Logic Elements (AREA)

Abstract

A phase modulator and a fabrication method therefor, and a silicon-substrate electro-optic modulator. A P-type doped region (2) is divided by the phase modulator into a first P-type doped region (21) and a second P-type doped region (22); an N-type doped region (3) is divided into a first N-type doped region (31) and a second N-type doped region (32), wherein the doping concentration of the second P-type doped region (22) is smaller than that of the first P-type doped region (21), and the doping concentration of the second N-type doped region (32) is smaller than that of the first N-type doped region (31), thus achieving good electrical contact between the phase modulator and a driving circuit by using the heavy doping concentrations of the first P-type doped region (21) and the first N-type doped region (31), as well as reducing the doping concentration of the P-type doped region (2) at one side close to a PN junction structure (1) by using the second P-type doped region (22), reducing the doping concentration of the N-type doped region (3) at one side close to the PN junction structure (1) by using the second N-type doped region (32), and reducing the optical transmission loss of the phase modulator, thereby reducing the optical transmission loss of the silicon-substrate electro-optic modulator.

Description

相位调制器及其制作方法、硅基电光调制器Phase modulator and manufacturing method thereof, silicon-based electro-optic modulator 技术领域Technical field
本申请涉及光信号调制技术领域,尤其涉及一种相位调制器及其制作方法以及一种硅基电光调制器。The present application relates to the field of optical signal modulation technologies, and in particular, to a phase modulator and a method for fabricating the same, and a silicon-based electro-optic modulator.
背景技术Background technique
近些年来,随着信息技术的迅速发展,人们对于开发出具有超高速传输能力骨干网的需求越来越大,而大带宽超高速光调制器是实现高速传输能力的关键器件。硅基电光调制器由于具有集成度高、成本低且与传统的CMOS工艺兼容等特点,受到越来越多的关注。但是,现有硅基电光调制器的传输损耗较大。In recent years, with the rapid development of information technology, people are increasingly demanding the development of backbone networks with ultra-high-speed transmission capabilities, and large-bandwidth ultra-high-speed optical modulators are key components for achieving high-speed transmission capabilities. Silicon-based electro-optical modulators are receiving more and more attention due to their high integration, low cost and compatibility with traditional CMOS processes. However, the transmission loss of the existing silicon-based electro-optic modulator is large.
发明内容Summary of the invention
第一方面,本申请实施例提供了一种相位调制器,包括:In a first aspect, an embodiment of the present application provides a phase modulator, including:
PN结结构,所述PN结结构包括相对设置的P区和N区以及位于所述P区和所述N区之间的PN结;a PN junction structure, the PN junction structure including oppositely disposed P regions and N regions; and a PN junction between the P region and the N region;
与所述P区电连接的P型掺杂区,所述P型掺杂区包括第一P型掺杂区和第二P型掺杂区,其中,所述第二P型掺杂区位于所述P区与所述第一P型掺杂区之间,且所述第一P型掺杂区的掺杂浓度大于所述第二P型掺杂区的掺杂浓度,从而利用所述第一P型掺杂区的重掺杂浓度实现所述相位调制器与驱动电路的良好电接触,并利用所述第二P型掺杂区来降低所述P型掺杂区靠近所述PN结结构一侧的掺杂浓度,降低所述相位调制器的光传输损耗,进而降低所述硅基电光调制器的光传输损耗;a P-type doped region electrically connected to the P region, the P-type doped region includes a first P-type doped region and a second P-type doped region, wherein the second P-type doped region is located Between the P region and the first P-type doped region, and a doping concentration of the first P-type doped region is greater than a doping concentration of the second P-type doped region, thereby utilizing the The heavily doped concentration of the first P-type doped region achieves good electrical contact of the phase modulator with the driver circuit and utilizes the second P-type doped region to reduce the P-type doped region close to the PN The doping concentration on one side of the junction structure reduces the optical transmission loss of the phase modulator, thereby reducing the optical transmission loss of the silicon-based electro-optic modulator;
与所述N区电连接的N型掺杂区,所述N型掺杂区包括第一N型掺杂区和第二N型掺杂区,其中,所述第二N型掺杂区位于所述第一N型掺杂区与所述N区之间,且所述第一N型掺杂区的掺杂浓度大于所述第二N型掺杂区的掺杂浓度,从而利用所述第一N型掺杂区的重掺杂浓度实现所述相位调制器与驱动电路的良好电接触,并利用所述第二N型掺杂区来降低所述N型掺杂区靠近所述PN结结构一侧的掺杂浓度,降低所述相位调制器的光传输损耗,进而降低所述硅基电光调制器的光传输损耗。An N-type doped region electrically connected to the N region, the N-type doped region includes a first N-type doped region and a second N-type doped region, wherein the second N-type doped region is located Between the first N-type doped region and the N region, and a doping concentration of the first N-type doped region is greater than a doping concentration of the second N-type doped region, thereby utilizing the The heavily doped concentration of the first N-type doped region achieves good electrical contact of the phase modulator with the driver circuit and utilizes the second N-type doped region to reduce the N-type doped region close to the PN The doping concentration on one side of the junction structure reduces the optical transmission loss of the phase modulator, thereby reducing the optical transmission loss of the silicon-based electro-optic modulator.
在一种实现方式中,所述第二P型掺杂区的掺杂浓度大于所述P区的掺杂浓度;所述第二N型掺杂区的掺杂浓度大于所述N区的掺杂浓度。In one implementation, the doping concentration of the second P-type doping region is greater than the doping concentration of the P region; the doping concentration of the second N-type doping region is greater than the doping of the N region Miscellaneous concentration.
在一种实现方式中,在平行于所述第一P型掺杂区至所述P区的方向上,所述第二P型掺杂区的掺杂浓度逐渐降低,以减小所述相位调制器中因载流子吸收效应带来的光传输损耗。In one implementation, the doping concentration of the second P-type doping region is gradually decreased in a direction parallel to the first P-type doping region to the P region to reduce the phase Optical transmission loss due to carrier absorption effects in the modulator.
在一种实现方式中,在平行于所述第一N型掺杂区至所述N区的方向上,所述第二N型掺杂区的掺杂浓度逐渐降低,以减小所述相位调制器中因载流子吸收效应带来的光传输损耗。 In one implementation, the doping concentration of the second N-type doping region is gradually decreased in a direction parallel to the first N-type doping region to the N region to reduce the phase Optical transmission loss due to carrier absorption effects in the modulator.
在一种实现方式中,所述第一P型掺杂区的掺杂浓度位于1*1020数量级,以保证所述第一P型掺杂区与外加驱动电路的良好电接触;所述第一N型掺杂区的掺杂浓度位于1*1020数量级,以保证所述第一N型掺杂区和驱动电路的良好电接触。In one implementation, the doping concentration of the first P-type doping region is on the order of 1*10 20 to ensure good electrical contact between the first P-type doping region and the external driving circuit; The doping concentration of an N-type doping region is on the order of 1*10 20 to ensure good electrical contact of the first N-type doping region and the driving circuit.
在一种实现方式中,所述P区的掺杂浓度位于1*1017-1*1018的数量级,所述N区的掺杂浓度位于1*1017-1*1018的数量级,以在保证所述相位调制器调制效率的情况下,降低所述相位调制器的光传输损耗。In one implementation, the doping concentration of the P region is on the order of 1*10 17 -1*10 18 , and the doping concentration of the N region is on the order of 1*10 17 -1*10 18 to The optical transmission loss of the phase modulator is reduced while ensuring the modulation efficiency of the phase modulator.
第二方面,本申请实施例提供了一种包括上述任一项所述的相位调制器的硅基电光调制器。In a second aspect, an embodiment of the present application provides a silicon-based electro-optic modulator comprising the phase modulator of any of the above.
第三方面,本申请实施例提供了一种相位调制器的制作方法,包括:In a third aspect, an embodiment of the present application provides a method for fabricating a phase modulator, including:
提供硅晶圆,所述硅晶圆包括硅基底、位于所述硅基底表面的隔离层以及位于所述隔离层背离所述硅基底一侧的平坦层;Providing a silicon wafer, the silicon wafer comprising a silicon substrate, an isolation layer on a surface of the silicon substrate, and a planar layer on a side of the isolation layer facing away from the silicon substrate;
去除部分所述平坦层,形成凸起结构,所述凸起结构包括第一表面和位于所述第一表面两侧的第二表面和第三表面,所述第一表面高于所述第二表面和所述第三表面;Removing a portion of the planar layer to form a raised structure, the raised structure comprising a first surface and a second surface and a third surface on opposite sides of the first surface, the first surface being higher than the second a surface and the third surface;
在所述第一表面内形成PN结结构,所述PN结结构包括相对设置的P区和N区以及位于所述P区和所述N区之间的PN结;Forming a PN junction structure in the first surface, the PN junction structure including oppositely disposed P regions and N regions; and a PN junction between the P region and the N region;
在所述第二表面内形成第一P型掺杂区,所述第一P型掺杂区的掺杂浓度大于所述P区的掺杂浓度;Forming a first P-type doping region in the second surface, a doping concentration of the first P-type doping region being greater than a doping concentration of the P region;
在所述第三表面内形成第一N型掺杂区,所述第一N型掺杂区的掺杂浓度大于所述N区的掺杂浓度;Forming a first N-type doping region in the third surface, the doping concentration of the first N-type doping region being greater than a doping concentration of the N region;
在所述第二表面内形成第二P型掺杂区,并在所述第三表面内形成第二N型掺杂区,其中,所述第二P型掺杂区位于所述第一P型掺杂区和所述P区之间,且所述第二P型掺杂区的掺杂浓度小于所述第一P型掺杂区的掺杂浓度;所述第二N型掺杂区位于所述第一N型掺杂区和所述N区之间,且所述第二N型掺杂区的掺杂浓度小于所述第一N型掺杂区的掺杂浓度。Forming a second P-type doped region in the second surface, and forming a second N-type doped region in the third surface, wherein the second P-type doped region is located in the first P Between the doped region and the P region, and the doping concentration of the second P-doped region is less than the doping concentration of the first P-type doped region; the second N-type doped region Located between the first N-type doped region and the N region, and the doping concentration of the second N-type doped region is less than a doping concentration of the first N-type doped region.
本申请实施例所提供的相位调制器的制作方法制作的相位调制器,通过将所述P型掺杂区划分成所述第一P型掺杂区和所述第二P型掺杂区两部分,其中,所述第二P型掺杂区的掺杂浓度小于所述第一P型掺杂区的掺杂浓度,从而利用所述第一P型掺杂区的重掺杂浓度实现所述相位调制器与驱动电路的良好电接触,并利用所述第二P型掺杂区来降低所述P型掺杂区靠近所述PN结结构一侧的掺杂浓度,降低所述相位调制器的光传输损耗,进而降低所述硅基电光调制器的光传输损耗。同时,本申请实施例所提供的相位调制器制作方法制作的相位调制器,还通过将所述N型掺杂区划分成所述第一N型掺杂区和所述第二N型掺杂区两部分,其中,所述第二N型掺杂区的掺杂浓度小于所述第一N型掺杂区的掺杂浓度,从而利用所述第一N型掺杂区的重掺杂浓度实现所述相位调制器与驱动电路的良好电接触,并利用所述第二N型掺杂区来降低所述N型掺杂区靠近所述PN结结构一侧的掺杂浓度,降低所述相位调制器的光传输损耗,进而降低所述硅基电光调制器的光传输损耗。A phase modulator fabricated by the method for fabricating a phase modulator according to an embodiment of the present application, by dividing the P-type doped region into two portions of the first P-type doping region and the second P-type doping region The doping concentration of the second P-type doping region is smaller than the doping concentration of the first P-type doping region, thereby realizing the using the heavily doped concentration of the first P-type doping region Good electrical contact of the phase modulator with the driver circuit, and using the second P-type doping region to reduce the doping concentration of the P-type doping region near the side of the PN junction structure, lowering the phase modulator The optical transmission loss, which in turn reduces the optical transmission loss of the silicon-based electro-optic modulator. Meanwhile, the phase modulator fabricated by the phase modulator manufacturing method provided by the embodiment of the present application further divides the N-type doping region into the first N-type doping region and the second N-type doping region. a two-part, wherein a doping concentration of the second N-type doping region is smaller than a doping concentration of the first N-type doping region, thereby realizing utilizing a heavily doped concentration of the first N-type doping region The phase modulator is in good electrical contact with the driving circuit, and uses the second N-type doping region to reduce the doping concentration of the N-type doping region near the side of the PN junction structure, and reduce the phase The optical transmission loss of the modulator, which in turn reduces the optical transmission loss of the silicon-based electro-optic modulator.
在一种实现方式中,在平行于所述第一P型掺杂区至所述P区的方向上,所述第 二P型掺杂区的掺杂浓度逐渐降低,以减小所述相位调制器中因载流子吸收效应带来的光传输损耗;在平行于所述第一N型掺杂区至所述N区的方向上,所述第二N型掺杂区的掺杂浓度逐渐降低,以减小所述相位调制器中因载流子吸收效应带来的光传输损耗。In one implementation, in a direction parallel to the first P-type doped region to the P region, the first The doping concentration of the second P-type doping region is gradually decreased to reduce the optical transmission loss due to the carrier absorption effect in the phase modulator; parallel to the first N-type doping region to the In the direction of the N region, the doping concentration of the second N-type doping region is gradually decreased to reduce the optical transmission loss due to the carrier absorption effect in the phase modulator.
在一种实现方式中,在所述第二表面内形成第二P型掺杂区,并在所述第三表面内形成第二N型掺杂区包括:In one implementation, forming a second P-type doped region in the second surface and forming a second N-type doped region in the third surface includes:
在所述凸起结构的第一表面形成第一掩膜层;Forming a first mask layer on the first surface of the raised structure;
在所述凸起结构朝向所述第二表面和所述第三表面的一侧形成侧墙结构,所述侧墙结构在所述平坦层上的投影与所述第一P型掺杂区不交叠,且与所述第一N型掺杂区不交叠;Forming a sidewall structure on a side of the convex structure facing the second surface and the third surface, a projection of the sidewall structure on the flat layer and the first P-type doping region not Overlapped and not overlapping the first N-type doped region;
在所述侧墙结构背离所述平坦层的一侧形成第二掩膜层,所述第二掩膜层覆盖所述第三表面、所述第一表面和所述第一P型掺杂区,曝露所述侧墙结构位于所述第二表面的部分;Forming a second mask layer on a side of the sidewall structure facing away from the planar layer, the second mask layer covering the third surface, the first surface, and the first P-type doped region Exposing a portion of the sidewall structure at the second surface;
以所述第二掩膜层为掩膜,在所述第二表面位于所述侧墙结构下方的区域内形成第二P型掺杂区;Forming a second P-type doped region in a region of the second surface below the sidewall structure, using the second mask layer as a mask;
去除所述第二掩膜层;Removing the second mask layer;
在所述侧墙结构背离所述平坦层的一侧形成第三掩膜层,所述第三掩膜层覆盖所述第二表面、所述第一表面和所述第一N型掺杂区,曝露所述侧墙结构位于所述第三表面的部分;Forming a third mask layer on a side of the sidewall structure facing away from the planar layer, the third mask layer covering the second surface, the first surface, and the first N-type doped region Exposing a portion of the side wall structure at the third surface;
以所述第三掩膜层为掩膜,在所述第三表面位于所述侧墙结构下方的区域内形成第二N型掺杂区;Forming a second N-type doped region in a region of the third surface below the sidewall structure by using the third mask layer as a mask;
其中,所述第一掩膜层与所述第二掩膜层的材料不同,且所述第一掩膜层与所述第三掩膜层的材料不同。The material of the first mask layer and the second mask layer are different, and the materials of the first mask layer and the third mask layer are different.
在一种实现方式中,其特征在于,所述第一掩膜层的材料为氮化硅、锗或氮氧化硅。In one implementation, the material of the first mask layer is silicon nitride, germanium or silicon oxynitride.
附图说明DRAWINGS
为了更清楚地说明本发明实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本发明的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the embodiments or the description of the prior art will be briefly described below. Obviously, the drawings in the following description are only It is a certain embodiment of the present invention, and other drawings can be obtained from those skilled in the art without any creative work.
图1为本申请一个实施例所提供的相位调制器的结构示意图;1 is a schematic structural diagram of a phase modulator according to an embodiment of the present application;
图2为本申请另一个实施例所提供的相位调制器的结构示意图;2 is a schematic structural diagram of a phase modulator according to another embodiment of the present application;
图3为本申请一个实施例所提供的硅基电光调制器的结构示意图;3 is a schematic structural diagram of a silicon-based electro-optic modulator according to an embodiment of the present application;
图4为本申请一个实施例所提供的相位调制器的制作方法的流程图;4 is a flowchart of a method for fabricating a phase modulator according to an embodiment of the present application;
图5-图26为本申请另一个实施例所提供的相位调制器的制作方法中各步骤形成结构的剖视图。 5 to FIG. 26 are cross-sectional views showing a structure of each step in a method of fabricating a phase modulator according to another embodiment of the present application.
具体实施方式Detailed ways
下面将结合本申请实施例中的附图,对本申请实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本申请一部分实施例,而不是全部的实施例。基于本申请中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本申请保护的范围。The technical solutions in the embodiments of the present application are clearly and completely described in the following with reference to the drawings in the embodiments of the present application. It is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments of the present application without departing from the inventive scope are the scope of the present application.
在下面的描述中阐述了很多具体细节以便于充分理解本申请,但是本申请还可以采用其他不同于在此描述的其它方式来实施,本领域技术人员可以在不违背本申请内涵的情况下做类似推广,因此本申请不受下面公开的具体实施例的限制。In the following description, numerous specific details are set forth in order to facilitate a full understanding of the application, but the invention may be practiced in other ways than those described herein, and those skilled in the art can do without departing from the scope of the application. The invention is not limited by the specific embodiments disclosed below.
现有硅基电光调制器包括相位调制器(又称移相器)、位于所述相位调制器两侧用于分别与输入端和输出端相连的光耦合器,以及与所述光耦合器和所述相位调制器之间的传输波导,其中,所述相位调制器包括PN结结构以及位于所述PN结两侧的P型掺杂区和N型掺杂区,其中,所述PN结结构包括相对设置的P区和N区以及位于所述P区和N区之间的PN结,主要用于实现光信号的相位调制,所述P型掺杂区和N型掺杂区主要用于电连接外加驱动电路,从而利用外加驱动电路给所述PN结结构施加工作信号,现有工艺在形成所述相位调制器的P型掺杂区和N型掺杂区时,该P型掺杂区是掺杂浓度均匀分布的重掺杂区,N型掺杂区也是掺杂浓度均匀分布的重掺杂区,且该P型掺杂区和N型掺杂区与所述PN结之间的距离越近,所述重掺杂区渗透到所述PN结结构中P区和N区的载流子越多,而所述PN结结构中P区和N区的载流子越多,掺杂浓度越大,所述相位调制器的光传输损耗越大,导致所述硅基电光调制器的光传输损耗越大。Existing silicon-based electro-optic modulators include a phase modulator (also referred to as a phase shifter), optocouplers on opposite sides of the phase modulator for respectively connecting the input and output, and with the optocoupler and a transmission waveguide between the phase modulators, wherein the phase modulator comprises a PN junction structure and a P-type doped region and an N-type doped region on both sides of the PN junction, wherein the PN junction structure The P-region and the N-region including the opposite arrangement and the PN junction between the P-region and the N-region are mainly used for realizing phase modulation of an optical signal, and the P-doped region and the N-type doped region are mainly used for Electrically connecting an external driving circuit to apply an operating signal to the PN junction structure by using an external driving circuit. The P-type doping is performed in the P-type doping region and the N-type doping region of the phase modulator formed by the prior art. The region is a heavily doped region in which the doping concentration is uniformly distributed, and the N-doped region is also a heavily doped region in which the doping concentration is uniformly distributed, and between the P-doped region and the N-type doped region and the PN junction The closer the distance is, the more carriers of the heavily doped region penetrate into the P and N regions of the PN junction structure, The more carriers in the P and N regions of the PN junction structure, the greater the doping concentration, the greater the optical transmission loss of the phase modulator, resulting in greater optical transmission loss of the silicon-based electro-optic modulator. .
有鉴于此,本申请实施例提供了一种相位调制器,如图1所示,该相位调制器包括:In view of this, the embodiment of the present application provides a phase modulator, as shown in FIG. 1, the phase modulator includes:
PN结结构1,所述PN结结构1包括相对设置的P区11和N区12以及位于所述P区11和所述N区12之间的PN结13,其中,所述P区11为所述PN结结构中的P型半导体掺杂区,所述N区12为所述PN结结构中的N型半导体掺杂区;a PN junction structure 1, the PN junction structure 1 includes oppositely disposed P regions 11 and N regions 12, and a PN junction 13 between the P region 11 and the N region 12, wherein the P region 11 is a P-type semiconductor doped region in the PN junction structure, the N region 12 being an N-type semiconductor doped region in the PN junction structure;
与所述P区11电连接的P型掺杂区2,所述P型掺杂区2包括第一P型掺杂区21和第二P型掺杂区22,其中,所述第二P型掺杂区22位于所述P区11与所述第一P型掺杂区21之间,且所述第一P型掺杂区21的掺杂浓度大于所述第二P型掺杂区22的掺杂浓度;a P-type doping region 2 electrically connected to the P region 11 , the P-type doping region 2 including a first P-type doping region 21 and a second P-type doping region 22, wherein the second P a doping region 22 is located between the P region 11 and the first P-type doping region 21, and a doping concentration of the first P-type doping region 21 is greater than the second P-type doping region Doping concentration of 22;
与所述N区12电连接的N型掺杂区3,所述N型掺杂区3包括第一N型掺杂区31和第二N型掺杂区32,其中,所述第二N型掺杂区32位于所述第一N型掺杂区31与所述N区12之间,且所述第一N型掺杂区31的掺杂浓度大于所述第二N型掺杂区32的掺杂浓度。An N-type doped region 3 electrically connected to the N region 12, the N-type doped region 3 includes a first N-type doped region 31 and a second N-type doped region 32, wherein the second N The doped region 32 is located between the first N-type doped region 31 and the N region 12, and the doping concentration of the first N-type doping region 31 is greater than the second N-type doped region Doping concentration of 32.
在本发明实施例中,所述P型掺杂区2和所述N型掺杂区3用于和驱动电路电连接,从而通过所述P型掺杂区2和所述N型掺杂区3将驱动电路提供的驱动信号施加到所述PN结结构1,实现光信号的相位调制。 In the embodiment of the present invention, the P-type doping region 2 and the N-type doping region 3 are used for electrically connecting with a driving circuit, thereby passing through the P-type doping region 2 and the N-type doping region. 3 Applying a driving signal supplied from the driving circuit to the PN junction structure 1 to realize phase modulation of the optical signal.
本发明实施例所提供的相位调制器,将所述P型掺杂区2划分成所述第一P型掺杂区21和所述第二P型掺杂区22两部分,其中,所述第二P型掺杂区22的掺杂浓度小于所述第一P型掺杂区21的掺杂浓度,从而利用所述第一P型掺杂区21的重掺杂浓度实现所述相位调制器与驱动电路的良好电接触,并利用所述第二P型掺杂区22来降低所述P型掺杂区2靠近所述PN结结构1一侧的掺杂浓度,降低所述相位调制器的光传输损耗。同理,将所述N型掺杂区3划分成第一N型掺杂区31和第二N型掺杂区32两部分,其中,所述第二N型掺杂区32的掺杂浓度小于所述第一N型掺杂区31的掺杂浓度,从而利用第一N型掺杂区31的重掺杂浓度实现所述相位调制器与驱动电路的良好电接触,并利用第二N掺杂区32来降低所述N型掺杂区3靠近所述PN结结构1一侧的掺杂浓度,降低所述相位调制器的光传输损耗。The phase modulator provided by the embodiment of the present invention divides the P-type doping region 2 into two parts, the first P-type doping region 21 and the second P-type doping region 22, wherein the The doping concentration of the second P-type doping region 22 is smaller than the doping concentration of the first P-type doping region 21, thereby realizing the phase modulation by using the heavily doped concentration of the first P-type doping region 21. Good electrical contact with the driving circuit, and using the second P-type doping region 22 to reduce the doping concentration of the P-type doping region 2 near the PN junction structure 1 side, reducing the phase modulation Optical transmission loss. Similarly, the N-type doping region 3 is divided into a first N-type doping region 31 and a second N-type doping region 32, wherein the doping concentration of the second N-type doping region 32 is similar. Less than the doping concentration of the first N-type doping region 31, thereby achieving good electrical contact between the phase modulator and the driving circuit by using the heavily doped concentration of the first N-type doping region 31, and utilizing the second N The doping region 32 reduces the doping concentration of the N-type doping region 3 near the PN junction structure 1 side, and reduces the optical transmission loss of the phase modulator.
需要说明的是,如果所述第二P型掺杂区22的掺杂浓度过低,会显著增大所述PN结13的串联等效电阻,使得RC常数增大,降低所述相位调制器的带宽。同理,如果所述第二N型掺杂区32的掺杂浓度过低,也会增大所述PN结13的串联等效电阻,使得RC常数增大,降低所述光波导的带宽。故在上述实施例的基础上,在本申请的一个实施例中,所述第二P型掺杂区22的掺杂浓度大于所述P区11的掺杂浓度,所述第二N型掺杂区32的掺杂浓度大于所述N区12的掺杂浓度,以在降低所述相位调制器光传输损耗的基础上,保证所述相位调制器的带宽。It should be noted that if the doping concentration of the second P-type doping region 22 is too low, the series equivalent resistance of the PN junction 13 is significantly increased, so that the RC constant is increased, and the phase modulator is lowered. Bandwidth. Similarly, if the doping concentration of the second N-type doping region 32 is too low, the series equivalent resistance of the PN junction 13 is also increased, so that the RC constant is increased to lower the bandwidth of the optical waveguide. Therefore, in one embodiment of the present application, the doping concentration of the second P-type doping region 22 is greater than the doping concentration of the P region 11, and the second N-type doping. The doping concentration of the impurity region 32 is greater than the doping concentration of the N region 12 to ensure the bandwidth of the phase modulator on the basis of reducing the optical transmission loss of the phase modulator.
在上述实施例的基础上,在本申请的一个实施例中,在平行于所述第一P型掺杂区21至所述P区11的方向上,所述第二P型掺杂区22的掺杂浓度逐渐降低,以减小所述相位调制器中因载流子吸收效应带来的光传输损耗。具体的,在本申请的一个实施例中,在平行于所述第一P型掺杂区21至所述P区11的方向上,所述第二P型掺杂区22的掺杂浓度均匀降低,以使得所述第二P型掺杂区22对所述P型掺杂区2的电阻值影响较小,不会对所述相位调制器的带宽造成过大影响。On the basis of the above embodiments, in one embodiment of the present application, the second P-type doping region 22 is in a direction parallel to the first P-type doping region 21 to the P region 11. The doping concentration is gradually reduced to reduce the optical transmission loss due to the carrier absorption effect in the phase modulator. Specifically, in one embodiment of the present application, the doping concentration of the second P-type doping region 22 is uniform in a direction parallel to the first P-type doping region 21 to the P region 11. The decrease is such that the second P-type doping region 22 has less influence on the resistance value of the P-type doping region 2, and does not have an excessive influence on the bandwidth of the phase modulator.
同理,在上述任一实施例的基础上,在本申请的一个实施例中,在平行于所述第一N型掺杂区31至所述N区12的方向上,所述第二N型掺杂区32的掺杂浓度逐渐降低,以减小所述相位调制器中因载流子吸收效应带来的光传输损耗。具体的,在本申请的一个实施例中,在平行于所述第一N型掺杂区31至所述N区12的方向上,所述第二N型掺杂区32的掺杂浓度均匀降低,以使得所述第二N型掺杂区32对所述N型掺杂区3的电阻值影响较小,不会对所述相位调制器的带宽造成过大影响。Similarly, based on any of the above embodiments, in one embodiment of the present application, the second N is in a direction parallel to the first N-type doping region 31 to the N region 12. The doping concentration of the doped region 32 is gradually reduced to reduce the optical transmission loss due to the carrier absorption effect in the phase modulator. Specifically, in one embodiment of the present application, the doping concentration of the second N-type doping region 32 is uniform in a direction parallel to the first N-type doping region 31 to the N region 12 The decrease is such that the second N-type doping region 32 has a small influence on the resistance value of the N-type doping region 3, and does not have an excessive influence on the bandwidth of the phase modulator.
在上述任一实施例的基础上,在本申请的一个实施例中,如图2所示,所述相位调制器还包括:On the basis of any of the above embodiments, in an embodiment of the present application, as shown in FIG. 2, the phase modulator further includes:
覆盖所述P型掺杂区2、所述N型掺杂区3和所述PN结结构1的第一绝缘层4,所述第一绝缘层4中具有第一通孔和第二通孔;Covering the P-type doping region 2, the N-type doping region 3, and the first insulating layer 4 of the PN junction structure 1, the first insulating layer 4 having a first via hole and a second via hole ;
通过所述第一通孔与所述第一P型掺杂区21电连接的第一电极5;a first electrode 5 electrically connected to the first P-type doping region 21 through the first via hole;
通过所述第二通孔与所述第一N型掺杂区31电连接的第二电极6;a second electrode 6 electrically connected to the first N-type doping region 31 through the second via hole;
位于所述PN结结构1、所述P型掺杂区2和所述N型掺杂区3背离所述第一绝缘层4一侧的第二绝缘层7; a second insulating layer 7 on the side of the PN junction structure 1, the P-type doping region 2 and the N-type doping region 3 facing away from the first insulating layer 4;
位于所述第二绝缘层7背离所述PN结结构1、所述P型掺杂区2和所述N型掺杂区3一侧的硅基底8;a silicon substrate 8 on the side of the second insulating layer 7 facing away from the PN junction structure 1, the P-type doping region 2 and the N-type doping region 3;
其中,所述第一电极5用于电连接驱动电路和所述第一P型掺杂区21,所述第二电极6用于电连接驱动电路和所述第一N型掺杂区31,所述第二绝缘层7用于隔离所述硅基底8和位于所述第二绝缘层7上方的结构。The first electrode 5 is used for electrically connecting the driving circuit and the first P-type doping region 21, and the second electrode 6 is for electrically connecting the driving circuit and the first N-type doping region 31, The second insulating layer 7 is used to isolate the silicon substrate 8 and a structure located above the second insulating layer 7.
在上述实施例的基础上,在本申请的一个实施例中,所述第一P型掺杂区21的掺杂浓度位于1*1020数量级,以保证所述第一P型掺杂区21与所述第一电极5的良好电接触,从而实现所述第一P型掺杂区21和驱动电路的良好电接触。同理,所述第一N型掺杂区31的掺杂浓度位于1*1020数量级,以保证所述第一N型掺杂区31与所述第二电极6的良好电接触,从而实现所述第一N型掺杂区31和驱动电路的良好电接触。On the basis of the above embodiments, in one embodiment of the present application, the doping concentration of the first P-type doping region 21 is on the order of 1*10 20 to ensure the first P-type doping region 21 Good electrical contact with the first electrode 5 to achieve good electrical contact of the first P-doped region 21 and the driver circuit. Similarly, the doping concentration of the first N-type doping region 31 is on the order of 1*10 20 to ensure good electrical contact between the first N-type doping region 31 and the second electrode 6, thereby realizing Good electrical contact of the first N-type doped region 31 with the driver circuit.
在本申请实施例中,所述相位调制器是通过外加驱动信号改变所述PN结结构1中的载流子浓度,来改变所述PN结结构1中的有效折射率,从而实现光信号的相位调制,而相位调制器的调制效率随着所述PN结结构1中载流子浓度的增大而增大,因此,在上述任一实施例的基础上,在本申请的一个实施例中,所述P区11的掺杂浓度位于1*1017-1*1018的数量级,以在保证所述相位调制器调制效率的情况下,降低所述相位调制器的光传输损耗。In the embodiment of the present application, the phase modulator changes the effective refractive index in the PN junction structure 1 by changing the carrier concentration in the PN junction structure 1 by applying a driving signal, thereby realizing an optical signal. Phase modulation, and the modulation efficiency of the phase modulator increases as the carrier concentration in the PN junction structure 1 increases, and therefore, in one embodiment of the present application, based on any of the above embodiments The doping concentration of the P region 11 is on the order of 1*10 17 -1*10 18 to reduce the optical transmission loss of the phase modulator while ensuring the modulation efficiency of the phase modulator.
相应的,本申请实施例还提供了一种硅基电光调制器,如图3所示,该硅基电光调制器包括:与输入端电连接的第一光耦合器100,用于将输入光信号分成第一光信号和第二光信号两路光信号,与所述第一光耦合器100相连传输所述第一光信号的第一传输波导200,与所述第一光耦合器100相连传输所述第二光信号的第二传输波导300,与所述第一传输波导200相连的第一相位调制器400,与所述第二传输波导300相连的第二相位调制器500,与所述第一相位调制器400相连的第三传输波导600,与所述第二相位调制器500相连的第四传输波导700,以及与所述第三传输波导600和所述第四传输波导700相连的第二光耦合器800。其中,所述第一相位调制器400和第二相位调制器500为本申请上述任一实施例所提供的相位调制器。Correspondingly, the embodiment of the present application further provides a silicon-based electro-optic modulator, as shown in FIG. 3, the silicon-based electro-optic modulator includes: a first optical coupler 100 electrically connected to an input terminal for inputting light The signal is divided into two optical signals of the first optical signal and the second optical signal, and the first optical waveguide 200 that is connected to the first optical coupler 100 to transmit the first optical signal is connected to the first optical coupler 100. a second transmission waveguide 300 transmitting the second optical signal, a first phase modulator 400 connected to the first transmission waveguide 200, and a second phase modulator 500 connected to the second transmission waveguide 300, a third transmission waveguide 600 connected to the first phase modulator 400, a fourth transmission waveguide 700 connected to the second phase modulator 500, and connected to the third transmission waveguide 600 and the fourth transmission waveguide 700 The second optical coupler 800. The first phase modulator 400 and the second phase modulator 500 are phase modulators provided by any of the above embodiments of the present application.
具体工作时,所述第一光耦合器100用于将输入光信号分成第一光信号和第二光信号,所述第一传输波导200用于将所述第一光信号传输给所述第一相位调制器400,所述第一相位调制器400对所述第一光信号进行调制后输出给所述第三传输波导600,将所述第三传输波导600输出给所述第二光耦合器800;所述第二传输波导300用于将所述第二光信号输出给所述第二相位调制器500,所述第二相位调制器500对所述第二光信号进行调制后输出给所述第四传输波导700,并经所述第四传输波导700输出给所述第二光耦合器800,所述第二光耦合器800用于将所述第三传输波导600和第四传输波导700输出的光信号进行合并后输出。In a specific operation, the first optical coupler 100 is configured to divide an input optical signal into a first optical signal and a second optical signal, where the first transmission waveguide 200 is configured to transmit the first optical signal to the first a phase modulator 400, the first phase modulator 400 modulates the first optical signal and outputs the same to the third transmission waveguide 600, and outputs the third transmission waveguide 600 to the second optical coupling The second transmission waveguide 300 is configured to output the second optical signal to the second phase modulator 500, and the second phase modulator 500 modulates the second optical signal and outputs the same The fourth transmission waveguide 700 is output to the second optical coupler 800 via the fourth transmission waveguide 700, and the second optical coupler 800 is configured to transmit the third transmission waveguide 600 and the fourth transmission The optical signals output from the waveguide 700 are combined and output.
由上述可知,本申请实施例所提供的相位调制器、包括该相位调制器的硅基电光调制器,通过将所述P型掺杂区2划分成所述第一P型掺杂区21和所述第二P型掺杂区22两部分,其中,所述第二P型掺杂区22的掺杂浓度小于所述第一P型掺杂区21的掺杂浓度,从而利用所述第一P型掺杂区21的重掺杂浓度实现所述相位调制器与驱 动电路的良好电接触,并利用所述第二P型掺杂区22来降低所述P型掺杂区2靠近所述PN结结构1一侧的掺杂浓度,降低所述相位调制器的光传输损耗,进而降低所述硅基电光调制器的光传输损耗。同时,本申请实施例所提供的相位调制器以及包括该相位调制器的硅基电光调制器,通过将所述N型掺杂区3划分成所述第一N型掺杂区31和所述第二N型掺杂区32两部分,其中,所述第二N型掺杂区32的掺杂浓度小于所述第一N型掺杂区31的掺杂浓度,从而利用所述第一N型掺杂区31的重掺杂浓度实现所述相位调制器与驱动电路的良好电接触,并利用所述第二N型掺杂区32来降低所述N型掺杂区3靠近所述PN结结构1一侧的掺杂浓度,降低所述相位调制器的光传输损耗,进而降低所述硅基电光调制器的光传输损耗。It can be seen from the above that the phase modulator provided by the embodiment of the present application, the silicon-based electro-optic modulator including the phase modulator, divides the P-type doping region 2 into the first P-type doping region 21 and The second P-type doping region 22 has two portions, wherein a doping concentration of the second P-type doping region 22 is smaller than a doping concentration of the first P-type doping region 21, thereby utilizing the first The heavily doped concentration of a P-type doped region 21 achieves the phase modulator and drive Good electrical contact of the moving circuit, and using the second P-type doping region 22 to reduce the doping concentration of the P-type doping region 2 near the PN junction structure 1 side, reducing the phase modulator Optical transmission loss, which in turn reduces the optical transmission loss of the silicon-based electro-optic modulator. Meanwhile, the phase modulator provided by the embodiment of the present application and the silicon-based electro-optic modulator including the phase modulator divide the N-type doping region 3 into the first N-type doping region 31 and the Two portions of the second N-type doping region 32, wherein a doping concentration of the second N-type doping region 32 is smaller than a doping concentration of the first N-type doping region 31, thereby utilizing the first N The heavily doped concentration of the doped region 31 achieves good electrical contact of the phase modulator with the drive circuit and utilizes the second N-type doped region 32 to reduce the N-type doped region 3 near the PN The doping concentration on the side of the junction structure 1 reduces the optical transmission loss of the phase modulator, thereby reducing the optical transmission loss of the silicon-based electro-optic modulator.
此外,本申请实施例还提供了一种相位调制器的制作方法,如图4所示,该制作方法包括:In addition, the embodiment of the present application further provides a method for fabricating a phase modulator. As shown in FIG. 4, the manufacturing method includes:
S10:如图5所示,提供硅晶圆,所述硅晶圆包括硅基底8、位于所述硅基底8表面的隔离层7以及位于所述隔离层7背离所述硅基底8一侧的平坦层9。S10: as shown in FIG. 5, a silicon wafer is provided, the silicon wafer includes a silicon substrate 8, an isolation layer 7 on a surface of the silicon substrate 8, and a side of the isolation layer 7 facing away from the silicon substrate 8. Flat layer 9.
在本申请的一个实施例中,所述隔离层为绝缘层,如二氧化硅层,所述平坦层为硅材料层。In an embodiment of the present application, the isolation layer is an insulating layer, such as a silicon dioxide layer, and the planar layer is a silicon material layer.
具体的,在本申请的一个实施例中,所述硅晶圆的形成方法包括:提供硅衬底;在所述硅衬底表面形成隔离层;在所述隔离层背离所述硅衬底一侧表面形成平坦层。其中,所述隔离层的形成工艺可以为沉积工艺,也可以为氧化工艺;所述平坦层的形成工艺也可以为沉积工艺,本申请对此并不做限定,具体视情况而定。Specifically, in an embodiment of the present application, the method for forming a silicon wafer includes: providing a silicon substrate; forming an isolation layer on a surface of the silicon substrate; and facing the isolation layer from the silicon substrate The side surface forms a flat layer. The formation process of the isolation layer may be a deposition process or an oxidation process; the formation process of the planarization layer may also be a deposition process, which is not limited in this application, as the case may be.
S20:如图6所示,去除部分所述平坦层9,形成凸起结构10,所述凸起结构10包括第一表面和分别位于所述第一表面两侧的第二表面和第三表面,所述第一表面高于所述第二表面和所述第三表面。S20: removing a portion of the flat layer 9 as shown in FIG. 6, forming a convex structure 10, the convex structure 10 including a first surface and second and third surfaces respectively located on opposite sides of the first surface The first surface is higher than the second surface and the third surface.
具体的,在本申请的一个实施例中,去除部分所述平坦层,形成凸起结构,所述凸起结构包括第一表面和分别位于所述第一表面两侧的第二表面和第三表面,所述第一表面高于所述第二表面和所述第三表面包括:Specifically, in an embodiment of the present application, a part of the flat layer is removed to form a convex structure, and the convex structure includes a first surface and a second surface and a third surface respectively located on two sides of the first surface a surface, the first surface being higher than the second surface and the third surface comprising:
在所述平坦层表面形成第一覆盖层,所述第一覆盖层覆盖待形成所述PN结结构的区域,曝露待形成所述P型掺杂区和所述N型掺杂区的区域;Forming a first capping layer on a surface of the flat layer, the first capping layer covering a region where the PN junction structure is to be formed, exposing a region where the P-type doping region and the N-type doping region are to be formed;
以所述第一覆盖层为掩膜,对所述平坦层进行刻蚀,形成凸起结构,所述凸起结构包括第一表面和分别位于所述第一表面两侧的第二表面和第三表面,所述第一表面高于所述第二表面和所述第三表面,其中,所述第一表面对应待形成所述PN结结构的区域,所述第二表面对应待形成所述P型掺杂区的区域,所述第二表面对应待形成所述N型掺杂区的区域。Etching the flat layer with the first cover layer as a mask to form a convex structure, the raised structure comprising a first surface and a second surface respectively located on opposite sides of the first surface and a third surface, the first surface being higher than the second surface and the third surface, wherein the first surface corresponds to a region where the PN junction structure is to be formed, and the second surface corresponds to a portion to be formed A region of the P-type doped region, the second surface corresponding to a region where the N-type doped region is to be formed.
S30:在所述第一表面内形成PN结结构,所述PN结结构包括相对设置的P区和N区以及位于所述P区和所述N区之间的PN结。S30: forming a PN junction structure in the first surface, the PN junction structure including oppositely disposed P regions and N regions and a PN junction between the P region and the N region.
具体的,在本申请的一个实施例中,在所述第一表面内形成PN结结构,所述PN结结构包括相对设置的P区和N区以及位于所述P区和所述N区之间的PN结包括:Specifically, in an embodiment of the present application, a PN junction structure is formed in the first surface, the PN junction structure includes oppositely disposed P regions and N regions, and is located in the P region and the N region. The PN junction between:
如图7所示,在所述平坦层9背离所述隔离层7一侧形成第二覆盖层20,所述第 二覆盖层20覆盖部分所述第二表面、所述第三表面以及所述第一表面内待形成所述N区的部分,曝露所述第一表面待形成所述P区的部分以及所述第二表面待形成所述第二P型掺杂区的部分;As shown in FIG. 7, a second cover layer 20 is formed on a side of the flat layer 9 facing away from the isolation layer 7, a second cover layer 20 covering a portion of the second surface, the third surface, and a portion of the first surface in which the N region is to be formed, exposing a portion of the first surface where the P region is to be formed, and a portion of the second surface to be formed into the second P-type doped region;
如8所示,以所述第二覆盖层20为掩膜,在所述第一表面内形成所述P区;As shown in FIG. 8, using the second cover layer 20 as a mask, forming the P region in the first surface;
如图9所示,去除所述第一覆盖层10;As shown in Figure 9, the first cover layer 10 is removed;
如图10所示,在所述平坦层9背离所述隔离层7一侧形成第三覆盖层30,所述第三覆盖层30覆盖所述第二表面、部分所述第三表面以及所述第一表面内形成所述P区的部分,曝露所述第一表面待形成所述N区的部分以及所述第三表面待形成所述第二N型掺杂区的部分;As shown in FIG. 10, a third cover layer 30 is formed on a side of the flat layer 9 facing away from the isolation layer 7, the third cover layer 30 covering the second surface, a portion of the third surface, and the Forming a portion of the P region in the first surface, exposing a portion of the first surface where the N region is to be formed, and a portion of the third surface where the second N-type doping region is to be formed;
如图11和图12所示,以所述第三覆盖层30为掩膜,在所述第一表面待形成N区的部分形成所述N区12,所述P区和所述N区的边界处形成所述PN结13;As shown in FIG. 11 and FIG. 12, with the third cover layer 30 as a mask, the N region 12 is formed in a portion of the first surface where the N region is to be formed, and the P region and the N region are Forming the PN junction 13 at a boundary;
去除所述第三覆盖层30。The third cover layer 30 is removed.
需要说明的是,在本申请上述实施例中,所述P区和所述N区的形成顺序可以互换,本申请对此并不做限定,具体视情况而定。It should be noted that, in the foregoing embodiment of the present application, the order of forming the P zone and the N zone may be interchanged, which is not limited in this application, as the case may be.
S40:在所述第二表面内形成第一P型掺杂区,所述第一P型掺杂区的掺杂浓度大于所述P区的掺杂浓度。S40: forming a first P-type doping region in the second surface, the doping concentration of the first P-type doping region being greater than the doping concentration of the P region.
具体的,在本申请的一个实施例中,在所述第二表面内形成第一P型掺杂区包括:Specifically, in an embodiment of the present application, forming the first P-type doping region in the second surface includes:
如图13所示,在所述平坦层9表面形成第四覆盖层40,所述第四覆盖层覆盖所述第一表面、所述第三表面和部分所述第二表面,仅曝露所述第二表面待形成所述第一P型掺杂区的部分;As shown in FIG. 13, a fourth cover layer 40 is formed on the surface of the flat layer 9, the fourth cover layer covering the first surface, the third surface and a portion of the second surface, only exposing the a portion of the second surface to be formed into the first P-type doped region;
如图14所示,以所述第四覆盖层40为掩膜,在所述第二表面待形成所述第一P型掺杂区的部分形成所述第一P型掺杂区21,所述第一P型掺杂区的形成工艺为离子注入,注入离子为硼。As shown in FIG. 14, the fourth P-type doped region is formed on the second surface, and the first P-type doped region 21 is formed on the second surface. The formation process of the first P-type doping region is ion implantation, and the implanted ions are boron.
如图15所示,去除所述第四覆盖层40.As shown in Figure 15, the fourth cover layer 40 is removed.
S50:在所述第三表面内形成第一N型掺杂区,所述第一N型掺杂区的掺杂浓度大于所述N区的掺杂浓度。S50: forming a first N-type doping region in the third surface, wherein a doping concentration of the first N-type doping region is greater than a doping concentration of the N region.
具体的,在本申请的一个实施例中,在所述第三表面内形成第一N型掺杂区包括:Specifically, in an embodiment of the present application, forming the first N-type doping region in the third surface includes:
如图16所示,在所述平坦层9表面形成第五覆盖层50,所述第五覆盖层50覆盖所述第一表面、所述第二表面和部分所述第三表面,仅曝露所述第三表面待形成所述第一N型掺杂区的部分;As shown in FIG. 16, a fifth cover layer 50 is formed on the surface of the flat layer 9, the fifth cover layer 50 covering the first surface, the second surface and a portion of the third surface, only exposed a portion of the third surface to be formed into the first N-type doped region;
如图17所示,以所述第五覆盖层为掩膜,在所述第三表面待形成所述第一N型掺杂区的部分形成所述第一N型掺杂区,所述第一N型掺杂区的形成工艺为离子注入,注入离子为磷;As shown in FIG. 17, the first N-type doped region is formed on a portion of the third surface where the first N-type doping region is to be formed, using the fifth capping layer as a mask. An N-type doped region is formed by ion implantation, and the implanted ions are phosphorus;
如图18所示,去除所述第五覆盖层50。As shown in FIG. 18, the fifth cover layer 50 is removed.
需要说明的是,在本申请上述实施例中,所述第一P型掺杂区和所述第一N型掺杂区的形成顺序可以互换,本申请对此并不做限定,具体视情况而定。It should be noted that, in the foregoing embodiment of the present application, the order of forming the first P-type doping region and the first N-type doping region may be interchanged, which is not limited in this application. Depending on the situation.
S60:在所述第二表面内形成第二P型掺杂区,并在所述第三表面内形成第二N型 掺杂区,其中,所述第二P型掺杂区位于所述第一P型掺杂区和所述P区之间,且所述第二P型掺杂区的掺杂浓度小于所述第一P型掺杂区的掺杂浓度;所述第二N型掺杂区位于所述第一N型掺杂区和所述N区之间,且所述第二N型掺杂区的掺杂浓度小于所述第一N型掺杂区的掺杂浓度。S60: forming a second P-type doped region in the second surface, and forming a second N-type in the third surface a doped region, wherein the second P-type doped region is between the first P-type doped region and the P region, and a doping concentration of the second P-type doped region is less than a doping concentration of the first P-type doping region; the second N-type doping region is between the first N-type doping region and the N region, and the second N-type doping region The doping concentration is less than the doping concentration of the first N-type doping region.
在上述实施例的基础上,在本发明的一个实施例中,在平行于所述第一P型掺杂区至所述P区的方向上,所述第二P型掺杂区的掺杂浓度逐渐降低;在平行于所述第一N型掺杂区至所述N区的方向上,所述第二N型掺杂区的掺杂浓度逐渐降低。On the basis of the above embodiments, in one embodiment of the present invention, the doping of the second P-type doping region is in a direction parallel to the first P-type doping region to the P region. The concentration gradually decreases; the doping concentration of the second N-type doped region gradually decreases in a direction parallel to the first N-type doped region to the N region.
在上述实施例的基础上,在本申请的一个实施例中,在所述第二表面内形成第二P型掺杂区,并在所述第三表面内形成第二N型掺杂区包括:In an embodiment of the present application, in a second embodiment of the present application, forming a second P-type doped region in the second surface, and forming a second N-type doped region in the third surface includes :
如图19所示,在所述凸起结构的第一表面形成第一掩膜层60,其中,所述第一掩膜层的形成工艺可以包括沉积、刻蚀;As shown in FIG. 19, a first mask layer 60 is formed on the first surface of the bump structure, wherein the forming process of the first mask layer may include deposition and etching;
如图20所示,在所述凸起结构朝向所述第二表面和所述第三表面的一侧形成侧墙结构70,所述侧墙结构70在所述平坦层9上的投影与所述第一P型掺杂区21不交叠,且与所述第一N型掺杂区31不交叠,其中,在所述第二表面,沿平行于所述第一P型掺杂区至所述P区的方向上,所述侧墙结构的厚度逐渐增加;在所述第三表面,沿平行于所述第一N型掺杂区至所述N区的方向上,所述侧墙结构的厚度逐渐增加;As shown in FIG. 20, a sidewall structure 70 is formed on a side of the convex structure facing the second surface and the third surface, and a projection and a projection of the sidewall structure 70 on the flat layer 9 The first P-type doped regions 21 do not overlap and do not overlap the first N-type doped regions 31, wherein, at the second surface, along the first P-type doped regions The thickness of the sidewall structure gradually increases in a direction to the P region; at the third surface, in a direction parallel to the first N-type doping region to the N region, the side The thickness of the wall structure is gradually increased;
如图21所示,在所述侧墙结构70背离所述平坦层9的一侧形成第二掩膜层80,所述第二掩膜层80覆盖所述第三表面、所述第一表面和所述第一P型掺杂区21,曝露所述侧墙结构70位于所述第二表面的部分,其中,所述第二掩膜层的形成工艺可以包括沉积、刻蚀;As shown in FIG. 21, a second mask layer 80 is formed on a side of the sidewall structure 70 facing away from the flat layer 9, the second mask layer 80 covering the third surface, the first surface And the first P-type doping region 21, exposing the portion of the sidewall structure 70 at the second surface, wherein the forming process of the second mask layer may include depositing and etching;
如图22所示,以所述第二掩膜层80为掩膜,在所述第二表面位于所述侧墙结构70下方的区域内形成第二P型掺杂区22,所述第二P型掺杂区的形成工艺为离子注入,注入离子为硼;As shown in FIG. 22, using the second mask layer 80 as a mask, a second P-type doped region 22 is formed in a region of the second surface below the sidewall spacer 70, the second The formation process of the P-type doping region is ion implantation, and the implanted ions are boron;
如图23所示,去除所述第二掩膜层80;As shown in Figure 23, the second mask layer 80 is removed;
如图24所示,在所述侧墙结构70背离所述平坦层9的一侧形成第三掩膜层90,所述第三掩膜层90覆盖所述第二表面、所述第一表面和所述第一N型掺杂区31,曝露所述侧墙结构70位于所述第三表面的部分;As shown in FIG. 24, a third mask layer 90 is formed on a side of the sidewall structure 70 facing away from the flat layer 9, the third mask layer 90 covering the second surface, the first surface And the first N-type doping region 31 exposing a portion of the sidewall structure 70 at the third surface;
如图25所示,以所述第三掩膜层90为掩膜,在所述第三表面位于所述侧墙结构70下方的区域内形成第二N型掺杂区32,所述第二N型掺杂区的形成工艺为离子注入,注入离子为磷;As shown in FIG. 25, using the third mask layer 90 as a mask, a second N-type doping region 32 is formed in a region of the third surface below the sidewall structure 70, the second The formation process of the N-type doping region is ion implantation, and the implanted ions are phosphorus;
其中,所述第一掩膜层与所述第二掩膜层的材料不同,且所述第一掩膜层与所述第三掩膜层的材料不同。具体的,在本申请的一个实施例中,所述第一掩膜层的材料为氮化硅、锗或氮氧化硅,所述第二掩膜层的材料为二氧化硅,所述第三掩膜层的材料为二氧化硅,但本申请对此并不做限定,只要保证所述第一掩膜层和所述第二掩膜层的材料不同即可。The material of the first mask layer and the second mask layer are different, and the materials of the first mask layer and the third mask layer are different. Specifically, in an embodiment of the present application, the material of the first mask layer is silicon nitride, germanium or silicon oxynitride, and the material of the second mask layer is silicon dioxide, the third The material of the mask layer is silicon dioxide, but the present application does not limit this, as long as the materials of the first mask layer and the second mask layer are different.
此外,本申请实施例中,该方法在形成所述第二N型掺杂区32之后还包括:In addition, in the embodiment of the present application, after the forming the second N-type doping region 32, the method further includes:
如图26所示,依次除去所述第三掩膜层90、所述侧墙结构70和所述第一掩膜层 60。As shown in FIG. 26, the third mask layer 90, the sidewall structure 70, and the first mask layer are sequentially removed. 60.
需要说明的是,在本申请实施例中,所述第二P型掺杂区和所述第二N型掺杂区的形成顺序可以互换,本申请对此并不做限定,具体视情况而定。It should be noted that, in the embodiment of the present application, the order of forming the second P-type doping region and the second N-type doping region may be interchanged, which is not limited in this application, as the case may be. And set.
在本申请实施例中,由于在所述第二表面待形成所述第二P型掺杂区的区域,沿所述第一P型掺杂区至所述PN结结构的方向,所述侧墙结构的厚度逐渐增加,因此,在以所述侧墙结构和所述第二掩膜层为掩膜,在所述第二表面内形成所述第二P型掺杂区时,可以使得沿所述第一P型掺杂区至所述PN结结构的方向,所述第二P型掺杂区的掺杂浓度逐渐降低。In the embodiment of the present application, due to the region of the second surface where the second P-type doping region is to be formed, the direction along the first P-type doping region to the PN junction structure, the side The thickness of the wall structure is gradually increased. Therefore, when the second P-type doped region is formed in the second surface by using the sidewall structure and the second mask layer as a mask, the edge can be made The doping concentration of the second P-type doped region gradually decreases in a direction from the first P-type doping region to the PN junction structure.
同理,由于在所述第三表面待形成所述第二N型掺杂区的区域,沿所述第一N型掺杂区至所述PN结结构的方向,所述侧墙结构的厚度逐渐增加,因此,在以所述侧墙结构和所述第三掩膜层为掩膜,在所述第三表面内形成所述第二N型掺杂区时,可以使得沿所述第一N型掺杂区至所述PN结结构的方向,所述第二N型掺杂区的掺杂浓度逐渐降低。Similarly, due to the region of the third surface where the second N-type doping region is to be formed, the thickness of the sidewall structure along the direction of the first N-type doping region to the PN junction structure Gradually increasing, therefore, when the second N-type doped region is formed in the third surface by using the sidewall structure and the third mask layer as a mask, the first along the first The doping concentration of the second N-type doped region gradually decreases from the N-type doped region to the direction of the PN junction structure.
需要说明的是,在上述任一实施例的基础上,在本申请的一个实施例中,该制作方法还包括:It should be noted that, in an embodiment of the present application, the manufacturing method further includes:
形成覆盖所述凸起结构的第一绝缘层,所述第一绝缘层中具有第一通孔和第二通孔;Forming a first insulating layer covering the protruding structure, the first insulating layer having a first through hole and a second through hole therein;
形成通过所述第一通孔与所述第一P型掺杂区电连接的第一电极;Forming a first electrode electrically connected to the first P-type doping region through the first via hole;
形成通过所述第二通孔与所述第一N型掺杂区电连接的第二电极;Forming a second electrode electrically connected to the first N-type doping region through the second via hole;
其中,所述第一电极用于电连接驱动电路和所述第一P型掺杂区,所述第二电极用于电连接驱动电路和所述第一N型掺杂区。Wherein the first electrode is for electrically connecting the driving circuit and the first P-type doping region, and the second electrode is for electrically connecting the driving circuit and the first N-type doping region.
综上所述,本申请实施例所提供的相位调制器的制作方法制作的相位调制器,通过将所述P型掺杂区划分成所述第一P型掺杂区和所述第二P型掺杂区两部分,其中,所述第二P型掺杂区的掺杂浓度小于所述第一P型掺杂区的掺杂浓度,从而利用所述第一P型掺杂区的重掺杂浓度实现所述相位调制器与驱动电路的良好电接触,并利用所述第二P型掺杂区来降低所述P型掺杂区靠近所述PN结结构一侧的掺杂浓度,降低所述相位调制器的光传输损耗,进而降低所述硅基电光调制器的光传输损耗。同时,本申请实施例所提供的相位调制器制作方法制作的相位调制器,还通过将所述N型掺杂区划分成所述第一N型掺杂区和所述第二N型掺杂区两部分,其中,所述第二N型掺杂区的掺杂浓度小于所述第一N型掺杂区的掺杂浓度,从而利用所述第一N型掺杂区的重掺杂浓度实现所述相位调制器与驱动电路的良好电接触,并利用所述第二N型掺杂区来降低所述N型掺杂区靠近所述PN结结构一侧的掺杂浓度,降低所述相位调制器的光传输损耗,进而降低所述硅基电光调制器的光传输损耗。In summary, the phase modulator fabricated by the method for fabricating the phase modulator provided by the embodiment of the present application divides the P-type doped region into the first P-type doped region and the second P-type. Two portions of the doped region, wherein a doping concentration of the second P-type doping region is smaller than a doping concentration of the first P-type doping region, thereby utilizing re-doping of the first P-type doping region The impurity concentration achieves good electrical contact between the phase modulator and the driving circuit, and utilizes the second P-type doping region to reduce the doping concentration of the P-type doping region near the side of the PN junction structure, and reduce The optical transmission loss of the phase modulator, which in turn reduces the optical transmission loss of the silicon-based electro-optic modulator. Meanwhile, the phase modulator fabricated by the phase modulator manufacturing method provided by the embodiment of the present application further divides the N-type doping region into the first N-type doping region and the second N-type doping region. a two-part, wherein a doping concentration of the second N-type doping region is smaller than a doping concentration of the first N-type doping region, thereby realizing utilizing a heavily doped concentration of the first N-type doping region The phase modulator is in good electrical contact with the driving circuit, and uses the second N-type doping region to reduce the doping concentration of the N-type doping region near the side of the PN junction structure, and reduce the phase The optical transmission loss of the modulator, which in turn reduces the optical transmission loss of the silicon-based electro-optic modulator.
需要说明的是,由于本申请实施例所提供相位调制器的制作方法中,各组成结构的形成工艺广泛应用于CMOS(Complementary Metal Oxide Semiconductor,即互补金属氧化物半导体)制作中,因此,本申请实施例所提供相位调制器的制作方法具有高度的稳定性和可靠性。而且,基于本申请实施例所提供相位调制器的制作工艺与传统 的超大规模集成电路CMOS工艺兼容,无需特殊工艺,有利于器件的大规模制造和成本的降低。It should be noted that, in the manufacturing method of the phase modulator provided in the embodiment of the present application, the forming process of each component structure is widely applied to the fabrication of a CMOS (Complementary Metal Oxide Semiconductor), and therefore, the present application The fabrication method of the phase modulator provided by the embodiment has high stability and reliability. Moreover, the manufacturing process and the tradition of the phase modulator provided by the embodiment of the present application The VLSI CMOS process is compatible and requires no special processes, which facilitates large-scale manufacturing and cost reduction of the device.
本说明书中各个部分采用递进的方式描述,每个部分重点说明的都是与其他部分的不同之处,各个部分之间相同相似部分互相参见即可。Each part of this manual is described in a progressive manner. Each part focuses on the differences from other parts. The same similar parts between the parts can be referred to each other.
对所公开的实施例的上述说明,使本领域专业技术人员能够实现或使用本申请。对这些实施例的多种修改对本领域的专业技术人员来说将是显而易见的,本文中所定义的一般原理可以在不脱离本申请的精神或范围的情况下,在其它实施例中实现。因此,本申请将不会被限制于本文所示的实施例,而是要符合与本文所公开的原理和新颖特点相一致的最宽的范围。 The above description of the disclosed embodiments enables those skilled in the art to make or use the application. Various modifications to these embodiments are obvious to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the application. Therefore, the application is not limited to the embodiments shown herein, but the broadest scope consistent with the principles and novel features disclosed herein.

Claims (10)

  1. 一种相位调制器,其特征在于,包括:A phase modulator, comprising:
    PN结结构,所述PN结结构包括相对设置的P区和N区以及位于所述P区和所述N区之间的PN结;a PN junction structure, the PN junction structure including oppositely disposed P regions and N regions; and a PN junction between the P region and the N region;
    与所述P区电连接的P型掺杂区,所述P型掺杂区包括第一P型掺杂区和第二P型掺杂区,其中,所述第二P型掺杂区位于所述P区与所述第一P型掺杂区之间,且所述第一P型掺杂区的掺杂浓度大于所述第二P型掺杂区的掺杂浓度;a P-type doped region electrically connected to the P region, the P-type doped region includes a first P-type doped region and a second P-type doped region, wherein the second P-type doped region is located Between the P region and the first P-type doped region, and a doping concentration of the first P-type doped region is greater than a doping concentration of the second P-type doped region;
    与所述N区电连接的N型掺杂区,所述N型掺杂区包括第一N型掺杂区和第二N型掺杂区,其中,所述第二N型掺杂区位于所述第一N型掺杂区与所述N区之间,且所述第一N型掺杂区的掺杂浓度大于所述第二N型掺杂区的掺杂浓度。An N-type doped region electrically connected to the N region, the N-type doped region includes a first N-type doped region and a second N-type doped region, wherein the second N-type doped region is located The doping concentration of the first N-type doping region is greater than the doping concentration of the second N-type doping region.
  2. 根据权利要求1所述的相位调制器,其特征在于,所述第二P型掺杂区的掺杂浓度大于所述P区的掺杂浓度;所述第二N型掺杂区的掺杂浓度大于所述N区的掺杂浓度。The phase modulator according to claim 1, wherein a doping concentration of the second P-type doping region is greater than a doping concentration of the P region; and a doping of the second N-type doping region The concentration is greater than the doping concentration of the N region.
  3. 根据权利要求1或2所述的相位调制器,其特征在于,在平行于所述第一P型掺杂区至所述P区的方向上,所述第二P型掺杂区的掺杂浓度逐渐降低。The phase modulator according to claim 1 or 2, wherein the doping of the second P-type doping region is in a direction parallel to the first P-type doping region to the P region The concentration gradually decreases.
  4. 根据权利要求1或2所述的相位调制器,其特征在于,在平行于所述第一N型掺杂区至所述N区的方向上,所述第二N型掺杂区的掺杂浓度逐渐降低。The phase modulator according to claim 1 or 2, wherein the doping of the second N-type doping region is in a direction parallel to the first N-type doping region to the N region The concentration gradually decreases.
  5. 根据权利要求1所述的相位调制器,其特征在于,所述第一P型掺杂区和所述第一N型掺杂区的掺杂浓度位于1*1020数量级,所述P区和所述N区的掺杂浓度位于1*1017-1*1018的数量级。The phase modulator according to claim 1, wherein a doping concentration of said first P-type doping region and said first N-type doping region is on the order of 1*10 20 , said P region and The doping concentration of the N region is on the order of 1*10 17 -1*10 18 .
  6. 一种包括权利要求1-5任一项所述的相位调制器的硅基电光调制器。A silicon-based electro-optic modulator comprising the phase modulator of any of claims 1-5.
  7. 一种相位调制器的制作方法,其特征在于,包括:A method for fabricating a phase modulator, comprising:
    提供硅晶圆,所述硅晶圆包括硅基底、位于所述硅基底表面的隔离层以及位于所述隔离层背离所述硅基底一侧的平坦层;Providing a silicon wafer, the silicon wafer comprising a silicon substrate, an isolation layer on a surface of the silicon substrate, and a planar layer on a side of the isolation layer facing away from the silicon substrate;
    去除部分所述平坦层,形成凸起结构,所述凸起结构包括第一表面和位于所述第一表面两侧的第二表面和第三表面,所述第一表面高于所述第二表面和所述第三表面;Removing a portion of the planar layer to form a raised structure, the raised structure comprising a first surface and a second surface and a third surface on opposite sides of the first surface, the first surface being higher than the second a surface and the third surface;
    在所述第一表面内形成PN结结构,所述PN结结构包括相对设置的P区和N区以及位于所述P区和所述N区之间的PN结;Forming a PN junction structure in the first surface, the PN junction structure including oppositely disposed P regions and N regions; and a PN junction between the P region and the N region;
    在所述第二表面内形成第一P型掺杂区,所述第一P型掺杂区的掺杂浓度大于所述P区的掺杂浓度;Forming a first P-type doping region in the second surface, a doping concentration of the first P-type doping region being greater than a doping concentration of the P region;
    在所述第三表面内形成第一N型掺杂区,所述第一N型掺杂区的掺杂浓度大于所述N区的掺杂浓度;Forming a first N-type doping region in the third surface, the doping concentration of the first N-type doping region being greater than a doping concentration of the N region;
    在所述第二表面内形成第二P型掺杂区,并在所述第三表面内形成第二N型掺杂区,其中,所述第二P型掺杂区位于所述第一P型掺杂区和所述P区之间,且所述第二P型掺杂区的掺杂浓度小于所述第一P型掺杂区的掺杂浓度;所述第二N型掺杂区位于所述第一N型掺杂区和所述N区之间,且所述第二N型掺杂区的掺杂浓度小于所述第一N型掺杂区的掺杂浓度。 Forming a second P-type doped region in the second surface, and forming a second N-type doped region in the third surface, wherein the second P-type doped region is located in the first P Between the doped region and the P region, and the doping concentration of the second P-doped region is less than the doping concentration of the first P-type doped region; the second N-type doped region Located between the first N-type doped region and the N region, and the doping concentration of the second N-type doped region is less than a doping concentration of the first N-type doped region.
  8. 根据权利要求7所述的制作方法,其特征在于,在平行于所述第一P型掺杂区至所述P区的方向上,所述第二P型掺杂区的掺杂浓度逐渐降低;在平行于所述第一N型掺杂区至所述N区的方向上,所述第二N型掺杂区的掺杂浓度逐渐降低。The fabrication method according to claim 7, wherein the doping concentration of the second P-type doping region is gradually decreased in a direction parallel to the first P-type doping region to the P region. The doping concentration of the second N-type doping region gradually decreases in a direction parallel to the first N-type doping region to the N region.
  9. 根据权利要求8所述的制作方法,其特征在于,在所述第二表面内形成第二P型掺杂区,并在所述第三表面内形成第二N型掺杂区包括:The method according to claim 8, wherein forming a second P-type doped region in the second surface and forming a second N-type doped region in the third surface comprises:
    在所述凸起结构的第一表面形成第一掩膜层;Forming a first mask layer on the first surface of the raised structure;
    在所述凸起结构朝向所述第二表面和所述第三表面的一侧形成侧墙结构,所述侧墙结构在所述平坦层上的投影与所述第一P型掺杂区不交叠,且与所述第一N型掺杂区不交叠;Forming a sidewall structure on a side of the convex structure facing the second surface and the third surface, a projection of the sidewall structure on the flat layer and the first P-type doping region not Overlapped and not overlapping the first N-type doped region;
    在所述侧墙结构背离所述平坦层的一侧形成第二掩膜层,所述第二掩膜层覆盖所述第三表面、所述第一表面和所述第一P型掺杂区,曝露所述侧墙结构位于所述第二表面的部分;Forming a second mask layer on a side of the sidewall structure facing away from the planar layer, the second mask layer covering the third surface, the first surface, and the first P-type doped region Exposing a portion of the sidewall structure at the second surface;
    以所述第二掩膜层为掩膜,在所述第二表面位于所述侧墙结构下方的区域内形成第二P型掺杂区;Forming a second P-type doped region in a region of the second surface below the sidewall structure, using the second mask layer as a mask;
    去除所述第二掩膜层;Removing the second mask layer;
    在所述侧墙结构背离所述平坦层的一侧形成第三掩膜层,所述第三掩膜层覆盖所述第二表面、所述第一表面和所述第一N型掺杂区,曝露所述侧墙结构位于所述第三表面的部分;Forming a third mask layer on a side of the sidewall structure facing away from the planar layer, the third mask layer covering the second surface, the first surface, and the first N-type doped region Exposing a portion of the side wall structure at the third surface;
    以所述第三掩膜层为掩膜,在所述第三表面位于所述侧墙结构下方的区域内形成第二N型掺杂区;Forming a second N-type doped region in a region of the third surface below the sidewall structure by using the third mask layer as a mask;
    其中,所述第一掩膜层与所述第二掩膜层的材料不同,且所述第一掩膜层与所述第三掩膜层的材料不同。The material of the first mask layer and the second mask layer are different, and the materials of the first mask layer and the third mask layer are different.
  10. 根据权利要求9所述的制作方法,其特征在于,所述第一掩膜层的材料为氮化硅、锗或氮氧化硅。 The method according to claim 9, wherein the material of the first mask layer is silicon nitride, germanium or silicon oxynitride.
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