WO2019024334A1 - 一种紫外led芯片及其制备方法 - Google Patents

一种紫外led芯片及其制备方法 Download PDF

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Publication number
WO2019024334A1
WO2019024334A1 PCT/CN2017/112028 CN2017112028W WO2019024334A1 WO 2019024334 A1 WO2019024334 A1 WO 2019024334A1 CN 2017112028 W CN2017112028 W CN 2017112028W WO 2019024334 A1 WO2019024334 A1 WO 2019024334A1
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Prior art keywords
layer
epitaxial structure
type
gallium nitride
aluminum
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PCT/CN2017/112028
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English (en)
French (fr)
Inventor
何苗
杨思攀
王成民
王润
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广东工业大学
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Priority claimed from CN201720946825.1U external-priority patent/CN207265051U/zh
Priority claimed from CN201710640094.2A external-priority patent/CN107437542B/zh
Application filed by 广东工业大学 filed Critical 广东工业大学
Priority to US16/153,710 priority Critical patent/US10811561B2/en
Publication of WO2019024334A1 publication Critical patent/WO2019024334A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof

Definitions

  • the present application relates to the field of LED chip technology, and more particularly to an ultraviolet LED chip and a method for fabricating the same.
  • nitride ultraviolet LEDs exhibit excellent output performance, long life, cold light source, It is further replacing traditional ultraviolet light sources because of its high efficiency and reliability, uniform illumination brightness and green safety and non-toxicity.
  • a cross-sectional structure of a current mainstream ultraviolet LED chip includes a substrate 10 and a substrate 20, wherein the substrate surface has an epitaxial structure including aluminum nitride which is sequentially arranged on the surface of the substrate.
  • the substrate and the substrate are assembled by a flip-chip eutectic soldering process to achieve electrical connection between the electrode and the epitaxial structure; for the ultraviolet LED chip, the first P-type
  • the conductive layer 16 is typically a P-type gallium nitride aluminum layer or a P-type gallium nitride aluminum transition layer
  • the second P-type conductive layer 17 is typically a P-type gallium nitride layer.
  • the ultraviolet LED chip In the process of the later ohmic contact layer preparation, vapor deposition electrode, flip-chip eutectic soldering and passivation treatment process, the ultraviolet LED chip has a large heat generation but heat dissipation.
  • the performance of the ultraviolet LED chip that is not timely is limited, the heat dissipation of the insulating layer provided on the metal substrate is poor, and there is a problem of electrostatic discharge hazard in the human body mode or the machine mode.
  • the present invention provides an ultraviolet LED chip and a preparation method thereof to solve the problem of poor heat dissipation and electrostatic discharge hazard existing in the ultraviolet LED chip.
  • the embodiment of the present invention provides the following technical solutions:
  • An ultraviolet LED chip comprising:
  • An epitaxial structure sequentially grown based on the surface of the substrate, and an insulating layer and a groove contact layer disposed in the epitaxial structure;
  • the substrate on a side of the epitaxial structure facing away from the substrate, the substrate is provided with a wiring layer, a P electrode, an N electrode and an intermediate electrode toward a side surface of the substrate;
  • the epitaxial structure includes:
  • the insulating layer is located in a middle portion of the epitaxial structure for isolating the epitaxial structure and separating the epitaxial structure into a first epitaxial structure and a second epitaxial structure;
  • the recess contact layer penetrates a portion of the first epitaxial structure, is electrically connected to the N-type gallium nitride aluminum layer of the first epitaxial structure, and is insulated from other structures of the first epitaxial structure, the recess
  • the contact layer is provided with a sloped surface facing away from the side of the insulating layer;
  • the P electrode is electrically connected to the thin film conductive layer in the first epitaxial structure
  • the N electrode is electrically connected to the N-type gallium nitride aluminum layer of the second epitaxial structure, the intermediate electrode and the groove
  • the contact layer and the thin film conductive layer in the second epitaxial structure are electrically connected.
  • the N-type aluminum gallium nitride layer comprises: a first N-type aluminum gallium nitride layer and a second N Type gallium nitride aluminum layer;
  • the second N-type aluminum gallium nitride layer is located on a side of the first N-type aluminum gallium nitride layer facing away from the superlattice layer;
  • the doping concentration of the epitaxial material of the second N-type aluminum gallium nitride layer is smaller than the doping concentration of the first N-type aluminum gallium nitride layer;
  • the thickness of the epitaxial layer of the second N-type aluminum gallium nitride layer is smaller than the thickness of the first N-type aluminum gallium nitride layer.
  • the epitaxial structure further includes:
  • the dielectric constant of the N-type electron energy modulating layer is smaller than a dielectric constant of the first N-type aluminum gallium nitride layer and the second N-type aluminum gallium nitride layer, and an epitaxy of the N-type electron energy regulating layer
  • the doping concentration of the material is greater than the doping concentration of the first aluminum gallium nitride layer and the second aluminum gallium nitride layer.
  • it also includes:
  • a passivation layer covering the first epitaxial structure and the second epitaxial structure bare terrace surface and sidewall;
  • the passivation layer further has a first connection portion between the intermediate electrode and the first epitaxial structure and the groove contact layer faces away from the side of the insulating layer to
  • the recess contact layer is electrically connected to the first N-type aluminum gallium nitride layer in the first epitaxial structure and is insulated from other structures of the first epitaxial structure.
  • the second N-type aluminum gallium nitride layer has a thickness of 0.1 ⁇ m ⁇ 0.01 ⁇ m, including an endpoint value.
  • the epitaxial structure further includes:
  • the method further includes: a first electrode contact layer and a second electrode contact layer;
  • the passivation layer further includes a second connection portion, wherein
  • the first electrode contact layer penetrates the thin film conductive layer of the first epitaxial structure, and the P electrode is electrically connected to the metal reflective layer of the first epitaxial structure through the first electrode contact layer;
  • the second electrode contact layer partially penetrates the second epitaxial structure, and the N electrode passes The second electrode contact layer is electrically connected to the first N-type aluminum gallium nitride layer of the second epitaxial structure;
  • the second connecting portion annularly covers the sidewall of the second electrode contact layer to insulate the second electrode contact layer from other structures of the second epitaxial structure.
  • a method for preparing an ultraviolet LED chip comprising:
  • Etching from the middle of the epitaxial structure exposing the N-type gallium nitride aluminum layer of the epitaxial structure to form a first recess, and the first recess is provided with a slope;
  • the substrate and the substrate to electrically connect the P electrode to a second P-type conductive layer of the first epitaxial structure, the N electrode and a first N of the second epitaxial structure
  • the aluminum gallium nitride layer is electrically connected
  • the intermediate electrode is electrically connected to the groove contact layer and the second P-type conductive layer of the second epitaxial structure.
  • the aluminum nitride nucleation layer, the superlattice layer, the N-type gallium nitride aluminum layer, the quantum well layer, the electron blocking layer, and the first P-type conductive layer are sequentially prepared on the surface side of the substrate.
  • the layer, the second P-type conductive layer, the metal reflective layer and the thin film conductive layer comprise:
  • the first N-type aluminum gallium nitride aluminum layer and the second N-type aluminum gallium nitride aluminum layer together constitute the N-type aluminum gallium nitride aluminum layer, and the epitaxial material doping of the second N-type aluminum gallium nitride aluminum layer The concentration is less than the doping concentration of the first N-type aluminum gallium nitride layer.
  • an embodiment of the present invention provides an ultraviolet LED chip and a method for fabricating the same, wherein the ultraviolet LED chip is formed by growing an epitaxial structure on a surface of the substrate and in the middle of the epitaxial structure.
  • An aluminum layer is drawn, and the ultraviolet LED chip forms a light emitting diode and an electrostatic protection diode by the N electrode, the P electrode and the intermediate electrode on the substrate, respectively, and the first epitaxial structure and the second epitaxial structure, the groove contact layer While acting as an N-type electrode of the light-emitting diode, an electrical connection between the N-type electrode of the light-emitting diode and the P-type region of the electrostatic protection diode is also provided, so that the electrostatic protection diode is connected in reverse parallel connection at both ends of the light-emitting diode, which is an ultraviolet LED
  • the chip provides a channel for electrostatic discharge, which reduces the direct damage of
  • the quantum well layer is a portion mainly generating heat, and the generated heat can be directly conducted to the substrate through the groove contact layer adjacent thereto, thereby optimizing the heat dissipation performance of the ultraviolet LED chip.
  • the inclined surface of the groove contact layer is disposed away from the insulating layer, and the light emitted by the light emitting diode is scattered by the reflection of the inclined surface and the Fresnel scattering, thereby improving the light extraction efficiency of the ultraviolet LED chip.
  • FIG. 1 is a schematic cross-sectional structural view of a prior art ultraviolet LED chip
  • FIG. 2 is a schematic cross-sectional structural view of an ultraviolet LED chip according to an embodiment of the present application.
  • FIG. 3 is a schematic diagram of an equivalent circuit of an ultraviolet LED chip according to an embodiment of the present application.
  • FIG. 4 is a schematic flow chart of a method for preparing an ultraviolet LED chip according to an embodiment of the present application
  • FIG. 5 is a schematic flow chart of a method for preparing an ultraviolet LED chip according to another embodiment of the present application.
  • the ultraviolet LED chip includes:
  • An epitaxial structure W10 sequentially grown on the surface side of the substrate 100, and an insulating layer 117 and a recess contact layer 116 disposed in the epitaxial structure;
  • the substrate 200 is provided with a wiring layer 201, a P electrode 204, an N electrode 202 and an intermediate electrode 203 toward a surface of the substrate 100;
  • the epitaxial structure includes:
  • An aluminum nitride nucleation layer 113, a superlattice layer 112, an N-type aluminum gallium nitride layer A10, a quantum well layer 107, an electron blocking layer 105, and a first P-type conductive layer 104 are sequentially grown based on the surface of the substrate 100.
  • the insulating layer 117 is located in the middle of the epitaxial structure for isolating the epitaxial structure, and separating the epitaxial structure into a first epitaxial structure W10 and a second epitaxial structure W20;
  • the recess contact layer 116 penetrates a portion of the first epitaxial structure W10, and is electrically connected to the first N-type aluminum gallium nitride layer A10 of the first epitaxial structure W10, and the other of the first epitaxial structure W10 Structural insulation, the groove contact layer 116 is provided with a slope facing away from the insulating layer 117;
  • the P electrode 204 is electrically connected to the metal reflective layer 102 of the first epitaxial structure W10, and the N electrode 202 is electrically connected to the first N-type aluminum gallium nitride layer A10 of the second epitaxial structure W20.
  • the intermediate electrode 203 is electrically connected to the groove contact layer 116 and the second P-type conductive layer 103 of the second epitaxial structure W20.
  • the first P-type conductive layer 104 is generally a gallium nitride aluminum layer or a gallium nitride aluminum transition layer; the second P-type conductive layer 103 is generally Gallium nitride layer.
  • the ultraviolet LED chip insulates the first epitaxial structure W10 and the second epitaxial structure W20 from each other by providing an insulating layer 117 on the surface of the substrate 100, and the first N-type gallium nitride of the first epitaxial structure W10 is passed through the recess contact layer 116.
  • the aluminum layer A10 is taken out, and the ultraviolet LED chip forms an LED and an electrostatic protection diode through the N electrode 202, the P electrode 204 and the intermediate electrode 203 on the substrate 200, respectively, in cooperation with the first epitaxial structure W10 and the second epitaxial structure W20.
  • FIG. 3 is an equivalent circuit diagram of a light emitting diode and an electrostatic protection diode in the ultraviolet LED chip.
  • reference numerals A, B, C, and D correspond to A, B, and C in FIG.
  • D that is, the P electrode 204 is the forward electrode A of the light emitting diode in FIG. 3
  • the N electrode 202 is the reverse electrode C of the electrostatic protection diode in FIG. 3
  • the intermediate electrode 203 is in the figure 3 is the counter electrode B of the light-emitting diode and the forward electrode D of the electrostatic protection diode.
  • the recess contact layer 116 while acting as an N-type electrode of the light emitting diode, also directly electrically connects the N-type electrode of the light emitting diode to the P-type region of the electrostatic protection diode, the electrostatic protection diode providing the ultraviolet LED chip
  • An electrostatic discharge channel reduces static discharge The direct harm of the electricity to the ultraviolet LED chip increases the forward voltage of the LED and the intensity of the antistatic discharge, thereby improving the yield and reliability of the ultraviolet LED chip.
  • the quantum well layer 107 is a portion mainly generating heat, and the generated heat can be directly conducted to the substrate 200 through the groove contact layer 116 adjacent thereto, thereby optimizing the heat dissipation of the ultraviolet LED chip. performance.
  • the inclined surface of the groove contact layer 116 is disposed away from the insulating layer 117, and the light emitted by the light emitting diode is scattered by the reflection of the inclined surface and the Fresnel scattering, thereby improving the light extraction efficiency of the ultraviolet LED chip.
  • the recess for accommodating the insulating layer 117 and the groove contact layer 116 may be formed by a process such as ICP etching, dry etching or wet etching, and then sequentially filling the recess with insulating material and
  • the insulating layer 117 and the groove contact layer 116 may be formed by a conductive material;
  • etching range of the first groove starting from the surface of the epitaxial structure Bottom up until a portion of the first N-type aluminum gallium nitride layer A10 is exposed.
  • the epitaxial structure is divided into two parts from the middle portion to form a first epitaxial structure W10 and a second epitaxial structure W20.
  • the first epitaxial structure W10 cooperates with the substrate 100 and the above structure to form a light emitting diode
  • the second epitaxy The structure W20 cooperates with the substrate 100 and the above structure to form an electrostatic protection diode; wherein the etching range of the second recess filling the insulating material to form the insulating layer 117 can be from the gallium aluminum layer from bottom to top until exposed Top sapphire substrate 100 position.
  • the first recess and the second recess are respectively filled with a conductive material and an insulating material to form a recess contact layer 116 and an insulating layer 117 structure; then the P-type electrode of the light emitting diode is disposed by externally providing an electrode contact layer structure
  • the N-type electrode of the electrostatic protection diode is electrically connected, so that the light-emitting diode and the electrostatic protection diode structure are connected in parallel and in reverse connection, and the equivalent circuit diagram thereof is referred to FIG. This directly avoids the direct impact of large current pulses or surge voltage on the LED in the circuit, and reduces the harm of the electrostatic discharge to the UV LED chip.
  • the cross-sectional shape of the groove contact layer 116 may also be a triangle, but is preferably a right-angled trapezoid, and the groove contact layer 116 of the right-angled trapezoid shape has a better reflection effect on the light than the groove contact layer 116 of the triangular shape. It is beneficial to improve the light extraction efficiency of the ultraviolet LED chip.
  • the growth environment temperature in the reaction device is rapidly increased and maintained at about 1040 ° C, and an epitaxial growth continues on the surface of the quantum well layer 107.
  • An electron blocking layer 105 and a first P-type conductive layer 104 doped with Mg are provided.
  • the temperature of the growth device is slowly lowered, and the second P-type conductive layer 103 is further epitaxially formed on the surface of the first P-type conductive layer 104, and the surface network is removed by a dry etching or a wet etching process.
  • a silica layer of lattice structure is provided.
  • a metal reflective layer is deposited on the P-type gallium nitride mesa at the bottom of the LED epitaxial layer structure, and the thickness thereof is preferably 50 nm ⁇ 5 nm, and special processing such as surface roughening is performed.
  • the metal reflective layer structure is made of metal aluminum or titanium aluminum alloy, so that a part of the light that is directed to the bottom can be reflected back to the front surface by the maximum extent, and then the light is effectively emitted, thereby effectively enhancing the ultraviolet light LED.
  • the optical output power of the chip is made of metal aluminum or titanium aluminum alloy, so that a part of the light that is directed to the bottom can be reflected back to the front surface by the maximum extent, and then the light is effectively emitted, thereby effectively enhancing the ultraviolet light LED.
  • a thin film conductive layer is further disposed on the surface of the metal reflective layer, thereby substantially completing the growth process of the LED epitaxial layer.
  • a transparent thin film conductive layer having a thickness of 50 nm ⁇ 5 nm is uniformly deposited by using a magnetron sputtering apparatus in combination with a process such as evaporation or electroplating, and the conductive layer of the thin film is made of a GaZnO material having excellent conductivity, but Conductive film materials such as ITO or FTO can be used. Due to the high density characteristics of the thin film conductive layer, the high reflectivity is exhibited, so that the ultraviolet LED chip emits light more uniformly and has higher light efficiency, which greatly increases the light output power.
  • the vertical sidewall of one end of the LED epitaxial structure is etched, and then a slanted sidewall structure is formed, using the inclined sidewall provided.
  • the reflection and the Fresnel scattering scatter the light to improve the light extraction efficiency of the LED chip; then, the P electrode 204 and the electrode contact layer structure are disposed on the thin film conductive layer, and the electrode region located in the epitaxial layer structure of the LED is
  • the structure composed of the thin film conductive layer preferably serves as a medium for interconnecting the external electrode contact structure and the internal epitaxial layer structure, thereby functioning as an intermediate bridge contact.
  • the N-type aluminum gallium nitride layer A10 includes: a first N-type aluminum gallium nitride layer 111 and a second N-type nitrogen.
  • Gallium aluminum layer 109 includes: a first N-type aluminum gallium nitride layer 111 and a second N-type nitrogen.
  • the second N-type aluminum gallium nitride layer 109 is located on a side of the first N-type aluminum gallium nitride layer 111 facing away from the superlattice layer 112;
  • the epitaxial material doping concentration of the second N-type aluminum gallium nitride layer 109 is smaller than the doping concentration of the first N-type aluminum gallium nitride layer 111.
  • the N-type aluminum gallium nitride layer A10 is optimized, and the first N-type aluminum gallium nitride layer 111 and the second N-type aluminum gallium nitride layer 109 having different doping concentrations are sequentially disposed.
  • the total thickness of the first N-type aluminum gallium nitride layer 111 and the second N-type aluminum gallium nitride layer 109 is the same as the thickness of the mainstream aluminum gallium nitride layer in the prior art.
  • the thickness of the second N-type aluminum gallium nitride layer 109 is made much smaller than the thickness of the first N-type aluminum gallium nitride layer 111 by thinning the second N-type aluminum gallium nitride layer 109.
  • the thickness of the N-type gallium nitride aluminum layer A10 composed of the first N-type aluminum gallium nitride aluminum layer 111 and the thinned second N-type aluminum gallium nitride aluminum layer 109 is formed. Maintaining at about 2 ⁇ m ⁇ 0.2 ⁇ m, on the one hand, by first rapidly increasing the temperature inside the reaction device and stabilizing at about 1040 ° C, a first epitaxial thickness of 1.8 ⁇ m ⁇ 0.18 ⁇ m is epitaxially formed on the surface of the superlattice structure.
  • Thinning treatment which directly increases the equivalent series resistance in the vertical direction of the LED epitaxial structure, so that the current extension of the LED epitaxial structure in the horizontal direction is more effective, not only improves the output intensity of the ultraviolet LED chip, but also The electrostatic discharge, surge voltage and high current pulse are harmed to the ultraviolet LED chip, and the reliability of the ultraviolet LED chip is improved.
  • the extension structure further includes:
  • the dielectric constant of the N-type electron energy modulating layer 110 is smaller than the dielectric constant of the first N-type aluminum gallium nitride layer 111 and the second N-type aluminum gallium nitride layer 109, and the N-type electron energy modulation
  • the epitaxial material doping concentration of layer 110 is greater than the material doping concentration of the first gallium nitride aluminum layer and the second gallium nitride aluminum layer.
  • the first N-type nitrogen is used under a high temperature condition in which the temperature inside the reaction apparatus is constant at about 1040 ° C.
  • an N-type electron energy adjusting layer 110 adopting a delta doping method is further provided, and the thickness thereof is preferably 0.1 ⁇ m ⁇ 0.01. Mm.
  • the N-type electron energy regulating layer 110 is an N-type gallium nitride aluminum epitaxial material having an aluminum composition of 40%-50%, and a dielectric constant smaller than the first N-type aluminum gallium nitride layer.
  • the ⁇ -doping type N-type electron energy modulating layer 110 Due to the presence of the ⁇ -doping type N-type electron energy modulating layer 110, the formation of leakage current is reduced, and the energy of electrons in the N-type region in the epitaxial structure is directly adjusted, and the hole injection efficiency is also improved.
  • the ultraviolet LED chip further includes:
  • a passivation layer 114 covering the first epitaxial structure W10 and the second epitaxial structure W20 bare terrace surface and sidewall;
  • the passivation layer 114 further has a first connection portion 1141 between the intermediate electrode 203 and the first epitaxial structure W10 and the groove contact layer 116 facing away from the insulation layer
  • the side of the 117 is such that the groove contact layer 116 is electrically connected to the first N-type aluminum gallium nitride layer 111 of the first epitaxial structure W10 and is insulated from other structures of the first epitaxial structure W10.
  • the passivation layer 114 not only functions to prevent the epitaxial structure of the ultraviolet LED chip from being corroded, oxidized, and destroyed, but also passes the groove contact layer 116 through the first connecting portion 1141.
  • the N-type electron energy modulating layer 110 of the first epitaxial structure W10 is electrically connected to the N-type aluminum gallium nitride layer A10, and the other junctions of the first epitaxial structure W10 Insulation.
  • the epitaxial structure further includes:
  • the preparation process of the epitaxial structure of the ultraviolet LED chip by continuing to deposit a mask structure on the second N-type aluminum gallium nitride layer 109, combined with deposition and In a process such as etching, a silicon dioxide layer of a grid structure is formed on the mask, and the epitaxial structure of the ultraviolet LED chip is cleaned and dried. Then, a current is deposited on the second N-type aluminum gallium nitride layer 109 by a magnetron sputtering device, and the thickness thereof is preferably 100 nm ⁇ 10 nm, and is further etched, roughened, etc. to form a pattern. The current expansion structure.
  • each period of the quantum well layer 107 includes an AlGaN well layer of 10 nm ⁇ 1 nm thick and an AlGaN barrier layer of 2 nm ⁇ 0.2 nm thick.
  • a current spreading layer is disposed between the quantum well layer 107 and the second N-type aluminum gallium nitride layer 109 in the epitaxial structure of the ultraviolet LED chip, so that the current flows in the lateral direction through the N-type aluminum gallium nitride layer A10. Most of the current after passing through the quantum well layer 107 is not concentrated in this region, which makes the current expansion more efficient, improves the injection efficiency, and reduces the generation of Joule heat.
  • the ultraviolet LED chip further includes: a first electrode contact layer 115 and a second electrode contact layer 106;
  • the passivation layer 114 further includes a second connection portion 1142, wherein
  • the first electrode contact layer penetrates the thin film conductive layer 101 of the first epitaxial structure W10, and the P electrode 204 is electrically connected to the metal reflective layer 102 of the first epitaxial structure W10 through the first electrode contact layer 115. ;
  • the second electrode contact layer partially penetrates the second epitaxial structure W20, and the N electrode 202 passes through the second electrode contact layer 106 and the first N-type aluminum gallium nitride layer in the second epitaxial structure W20 111 electrical connection;
  • the second connecting portion 1142 annularly covers the sidewall of the second electrode contact layer to insulate the second electrode contact layer from other structures of the second epitaxial structure W20.
  • the N electrode 202 region and the P electrode 204 region are further processed by a reverse etching process to form third recess structures having different depths, respectively.
  • the groove structure is preferably a cylindrical shape having a regular hexagonal cross section.
  • the etching range of the third recess structure at the N electrode 202 is from the bottom of the thin film conductive layer from bottom to top until a portion of the first N-type aluminum gallium nitride layer 111 is exposed; and the portion at the P electrode 204
  • the etching range of the three-groove structure only extends through the entire thin film conductive layer.
  • a plurality of internal electrode groove structures or groove structure matrices are disposed, and by strictly controlling the etching rate during the etching process, it is ensured that only a small portion of the mesa is etched, and the epitaxial extension is reduced. The etching and damage of the illuminating region of the sheet enhances the light output intensity of the ultraviolet LED chip.
  • a metal or alloy material is deposited into the third recess structure to form a first electrode contact layer and a second electrode contact layer, respectively.
  • the aluminum on the bottom surface of the electrode enhances the reflection of light, and also reduces the absorption of part of the light by the edge of the electrode and increases the extraction of the side light of the sapphire substrate 100.
  • the electrode recess structure and the internal contact layer structure described above when a large external voltage is applied to the ultraviolet LED chip, a large current pulse is formed flowing through the epitaxial layer of the ultraviolet LED chip.
  • the internal contact layer structure can also flow faster, which plays a better shunting function, and avoids the LED epitaxial wafer directly affected by the impact of a large current pulse.
  • the epitaxial structure of the ultraviolet LED chip is subjected to multiple annealing processes at different temperatures before and after growth, thereby enhancing the bonding strength between the material structures, reducing the internal contact resistance and improving the ultraviolet LED.
  • External electrodes P electrode 204, N electrode 202, and intermediate electrode 203 are respectively disposed at interfaces between the mesa, the internal contact layer, and the thin film conductive layer structure, and the other end of the external electrode is directly connected to the metal wiring layer 201 Connected.
  • the light-emitting efficiency of the LED chip is further improved by designing a novel reflective electrode made of Ti/Al alloy material and optimizing the ohmic contact mode and bonding strength.
  • a novel reflective electrode made of Ti/Al alloy material and optimizing the ohmic contact mode and bonding strength.
  • the mesa of the epitaxial structure of the ultraviolet LED chip provided by the embodiment of the present application, the sidewall of the epitaxial layer structure, and the surface of the external electrode are all provided with a passivation layer 114 for insulation treatment, thereby preventing corrosion of the chip by the external environment.
  • the surface of the inner contact layer is also subjected to annular passivation treatment to form a ring-shaped columnar isolation layer structure covering the inner contact layer, thereby avoiding the formation of leakage current at the sidewall or the mesa of the ultraviolet LED chip, and preventing the metal electrode contact layer structure.
  • the short circuit between the sidewall and the surface of the chip contact layer directly forms a short circuit caused by the current loop.
  • the thickness of the isolation layer is optimally set to 10 nm ⁇ 1 nm.
  • the wafer surface bonding technology is used to perform the later die bonding, flip chip bonding, and packaging processes of the ultraviolet LED chip, and the LED chip described above is passed through the electrode contact layer structure in the middle to perform flip-chip eutectic soldering.
  • the soldering is performed on the substrate 200 provided with the metal wiring layer 201, thereby completing the preliminary packaging process of the LED chip.
  • the heat sink structure of the substrate 200 is further provided with a heat sink composed of a high-density wiring layer 201 and a base made of an aluminum nitride ceramic. structure.
  • the quantum well layer 107 is the main heat source in the ultraviolet LED chip, the thermal diffusion path between the heat source and the heat sink structure of the substrate 200 is significantly shortened, and the heat dissipation of the LED chip is accelerated, thereby preventing the chip from failing due to overheating.
  • the structure of a plurality of electrode contact layers provided in the LED epitaxial wafer structure of the present invention since the inside is filled with a metal or a metal alloy material having good thermal conductivity, the heat inside the ultraviolet LED chip is also timely transmitted. To the outside.
  • the wiring layer 201 is maximally expanded to the outside on the surface of the substrate 200, but the middle portion of the wiring layer 201 is ensured to form two separate portions, and is formed between the P electrode 204 region and the N electrode 202 region.
  • An isolated, isolated track with a certain width prevents the occurrence of short circuits in the UV LED chip.
  • the preparation method of the ultraviolet LED chip provided by the embodiment of the present application is described below.
  • the preparation method of the ultraviolet LED chip described below and the structure and preparation process of the ultraviolet LED chip described above can be referred to each other.
  • the embodiment of the present application provides a method for preparing an ultraviolet LED chip, as shown in FIG. 4, including:
  • S102 sequentially preparing an aluminum nitride nucleation layer, a superlattice layer, an N-type gallium nitride aluminum layer, a quantum well layer, an electron blocking layer, a first P-type conductive layer, and an epitaxial structure on a surface side of the substrate. a second P-type conductive layer, a metal reflective layer and a thin film conductive layer;
  • S103 etching from the surface of the epitaxial structure, exposing the first N-type gallium nitride aluminum layer of the epitaxial structure to form a first recess, and the first recess is provided with a slope;
  • S104 etching the surface of the epitaxial structure from the first groove away from the side of the slope or etching the first N-type aluminum gallium nitride layer exposed from the first groove away from the side of the slope Forming a second recess, the second recess penetrating the entire epitaxial structure, exposing the substrate, and dividing the epitaxial structure into a first epitaxial structure and a second epitaxial structure;
  • the groove contact layer and the insulating layer may be in direct close contact with each other, or may be optimized to partially fill only between the groove contact layer and the insulating layer, and a certain gap is reserved between the two;
  • S105 filling a dielectric material in the first recess to form a recess contact layer, the recess contact layer being electrically connected to the first N-type aluminum gallium nitride layer of the first epitaxial structure, and Other structural insulation of the first epitaxial structure;
  • S106 filling the second recess with an insulating material to form an insulating layer for isolating the first epitaxial structure and the second epitaxial structure;
  • S203 forming a P electrode, an N electrode, and an intermediate electrode on a surface of the wiring layer;
  • S204 assembling the substrate and the substrate to electrically connect the P electrode and the second P-type conductive layer of the first epitaxial structure, the N electrode and the second epitaxial structure
  • An N-type aluminum gallium nitride layer is electrically connected, and the intermediate electrode is electrically connected to the groove contact layer and the second P-type conductive layer of the second epitaxial structure.
  • the aluminum nitride nucleation layer and the superlattice layer of the epitaxial structure are sequentially prepared on the surface side of the substrate.
  • the N-type gallium nitride aluminum layer, the quantum well layer, the electron blocking layer, the first P-type conductive layer, the second P-type conductive layer, the metal reflective layer and the thin film conductive layer comprise:
  • S1021 sequentially preparing an epitaxial aluminum nitride nucleation layer, a superlattice layer, a first N-type aluminum gallium nitride layer, an N-type electron energy adjustment layer, and a second N-type nitride on the surface side of the substrate.
  • the first N-type aluminum gallium nitride aluminum layer and the second N-type aluminum gallium nitride aluminum layer constitute the N-type aluminum gallium nitride aluminum layer, and the N-type material doping of the second N-type aluminum gallium nitride aluminum layer The concentration is less than the doping concentration of the first N-type aluminum gallium nitride layer.
  • the preparation process of the ultraviolet LED chip includes:
  • the sapphire substrate is first placed in a high temperature environment for pretreatment such as baking, cleaning, etc. to remove contaminants on the surface of the substrate.
  • pretreatment such as baking, cleaning, etc.
  • the growth of the aluminum nitride material is performed on the c-plane of the sapphire substrate, first using a magnetron sputtering device under the low temperature experimental conditions, on the sapphire substrate
  • the aluminum nitride nucleation layer structure is prepared.
  • a 20-cycle AlN/AlGaN superlattice structure is epitaxially grown on the surface of the aluminum nitride nucleation layer by an MOCVD reaction apparatus, wherein each period of the AlN/AlGaN superlattice structure includes 20 nm.
  • the N-type gallium nitride aluminum layer in the epitaxial structure of the conventional ultraviolet LED chip is optimized, and the existing epitaxial process level is combined, and the first N-type gallium nitride aluminum is ensured.
  • the thickness of the N-type gallium nitride aluminum layer formed by the layer and the thinned second N-type aluminum gallium nitride aluminum layer is maintained at about 2 ⁇ m ⁇ 0.2 ⁇ m. On the one hand, the temperature inside the reaction device is rapidly increased and stabilized.
  • a first N-type aluminum gallium nitride layer having a thickness of 1.8 ⁇ m ⁇ 0.18 ⁇ m and a second N-type gallium nitride aluminum layer having a thickness of 0.1 ⁇ m ⁇ 0.01 ⁇ m are epitaxially epitaxially formed on the surface of the superlattice structure.
  • the current carrying in the second N-type aluminum gallium nitride layer is controlled by synchronous control. The subconcentration is maintained around the order of magnitude of 5 x 10 17 cm -3 .
  • the thickness of the second N-type aluminum gallium nitride layer is optimized by combining the epitaxial structure thinning treatment technology.
  • Thin processing which directly increases the equivalent series resistance in the vertical direction of the LED epitaxial structure, making the current extension of the LED epitaxial structure in the horizontal direction more effective, not only improving the output intensity of the ultraviolet LED chip, but also reducing
  • the electrostatic discharge, surge voltage and high current pulse are harmful to the UV LED chip, which improves the reliability of the UV LED chip.
  • the first N-type aluminum gallium nitride layer and the second N-type gallium nitride aluminum layer are formed under a high temperature condition in which the temperature inside the reaction device is constant at about 1040 ° C.
  • an N-type electron energy modulating layer adopting a delta doping method is further provided, and the thickness thereof is preferably 0.1 ⁇ m ⁇ 0.01 ⁇ m.
  • the N-type electron energy regulating layer is an N-type gallium nitride aluminum epitaxial material having an aluminum composition of 40%-50%, and a dielectric constant is smaller than the first N-type aluminum gallium nitride layer and a dielectric constant of the second N-type aluminum gallium nitride layer, wherein the N-type material doping concentration of the N-type electron energy-regulating layer is greater than a doping concentration of the first gallium nitride layer and the second gallium nitride layer.
  • a mesh structure of silicon dioxide layer is formed on the mask. And cleaning and drying the epitaxial structure of the ultraviolet LED chip.
  • a current spreading layer is deposited on the second N-type aluminum gallium nitride layer by a magnetron sputtering device, and the thickness thereof is preferably 100 nm ⁇ 10 nm, and is further patterned by etching, roughening, etc. to form a pattern.
  • Current expansion structure is
  • each period of the quantum well layer includes a 10 nm ⁇ 1 nm thick AlGaN well layer and a 2 nm ⁇ 0.2 nm thick AlGaN barrier layer.
  • the current flows through the N-type gallium nitride aluminum layer in the lateral direction, through the quantum Most of the current after the well layer is not concentrated in this area, which makes the current expansion more efficient, improves the injection efficiency, and reduces the generation of Joule heat.
  • the growth environment temperature in the reaction device is rapidly increased and maintained at about 1040 ° C, and an electron blocking is further extended on the surface of the quantum well layer.
  • a layer and a first P-type conductive layer doped with Mg are formed.
  • the temperature of the epitaxial growth is slowly lowered, and a second P-type conductive layer is further epitaxially formed on the surface of the first P-type conductive layer, and the surface mesh structure is removed by a dry etching or a wet etching process.
  • the layer of silicon dioxide is used to form the quantum well layer.
  • a metal reflective layer is deposited on the P-type gallium nitride mesa at the bottom of the LED epitaxial layer structure, and the thickness thereof is preferably 50 nm ⁇ 5 nm, and special processing such as surface roughening is performed.
  • the metal reflective layer structure is made of metal aluminum or titanium aluminum alloy, so that a part of the light that is directed to the bottom can be reflected back to the front surface by the maximum extent, and then the light is effectively emitted, thereby effectively enhancing the ultraviolet light LED.
  • the optical output power of the chip is made of metal aluminum or titanium aluminum alloy, so that a part of the light that is directed to the bottom can be reflected back to the front surface by the maximum extent, and then the light is effectively emitted, thereby effectively enhancing the ultraviolet light LED.
  • a thin film conductive layer is further disposed on the surface of the metal reflective layer, thereby substantially completing the growth process of the LED epitaxial layer.
  • a transparent thin film conductive layer having a thickness of 50 nm ⁇ 5 nm is uniformly deposited by using a magnetron sputtering apparatus in combination with a process such as evaporation or electroplating, and the conductive layer of the thin film is made of a GaZnO material having excellent conductivity, but Conductive film materials such as ITO or FTO can be used. Due to the high density characteristics of the thin film conductive layer, the high reflectivity is exhibited, so that the ultraviolet LED chip emits light more uniformly and has higher light efficiency, which greatly increases the light output power.
  • the vertical sidewall of one end of the LED epitaxial structure is etched, and then a slanted sidewall structure is formed, using the inclined sidewall provided.
  • the reflection and the Fresnel scattering scatter the light to improve the light-emitting efficiency of the LED chip; then, the P-electrode and the electrode contact layer structure are disposed on the conductive layer of the thin film, and the electrode region located in the epitaxial layer structure of the LED at this time is
  • the structure composed of the thin film conductive layer preferably serves as a medium for interconnecting the external electrode contact structure and the internal epitaxial layer structure, thereby functioning as an intermediate bridge contact.
  • etching or hollowing out from the middle of the epitaxial structure through the mask plate to form a relative a shallower but wider first recess having a right-angled trapezoidal shape, the first recess having an etching range from the surface of the epitaxial structure from bottom to top until a portion of the first N-type gallium nitride aluminum is exposed Up to the layer.
  • the etching process is further performed along the vertical right angle side of the trapezoidal trapezoid of the first groove to form a relatively deeper but narrower second groove, and the second groove formed is an ultraviolet LED chip.
  • the epitaxial structure is divided into two parts from the middle portion to form a first epitaxial structure and a second epitaxial structure, the first epitaxial structure cooperating with the substrate and above
  • the structure forms a light emitting diode
  • the second epitaxial structure cooperates with the substrate and the above structure to form an electrostatic protection diode; wherein the etching range of the second recess filling the insulating material to form the insulating layer starts from the aluminum gallium nitride layer Bottom up until the top sapphire substrate position is exposed.
  • the first recess and the second recess are respectively filled with a conductive material and an insulating material to form a recess contact layer and an insulating layer structure; then, the P-type electrode of the LED is electrostatically charged by providing an electrode contact layer structure on the outside.
  • the N-type electrode of the protection diode is electrically connected, so that the light-emitting diode and the electrostatic protection diode structure are connected in parallel and in reverse connection, and the equivalent circuit diagram thereof is referred to FIG. This directly avoids the impact of large current pulses or surge voltages on the LEDs in the circuit, and reduces the harm of the electrostatic discharge to the UV LED chips.
  • the embodiments of the present application provide an ultraviolet LED chip and a method for fabricating the same, wherein the ultraviolet LED chip is formed by growing an epitaxial structure on a surface of the substrate, and is disposed perpendicular to the lining in the middle of the epitaxial structure.
  • the ultraviolet LED chip forms a light emitting diode and an electrostatic protection diode respectively through the N electrode, the P electrode and the intermediate electrode on the substrate, and the first epitaxial structure and the second epitaxial structure respectively, the groove contact layer acts as a light emitting
  • the N-type electrode of the diode is also provided with an electrical connection between the N-type electrode of the LED and the P-type region of the ESD diode, so that the ESD diode is connected in anti-parallel connection at both ends of the LED to provide an ultraviolet LED chip.
  • An electrostatic discharge channel reduces the direct damage of the electrostatic discharge to the UV LED chip, increasing the forward voltage and antistatic discharge of the LED Hit strength, thereby improving the yield and reliability of the ultraviolet
  • the quantum well layer is a portion mainly generating heat, and the generated heat can be directly conducted to the substrate through the insulating layer and the groove contact layer adjacent thereto, thereby optimizing the heat dissipation of the ultraviolet LED chip. performance.
  • the inclined surface of the groove contact layer is disposed away from the insulating layer, and the light emitted by the light emitting diode is scattered by the reflection of the inclined surface and the Fresnel scattering, thereby improving the light extraction efficiency of the ultraviolet LED chip.

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Abstract

本申请公开了一种紫外LED芯片及其制备方法，该紫外LED芯片通过在衬底表面上生长外延结构，以及在所述外延结构的中间设置绝缘层和凹槽接触层，进而将完整的外延结构隔离成两种彼此绝缘的第一外延结构和第二外延结构，通过凹槽接触层将第一外延结构的N型氮化镓铝层引出，并且紫外LED芯片通过基板上的N电极、P电极和中间电极配合第一外延结构和第二外延结构分别形成了发光二极管和静电保护二极管，该静电保护二极管反向并联连接在发光二极管两端，为紫外LED芯片提供了一条静电释放的通道，减小了静电放电对紫外LED芯片的直接危害，增大了LED的正向电压和抗静电放电打击的强度，从而提高了紫外LED芯片的成品率和可靠性。

Description

一种紫外LED芯片及其制备方法
本申请要求于2017年7月31日提交中国专利局、申请号为201710640094.2、发明名称为“一种紫外LED芯片及其制备方法”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。另外本申请还要求于2017年7月31日提交中国专利局、申请号为201720946825.1、实用新型名称为“一种紫外LED芯片”的国内申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及LED芯片技术领域，更具体地说，涉及一种紫外LED芯片及其制备方法。
背景技术
随着紫外光源在生物医疗、杀菌清洁、印刷光刻、光固化生产以及通信探测等领域的广泛应用，其中，氮化物紫外LED在表现出优异输出性能的同时，还具有寿命长、冷光源、高效可靠、照射亮度均匀以及绿色安全无毒等优点，因此正在进一步取代传统紫外光源。
现今主流的紫外LED芯片的剖面结构参考图1，包括衬底10和基板20，其中，所述衬底表面具有外延结构，所述外延结构包括位于所述衬底表面依次排列的氮化铝成核层11、超晶格层12、N型氮化镓铝层13、量子阱层14、电子阻挡层15、第一P型导电层16和第二P型导电层17；所述基板20表面具有布线层21、N电极23和P电极22；所述基板和衬底通过倒装共晶焊工艺组装，实现电极和外延结构的电连接；对于紫外LED芯片而言，所述第一P型导电层16通常为P型氮化镓铝层或P型氮化镓铝过渡层，所述第二P型导电层17通常为P型氮化镓层。
这种紫外LED芯片在后期的欧姆接触层制备、蒸镀电极、倒装共晶焊以及钝化处理工艺等过程中，存在着功率型紫外LED芯片发热量大但散热 不及时而导致的紫外LED芯片性能受限、金属基板上所设置的绝缘层散热性差以及存在着人体模式或机器模式下的静电放电危害的问题。
因此，如何解决紫外LED芯片中存在的散热不良及静电放电危害问题成为该领域研发人员努力的方向。
发明内容
为解决上述技术问题，本发明提供了一种紫外LED芯片及其制备方法，以解决紫外LED芯片中存在的散热不良及静电放电危害的问题。
为解决上述技术问题，本发明实施例提供了如下技术方案：
一种紫外LED芯片，包括：
衬底；
基于所述衬底表面依次生长的外延结构、以及在外延结构中设置的绝缘层和凹槽接触层；
位于所述外延结构一侧背离所述衬底的基板，所述基板朝向所述衬底一侧表面设有布线层、P电极、N电极和中间电极；
其中，
所述外延结构包括：
基于所述衬底表面依次生长的氮化铝成核层、超晶格层、N型氮化镓铝层、量子阱层、电子阻挡层、第一P型导电层、第二P型导电层、金属反射层和薄膜导电层；
所述绝缘层位于所述外延结构的中部，用于隔离所述外延结构，并将所述外延结构分隔成第一外延结构和第二外延结构；
所述凹槽接触层贯穿所述第一外延结构的一部分，与所述第一外延结构的N型氮化镓铝层电连接，与所述第一外延结构的其他结构绝缘，所述凹槽接触层设有一个背离所述绝缘层一侧的斜面；
所述P电极与所述第一外延结构中的薄膜导电层电连接，所述N电极与所述第二外延结构的N型氮化镓铝层电连接，所述中间电极与所述凹槽接触层和所述第二外延结构中的薄膜导电层电连接。
可选的，所述N型氮化镓铝层包括：第一N型氮化镓铝层和第二N 型氮化镓铝层；
其中，
所述第二N型氮化镓铝层位于所述第一N型氮化镓铝层背离所述超晶格层一侧；
所述第二N型氮化镓铝层的外延材料掺杂浓度小于所述第一N型氮化镓铝层的掺杂浓度；
所述第二N型氮化镓铝层的外延层厚度小于所述第一N型氮化镓铝层的厚度。
可选的，所述外延结构还包括：
位于所述第一N型氮化镓铝层和第二N型氮化镓铝层之间的N型电子能量调节层；
所述N型电子能量调节层的介电常数小于所述第一N型氮化镓铝层和第二N型氮化镓铝层的介电常数，且所述N型电子能量调节层的外延材料掺杂浓度大于所述第一氮化镓铝层和第二氮化镓铝层的掺杂浓度。
可选的，还包括：
覆盖所述第一外延结构和第二外延结构裸露台面和侧壁的钝化层；
所述钝化层还具有第一连接部，所述第一连接部位于所述中间电极与所述第一外延结构之间以及所述凹槽接触层背离所述绝缘层一侧，以使所述凹槽接触层与所述第一外延结构中的第一N型氮化镓铝层电连接，且与所述第一外延结构的其他结构绝缘。
可选的，所述第二N型氮化镓铝层的厚度为0.1μm±0.01μm，包括端点值。
可选的，所述外延结构还包括：
位于所述第二N型氮化镓铝层与所述量子阱层之间的电流扩展层。
可选的，还包括：第一电极接触层和第二电极接触层；
所述钝化层还包括第二连接部，其中，
所述第一电极接触层贯穿所述第一外延结构的薄膜导电层，所述P电极通过所述第一电极接触层与所述第一外延结构的金属反射层电连接；
所述第二电极接触层部分贯穿所述第二外延结构，所述N电极通过 所述第二电极接触层与所述第二外延结构的第一N型氮化镓铝层电连接；
所述第二连接部环形覆盖所述第二电极接触层侧壁，以使所述第二电极接触层与所述第二外延结构的其他结构绝缘。
一种紫外LED芯片的制备方法，包括：
提供衬底；
在所述衬底表面一侧依次制备的氮化铝成核层、超晶格层、N型氮化镓铝层、量子阱层、电子阻挡层、第一P型导电层、第二P型导电层、金属反射层和薄膜导电层；
从所述外延结构的中部进行刻蚀，使所述外延结构的N型氮化镓铝层暴露出来，形成第一凹槽，且所述第一凹槽设有一斜面；
从所述第一凹槽背离所述斜面一侧的外延结构最表面进行刻蚀或者接着从第一凹槽所暴露出的第一N型氮化镓铝层背离所述斜面一侧继续进行刻蚀，形成第二凹槽，所述第二凹槽贯穿整个所述外延结构，使所述衬底暴露出来，并使所述外延结构分为第一外延结构和第二外延结构；
在所述第一凹槽中填充介质材料，形成导电的凹槽接触层，所述凹槽接触层与所述第一外延结构的第一N型氮化镓铝层电连接，且与所述第一外延结构的其他结构绝缘；
在所述第二凹槽中填充绝缘材料，形成绝缘层，用于隔离所述第一外延结构和第二外延结构；
提供基板；
在所述基板表面形成布线层；
在所述布线层表面形成P电极、N电极和中间电极；
将所述基板与所述衬底进行组装，以使所述P电极与所述第一外延结构的第二P型导电层电连接，所述N电极与所述第二外延结构的第一N型氮化镓铝层电连接，所述中间电极与所述凹槽接触层和第二外延结构的第二P型导电层电连接。
可选的，所述在所述衬底表面一侧依次制备的氮化铝成核层、超晶格层、N型氮化镓铝层、量子阱层、电子阻挡层、第一P型导电层、第二P型导电层、金属反射层和薄膜导电层包括：
在所述衬底表面一侧依次制备的氮化铝成核层、超晶格层、第一N型氮化镓铝层、N型电子能量调节层、第二N型氮化镓铝层、电流扩展层、量子阱层、电子阻挡层、第一P型导电层、第二P型导电层、薄膜导电层和钝化层；其中，
所述第一N型氮化镓铝层和第二N型氮化镓铝层共同构成所述N型氮化镓铝层，并且所述第二N型氮化镓铝层的外延材料掺杂浓度小于所述第一N型氮化镓铝层的掺杂浓度。
从上述技术方案可以看出，本发明实施例提供了一种紫外LED芯片及其制备方法，其中，所述紫外LED芯片通过在衬底表面上生长外延结构，以及在所述外延结构的中间设置垂直于衬底表面的绝缘层，进而将完整的外延结构隔离成两种彼此绝缘的第一外延结构和第二外延结构，通过凹槽接触层将第一外延结构的第一N型氮化镓铝层引出，并且所述紫外LED芯片通过基板上的N电极、P电极和中间电极配合所述第一外延结构和第二外延结构分别形成了发光二极管和静电保护二极管，所述凹槽接触层在充当发光二极管的N型电极的同时，还设置发光二极管的N型电极与静电保护二极管的P型区域之间电气连接，使得静电保护二极管反向并联连接在发光二极管的两端，为紫外LED芯片提供了一条静电释放的通道，减小了静电放电对紫外LED芯片的直接危害，增大了LED的正向电压和抗静电放电打击的强度，从而提高了紫外LED芯片的成品率和可靠性。
并且，在发光二极管的工作过程中，量子阱层是主要产生热量的部分，其产生的热量可以通过与其邻近的凹槽接触层直接传导到基板上，从而优化了紫外LED芯片的散热性能。
进一步的，所述凹槽接触层的斜面背离所述绝缘层设置，利用该斜面的反射以及菲涅尔散射对发光二极管发出的光线进行散射，提高了所述紫外LED芯片的出光效率。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地， 下面描述中的附图仅仅是本发明的实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据提供的附图获得其他的附图。
图1为现有技术中的紫外LED芯片的剖面结构示意图；
图2为本申请的一个实施例提供的一种紫外LED芯片的剖面结构示意图；
图3为本申请的一个实施例提供的紫外LED芯片的等效电路示意图；
图4为本申请的一个实施例提供的一种紫外LED芯片的制备方法的流程示意图；
图5为本申请的另一个实施例提供的一种紫外LED芯片的制备方法的流程示意图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
本申请实施例提供了一种紫外LED芯片，参考图2，所述紫外LED芯片包括：
衬底100；
基于所述衬底100表面一侧依次生长的外延结构W10、以及在外延结构中设置的绝缘层117和凹槽接触层116；
位于所述外延结构背离所述衬底100一侧的基板200，所述基板200朝向所述衬底100一侧表面设有布线层201、P电极204、N电极202和中间电极203；
其中，
所述外延结构包括：
基于所述衬底100表面依次生长的氮化铝成核层113、超晶格层112、N型氮化镓铝层A10、量子阱层107、电子阻挡层105、第一P型导电层104、第二P型导电层103、金属反射层102和薄膜导电层101；
所述绝缘层117位于所述外延结构的中部，用于隔离所述外延结构，并将所述外延结构分隔成第一外延结构W10和第二外延结构W20；
所述凹槽接触层116贯穿所述第一外延结构W10的一部分，与所述第一外延结构W10的第一N型氮化镓铝层A10电连接，与所述第一外延结构W10的其他结构绝缘，所述凹槽接触层116设有一个背离所述绝缘层117的斜面；
所述P电极204与所述第一外延结构W10的金属反射层102电连接，所述N电极202与所述第二外延结构W20的第一N型氮化镓铝层A10电连接，所述中间电极203与所述凹槽接触层116和所述第二外延结构W20的第二P型导电层103电连接。
需要说明的是，一般情况下，在紫外LED芯片中，所述第一P型导电层104一般为氮化镓铝层或氮化镓铝过渡层；所述第二P型导电层103一般为氮化镓层。
所述紫外LED芯片通过在衬底100表面设置绝缘层117使第一外延结构W10和第二外延结构W20彼此绝缘，通过凹槽接触层116将第一外延结构W10的第一N型氮化镓铝层A10引出，并且所述紫外LED芯片通过基板200上的N电极202、P电极204和中间电极203配合所述第一外延结构W10和第二外延结构W20分别形成了发光二极管和静电保护二极管，参考图3，图3为所述紫外LED芯片中发光二极管和静电保护二极管的等效电路示意图，在图3中，标号A、B、C、D对应于图2中的A、B、C和D，也就是说所述P电极204在图3中作为发光二极管的正向电极A，所述N电极202在图3中作为静电保护二极管的反向电极C，所述中间电极203在图3中即作为所述发光二极管的反向电极B，又作为所述静电保护二极管的正向电极D。所述凹槽接触层116在充当发光二极管的N型电极的同时，还使得发光二极管的N型电极与静电保护二极管的P型区域之间直接电气连接，所述静电保护二极管为紫外LED芯片提供了一条静电释放的通道，减小了静电放 电对紫外LED芯片的直接危害，增大了LED的正向电压和抗静电放电打击的强度，从而提高了紫外LED芯片的成品率和可靠性。
并且，在发光二极管的工作过程中，量子阱层107是主要产生热量的部分，其产生的热量可以通过与其邻近的凹槽接触层116直接传导到基板200上，从而优化了紫外LED芯片的散热性能。
进一步的，所述凹槽接触层116的斜面背离所述绝缘层117设置，利用该斜面的反射以及菲涅尔散射对发光二极管发出的光线进行散射，提高了所述紫外LED芯片的出光效率。
还需要说明的是，容纳所述绝缘层117和凹槽接触层116的凹槽可以采用ICP刻蚀、干法刻蚀或湿法腐蚀等工艺形成，然后向凹槽中分别先后填充绝缘材料和导电材料即可形成所述绝缘层117和凹槽接触层116；、
具体地，在本申请的一个实施例中，在形成所述绝缘层117和凹槽接触层116时，从外延结构背离衬底100一侧表面开始不同程度的反向刻蚀：通过掩膜板从外延结构的中部进行刻蚀或镂空处理，形成一条相对较浅但较宽的、剖面形状为直角梯形形状的第一凹槽，所述第一凹槽的刻蚀范围从外延结构表面开始由下往上直到暴露出一部分第一N型氮化镓铝层A10位置。然后再沿着所述第一凹槽的直角梯形的竖直直角边进行再次刻蚀处理，进而形成一种相对更深但较窄的第二凹槽，所形成的第二凹槽将紫外LED芯片的外延结构从中部分割为两个部分，形成第一外延结构W10和第二外延结构W20，所述第一外延结构W10配合所述衬底100及其以上结构形成发光二极管，所述第二外延结构W20配合所述衬底100及其以上结构形成静电保护二极管；其中，填充绝缘材料形成绝缘层117的第二凹槽的刻蚀范围可以从氮化镓铝层开始由下往上直到暴露出顶部的蓝宝石衬底100位置。接着再往第一凹槽和第二凹槽中分别填充导电材料和绝缘材料，形成凹槽接触层116和绝缘层117结构；然后通过在外部设置电极接触层结构，将发光二极管的P型电极与静电保护二极管的N型电极进行电气连接，使得发光二极管和静电保护二极管结构相互并联、反向连接，其等效电路图参考图3。这就直接避免了电路中大电流脉冲或者浪涌电压对发光二极管的直接冲击，减小了静电放电对紫外LED芯片的危害。
所述凹槽接触层116的剖面形状还可以为三角形，但优选为直角梯形，直角梯形形状的凹槽接触层116相较于三角形形状的凹槽接触层116对于光线的反射效果更好，更加有利于提高所述紫外LED芯片的出光效率。
在本申请的一个实施例中，在形成所述量子阱层107之后，将反应设备中的生长环境温度迅速升高后维持在1040℃左右，在所述量子阱层107的表面上继续一次外延了电子阻挡层105和掺杂Mg的第一P型导电层104。然后再将生长设备的温度缓慢地降低，在所述第一P型导电层104的表面上还外延了第二P型导电层103，并采用干法刻蚀或湿法腐蚀等工艺除去表面网格结构的二氧化硅层。接着在所述LED外延层结构底部的P型氮化镓台面上还沉积有金属反射层，其厚度优选为50nm±5nm，且进行了表面粗化等特殊工艺处理。同时，所述金属反射层结构采用金属铝或者钛铝合金材质，使得其中射向底部的一部分光线能够最大程度地被Al反射回正面后继续出射，有效地提高了出光效果，明显增强了紫外LED芯片的光输出功率。
接着，在所述金属反射层的表面上再设置有薄膜导电层，进而基本上完成了LED外延层的生长过程。具体地，通过采用磁控溅射设备，结合蒸镀或电镀等工艺，均匀沉积一种厚度为50nm±5nm的透明的薄膜导电层，所述薄膜导电层选用导电性能优越的GaZnO材料，但也可选用ITO或FTO等导电薄膜材料。由于所述薄膜导电层所具有的高密度特性，进而表现出很高的反射率，使得紫外LED芯片发光更均匀、光效更高，大大增加了光输出功率。接着通过采用光刻和刻蚀等技术对此时的LED外延结构中一端的垂直侧壁进行刻蚀处理后，进而形成了一种倾斜的侧壁结构，利用所设置的这种倾斜侧壁的反射以及菲涅尔散射对光线进行散射，提高了LED芯片的出光效率；然后在所述薄膜导电层上设置P电极204以及电极接触层结构，而此时位于LED外延层结构中的电极区域，所述由薄膜导电层所组成的结构较好地充当了一种将外部电极接触结构与内部外延层结构相互连接的媒介，进而起到了中间桥梁接触的作用。
在上述实施例的基础上，在本申请的一个实施例中，仍然参考图2，所述N型氮化镓铝层A10包括：第一N型氮化镓铝层111和第二N型氮 化镓铝层109；其中，
所述第二N型氮化镓铝层109位于所述第一N型氮化镓铝层111背离所述超晶格层112一侧；
所述第二N型氮化镓铝层109的外延材料掺杂浓度小于所述第一N型氮化镓铝层111的掺杂浓度。
在本实施例中，对所述N型氮化镓铝层A10进行了优化，依次设置了不同掺杂浓度的第一N型氮化镓铝层111和第二N型氮化镓铝层109，优选的，保证所述第一N型氮化镓铝层111和第二N型氮化镓铝层109的总厚度与现有技术中主流的氮化镓铝层的厚度一致，因此，优选通过对第二N型氮化镓铝层109进行减薄处理，使得所述第二N型氮化镓铝层109的厚度远小于所述第一N型氮化镓铝层111的厚度。
具体地，在本申请的一个实施例中，由第一N型氮化镓铝层111和减薄后的第二N型氮化镓铝层109构成的N型氮化镓铝层A10的厚度维持在2μm±0.2μm左右，一方面，通过将反应设备里面的温度迅速升高并稳定在1040℃左右，在所述超晶格结构表面上一次外延了厚度为1.8μm±0.18μm的第一N型氮化镓铝层111和0.1μm±0.01μm厚的第二N型氮化镓铝层109；另一方面，在确保第一N型氮化镓铝层111中的载流子浓度高达3×1018cm-3的同时，通过同步控制使得第二N型氮化镓铝层109中的载流子浓度维持在5×1017cm-3的数量级范围左右。特别地，考虑到芯片自身体材料中还存在着对光线的反射和吸收等现象，再通过结合外延结构减薄处理技术，同时对所述第二N型氮化镓铝层109的厚度进行优化减薄处理，这就直接增大了LED外延结构中在竖直方向上的等效串联电阻，使得LED外延结构在水平方向上的电流扩展更加有效，不仅提高了紫外LED芯片的输出强度，还减小了静电放电、浪涌电压以及大电流脉冲对紫外LED芯片的危害，提高了紫外LED芯片的可靠性。
在上述实施例的基础上，在本申请的另一个实施例中，仍然参考图2，所述外延结构还包括：
位于所述第一N型氮化镓铝层111和第二N型氮化镓铝层109之间的N型电子能量调节层110；
所述N型电子能量调节层110的介电常数小于所述第一N型氮化镓铝层111和第二N型氮化镓铝层109的介电常数，且所述N型电子能量调节层110的外延材料掺杂浓度大于所述第一氮化镓铝层和第二氮化镓铝层的材料掺杂浓度。
具体地，在本申请的一个实施例中，在制备所述N型电子能量调节层110时，通过将反应设备里面的温度恒定在1040℃左右的高温条件下，在所述第一N型氮化镓铝层111与第二N型氮化镓铝层109这两层结构之间，继续设置了一种采用δ掺杂方式的N型电子能量调节层110，其厚度优选为0.1μm±0.01μm。具体地，所述N型电子能量调节层110选用的是铝组分为40％-50％的N型氮化镓铝外延材料，其介电常数小于所述第一N型氮化镓铝层111和第二N型氮化镓铝层109的介电常数，所述N型电子能量调节层110的外延材料掺杂浓度大于所述第一氮化镓层和第二氮化镓层的掺杂浓度。
由于δ掺杂类型的N型电子能量调节层110的存在，减小了漏电流的形成，直接调节了外延结构中N型区域中电子的能量，同时还提高了空穴的注入效率。
在上述实施例的基础上，在本申请的又一个实施例中，所述紫外LED芯片还包括：
覆盖所述第一外延结构W10和第二外延结构W20裸露台面和侧壁的钝化层114；
所述钝化层114还具有第一连接部1141，所述第一连接部1141位于所述中间电极203与所述第一外延结构W10之间以及所述凹槽接触层116背离所述绝缘层117一侧，以使所述凹槽接触层116与所述第一外延结构W10的第一N型氮化镓铝层111电连接，且与所述第一外延结构W10的其他结构绝缘。
需要说明的是，所述钝化层114不仅可以起到避免紫外LED芯片的外延结构被腐蚀、氧化和破坏的功能，而且通过所述第一连接部1141使所述凹槽接触层116仅通过所述第一外延结构W10的N型电子能量调节层110与所述N型氮化镓铝层A10电连接，而与所述第一外延结构W10的其他结 构绝缘。
在上述实施例的基础上，在本申请的再一个实施例中，仍然参考图2，所述外延结构还包括：
位于所述第二N型氮化镓铝层109与所述量子阱层107之间的电流扩展层108。
具体地，在本申请的一个实施例中，在所述紫外LED芯片外延结构的制备过程中，通过继续在第二N型氮化镓铝层109上先沉积掩膜板结构，再结合沉积和刻蚀等工艺，在所述掩膜板上形成了一种网格结构的二氧化硅层，并对所述紫外LED芯片外延结构进行清洁、烘干处理。然后采用磁控溅射设备在所述第二N型氮化镓铝层109上沉积电流扩展成，其厚度优选为100nm±10nm，且经过进一步地刻蚀、粗化等处理后形成一种图形化的电流扩展结构。接着又将反应设备中的温度缓慢地降低到750℃，进而在所述第二N型氮化镓铝层109表面上外延了5个周期的AlGaN/AlGaN量子阱层107。具体地，每个周期的量子阱层107中包含了10nm±1nm厚的AlGaN阱层和2nm±0.2nm厚的AlGaN势垒层。其中，通过在紫外LED芯片外延结构中的量子阱层107和第二N型氮化镓铝层109之间设置电流扩展层，使得电流在横向流过N型氮化镓铝层A10的过程中，通过量子阱层107后的大部分电流不会集中拥堵在这一区域，使得电流扩展更有效，提高了注入效率，减少了焦耳热的产生。
在上述实施例的基础上，在本申请的另一个优选实施例中，仍然参考图2，所述紫外LED芯片还包括：第一电极接触层115和第二电极接触层106；
所述钝化层114还包括第二连接部1142，其中，
所述第一电极接触层贯穿所述第一外延结构W10的薄膜导电层101，所述P电极204通过所述第一电极接触层115与所述第一外延结构W10的金属反射层102电连接；
所述第二电极接触层部分贯穿所述第二外延结构W20，所述N电极202通过所述第二电极接触层106与所述第二外延结构W20中的第一N型氮化镓铝层111电连接；
所述第二连接部1142环形覆盖所述第二电极接触层侧壁，以使所述第二电极接触层与所述第二外延结构W20的其他结构绝缘。
具体地，在形成了所述薄膜导电层之后，继续采用反向刻蚀工艺对N电极202区域和P电极204区域进行处理，分别形成具有不同深度的第三凹槽结构，所述第三凹槽结构优选采用横截面为正六边形的类圆柱状。其中，N电极202处的第三凹槽结构的刻蚀范围从薄膜导电层的底部开始由下往上直到暴露出一部分第一N型氮化镓铝层111为止；而P电极204处的第三凹槽结构的刻蚀范围则只贯穿了整个薄膜导电层。其中，均设置了多个内部电极凹槽结构或凹槽结构矩阵，以及通过严格控制刻蚀过程中的刻蚀速率，确保只对台面的很少一部分区域进行刻蚀，减少了刻蚀对外延片发光区域的刻蚀和损害，提高了紫外LED芯片的光输出强度。接着，再往第三凹槽结构里面沉积金属或合金材料，分别形成第一电极接触层和第二电极接触层。具体地，通过选用Ti/Al合金作为电极接触材料，电极底面的铝增强了光线的反射的同时，还降低了电极边缘对部分光线的吸收以及增加了蓝宝石衬底100对边光的提取。本发明通过设置以上所述的电极凹槽结构和内部接触层结构，当对所述紫外LED芯片施加较大的外部电压时，所形成的大电流脉冲在流过所述紫外LED芯片的外延层结构的同时，还可以较快地流过所述内部接触层结构，起到了较好的分流作用，避免了LED外延片直接受到大电流脉冲的冲击影响。
综上所述，通过所述紫外LED芯片的外延结构在生长前后均在不同温度下经过多次退火工艺处理，增强了材料结构之间的粘接强度，降低了内部接触电阻以及提高了紫外LED芯片的抗静电放电危害的强度。通过在台面、内部接触层和薄膜导电层结构之间的界面处分别设置外部电极(P电极204、N电极202和中间电极203)，而所述外部电极的另一端则与金属布线层201直接相连接。其中，在进行外部电极结构的沉积、蒸镀处理时，通过设计新型的Ti/Al合金材质的反射电极，并优化其欧姆接触的方式与结合强度，进一步提高了LED芯片的出光效率。通过采用图形化处理技术将P电极204和N电极202表面的薄膜进行优化处理，再结合透明导电电极的制备技术以及优化电极处面面接触的材料类型，有效地增大了电极的有 效面积，降低了接触电阻，使得电流分布更均匀、电流扩展更快。
另外，本申请实施例提供的所述紫外LED芯片的外延结构中的台面、外延层结构的侧壁以及外部电极表面均设置钝化层114来绝缘处理，防止了外界环境对芯片的腐蚀，减小了台面和台阶侧壁处漏电流对芯片的影响，以及改进了紫外LED芯片的外延结构中有源区的电流扩展问题，降低了电流堆积效应，提高了紫外LED芯片的光输出功率；类似地，对内部接触层表面也进行环形钝化处理，形成包裹内部接触层的环形柱状的隔离层结构，避免了紫外LED芯片侧壁或者台面处漏电流的形成，防止了金属电极接触层结构的侧壁与芯片内部接触层表面之间漏电而直接形成电流回路所造成的短路现象。其中，所述隔离层的厚度均优化地设置为10nm±1nm。
本申请实施例采用晶圆表面键合技术来进行紫外LED芯片的后期固晶、倒装焊以及封装等过程，将以上所述的LED芯片通过中部的电极接触层结构，以倒装共晶焊的方式焊接在设有金属布线层201的基板200上，进而完成LED芯片的初步封装过程。一方面，再结合布线层201设计和基板200工艺的开发制作，所述基板200的热沉结构中还设置了由高密度的布线层201和氮化铝陶瓷材质的底座所共同组成的散热器结构。由于量子阱层107是紫外LED芯片中的主要发热源，这就使得发热源与基板200热沉结构之间的热扩散路径明显的缩短，LED芯片散热加快，避免了芯片因过热而失效。另一方面，本发明所述LED外延片结构中所设置的多条电极接触层结构中，由于里面填充的是导热性好的金属或者金属合金材料，也及时地将紫外LED芯片内部的热量传递到外部。其中，所述布线层201在基板200的表面上最大限度地向外部展开，但保证布线层201的中部被划开后形成独立的两部分，在P电极204区域和N电极202区域之间形成一条具有一定宽度的、绝缘的隔离型跑道，防止了紫外LED芯片中短路现象的发生。
下面对本申请实施例提供的紫外LED芯片的制备方法进行描述，下文描述的紫外LED芯片的制备方法与上文描述的紫外LED芯片的结构和制备过程可相互对应参照。
本申请实施例提供了一种紫外LED芯片的制备方法，如图4所示，包括：
S101：提供衬底；
S102：在所述衬底表面一侧依次制备外延结构的氮化铝成核层、超晶格层、N型氮化镓铝层、量子阱层、电子阻挡层、第一P型导电层、第二P型导电层、金属反射层和薄膜导电层；
S103：从所述外延结构表面进行刻蚀，使所述外延结构的第一N型氮化镓铝层暴露出来，形成第一凹槽，且所述第一凹槽设有一斜面；
S104：从所述第一凹槽背离所述斜面一侧的外延结构表面进行刻蚀或者从第一凹槽所暴露出的第一N型氮化镓铝层背离所述斜面一侧进行刻蚀，形成第二凹槽，所述第二凹槽贯穿整个所述外延结构，使所述衬底暴露出来，并使所述外延结构分为第一外延结构和第二外延结构；
所述凹槽接触层和绝缘层之间可以直接紧密接触，也可以优化的在凹槽接触层和绝缘层之间只进行部分填充，而在这两者之间还预留一定的间隙；
S105：在所述第一凹槽中填充介质材料，形成凹槽接触层，所述凹槽接触层与所述第一外延结构的第一N型氮化镓铝层电连接，且与所述第一外延结构的其他结构绝缘；
S106：在所述第二凹槽中填充绝缘材料，形成绝缘层，用于隔离所述第一外延结构和第二外延结构；
S201：提供基板；
S202：在所述基板表面形成布线层；
S203：在所述布线层表面形成P电极、N电极和中间电极；
S204：将所述基板与所述衬底进行组装，以使所述P电极与所述第一外延结构的第二P型导电层电连接，所述N电极与所述第二外延结构的第一N型氮化镓铝层电连接，所述中间电极与所述凹槽接触层和第二外延结构的第二P型导电层电连接。
在上述实施例的基础上，在本申请的另一个实施例中，如图5所示，所述在所述衬底表面一侧依次制备外延结构的氮化铝成核层、超晶格层、 N型氮化镓铝层、量子阱层、电子阻挡层、第一P型导电层、第二P型导电层、金属反射层和薄膜导电层包括：
S1021：在所述衬底表面一侧依次制备外延结构的氮化铝成核层、超晶格层、第一N型氮化镓铝层、N型电子能量调节层、第二N型氮化镓铝层、电流扩展层、量子阱层、电子阻挡层、第一P型导电层、第二P型导电层、金属反射层和薄膜导电层；其中，
所述第一N型氮化镓铝层和第二N型氮化镓铝层构成所述N型氮化镓铝层，并且所述第二N型氮化镓铝层的N型材料掺杂浓度小于所述第一N型氮化镓铝层的掺杂浓度。
具体地，在本申请的一个具体实施例中，所述紫外LED芯片的制备过程包括：
首先将蓝宝石衬底置于高温环境下进行烘烤、清洁等预处理，以去除衬底表面上的污染物。在采用MOCVD反应设备进行氮化物紫外LED芯片外延结构的生长之前，在蓝宝石衬底c面进行氮化铝材料的生长，先在低温实验条件下采用磁控溅射设备，在所述蓝宝石衬底上制备氮化铝成核层结构。接着，采用MOCVD反应设备在所述氮化铝成核层的表面上外延了20个周期的AlN/AlGaN超晶格结构，其中，每个周期的AlN/AlGaN超晶格结构中又包含了20nm厚的氮化铝层和20nm厚的AlGaN层。
在制备紫外LED芯片外延结构的过程中，优化了传统紫外LED芯片外延结构中的N型氮化镓铝层，同时结合现有的外延工艺水平，并确保了由第一N型氮化镓铝层和减薄后的第二N型氮化镓铝层构成的N型氮化镓铝层的厚度维持在2μm±0.2μm左右，一方面，通过将反应设备里面的温度迅速升高并稳定在1040℃左右，在所述超晶格结构表面上一次外延了厚度为1.8μm±0.18μm的第一N型氮化镓铝层和0.1μm±0.01μm厚的第二N型氮化镓铝层；另一方面，在确保第一N型氮化镓铝层中的载流子浓度高达3×1018cm-3的同时，通过同步控制使得第二N型氮化镓铝层中的载流子浓度维持在5×1017cm-3的数量级范围左右。特别地，考虑到芯片自身体材料中还存在着对光线的反射和吸收等现象，再通过结合外延结构减薄处理技术，同时对所述第二N型氮化镓铝层的厚度进行优化减薄处理，这就直接 增大了LED外延结构中在竖直方向上的等效串联电阻，使得LED外延结构在水平方向上的电流扩展更加有效，不仅提高了紫外LED芯片的输出强度，还减小了静电放电、浪涌电压以及大电流脉冲对紫外LED芯片的危害，提高了紫外LED芯片的可靠性。
在制备所述N型电子能量调节层时，通过将反应设备里面的温度恒定在1040℃左右的高温条件下，在所述第一N型氮化镓铝层与第二N型氮化镓铝层这两层结构之间，继续设置了一种采用δ掺杂方式的N型电子能量调节层，其厚度优选为0.1μm±0.01μm。具体地，所述N型电子能量调节层选用的是铝组分为40％-50％的N型氮化镓铝外延材料，其介电常数小于所述第一N型氮化镓铝层和第二N型氮化镓铝层的介电常数，所述N型电子能量调节层的N型材料掺杂浓度大于所述第一氮化镓层和第二氮化镓层的掺杂浓度。
由于δ掺杂类型的N型电子能量调节层的存在，减小了漏电流的形成，直接调节了外延结构中N型区域中电子的能量，同时还提供了空穴的注入效率。
之后通过继续在第二N型氮化镓铝层上先沉积掩膜板结构，再结合沉积和刻蚀等工艺，在所述掩膜板上形成了一种网格结构的二氧化硅层，并对所述紫外LED芯片外延结构进行清洁、烘干处理。然后采用磁控溅射设备在所述第二N型氮化镓铝层上沉积电流扩展层，其厚度优选为100nm±10nm，且经过进一步地刻蚀、粗化等处理后形成一种图形化的电流扩展结构。接着又将反映设备中的温度缓慢地降低到750℃，进而在所述第二N型氮化镓铝层表面上外延了5个周期的AlGaN/AlGaN量子阱层。具体地，每个周期的量子阱层中包含了10nm±1nm厚的AlGaN阱层和2nm±0.2nm厚的AlGaN势垒层。其中，通过在紫外LED芯片外延结构中的量子阱层和第二N型氮化镓铝层之间设置电流扩展层，使得电流在横向流过N型氮化镓铝层的过程中，通过量子阱层后的大部分电流不会集中拥堵在这一区域，使得电流扩展更有效，提高了注入效率，减少了焦耳热的产生。
在形成所述量子阱层之后，将反应设备中的生长环境温度迅速升高后维持在1040℃左右，在所述量子阱层的表面上继续一次外延了电子阻挡 层和掺杂Mg的第一P型导电层。然后再将外延生长的温度缓慢地降低，在所述第一P型导电层的表面上还外延了第二P型导电层，并采用干法刻蚀或湿法腐蚀等工艺出去表面网格结构的二氧化硅层。接着在所述LED外延层结构底部的P型氮化镓台面上还沉积有金属反射层，其厚度优选为50nm±5nm，且进行了表面粗化等特殊工艺处理。同时，所述金属反射层结构采用金属铝或者钛铝合金材质，使得其中射向底部的一部分光线能够最大程度地被Al反射回正面后继续出射，有效地提高了出光效果，明显增强了紫外LED芯片的光输出功率。
接着，在所述金属反射层的表面上再设置有薄膜导电层，进而基本上完成了LED外延层的生长过程。具体地，通过采用磁控溅射设备，结合蒸镀或电镀等工艺，均匀沉积一种厚度为50nm±5nm的透明的薄膜导电层，所述薄膜导电层选用导电性能优越的GaZnO材料，但也可选用ITO或FTO等导电薄膜材料。由于所述薄膜导电层所具有的高密度特性，进而表现出很高的反射率，使得紫外LED芯片发光更均匀、光效更高，大大增加了光输出功率。接着通过采用光刻和刻蚀等技术对此时的LED外延结构中一端的垂直侧壁进行刻蚀处理后，进而形成了一种倾斜的侧壁结构，利用所设置的这种倾斜侧壁的反射以及菲涅尔散射对光线进行散射，提高了LED芯片的出光效率；然后在所述薄膜导电层上设置P电极以及电极接触层结构，而此时位于LED外延层结构中的电极区域，所述由薄膜导电层所组成的结构较好地充当了一种将外部电极接触结构与内部外延层结构相互连接的媒介，进而起到了中间桥梁接触的作用。
在形成所述绝缘层和凹槽接触层时，从外延结构背离衬底一侧表面开始不同程度的反向刻蚀：通过掩膜板从外延结构的中部进行刻蚀或镂空处理，形成一条相对较浅但较宽的、剖面形状为直角梯形形状的第一凹槽，所述第一凹槽的刻蚀范围从外延结构表面开始由下往上直到暴露出一部分第一N型氮化镓铝层为止。然后再沿着所述第一凹槽的指教梯形的竖直直角边进行再次刻蚀处理，进而形成一种相对更深但较窄的第二凹槽，所形成的第二凹槽将紫外LED芯片的外延结构从中部分割为两个部分，形成第一外延结构和第二外延结构，所述第一外延结构配合所述衬底及其以上 结构形成发光二极管，所述第二外延结构配合所述衬底及其以上结构形成静电保护二极管；其中，填充绝缘材料形成绝缘层的第二凹槽的刻蚀范围从氮化镓铝层开始由下往上直到暴露出顶部的蓝宝石衬底位置。接着再往第一凹槽和第二凹槽中分别填充导电材料和绝缘材料，形成凹槽接触层和绝缘层结构；然后通过在外部设置电极接触层结构，将发光二极管的P型电极与静电保护二极管的N型电极进行电气连接，使得发光二极管和静电保护二极管结构相互并联、反向连接，其等效电路图参考图3。这就直接避免了电路中大电流脉冲或者浪涌电压对发光二极管的冲击，减小了静电放电对紫外LED芯片的危害。
综上所述，本申请实施例提供了一种紫外LED芯片及其制备方法，其中，所述紫外LED芯片通过在衬底表面上生长外延结构，以及在所述外延结构的中间设置垂直于衬底表面的绝缘层，进而将完整的外延结构隔离成两种彼此绝缘的第一外延结构和第二外延结构，通过凹槽接触层将第一外延结构的第一N型氮化镓铝层引出，并且所述紫外LED芯片通过基板上的N电极、P电极和中间电极配合所述第一外延结构和第二外延结构分别形成了发光二极管和静电保护二极管，所述凹槽接触层在充当发光二极管的N型电极的同时，还设置发光二极管的N型电极与静电保护二极管的P型区域之间电气连接，使得静电保护二极管反向并联连接在发光二极管的两端，为紫外LED芯片提供了一条静电释放的通道，减小了静电放电对紫外LED芯片的直接危害，增大了LED的正向电压和抗静电放电打击的强度，从而提高了紫外LED芯片的成品率和可靠性。
并且，在发光二极管的工作过程中，量子阱层是主要产生热量的部分，其产生的热量可以通过与其邻近的绝缘层和凹槽接触层直接传导到基板上，从而优化了紫外LED芯片的散热性能。
进一步的，所述凹槽接触层的斜面背离所述绝缘层设置，利用该斜面的反射以及菲涅尔散射对发光二极管发出的光线进行散射，提高了所述紫外LED芯片的出光效率。
本说明书中各个实施例采用递进的方式描述，每个实施例重点说明的都是与其他实施例的不同之处，各个实施例之间相同相似部分互相参见即可。
对所公开的实施例的上述说明，使本领域专业技术人员能够实现或使用本发明。对这些实施例的多种修改对本领域的专业技术人员来说将是显而易见的，本文中所定义的一般原理可以在不脱离本发明的精神或范围的情况下，在其它实施例中实现。因此，本发明将不会被限制于本文所示的这些实施例，而是要符合与本文所公开的原理和新颖特点相一致的最宽的范围。

Claims (9)

  1. 一种紫外LED芯片，其特征在于，包括：
    衬底；
    基于所述衬底表面依次生长的外延结构、以及在外延结构中设置的绝缘层和凹槽接触层；
    位于所述外延结构一侧背离所述衬底的基板，所述基板朝向所述衬底一侧表面设有布线层、P电极、N电极和中间电极；
    其中，
    所述外延结构包括：
    基于所述衬底表面依次生长的氮化铝成核层、超晶格层、N型氮化镓铝层、量子阱层、电子阻挡层、第一P型导电层、第二P型导电层、金属反射层和薄膜导电层；
    所述绝缘层位于所述外延结构的中部，用于隔离所述外延结构，并将所述外延结构分隔成第一外延结构和第二外延结构；
    所述凹槽接触层贯穿所述第一外延结构的一部分，与所述第一外延结构的N型氮化镓铝层电连接，与所述第一外延结构的其他结构绝缘，所述凹槽接触层设有一个背离所述绝缘层一侧的斜面；
    所述P电极与所述第一外延结构中的薄膜导电层电连接，所述N电极与所述第二外延结构的N型氮化镓铝层电连接，所述中间电极与所述凹槽接触层和所述第二外延结构中的薄膜导电层电连接。
  2. 根据权利要求1所述的紫外LED芯片，其特征在于，所述N型氮化镓铝层包括：第一N型氮化镓铝层和第二N型氮化镓铝层；
    其中，
    所述第二N型氮化镓铝层位于所述第一N型氮化镓铝层背离所述超晶格层一侧；
    所述第二N型氮化镓铝层的外延材料掺杂浓度小于所述第一N型氮化镓铝层的掺杂浓度；
    所述第二N型氮化镓铝层的外延层厚度小于所述第一N型氮化镓铝 层的厚度。
  3. 根据权利要求2所述的紫外LED芯片，其特征在于，所述外延结构还包括：
    位于所述第一N型氮化镓铝层和第二N型氮化镓铝层之间的N型电子能量调节层；
    所述N型电子能量调节层的介电常数小于所述第一N型氮化镓铝层和第二N型氮化镓铝层的介电常数，且所述N型电子能量调节层的外延材料掺杂浓度大于所述第一氮化镓铝层和第二氮化镓铝层的掺杂浓度。
  4. 根据权利要求3所述的紫外LED芯片，其特征在于，还包括：
    覆盖所述第一外延结构和第二外延结构裸露台面和侧壁的钝化层；
    所述钝化层还具有第一连接部，所述第一连接部位于所述中间电极与所述第一外延结构之间以及所述凹槽接触层背离所述绝缘层一侧，以使所述凹槽接触层与所述第一外延结构中的第一N型氮化镓铝层电连接，且与所述第一外延结构的其他结构绝缘。
  5. 根据权利要求2所述的紫外LED芯片，其特征在于，所述第二N型氮化镓铝层的厚度为0.1μm±0.01μm，包括端点值。
  6. 根据权利要求3所述的紫外LED芯片，其特征在于，所述外延结构还包括：
    位于所述第二N型氮化镓铝层与所述量子阱层之间的电流扩展层。
  7. 根据权利要求3所述的紫外LED芯片，其特征在于，还包括：第一电极接触层和第二电极接触层；
    所述钝化层还包括第二连接部，其中，
    所述第一电极接触层贯穿所述第一外延结构的薄膜导电层，所述P电极通过所述第一电极接触层与所述第一外延结构的金属反射层电连接；
    所述第二电极接触层部分贯穿所述第二外延结构，所述N电极通过所述第二电极接触层与所述第二外延结构的第一N型氮化镓铝层电连接；
    所述第二连接部环形覆盖所述第二电极接触层侧壁，以使所述第二电极接触层与所述第二外延结构的其他结构绝缘。
  8. 一种紫外LED芯片的制备方法，其特征在于，包括：
    提供衬底；
    在所述衬底表面一侧依次制备的氮化铝成核层、超晶格层、N型氮化镓铝层、量子阱层、电子阻挡层、第一P型导电层、第二P型导电层、金属反射层和薄膜导电层；
    从所述外延结构的中部进行刻蚀，使所述外延结构的N型氮化镓铝层暴露出来，形成第一凹槽，且所述第一凹槽设有一斜面；
    从所述第一凹槽背离所述斜面一侧的外延结构最表面进行刻蚀或者接着从第一凹槽所暴露出的第一N型氮化镓铝层背离所述斜面一侧继续进行刻蚀，形成第二凹槽，所述第二凹槽贯穿整个所述外延结构，使所述衬底暴露出来，并使所述外延结构分为第一外延结构和第二外延结构；
    在所述第一凹槽中填充介质材料，形成导电的凹槽接触层，所述凹槽接触层与所述第一外延结构的第一N型氮化镓铝层电连接，且与所述第一外延结构的其他结构绝缘；
    在所述第二凹槽中填充绝缘材料，形成绝缘层，用于隔离所述第一外延结构和第二外延结构；
    提供基板；
    在所述基板表面形成布线层；
    在所述布线层表面形成P电极、N电极和中间电极；
    将所述基板与所述衬底进行组装，以使所述P电极与所述第一外延结构的第二P型导电层电连接，所述N电极与所述第二外延结构的第一N型氮化镓铝层电连接，所述中间电极与所述凹槽接触层和第二外延结构的第二P型导电层电连接。
  9. 根据权利要求8所述的方法，其特征在于，所述在所述衬底表面一侧依次制备的氮化铝成核层、超晶格层、N型氮化镓铝层、量子阱层、电子阻挡层、第一P型导电层、第二P型导电层、金属反射层和薄膜导电层包括：
    在所述衬底表面一侧依次制备的氮化铝成核层、超晶格层、第一N型氮化镓铝层、N型电子能量调节层、第二N型氮化镓铝层、电流扩展层、量子阱层、电子阻挡层、第一P型导电层、第二P型导电层、薄膜 导电层和钝化层；其中，
    所述第一N型氮化镓铝层和第二N型氮化镓铝层共同构成所述N型氮化镓铝层，并且所述第二N型氮化镓铝层的外延材料掺杂浓度小于所述第一N型氮化镓铝层的掺杂浓度。
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