WO2019015277A1

WO2019015277A1 - Two-line output matching circuit of inverse class f power amplifier

Info

Publication number: WO2019015277A1
Application number: PCT/CN2018/072377
Authority: WO
Inventors: 黄航; 邓力; 李书芳; 张贯京; 葛新科; 张红治
Original assignee: 深圳市景程信息科技有限公司
Priority date: 2017-07-21
Filing date: 2018-01-12
Publication date: 2019-01-24
Also published as: CN207124609U

Abstract

A two-line output matching circuit (1) of an inverse class F power amplifier (10). The two-line output matching circuit (1) comprises a pre-matching circuit (11) and a two-line matching circuit (12). A first microstrip line (111) and a second microstrip line (112) are connected in series. Connected to a connecting line between the first microstrip line (111) and the second microstrip line (112) is a third microstrip line (113) serving as an open circuit branch. An input end of the first microstrip line (111) serves as an input end of the two-line output matching circuit (1). The two-line matching circuit (12) comprises a fourth microstrip line (121) and a fifth microstrip line (122). The fourth microstrip line (121) is connected in parallel on the fifth microstrip line (122). The input end of the first microstrip line (111) is connected to an output end of a GaN transistor (2). An input end of the second microstrip line (112) is connected to an output end of the first microstrip line (111). An output end of the second microstrip line (112) is connected to an output end of the fifth microstrip line (122). An output end of the fifth microstrip line (122) serves as an input end of the two-line matching circuit (12). This not only provides the inverse class F power amplifier (10) with high harmonic control and impedance matching functions but also with a circuit structure of increased compactness.

Description

Two-line output matching circuit of inverse class F power amplifier

Technical field

The utility model relates to the technical field of wireless communication, in particular to a two-wire output matching circuit of an inverse class F power amplifier.

Background technique

With the development of modern wireless communication, wireless communication systems are increasingly demanding high-efficiency microwave devices, especially power amplifiers. Existing high-efficiency inverse class F power amplifiers designed by conventional open or shorted stubs can only achieve third harmonic control. However, higher harmonic control will result in excessive circuit size and affect the inverse class F power amplifier. The performance, and the traditional harmonic network is independent of the impedance transformation network, not only increases the circuit design steps of the inverse class F power amplifier, but also increases the circuit design size of the inverse class F power amplifier.

technical problem

The main purpose of the utility model provides a two-wire output matching circuit of an inverse class F power amplifier, which aims to solve the problem that the existing inverse class F power amplifier can only achieve third harmonic control and realize higher harmonics control. A technical problem that causes the circuit size to be too large and affects the performance of the power amplifier.

Technical solution

To achieve the above object, the present invention provides a two-line output matching circuit of an inverse class F power amplifier, the two-wire output matching circuit is connected with a GaN tube, and the two-wire output matching circuit includes a pre-matching circuit and a two-wire matching. Circuit, where:

The pre-matching circuit includes a first microstrip line and a second microstrip line, the first microstrip line is connected in series with the second microstrip line, and the connection line between the first microstrip line and the second microstrip line is connected There is a third microstrip line as an open branch, and the input end of the first microstrip line is an input end of the two-line output matching circuit;

The two-wire matching circuit includes a fourth microstrip line and a fifth microstrip line, and the fourth microstrip line is connected in parallel on the fifth microstrip line;

The input end of the first microstrip line is connected to the output end of the GaN tube, the input end of the second microstrip line is connected to the output end of the first microstrip line, and the output end of the second microstrip line is connected to the fifth micro With the input of the line, the output of the fifth microstrip line is the output of the two-wire matching circuit.

Preferably, the two-wire output matching circuit is further connected with an output feeding network, and the output feeding network supplies a drain voltage to the GaN tube by the drain power source V _DS .

Preferably, the output feed network includes an inductor L and a decoupling capacitor C. One end of the decoupling capacitor C is connected to a connection line between the inductor L and the drain power source V _DS , and the other end of the decoupling capacitor C is grounded.

Preferably, the output of the two-wire matching circuit is connected to a load, and the impedance of the load is Z _L = 50 Ω.

Preferably, the first microstrip line has an impedance Z ₁ =15 Ω, an electrical length θ ₁ =30°, an impedance of the second microstrip line Z ₂ =40 Ω, an electrical length θ ₂ =5°, and a third The impedance of the microstrip line is Z ₃ = 20 Ω and the electrical length θ ₃ = 30°.

Preferably, the fourth microstrip line has an impedance Z ₄ = 35 Ω, an electrical length θ ₄ = 72°, and an impedance of the fifth microstrip line Z ₅ = 35 Ω and an electrical length θ ₅ = 108°.

Beneficial effect

Compared with the prior art, the two-wire output matching circuit of the present invention is applied to an inverse class F power amplifier, so that the inverse class F power amplifier has both harmonic control and impedance matching functions, and the existing inverse F power is solved. The amplifier's circuit is bulky and can only achieve the third harmonic control defect, which not only enables the inverse class F power amplifier to achieve higher harmonic control, but also saves the amplifier circuit space, making the inverse F class amplifier circuit structure more compact, further Improve the efficiency of the inverse class F power amplifier.

DRAWINGS

1 is a block diagram showing the circuit structure of a preferred embodiment of an inverse class F power amplifier to which the present invention is a two-wire output matching circuit;

2 is a circuit diagram of a two-wire output matching circuit of an inverse class F power amplifier of the present invention;

3 is a schematic diagram showing performance test results of an inverse class F power amplifier using the two-wire output matching circuit of the present invention;

4 is a schematic diagram showing linearity test results of an inverse class F power amplifier using the two-wire output matching circuit of the present invention.

The objectives, features, and advantages of the invention will be described in conjunction with the embodiments of the invention.

BEST MODE FOR CARRYING OUT THE INVENTION

The specific embodiments, structures, features and functions of the present invention will be described in detail below with reference to the accompanying drawings and preferred embodiments. It is understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

Referring to FIG. 1, FIG. 1 is a block diagram showing the circuit structure of a preferred embodiment of an inverse class F power amplifier to which the two-wire output matching circuit of the present invention is applied. In this embodiment, the two-wire output matching circuit 1 should be on the inverse class F power amplifier 10, and the inverse class F power amplifier 10 includes an input port P1, a stabilization circuit 4, an input matching circuit 3, and a GaN tube (GaN high). Electron mobility transistor) 2, two-line output matching circuit 1 and output port P2. The input port P1 is connected to the input end of the stabilizing circuit 4, the output end of the stabilizing circuit 4 is connected to the input end of the input matching circuit 3, and the output end of the input matching circuit 3 is connected to the input end of the GaN tube 2, the GaN tube 2 The output is connected to the input of the two-wire output matching circuit 1, and the output of the two-wire output matching circuit 1 is connected to the output port P2.

The input port P1 is for receiving a signal input by an external component, the stabilization circuit 4 is for preventing a signal from being oscillated to generate a self-excitation phenomenon; and the input matching circuit 3 performs impedance matching on an input end of the GaN tube 2. The stabilization circuit 4 and the input matching circuit 3 are both a stable circuit module and an input matching circuit module of the existing inverse F-type power amplifier, and the present invention will not be described in detail. The GaN tube 2 is a gallium nitride tube, and the utility model adopts a high electron mobility transistor of CREE Company, and the specific model is CGH40025F, and the GaN tube 2 inputs a signal to the two-line output matching circuit 1, which can be used for 6 times. Harmonic controlled inverse class F power amplifier 10.

In the present embodiment, the two-wire output matching circuit 1 is also connected to an output feed network 5, and the output feed network 5 supplies a drain voltage from the drain power source V _DS to feed the GaN tube 2. The input matching circuit 3 is also connected to an input feed network 6, which supplies a gate voltage from the gate power source V _GS to feed the GaN tube 2. The input feed network 6 is an input feed circuit module of an existing inverse F-type power amplifier, and the present invention does not describe it in detail.

Referring to FIG. 2, FIG. 2 is a circuit diagram of a two-line output matching circuit of an inverse class F power amplifier of the present invention. The main innovation of the utility model lies in the circuit structure of the two-wire output matching circuit 1. The two-wire output matching circuit 1 is a two-line output matching circuit based on a microstrip line and two-wire structure, and has harmonic control and impedance matching functions. In the present embodiment, the two-wire output matching circuit 1 includes a pre-matching circuit 11 and a two-wire matching circuit 12, which is a first-stage matching circuit composed of three microstrip lines. Specifically, the pre-matching circuit 11 includes a first microstrip line 111 and a second microstrip line 112. The first microstrip line 111 is connected in series with the second microstrip line 112, and the input end of the first microstrip line 111 is a double line. The input of the output matching circuit 1 is connected to the output of the GaN tube 2. The input of the second microstrip line 112 is connected to the output of the first microstrip line 111, and the output of the second microstrip line 112 is the output of the pre-matching circuit 11. A third microstrip line 113 as an open stub is connected to the connection line between the first microstrip line 111 and the second microstrip line 112. The width of each microstrip line is the impedance of the microstrip line, and the length of each microstrip line is determined by the electrical length of the microstrip line. In the present embodiment, the impedance of the first microstrip line 111 is Z ₁ = 15 Ω, the electrical length θ ₁ = 30°; the impedance of the second microstrip line 112 is Z ₂ = 40 Ω, and the electrical length θ ₂ = 5°; The impedance of the microstrip line 113 is Z ₃ = 20 Ω, and the electrical length θ ₃ = 30°.

The two-wire matching circuit 12 is a second-stage matching circuit, and includes a fourth microstrip line 121 and a fifth microstrip line 122. The fourth microstrip line 121 is connected in parallel to the fifth microstrip line 122, the output end of the second microstrip line 112 is connected to the input end of the fifth microstrip line 122, and the output end of the fifth microstrip line 122 is double-line matched. The output of circuit 12. In the present embodiment, the impedance of the fourth microstrip line 121 is Z ₄ = 35 Ω, and the electrical length θ ₄ = 72°; the impedance of the fifth microstrip line 122 is Z ₅ = 35 Ω, and the electrical length θ ₅ = 108°.

The output of the two-wire matching circuit 12 (ie, the output of the fifth microstrip line 122) is connected to an output feed network 5, which includes an inductor L and a decoupling capacitor C, the inductance value of the inductor For L=20nH, the capacitance of the decoupling capacitor C can reach the order of μF, and the specific size is not limited. One end of the decoupling capacitor C is connected to the connection line between the inductor L and the drain power source V _DS , and the other end of the decoupling capacitor C is grounded. Two-wire output terminal matching circuit 12 is connected to the output port P2 (FIG. 1), and directly connected to a load Z _L, Z _L of the load impedance Z _L = 50Ω.

In this embodiment, the pre-matching circuit 11 is a first-stage matching circuit, and its main function is to perform pre-matching and generating a short-circuit point of the third harmonic, and can sequentially reverse the impedance point of the higher-order harmonic according to F The requirements of the class theory are matched to the corresponding open and short points of the two-wire matching circuit 12 (second-stage matching circuit). According to the theory of the two-wire microstrip line, the input impedance at the input of the two-wire matching circuit 12 can be expressed as follows:

Wherein Z ₄ is the impedance of the fourth microstrip line 121, f represents the input frequency, f ₀ represents the center frequency, Z _L is the impedance of the load, and θ ₄ is the electric power of the fourth microstrip line 121 in the two-line matching circuit 12 length. In this embodiment, the electrical lengths of the fourth microstrip line 121 and the fifth microstrip line 122 of the two-wire matching circuit 12 (second-stage matching circuit) are θ ₄ =72° and θ ₅ =108°, respectively. When the impedance Z ₄ = Z ₅ = 35 Ω and the impedance of the load Z _L = 50 Ω, an open circuit of the 5th harmonic and a short circuit point of the 2nd, _4th , 6th, and 8th harmonics can be generated at the input end of the two-line matching circuit 12. Meanwhile, when f = f ₀ , the two-stage matching circuit 12 of the second stage is equivalent to a quarter-wave impedance converter having a characteristic impedance of Z ₄ · (sin θ ₄ / 2). Therefore, the two-wire matching circuit 12 has not only the function of harmonic control but also the impedance matching function of the fundamental frequency. Therefore, in the output matching design of the inverse class F power amplifier, not only the control of the higher harmonics but also the space of the amplifier circuit is saved, and the amplifier circuit is more compact.

Referring to Figures 3 and 4, Figure 3 is a schematic diagram showing the performance test results of an inverse class F power amplifier using a two-wire output matching circuit; Figure 4 is a schematic diagram showing the linearity test results of an inverse class F power amplifier using a two-wire output matching circuit. . The two-wire output matching circuit 1 of the present embodiment can be used to implement the inverse harmonic power amplifier 10 of the sixth harmonic control, and the 2.4 GHz inverse class F power amplifier is successfully realized by the CREE GaN tube 2. Referring to FIG. 3, the test results show that the inverse class F power amplifier 10 has a maximum drain efficiency of 87.4% (for example, at a frequency of 2.375 GHz), and achieves an output power of 44.5 dBm. Referring to FIG. 4, in the case of digital pre-distortion, the inverse class F power amplifier 10 has a forward signal to noise ratio of -50.8 and -51.6 dBc, which characterizes the high linearity of the inverse class F power amplifier 10 in actual use. degree. In the 2.225 GHz to 2.6 GHz band, the inverse class F power amplifier 10 has a high drain efficiency of 60% or more.

The two-wire output matching circuit proposed by the utility model is applied to an inverse class F power amplifier, and the inverse class F power amplifier has harmonic control and impedance matching functions at the same time, which solves the problem that the circuit of the existing inverse F power amplifier is bulky and only Can achieve the third harmonic control defects. The inverse class F power amplifier applying the two-wire output matching circuit of the utility model not only realizes the control of higher harmonics, but also saves the circuit space of the amplifier, makes the circuit structure of the inverse class F amplifier more compact, and further improves the inverse class F power amplifier. effectiveness.

The above is only a preferred embodiment of the present invention, and is not intended to limit the scope of the patents of the present invention. Any equivalent structure or equivalent function transformation made by the description of the present invention and the contents of the drawings may be directly or indirectly applied to other related The technical fields are all included in the scope of patent protection of the present invention.

Industrial applicability

Claims

A two-line output matching circuit of an inverse class F power amplifier, the two-wire output matching circuit is connected with a GaN tube, wherein the two-wire output matching circuit comprises a pre-matching circuit and a two-wire matching circuit, wherein: The pre-matching circuit includes a first microstrip line and a second microstrip line, the first microstrip line is connected in series with the second microstrip line, and the connection line between the first microstrip line and the second microstrip line is connected a third microstrip line of the open circuit branch, the input end of the first microstrip line is an input end of the two-line output matching circuit; the two-wire matching circuit includes a fourth microstrip line and a fifth microstrip line, and the fourth microstrip The line is connected in parallel on the fifth microstrip line; the input end of the first microstrip line is connected to the output end of the GaN tube, and the input end of the second microstrip line is connected to the output end of the first microstrip line, the second micro The output with the line is connected to the input of the fifth microstrip line, and the output of the fifth microstrip line is the output of the two-line matching circuit.
A two-wire output matching circuit for an inverse class F power amplifier according to claim 1, wherein said two-wire output matching circuit is further connected to an output feed network, said output feed network being provided by a drain power supply V DS The drain voltage feeds the GaN tube.
The two-wire output matching circuit of the inverse class F power amplifier according to claim 2, wherein the output feeding network comprises an inductor L and a decoupling capacitor C, and one end of the decoupling capacitor C is connected to the inductor L and the drain On the connection line between the pole power supply V DS , the other end of the decoupling capacitor C is grounded.
The two-wire output matching circuit of the inverse class F power amplifier according to claim 1, wherein the output of the two-wire matching circuit is connected to a load, and the impedance of the load is Z L = 50 Ω.
The two-line output matching circuit of the inverse class F power amplifier according to any one of claims 1 to 4, wherein the first microstrip line has an impedance Z 1 = 15 Ω and an electrical length θ 1 = 30°. The impedance of the second microstrip line is Z 2 = 40 Ω, the electrical length θ 2 = 5°, and the impedance of the third microstrip line Z 3 = 20 Ω, and the electrical length θ 3 = 30°.
A two-wire output matching circuit for an inverse class F power amplifier according to claim 5, wherein said fourth microstrip line has an impedance Z 4 = 35 Ω, an electrical length θ 4 = 72°, and a fifth microstrip The impedance of the line is Z 5 = 35 Ω and the electrical length θ 5 = 108°.