WO2019000196A1 - Procédé, dispositif et système de codage de code convolutif circulaire - Google Patents

Procédé, dispositif et système de codage de code convolutif circulaire Download PDF

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Publication number
WO2019000196A1
WO2019000196A1 PCT/CN2017/090103 CN2017090103W WO2019000196A1 WO 2019000196 A1 WO2019000196 A1 WO 2019000196A1 CN 2017090103 W CN2017090103 W CN 2017090103W WO 2019000196 A1 WO2019000196 A1 WO 2019000196A1
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tail
convolutional code
biting convolutional
equal
bit stream
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PCT/CN2017/090103
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English (en)
Chinese (zh)
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原进宏
杨雷
吴晓薇
程型清
费永强
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华为技术有限公司
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Priority to PCT/CN2017/090103 priority Critical patent/WO2019000196A1/fr
Publication of WO2019000196A1 publication Critical patent/WO2019000196A1/fr

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/23—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using convolutional codes, e.g. unit memory codes

Definitions

  • the present application relates to the field of communications, and in particular, to a method, device and system for encoding a tail biting convolutional code.
  • coding techniques are indispensable in order to ensure high reliability data transmission.
  • One coding technique is to ensure that the trellis starts and ends in a certain state, called the tail-biting technique, which has the feature of not requiring any extra bits to be transmitted.
  • LTE Long Term Evolution
  • a tail-biting convolutional code with a constraint length of 7 and a code rate of 1/3 is defined.
  • the configuration of the encoder is shown in Figure 1.
  • the encoder includes six shift registers D, the initial value of each shift register being set to the last six bits of the information stream, such that the initial and final states of the mobile register are consistent.
  • Enhanced Mobile Broadband eMBB
  • massive machine type of communication mMTC
  • low latency and high reliability scenarios eMBB
  • URLLC Ultra-reliable and lowlatencycommunications
  • mMTC needs to use channel coding with short information length to support a large number of M2M communication connections
  • uRLLC needs to use channel coding with high coding gain and low decoding delay to support real-time high-reliability communication in critical application environments.
  • the bite-tailed convolutional code of the above-mentioned 1/3 code rate is usually used as the mother code, and is repeatedly transmitted.
  • the transmitting end first encodes the information bit stream of length k by a bite-tailed convolutional code of 1/3 of the code rate, and the encoder (shown in FIG. 1) outputs the check bit streams P0, P1 and P2 of a total length of 3k.
  • the parity bit stream is further parallel-interleaved, and then rate matching is performed by bit collection and bit selection.
  • the low code rate coding is implemented by repeatedly transmitting the check bit stream, and the coding gain is insufficient, resulting in a decrease in reliability.
  • the embodiment of the present invention provides a method, a device and a system for encoding a tail biting convolutional code.
  • the bite-tail convolutional code of a low code rate encoding high coding gain is realized regardless of the length of the input information bit stream, thereby improving communication reliability.
  • Gm is an octal representation of a mother code generator polynomial of the m+1th check bit stream in n parity bitstreams, and m is an integer greater than or
  • the tail-biting convolutional code encoding method provided by the present application since the encoder supports a plurality of lower code rates, the lower bit rate is directly implemented by using a lower bit rate tailing convolutional code mother code, and low bit rate coding is realized. A bite-tail convolutional code with a high coding gain. It is verified that the tail-biting convolutional code encoding method provided by the present application can obtain about 0.2 dB to the tail-biting convolutional code provided by the present application when the information bit stream is less than 20 bits, compared to the repeated transmission method described in the background art.
  • the tail-biting convolutional code encoding method provided by the present application can realize a bite-tailed convolutional code with a low code rate encoding high coding gain regardless of the length of the input information bit stream, thereby improving communication reliability.
  • n is the number of parity bit streams supported by the tail biting convolutional code encoder.
  • the j-th check bit stream of the tail-biting convolutional code encoder is generated by the input information bit stream according to the mother code generating polynomial code of the j-th check bit stream of the tail-biting convolutional code encoder, so When the number of parity bit streams supported by the tail biting convolutional code encoder code is n, the input information bit stream is encoded by the tail biting convolutional code encoder to obtain n parity bit streams.
  • the mother code generation polynomial can be expressed in other forms according to actual needs, such as decimal or other hexadecimal sequences, and reverse order representation. Wait, there is no more details here.
  • the nature of the representation is the same as the essence of the octal sequence representation of the mother code generation polynomial described in the present application, and is an equivalent identifier, which belongs to the simple replacement of the scheme and belongs to the protection scope of the present application. .
  • the equivalent representation of G5 in decimal is 123, which represents the same coding architecture of the sixth check bit stream.
  • n is a positive integer greater than or equal to 2 and less than or equal to 12
  • a specific architecture of a tail biting convolutional code encoder is provided, and the encoder may include: 6 shift registers, 6 The shift register generates a polynomial connection in accordance with the mother code of each of the check bitstreams in the tail-biting convolutional code encoder.
  • Generating a polynomial connection according to the mother code includes: converting the mother code generator polynomial from octal to binary, and removing the highest bit, if the other bits are binary, it means that the register is XORed with the input bit. If the binary is 0, the register is The input bits are not different or.
  • the six shift registers are obtained by generating a polynomial connection according to the mother code of each check bit stream in the tail-biting convolutional code encoder, having one input port and n output ports, when one information bit is input. After the encoder, n input ports get a check bit respectively.
  • the present application provides The tail biting convolutional code encoding method may further include: transmitting a verification bit stream to the receiving end according to the size of the target code rate.
  • the verification bit stream is sent to the receiving end according to the size of the target code rate, which may be specifically implemented as: if the target bit rate is Transmitting, to the receiving end, all bits of the first x parity bitstreams in the n parity bitstreams, the receiving end decoding using a code rate of 1/x; x is a positive integer greater than or equal to 2, and x is less than or equal to n; Transmitting, to the receiving end, all bits of the first x-1 parity bitstreams of the n parity bitstreams, and the xth parity bitstream Bits, the receiver uses the bit rate Decode; k is the length of the information bit stream. In this way, the bite-tailed convolutional code is implemented at a code rate as low as possible to ensure the reliability of communication.
  • the present application provides The method for encoding the tail-biting convolutional code may further include: receiving a retransmission request sent by the transmitting end, where the retransmission request is sent when the receiving end finds that the error data exists after decoding; and when receiving the retransmission request, The transmitting end transmits all bits of the x+1th to x+thth check bitstreams in the n check bitstreams, so that the receiving end uses the code rate. Decoding. Where y is a positive integer less than or equal to nx. In this way, in the case where the signal-to-noise ratio of the communication system is very low, the channel coding of the communication system is operated at a lower code rate, and the reliability of communication is ensured.
  • the method for encoding the tail-biting convolutional code provided by the present application does not limit the specific scheme of the method for decoding the tail-biting convolutional code used by the receiving end, and the receiving end only needs to use the corresponding code rate for decoding. .
  • Gm is an octal representation of a mother code generator polynomial of the m+1th check
  • tail-biting convolutional code encoding apparatus provided by the second aspect is used to implement the tail-biting convolutional code encoding method provided by the foregoing first aspect, and the specific implementation may refer to the description of the foregoing first aspect, and no longer Repeat them. Therefore, the tail-biting convolutional code encoding apparatus provided by the second aspect can achieve the same effects as the tail-splitting convolutional code encoding method provided by the first aspect, and will not be described herein.
  • tail biting convolutional code encoding apparatus can implement the functions in the foregoing method examples, and the functions can be implemented by hardware or by executing corresponding software through hardware.
  • the hardware or software includes one or more modules corresponding to the above functions.
  • the structure of the tail biting convolutional code encoding apparatus includes a processor and a transceiver configured to support the tail biting convolutional code encoding apparatus to perform the foregoing method.
  • the transceiver is for supporting communication between the tail biting convolutional code encoding device and other devices.
  • the UE may also include a memory for coupling with the processor, Store the necessary program instructions and data for the tail biting convolutional code encoding device.
  • an embodiment of the present application provides a computer storage medium for storing computer software instructions for use in the above-described tail biting convolutional code encoding apparatus, including a program designed to execute the above first aspect.
  • an embodiment of the present application provides a tail biting convolutional code encoding system, including the tail biting convolutional code encoding apparatus described in any of the above aspects or any possible implementation manner, and biting tail convolutional code decoding. Device.
  • the solution provided by the third aspect to the fifth aspect is used to implement the tail-biting convolutional code encoding method provided by the foregoing first aspect, and thus the same beneficial effects can be achieved as the first aspect, and details are not described herein.
  • FIG. 1 is a schematic diagram of a coding configuration provided by the prior art
  • FIG. 2 is a schematic diagram of a bite-tailed convolutional code encoding architecture of a repeated transmission provided by the prior art
  • FIG. 3 is a schematic structural diagram of a wireless communication system according to an embodiment of the present disclosure.
  • FIG. 4 is a schematic structural diagram of a tail biting convolutional code encoding apparatus according to an embodiment of the present application.
  • FIG. 5 is a schematic flowchart of a method for encoding a tail biting convolutional code according to an embodiment of the present disclosure
  • FIG. 6 is a schematic structural diagram of a tail biting convolutional code encoder according to an embodiment of the present disclosure
  • FIG. 7 is a schematic diagram of performance comparison between a tail-biting convolutional code encoding method and other encoding methods according to an embodiment of the present application.
  • FIG. 8 is a schematic diagram showing another performance comparison between the method for encoding the tail biting convolutional code and other encoding methods according to an embodiment of the present application.
  • FIG. 9 is a schematic diagram showing another performance comparison of the method for encoding the tail biting convolutional code and other encoding methods according to an embodiment of the present application.
  • FIG. 10 is a schematic diagram showing another performance comparison of the tail biting convolutional code encoding method and other encoding methods according to an embodiment of the present application.
  • FIG. 11 is a schematic diagram showing another performance comparison of the method for encoding the tail biting convolutional code and other encoding methods according to an embodiment of the present application.
  • FIG. 12 is a schematic diagram showing another performance comparison of the method for encoding the tail biting convolutional code and other encoding methods according to an embodiment of the present application.
  • FIG. 13 is a schematic structural diagram of another tail biting convolutional code encoding apparatus according to an embodiment of the present disclosure.
  • FIG. 14 is a schematic structural diagram of still another tail biting convolutional code encoding apparatus according to an embodiment of the present disclosure.
  • FIG. 15 is a schematic structural diagram of still another tail biting convolutional code encoding apparatus according to an embodiment of the present disclosure.
  • the channel coding technique of the tail biting convolutional code has been widely used.
  • new service requirements require lower and lower coding rate.
  • degrading the code rate it is also necessary to ensure coding gain to ensure communication reliability.
  • the present application provides a new tail biting convolutional code coding scheme, and specifically provides a mother code generation polynomial of each check bit stream in the tail biting convolutional code encoder, which can support lower code rate coding. And verified to ensure the length of different information bitstream The coding gain.
  • the tail-biting convolutional code encoding method provided by the present application is applied to the wireless communication system architecture as shown in FIG. As shown in FIG. 3, the wireless communication system architecture transmits a device 301 and a receiver device 302. The sender device 301 and the receiver device 302 communicate over a wireless channel to transmit data.
  • the party that sends the data encodes the information bit stream to be transmitted by using the tail-biting convolutional code encoding method, and the check bit stream is sent to the opposite end; the data is received.
  • One of the parties receives the encoded check bit stream for decoding and completes the data transmission. It should be noted that in wireless communication, transmission/reception is a relative concept and is not a specific concept.
  • the sender device 301 or the receiver device 302 may be a base station or a user equipment (UE) in the wireless communication, and may be other communication devices.
  • UE user equipment
  • the base station described in this application that is, the network side device that provides communication services for the UE in the wireless communication system.
  • base stations may have different names, but are all understood to be base stations described in this application.
  • the embodiment of the present application does not specifically limit the type of the base station.
  • a base station in a Universal Mobile Telecommunications System (UMTS) is called a base station (BS); a base station in an LTE system is called an evolved Node B (eNB), etc. No more enumeration.
  • UMTS Universal Mobile Telecommunications System
  • eNB evolved Node B
  • Any network side device that provides communication services for the UE in the wireless communication system can be understood as the base station described in this application.
  • the UE described in this application that is, the mobile communication device used by the user.
  • the UE can be a mobile phone, a tablet computer, a notebook computer, an ultra-mobile personal computer (UMPC), a netbook, a personal digital assistant (PDA), an e-book, a mobile TV, a wearable device, a personal computer ( Personal Computer, PC) and more.
  • terminals may have different names, but they can all be understood as UEs described in this application.
  • the embodiment of the present application does not specifically limit the type of the UE.
  • the wireless communication system architecture shown in FIG. 3 may be an LTE network, or a Universal Mobile Telecommunications System (UMTS) network, or other network.
  • UMTS Universal Mobile Telecommunications System
  • the embodiment of the present application does not specifically limit the type of the network to which the solution of the present application is applied.
  • the information bit stream refers to data to be transmitted in the form of a bit stream before encoding, which is also referred to as an input bit stream.
  • the check bit stream refers to a bit stream form obtained by the encoder bit stream after being encoded by the encoder, which is also called an output bit stream.
  • the mother code generation polynomial is a numerical representation used to represent the connection relationship of the shift registers in the encoder.
  • the words “exemplary” or “such as” are used to mean an example, illustration, or illustration. Any embodiment or design described as “exemplary” or “for example” in the embodiments of the present application should not be construed as preferred or advantageous over other embodiments or designs. Rather, the use of the words “exemplary” or “for example” is intended to present the relevant concepts in a specific manner. Easy to understand.
  • an embodiment of the present application provides a tail biting convolutional code encoding apparatus.
  • 4 shows a tail biting convolutional code encoding device 40 associated with various embodiments of the present application.
  • the tail biting convolutional code encoding device 40 can be deployed in the transmitting device 301 or the receiving device 302 in the wireless communication system architecture shown in FIG.
  • the tail biting convolutional code encoding device 40 may include a processor 401, a memory 402, and a transceiver 403.
  • tail biting convolutional code encoding device 40 The components of the tail biting convolutional code encoding device 40 will be specifically described below with reference to FIG. 4:
  • the memory 402 may be a volatile memory such as a random-access memory (RAM) or a non-volatile memory such as a read-only memory. , ROM), flash memory, hard disk drive (HDD) or solid-state drive (SSD); or a combination of the above types of memory for storing a program that implements the method of the present application Code, and configuration files.
  • RAM random-access memory
  • non-volatile memory such as a read-only memory. , ROM), flash memory, hard disk drive (HDD) or solid-state drive (SSD); or a combination of the above types of memory for storing a program that implements the method of the present application Code, and configuration files.
  • the processor 401 is a control center of the tail biting convolutional code encoding device 40, and may be a central processing unit (CPU), an application specific integrated circuit (ASIC), or configured to be configured.
  • CPU central processing unit
  • ASIC application specific integrated circuit
  • One or more integrated circuits that implement the embodiments of the present application such as one or more digital singular processors (DSPs), or one or more Field Programmable Gate Arrays (FPGAs).
  • DSPs digital singular processors
  • FPGAs Field Programmable Gate Arrays
  • the processor 401 can perform various functions of the tail-biting convolutional code encoding device 40 by running or executing software programs and/or modules stored in the memory 402, as well as invoking data stored in the memory 402.
  • the transceiver 403 is used for the tail biting convolutional code encoding device 40 to interact with other units.
  • the processor 401 constructs a tail biting convolutional code encoder by running or executing a software program and/or module stored in the memory 402, and calling data stored in the memory 402, the tail biting convolutional code encoder
  • Gm is an octal representation of a mother code generator polynomial of the m+1th check bit stream in n parity bitstreams, and m is an integer greater than or equal to 0 and less than or equal to n-1.
  • the mother code generation polynomial can be expressed in other forms according to actual needs, such as decimal or other hexadecimal sequences, and reverse order representation. Wait, there is no more details here.
  • the nature of the representation is the same as the essence of the octal sequence representation of the mother code generation polynomial described in the present application, and is an equivalent identifier, which belongs to the simple replacement of the scheme and belongs to the protection scope of the present application. .
  • the equivalent representation of G5 in decimal is 123, which represents the same encoding architecture for the sixth parity bit stream.
  • an embodiment of the present application provides a tail biting convolutional code encoding method, which is applied to a tail biting convolutional code encoding apparatus. As shown in FIG. 5, the method may include:
  • the tail biting convolutional code encoding device acquires an information bit stream.
  • the tail biting convolutional code encoding device in S501 acquires data to be transmitted in the communication as an information bit stream, and is ready to perform encoding.
  • the tail biting convolutional code encoding apparatus acquires an information bit stream by a unit that can generate data to be transmitted from a transmitting end device to which it belongs.
  • the tail biting convolutional code encoding device encodes the information bit stream by the tail biting convolutional code encoder to obtain n parity bit streams.
  • n is a positive integer greater than or equal to 2.
  • n is determined by the number of check bit streams supported by the tail biting convolutional code encoder encoding, and n is the number of streams of the check bit stream supported by the tail biting convolutional code encoder encoding.
  • the upper limit of the value of n is not specifically limited in the embodiment of the present application.
  • the j-th check bit stream of the tail-biting convolutional code encoder generates a polynomial from the input information bit stream according to the mother code of the j-th check bit stream of the tail-biting convolutional code encoder.
  • the code is generated. Therefore, when the number of check bit streams supported by the tail-biting convolutional code encoder code is n, the input information bit stream is encoded by the tail-biting convolutional code encoder to obtain n check bit streams.
  • the effect of the tail-biting convolutional code encoding method provided by the embodiment of the present application is determined by a tail-biting convolutional code encoder having the following characteristics: the bite-tailed convolutional code encoder has a mother code when n is less than 4.
  • Gm is an octal representation of a mother code generator polynomial of the m+1th check bit stream in n parity bitstreams, and m is an integer greater than or equal to 0 and less than or equal to n-1.
  • tail-biting convolutional code encoder code when the number of check bit streams supported by the tail-biting convolutional code encoder code is greater than or equal to 4, the generator polynomial of the tail-biting convolutional code encoder satisfies the above condition, and the tail-biting convolutional code encoder belongs to The scope of protection of the present application.
  • the tail-biting convolutional code encoder may include: six shift registers that generate a polynomial connection according to the mother code of each of the check bitstreams in the tail-biting convolutional code encoding. The following describes the six shift registers to generate the specific content of the polynomial connection in accordance with the mother code of each check bit stream in the tail biting convolutional code encoding.
  • the mother code generation polynomial of each check bit stream in the tail biting convolutional code encoder is a bite tail volume
  • the connection relationship of the plurality of shift registers included in the product code encoder, and therefore, the mother code generator polynomial of each check bit stream in the tail bit convolutional code encoder can uniquely determine the structure of the tail biting convolutional code encoder.
  • the process of determining the coding structure of the check bit stream by the bite-tail convolutional code encoder by using a mother code generation polynomial (octal form) of a check bit stream in the tail-biting convolutional code encoder may include: First, the mother code generator polynomial is converted from octal to binary, and then the highest bit is removed (the highest bit is set to 1 bit), and the remaining bits represent the relationship between the information bit input and the shift register when the code rate is encoded. Then, the XOR operation is performed with the shift register. If it is 0, the XOR operation is not performed with the shift register.
  • the mother code generator polynomial of each check bit stream in the tail-biting convolutional code encoder has a one-to-one correspondence with the code structure of the bite-tailed convolutional code stream, which can be based on one Determine the other.
  • the determining process then generates a polynomial connection according to the mother code for the shift register mentioned in the embodiment of the present application.
  • the hexadecimal 165 corresponds to the binary bit 1110101, and after removing the highest bit, it is 110101. Therefore, the information bit of the process of the third check bit stream encoding in the tail-biting convolutional code encoder is XORed with D1, X2 with D2. It is the same as D3, XOR with D4, XOR with D5, or XOR with D6.
  • the number of output check bit streams supported by the tail-biting convolutional code encoder used in the method of encoding the tail-biting convolutional code provided by the embodiment of the present invention may be determined according to actual requirements. This is not limited. As long as the mother code generator polynomial of the tail biting convolutional code encoder has the above characteristics, it belongs to the scope of protection of the embodiment of the present application.
  • the tail-biting convolutional code encoding method provided by the present application since the encoder supports a plurality of lower code rates, the lower bit rate is directly implemented by using a lower bit rate tailing convolutional code mother code, and low bit rate coding is realized. A bite-tail convolutional code with a high coding gain. It is verified that the tail-biting convolutional code encoding method provided by the present application can obtain about 0.2 dB to the tail-biting convolutional code provided by the present application when the information bit stream is less than 20 bits, compared to the repeated transmission method described in the background art.
  • the tail-biting convolutional code encoding method provided by the present application can realize a bite-tailed convolutional code with a low code rate encoding high coding gain regardless of the length of the input information bit stream, thereby improving communication reliability.
  • the mother code generator polynomial of each check bit stream in the tail-tailing convolutional code encoder, and the corresponding free distance d f and free distance multiplicity can be as shown in Table 1.
  • the structure of the tail-biting convolutional code encoder corresponding to the mother code generation polynomial of each check bit stream in the tail-biting convolutional code encoder shown in Table 1 is as shown in FIG. 6.
  • G0, G1, ..., G11 respectively represent the first, second, ..., mother code generation polynomial of the twelfth check bit stream
  • P0, P1, ..., P11 respectively indicate the first and second. , ..., the 12th check bit stream.
  • the mother code generator polynomial of each check bit stream in the tail-tailing convolutional code encoder, and the corresponding free distance d f and free distance multiplicity can be as shown in Table 2.
  • the mother code generator polynomial of each check bit stream in the tail-tailing convolutional code encoder, and the corresponding free distance d f and free distance multiplicity can be as shown in Table 3.
  • tail-biting convolutional code encoder corresponding to the mother code generation polynomial of each check bit stream in the tail-biting convolutional code encoder shown in Table 2 and Table 3 is not shown one by one. , can be determined according to the foregoing.
  • mother code generator polynomial of each check bit stream in the tail-biting convolutional code encoders shown in Table 1, Table 2, and Table 3, and the corresponding free distance d f and free distance multiplicity It is merely an exemplary description and is not specifically limited.
  • the mother of each parity bit stream in the tail-biting convolutional code encoder as illustrated in Table 1, Table 2, and Table 3 provided by the embodiment of the present application is used.
  • the bite-tailed convolutional code encoder code corresponding to the code generator polynomial (hereinafter briefly described as the coding scheme of the present application)
  • the coding scheme of the present application when the information bit stream length is less than 20 bits, a coding gain of about 0.2 dB to 0.6 dB can be obtained; in the information bit stream When the length is greater than 20 bits, such as 50 bits, the coding gain of 0.2 dB to 0.3 dB can still be obtained.
  • each check bit as shown in Table 4 is used.
  • the mother code of the stream generates a polynomial, and the corresponding free distance d f and free distance multiplicity The performance differences of the validated analysis are described below.
  • the relationship between the minimum code distance and the length of the information bit stream is as shown in FIG. 10 when using the coding scheme of the present application and encoding using the tail-biting convolutional code encoder illustrated in Table 4.
  • the minimum code distance of the coding scheme of the present application tends to grow steadily as the length of the information bit stream increases.
  • the minimum code spacing of the coding scheme of the present application is superior to the minimum code distance of the coding scheme illustrated in Table 4.
  • the coding scheme of the present application can reach the free distance earlier than the coding scheme illustrated in Table 4. Therefore, the coding scheme of the present application can provide a more stable coding gain in the case where the length of the information bit stream is short.
  • the coding scheme of the present application After verifying that the code rate is 1/5, the coding scheme of the present application is used, and the bite-tailed convolutional code encoder coding scheme illustrated in Table 4 is used, and the performance of the packet error rate at different SNRs is as shown in FIG. As can be seen from FIG. 11, when the information bit stream length is less than 20 bits, the coding scheme of the present application has obvious performance advantages and can provide a performance gain of 0.2 dB to 0.3 dB; when the information bit stream length is greater than 20 bits, the present application The coding scheme has the same performance as the tail-biting convolutional code encoder coding scheme illustrated in Table 4.
  • the performance of the coding scheme of the present application is superior to the scheme of repeated transmission and the tail-biting convolutional code encoder coding scheme illustrated in Table 4.
  • the method for encoding the tail-biting convolutional code provided by the embodiment of the present application may further include S503 after S502.
  • the tail biting convolutional code encoding device sends a check bit to the receiving end according to the target code rate.
  • the embodiment of the present application provides a process for implementing a tail biting convolutional code encoding apparatus to send a check bit to a receiving end, which may include:
  • Target bit rate Transmitting, to the receiving end, all bits of the first x parity bitstreams of the n parity bitstreams, so that the receiving end decodes using the code rate 1/x; Sending to the receiving end all bits of the first x-1 parity bit streams in the n parity bitstreams, and the xth parity bitstream Bits so that the receiver uses the bit rate Decoding.
  • x is greater than or equal to 2 and less than or equal to n; k is the length of the information bitstream.
  • the tail-biting convolutional code encoding method can better support Hybrid Automatic Repeat Request (HARQ), and the specific implementation is as follows: After the receiving end sends all the bits of the first x parity bit streams in the n parity bit streams, if the receiving end finds that there is error data after decoding, the receiving end sends a retransmission request, and the tail biting convolutional code is encoded. The device receives the retransmission request sent by the receiving end, and then sends all the bits of the x+1th to the x+thth check bitstream in the n check bitstreams to the transmitting end, and the receiving end uses the code rate. Decoding. Where y is a positive integer less than or equal to nx
  • the tail-biting convolutional code encoding apparatus transmits all the bits of the x+1th to the x+thth check bitstreams of the n check bitstreams to the transmitting end, and then receives the retransmission sent by the receiving end.
  • the request the tail-biting convolutional code encoding device transmits all bits of the x+y+1th to the x+y+zth check bitstreams to the receiving end, and the receiving end uses the code rate. Decoding, and so on. Where z is a positive integer less than or equal to nxy.
  • bit-checking bit streams are obtained by using the tail-biting convolutional code encoding scheme described in the embodiment of the present application, and are respectively recorded as P0-P11; if the target bit rate is 1/3, the transmitting end transmits the first time.
  • the bit stream P0, P1, P2 is checked. If the receiving end finds that there is error data after decoding, the receiving end will send a retransmission request. At this time, the transmitting end will not repeatedly transmit the check bit stream P0, P1, P2, and then transmit the check bit stream P3, P4, P5.
  • the receiving end When the receiving end receives the check bit stream, the receiving end treats the received check bit stream twice as a whole, and decodes it using a decoder with a code rate of 1/6. If a retransmission request is received again, the sender transmits the check bit stream P6, P7, P8, and the receiver uses a decoder with a code rate of 1/9, and so on.
  • the tail biting convolutional code encoding device includes hardware structures and/or software modules corresponding to the execution of the respective functions in order to implement the above functions.
  • the present application can be implemented in a combination of hardware or hardware and computer software in combination with the elements and algorithm steps of the various examples described in the embodiments disclosed herein. Whether a function is implemented in hardware or computer software to drive hardware depends on the specific application and design constraints of the solution. Professionals can implement different methods for each specific application. The described functionality, but such implementation should not be considered to be outside the scope of this application.
  • the embodiment of the present application may divide the function module of the tail biting convolutional code encoding apparatus according to the above method example.
  • each function module may be divided according to each function, or two or more functions may be integrated into one processing module.
  • the above integrated modules can be implemented in the form of hardware or in the form of software functional modules. It should be noted that the division of the module in the embodiment of the present application is schematic, and is only a logical function division, and the actual implementation may have another division manner.
  • FIG. 13 shows a possible structural diagram of the tail-biting convolutional code encoding apparatus involved in the above embodiment.
  • the tail biting convolutional code encoding device 130 may include an obtaining unit 1301 and an encoding unit 1302.
  • the obtaining unit 1301 is for supporting the tail-biting convolutional code encoding means 130 to perform the process S501 in FIG. 5 or FIG. 12;
  • the encoding unit 1302 is for supporting the tail-biting convolutional code encoding means 130 to perform the process S502 in FIG. 5 or FIG. All the related content of the steps involved in the foregoing method embodiments may be referred to the functional descriptions of the corresponding functional modules, and details are not described herein again.
  • the tail-biting convolutional code encoding device 130 may further include a transmitting unit 1303 for supporting the tail-biting convolutional code encoding device 130 to perform the process S503 in FIG.
  • Fig. 15 shows a possible structural diagram of the tail biting convolutional code encoding apparatus involved in the above embodiment.
  • the tail biting convolutional code encoding device 150 may include a processing module 1501 and a communication module 1502.
  • the processing module 1501 is for controlling the operation of the tail biting convolutional code encoding device 150.
  • the processing module 1501 is configured to support the tail-biting convolutional code encoding device 150 to perform the processes S501, 502 in FIG. 5 or FIG. 12; the processing module 1501 is configured to support the tail-biting convolutional code encoding device 150 to perform the FIG. 12 through the communication module 1502. Process S503 in.
  • the communication module 1502 is also operative to support communication of the tail biting convolutional code encoding device 150 with other network entities.
  • the tail biting convolutional code encoding device 150 may further include a storage module 1503 for storing program codes and data of the tail biting convolutional code encoding device 150.
  • the processing module 1501 may be the processor 401 in the physical structure of the tail-biting convolutional code encoding device 40 shown in FIG. 4, and may be a processor or a controller.
  • it can be a CPU, a general purpose processor, a DSP, an ASIC, an FPGA or other programmable logic device, a transistor logic device, a hardware component, or any combination thereof. It is possible to implement or carry out the various illustrative logical blocks, modules and circuits described in connection with the present disclosure.
  • the processor 1501 can also be a combination of computing functions, for example, including one or more microprocessor combinations, a combination of a DSP and a microprocessor, and the like.
  • the communication module 1502 may be the transceiver 403 in the physical structure of the tail-biting convolutional code encoding device 40 shown in FIG. 4.
  • the communication module 1502 may be a communication port or a transceiver antenna, or may be a transceiver, a transceiver circuit, or a communication interface.
  • the storage module 1503 may be the memory 402 in the physical structure of the tail biting convolutional code encoding device 40 shown in FIG.
  • the tail-biting convolutional code encoding device 150 of the embodiment of the present application may be the tail-biting convolution shown in FIG. Code coding device 40.
  • the tail biting convolutional code encoding apparatus provided in the embodiment of the present application can be used to implement the foregoing
  • the parts related to the embodiments of the present application are shown, and the specific technical details are not disclosed. Please refer to the embodiments of the present application.
  • the embodiment of the present application provides a tail biting convolutional code encoding system, which may include the tail biting convolutional code encoding device and the tail biting convolutional code decoding device illustrated in any of the above embodiments.
  • the steps of a method or algorithm described in connection with the present disclosure may be implemented in a hardware or may be implemented by a processor executing software instructions.
  • the software instructions may be composed of corresponding software modules, which may be stored in RAM, flash memory, ROM, Erasable Programmable ROM (EPROM), and electrically erasable programmable read only memory (Electrically EPROM).
  • EEPROM electrically erasable programmable read only memory
  • registers hard disk, removable hard disk, compact disk read only (CD-ROM) or any other form of storage medium known in the art.
  • An exemplary storage medium is coupled to the processor to enable the processor to read information from, and write information to, the storage medium.
  • the storage medium can also be an integral part of the processor.
  • the processor and the storage medium can be located in an ASIC. Additionally, the ASIC can be located in a core network interface device.
  • the processor and the storage medium may also exist as discrete components in the core network interface device.
  • the functions described herein can be implemented in hardware, software, firmware, or any combination thereof.
  • the functions may be stored in a computer readable medium or transmitted as one or more instructions or code on a computer readable medium.
  • Computer readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one location to another.
  • a storage medium may be any available media that can be accessed by a general purpose or special purpose computer.
  • the disclosed system, apparatus, and method may be implemented in other manners.
  • the device embodiments described above are merely illustrative.
  • the division of the unit is only a logical function division.
  • there may be another division manner for example, multiple units or components may be combined or Can be integrated into another system, or some features can be ignored or not executed.
  • the mutual coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection through some interface, device or unit, and may be electrical or otherwise.
  • the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, may be located in one place, or may be distributed to multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of the embodiment.
  • each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may be physically included separately, or two or more units may be integrated into one single unit. Yuanzhong.
  • the above integrated unit can be implemented in the form of hardware or in the form of hardware plus software functional units.
  • the above-described integrated unit implemented in the form of a software functional unit can be stored in a computer readable storage medium.
  • the software functional unit described above is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, server, or network device, etc.) to perform portions of the steps of the methods described in various embodiments of the present application.
  • the foregoing storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk, and the like, which can store program codes. .

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Abstract

Les modes de réalisation de la présente invention concernent un procédé, un dispositif et un système de codage de code convolutif circulaire, se rapportant au domaine des communications. Indépendamment de la longueur d'un train de bits d'informations entré, l'invention peut réaliser un code convolutif circulaire codé à faible débit de code avec un gain de codage élevé, ce qui améliore la fiabilité de communication. Le procédé consiste plus précisément : à acquérir un train de bits d'informations; à coder un train de bits d'informations au moyen d'un codeur de code convolutif circulaire, pour acquérir n trains de bits de contrôle; lorsque n est supérieur ou égal à 4, à générer, par un code mère, un polynôme du codeur de code convolutif circulaire comprenant au moins un élément des informations suivantes : G3 = 137, G4 = 115, G5 = 173, G6 = 127, G7 = 145, G8 = 157 ou 167, G9 = 135, G10 = 175, G11 = 113 ou 151; Gm étant la représentation octale du polynôme généré par le code mère du (m +1)ème train de bits de contrôle.
PCT/CN2017/090103 2017-06-26 2017-06-26 Procédé, dispositif et système de codage de code convolutif circulaire WO2019000196A1 (fr)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101369817A (zh) * 2008-09-27 2009-02-18 华为技术有限公司 咬尾卷积码的译码方法和装置
US20100153826A1 (en) * 2008-12-15 2010-06-17 Electronics And Telecommunications Research Institute Apparatus and method for tail biting convolutional encoding
CN102624404A (zh) * 2011-01-31 2012-08-01 中兴通讯股份有限公司 一种咬尾卷积码译码校验方法及装置
CN105429646A (zh) * 2015-06-30 2016-03-23 南京大学 一种咬尾阶梯码的编码及解码方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101369817A (zh) * 2008-09-27 2009-02-18 华为技术有限公司 咬尾卷积码的译码方法和装置
US20100153826A1 (en) * 2008-12-15 2010-06-17 Electronics And Telecommunications Research Institute Apparatus and method for tail biting convolutional encoding
CN102624404A (zh) * 2011-01-31 2012-08-01 中兴通讯股份有限公司 一种咬尾卷积码译码校验方法及装置
CN105429646A (zh) * 2015-06-30 2016-03-23 南京大学 一种咬尾阶梯码的编码及解码方法

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