WO2018233158A1 - 显示面板驱动电路、显示装置和显示面板驱动电路的驱动方法 - Google Patents

显示面板驱动电路、显示装置和显示面板驱动电路的驱动方法 Download PDF

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Publication number
WO2018233158A1
WO2018233158A1 PCT/CN2017/106799 CN2017106799W WO2018233158A1 WO 2018233158 A1 WO2018233158 A1 WO 2018233158A1 CN 2017106799 W CN2017106799 W CN 2017106799W WO 2018233158 A1 WO2018233158 A1 WO 2018233158A1
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module
display panel
output
gate
control module
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PCT/CN2017/106799
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English (en)
French (fr)
Inventor
胡水秀
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惠科股份有限公司
重庆惠科金渝光电科技有限公司
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Publication of WO2018233158A1 publication Critical patent/WO2018233158A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers

Definitions

  • the present application relates to the field of display, and in particular to a display panel driving circuit, a display device, and a driving method of the display panel driving circuit.
  • a display panel driving circuit and a driving method of a display panel driving circuit are provided.
  • a display panel driving circuit comprising:
  • the source driving module is connected to the control module, and is configured to output a data signal
  • the gate driving module is connected to the control module, and configured to output a scan voltage signal
  • the power amplification module, the scan signal output by the control module is amplified by the power amplification module and enters the gate drive module.
  • the power amplification module includes an operational amplifier, and the operational amplifier is connected to the control module;
  • the scan signal passes through the operational amplifier and outputs an amplified scan signal and enters the gate drive module.
  • the gate driving module is provided with a plurality of sequentially connected gate driving units, and the amplified scanning signals sequentially output a scanning voltage signal after passing through the plurality of gate driving units.
  • the method further includes:
  • the gate driving module is provided with an input pad and an output pad, the gate driving unit is provided with an output pin and an input pin, and the output pin is connected to the output pad, and the input pin A foot may be coupled to the input pad, the gate drive unit being secured to the circuit substrate by the input pad and the output pad.
  • control module includes a power supply circuit and a timing conversion circuit
  • the timing conversion circuit is connected to the source driving module and the gate driving module, and the timing conversion circuit controls the source control module to output a data signal, and the control gate control module outputs a scanning voltage signal.
  • the gate driving unit includes a shift register, and the amplified scan signal sequentially outputs a plurality of scan voltage signals after being processed by the shift register.
  • the shift register is an integrated shift register.
  • the shift register is a left shift register or a right shift register.
  • the operational amplifier is integrated within the source drive module.
  • the operational amplifier is a voltage follower.
  • the voltage follower includes a non-inverting input, an inverting input, and Output
  • the inverting input terminal is connected to the output terminal, the non-inverting input terminal is connected to the control module, and the output terminal is further connected to the gate driving module.
  • the source driving module includes a plurality of source driving units configured to receive and output the data signals, and the source driving units output a plurality of data signals.
  • the operational amplifier is a programmable control operational amplifier.
  • the operational amplifier is an amplifier having a coupling circuit and a feedback circuit.
  • a display panel driving circuit includes:
  • the source driving module is connected to the control module, and is configured to output a data signal
  • the gate driving module is connected to the control module, and configured to output a scan voltage signal
  • a power amplification module wherein the scan signal output by the control module is amplified by the power amplification module and enters the gate drive module.
  • the power amplification module includes an operational amplifier, the operational amplifier is connected to the control module, and the scan signal passes through the operational amplifier, and then outputs an amplified scan signal and enters the gate drive module;
  • the operational amplifier is a voltage follower integrated in the source driving module, and the voltage follower includes a non-inverting input terminal, an inverting input terminal and an output terminal;
  • the inverting input terminal is connected to the output terminal, the non-inverting input terminal is connected to the control module, and the output terminal is further connected to the gate driving module.
  • control module includes a power supply circuit, a timing conversion circuit, the timing conversion circuit is connected to the source driving module and the gate driving module, and the timing conversion circuit controls the source
  • the pole control module outputs a data signal
  • control gate control module outputs a scan signal.
  • the gate driving module is provided with a plurality of sequentially connected gate driving units, and the amplified scanning signals sequentially output a scanning voltage signal after passing through the plurality of gate driving units.
  • the gate driving unit includes a shift register, and the amplification scan After the trace signal is processed by the shift register, a plurality of scan voltage signals are sequentially output.
  • the shift register is a left shift register or a right shift register.
  • a driving method of a display panel driving circuit comprising a control module, a source driving module, a gate driving module, and a power amplification module, the method comprising the following steps:
  • control module And inputting, by the control module, a scan signal to the power amplification module to obtain an amplified scan signal
  • the data signal is input to the pixel corresponding to the opened switching element by the source driving module.
  • the display panel driving circuit includes a control module, a source driving module and a gate driving module connected to the control module.
  • the control module outputs a scan voltage signal and a data signal respectively through the gate driving module and the source driving module.
  • a power amplification module is disposed between the control module and the gate driving module.
  • the scan signal output by the control module is amplified by the power amplification module and enters the gate drive module. The amplitude of the voltage drop in the amplified scan signal is reduced, the delay time is shortened, and the deformation of the scan signal is correspondingly reduced, which improves the transmission efficiency of the signal line and improves the charging efficiency.
  • FIG. 1 is a block diagram of a display panel driving circuit according to an embodiment of the present application.
  • FIG. 2 is a structural diagram of a display device according to an embodiment of the present application.
  • FIG. 3 is a schematic diagram of inputting a scan signal of a gate driving unit when a power amplification module is not added according to an embodiment of the present disclosure
  • FIG. 4 is a scanning operation of a gate driving unit when a power amplification module is added according to an embodiment of the present application. Signal diagram.
  • FIG. 5 is a flowchart of a driving method of a display panel driving circuit according to an embodiment of the present application.
  • an embodiment of the invention provides a display panel driving circuit 20.
  • the display panel driving circuit 20 includes a control module 100 and a source driving module 200 and a gate driving module 300 connected to the control module 100.
  • the control module 100 outputs a scan voltage signal and a data signal through the gate driving module 300 and the source driving module 200, respectively.
  • a power amplification module 400 is disposed between the control module 100 and the gate driving module 300.
  • the power amplification module 400 is connected to the control module 100 and the gate driving module 300, respectively.
  • the scan signal output by the control module 100 is amplified by the power amplification module 400 and then enters the gate drive module 300.
  • the control module 100 may include a power supply circuit and a timing conversion circuit.
  • the control module 100 can receive a digital television signal and output the digital television signal to a timing conversion circuit.
  • the timing conversion circuit can format convert the digital television signal.
  • the timing conversion circuit is connected to the source driving module 200 and the gate driving module 300, and controls the source control module 200 to output a data signal, and the control gate control module 300 outputs a scanning voltage signal.
  • the gate control module 300 can control the opening and closing of the switching element by scanning the voltage signal.
  • the source driving module 200 can control the parsed scan signal to control the pixel electrode through the turned-on switching element.
  • the power amplification module 400 is configured to amplify a scan signal entering the gate control module 300. The amplitude of the voltage drop in the amplified scan signal is reduced, the delay time is shortened, and the deformation of the scan signal is correspondingly reduced, which improves the transmission efficiency of the signal line and improves the charging efficiency.
  • the power of the scan signal is increased by the power amplifying module 400 to compensate for the loss of the scan signal during the circuit transfer process due to the resistance effect and the coupling capacitance effect.
  • the amplitude of the voltage drop in the circuit after the large scan is reduced, and the delay time is shortened. Therefore, even if the pixels are successively scanned in the pixel sequence, the deformation of the scan signal is correspondingly reduced. Therefore, the power amplifying module 400 can reduce the problem of signal deformation and weakening, and at the same time speed up the response time and improve the charging efficiency.
  • the power amplifying module 400 is an element that converts the power of the power source into an amplified current that varies according to the input signal by using a current control action of the triode or a voltage control action of the FET.
  • the power amplification module 400 can include a power amplification circuit.
  • the power amplifying circuit may be a common base amplifying circuit, a common emitter amplifying circuit and a common collector amplifying circuit.
  • the present application further provides a display device 10 including the display panel driving circuit 20 and a display panel 500 connected to the display panel driving circuit 20 .
  • the scan voltage signal output from the gate driving module 300 is input to the display panel 500.
  • the display device 10 may include components such as a PCB circuit board, a display screen, and the like.
  • the amplified scan signal can reduce the RC delay effect and improve the charging efficiency. Therefore, the image displayed on the display screen in the display panel 500 can be made more consistent and clear.
  • the display panel may include a display area and a non-display area.
  • the gate driving module 300 and the source driving module 310 may be disposed in the non-display area.
  • the display area may be a liquid crystal display composed of a matrix of pixels. In one embodiment, the display area may be provided with a liquid crystal display package. A pixel matrix arranged in a matrix may be disposed in the liquid crystal display panel package. A pixel switch may be disposed in each of the pixels.
  • the gate driving module 300 may be connected to the pixel through a scan line and drive the pixel switch to be turned on or off.
  • the source driving module 310 can be connected to the pixel through a data line. After the pixel switch is turned on, the data driving module can transmit a signal voltage to the pixel through a data line.
  • the gate driving module 300 is provided with a plurality of gate driving units 310 connected in sequence.
  • the amplified scan signal is sequentially outputted through the plurality of gate driving units 310.
  • the gate driving unit 310 is configured to sequentially scan the scanning voltage signals into pixels arranged in rows. Each The gate driving unit 310 can scan a part of pixels.
  • the plurality of gate driving units 310 cooperate to scan the entire pixel area.
  • the substrate of the gate driving module 300 may have input and output pads, and the gate driving unit 310 may have an output pin and an input pin.
  • the output pin can be connected to an output pad.
  • the input pin can be coupled to the input pad.
  • the gate driving unit 310 may be fixed to the circuit substrate through the input pad and the output pad.
  • the gate driving unit 310 includes a shift register 311.
  • the amplified scan signal is processed by the shift register 311 to sequentially output a plurality of scan voltage signals.
  • the shift register is configured to sequentially scan the scan voltage signals bit by bit to sequentially scan the pixels 530 of adjacent rows.
  • the data in the shift register 311 can be shifted right or left by bit by bit under the action of the shift pulse.
  • Data can be input in parallel, parallel output, serial input, serial output, parallel input, serial output, serial input, parallel output.
  • the shift register 311 can be a left shift register or a right shift register. Further, the shift register 311 can also be used to register code, and can also be used to implement serial-to-parallel conversion of data, operation of numerical values, and processing of data.
  • the shift register 311 is an integrated shift register, such as an eight-bit one-way shift register, a four-bit one-way shift register, and a four-bit bidirectional shift register, which is an eight-bit bidirectional shift. Save the device.
  • the source drive module 200 includes a plurality of source drive units 210 configured to receive and output the data signals.
  • the source driving unit 210 outputs a plurality of data signals.
  • Each of the source driving units 210 may scan a portion of the column pixels 530 in the entire pixel matrix region.
  • a plurality of the source driving units 210 cooperate to scan the entire pixel matrix area.
  • the power amplification module 400 includes an operational amplifier 410.
  • the operational amplifier 410 is coupled to the control module 100 and a power supply circuit.
  • the scan signal passes through the operational amplifier 410, and then outputs an amplified scan signal and enters the gate drive module 300.
  • the operational amplifier 410 can be an amplifier having a coupling circuit and a feedback circuit. Understandably, The operational amplifier 410 can increase the power of the scan signal.
  • the operational amplifier 410 can have a circuit unit of very high amplification.
  • the operational amplifier 410 can be an amplifier with a special coupling circuit and feedback.
  • the output signal can be the result of mathematical operations such as input signal addition, subtraction or differentiation, integration, and the like.
  • the operational amplifier 410 may be a low-cost general-purpose operational amplifier 410, a high-impedance input impedance 410, a low-impedance operational amplifier 410 having a small input bias current, a low-power operational amplifier 410, and the like, and the operational amplifier 410 is also It can be a programmable control type operational amplifier to flexibly change the amplification factor of the signal.
  • the operational amplifier 410 may be a functional module integrated in other circuits, or may be a separately added functional module.
  • the operational amplifier 410 is disposed in the source drive module 200.
  • the operational amplifier 410 is typically integrated in the source drive module 200.
  • the operational amplifier 410 can have a repair function of a line signal.
  • the operational amplifier 410 can be connected to the circuit as needed.
  • the operational amplifier 410 integrated in the source driving module 200 may be connected to the gate driving module 300. Therefore, the purpose of improving the charging efficiency can be achieved without increasing the component cost.
  • the operational amplifier 410 is a voltage follower.
  • the output voltage of the voltage follower is substantially the same as the input voltage.
  • the voltage follower has a high input impedance and a low output impedance. Therefore, the power of the scanning signal through the operational amplifier 410 increases, and the voltage of the scanning signal also increases accordingly.
  • the response time can be accelerated, the problem of signal deformation and weakening can be alleviated, and the charging efficiency can be improved.
  • the voltage follower can be used as a buffer stage and an isolation stage.
  • the voltage follower may have a high input impedance and a low output impedance.
  • the output impedance of the voltage amplifier is generally high, and the input impedance of the latter stage is relatively small, then the signal will have a considerable loss in the output resistance of the previous stage.
  • the voltage follower can be buffered to play the role of on and off. The voltage follower increases the input impedance.
  • the voltage follower includes a non-inverting input 412, an inverting input 411, and an output 413.
  • the inverting input terminal 411 is connected to the output terminal 413.
  • the non-inverting input terminal 412 is connected to the control module 100, and the output end 413 is also connected to the gate driving module 300. Pick up.
  • the display panel 500 includes a plurality of data lines 510 and a plurality of scan lines 520.
  • the data line 510 is connected to the gate driving module 300.
  • the scan line 520 is connected to the source driving module 200.
  • the scan line 520 outputs a scan voltage signal to the display panel 500 through the source driving module 200.
  • the data line 510 outputs a data signal to the display panel 500 through the source driving module 200.
  • the plurality of data lines 510 are orthogonally arranged with the plurality of scan lines 520 to form a driving matrix.
  • the scan voltage signal passes through the scan line 520, and the data signal is input to the drive matrix via the data line 510.
  • the driving matrix can drive an LCD display device, an OLED display device, a QLED display device, a curved display device or other display devices.
  • the driving matrix may divide a plurality of pixel regions, and pixels 530 may be disposed in the pixel region.
  • the pixel 530 can include a plurality of sub-pixels. The sub-pixels may have different voltages to make the pixel 530 display clearer.
  • the scan voltage signal passes through the scan line 520, and the data signal drives the plurality of pixels 530 through the data line 510.
  • the display panel 500 can include a switching element 540.
  • the switching element 540 can be coupled to the data line 510 and the scan line 520.
  • the switching element 540 is turned on by the voltage of the scanning voltage signal.
  • the switching element 540 is turned on to allow the data signal to control the pixel electrode through the switching element 540 to drive the pixel 530.
  • the switching element may be a thin film transistor (TFT).
  • the thin film transistor may include a source, a drain, and a gate.
  • the gate When the gate is triggered by a voltage, the source and the gate may be turned on.
  • the data line 510 outputs a data signal to the display panel 500 through the source driving module 200.
  • the data signal can trigger the gate.
  • the source is connected to the data line 510.
  • the drain can be connected to a pixel capacitance in the pixel.
  • Liquid crystal molecules may be disposed between the pixel capacitors. The liquid crystal molecules are flipped under the voltage between the pixel capacitances to change the angle. The light passing through the pixel can be changed after the rotation angle of the liquid crystal molecule is changed. Thereby the display panel 500 can be rendered with different brightness.
  • the other end of the pixel capacitor may be connected to a common pole. Scanning voltage across the scan line 520 After the signal triggers the gate of the thin film transistor, the gate and the source are turned on. A data line 510 coupled to the source drive module 200 can output a data signal to the pixel capacitance.
  • the data signals have different voltages, and different voltages are applied across the pixel capacitance.
  • the liquid crystal molecules rotate at different angles under different voltages.
  • the first three gate driving units 310 may be a first gate driving unit, a second gate driving unit, and a third gate driving unit.
  • the scan signal can have two voltage levels, VGH and VGL.
  • the switching element 540 can be turned on at a high voltage VGH, and the switching element 540 can be turned off at a low voltage VGL.
  • VGH1, VGH2, and VGH3 are high voltages of scan signals input to the first gate driving unit, the second gate driving unit, and the third gate driving unit, respectively.
  • the scan signal high voltage VGH1 When the scan signal high voltage VGH1 is input to the first gate driving unit, the loss of the scan signal is minimized.
  • the scanning signal is a normal square wave signal, and the switching element 540 can be turned on at the fastest speed, and the charging efficiency is also the highest.
  • the scan signal enters the second gate driving unit after passing through the first gate driving unit the scan signal high voltage VGH2 is lower than the scan signal high voltage VGH1 due to energy loss of the line.
  • the scan signal of the second gate driving unit generates a time delay of ⁇ t1 compared to the scan signal of the first gate driving unit.
  • the scan signal passes through the third gate driving unit, the energy loss is greater, and at this time, the high voltage VGH3 of the scan signal input to the third gate driving unit is lower than the high voltage VGH2, and compared to the first gate driving unit.
  • the scan signal produces a time delay of ⁇ t2. It can be seen that the farther the scanning signal is transmitted, the lower the high voltage VGH of the scanning signal, the more severe the deformation, and the lower the charging efficiency.
  • VGH1', VGH2', and VGH3' are high voltages of scan signals input to the first gate driving unit, the second gate driving unit, and the third gate driving unit, respectively.
  • the scan signal of the second gate driving unit has a delay of ⁇ t1′ compared to the scan signal of the first gate driving unit, and the scan signal of the third gate driving unit The delay of the scan signal of the first gate driving unit is ⁇ t2'.
  • VGH2' and VGH3' are larger than VGH2 and VGH3, respectively, and ⁇ t1' and ⁇ t2' are smaller than ⁇ t1 and ⁇ t2, respectively.
  • an embodiment of the present application further provides a driving method of a display panel driving circuit, where the display panel driving circuit includes a control module 100 , a source driving module 200 , a gate driving module 300 , and a power amplifying module 400 .
  • the driving method includes the following steps:
  • the scan signal is input to the power amplification module 400 by the control module 100 to obtain an amplified scan signal;
  • the data driving signal is input to the pixel corresponding to the opened switching element 540 by the source driving module 200.
  • step S300 the amplified scan signal is input to the gate driving module 400 and then input to a plurality of sequentially connected gate driving units 310.
  • the gate driving unit 310 includes a shift register 311.
  • the amplified scan signal is processed by the shift register 311 to sequentially output a plurality of scan voltage signals.
  • the shift register causes the scan voltage signals to be sequentially shifted bit by bit to sequentially scan pixels 530 of adjacent rows.
  • the pixel switch 540 is turned on by the scanning voltage signal to cause the data signal of the source driving module 200 to be input to the pixel 530.
  • the driving method of the panel driving circuit is such that the voltage drop amplitude of the scanning signal amplified by the power amplifying module 400 is reduced in the circuit, the delay time is shortened, and the deformation of the scanning signal is correspondingly reduced, thereby improving the signal on the line. Transmission efficiency improves charging efficiency.

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Abstract

一种显示面板驱动电路（20）、显示装置（10）和显示面板驱动电路（20）的驱动方法。显示面板驱动电路（20）包括控制模块（100）、与控制模块（100）相连的源极驱动模块（200）和栅极驱动模块（300）。控制模块（100）通过栅极驱动模块（300）和源极驱动模块（200）分别输出扫描电压信号和数据信号。控制模块（100）和栅极驱动模块（300）之间设置有功率放大模块（400）。功率放大模块（400）分别与控制模块（100）和栅极驱动模块（300）连接。控制模块（100）输出的扫描信号经过功率放大模块（400）放大后进入栅极驱动模块（300）。

Description

显示面板驱动电路、显示装置和显示面板驱动电路的驱动方法
相关申请的交叉引用
本申请要求于2017年06月20日提交中国专利局、申请号为2017104718236、申请名称为“显示面板驱动电路、显示装置和显示面板驱动电路的驱动方法”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及显示领域，特别是涉及一种显示面板驱动电路、显示装置和显示面板驱动电路的驱动方法。
背景技术
传统的TFT-LCD(thin film transistor-liquid crystal display薄膜晶体管液晶显示器)在栅极驱动电路工作时，电路本身会具有电阻效应。输送信号的线路越细越长相应阻抗值越大。电路和电路之间会具有耦合电容效应。这会形成RC延迟的效应。电阻效应和耦合电容效应都会使扫描信号的能量降低，造成功率损失，这都会引起电路板的RC延迟效应。由于所述扫描信号是逐行依次扫描像素，因此越靠后的像素通过的扫描信号电压越低。因此输送到线路后端的信号越来越小，而且信号变形严重。这都导致TFT-LCD的充电效率降低，最终影响面板的充电效率。
发明内容
根据本申请公开的各种实施例，提供一种显示面板驱动电路、显示面板驱动电路的驱动方法。
种显示面板驱动电路，其中，包括：
控制模块；
源极驱动模块，所述源极驱动模块与所述控制模块相连，设置为输出数据信号；
栅极驱动模块，所述栅极驱动模块与所述控制模块相连，设置为输出扫描电压信号；
功率放大模块，所述控制模块输出的扫描信号经过所述功率放大模块放大后进入所述栅极驱动模块。
在其中一个实施例中，所述功率放大模块包括运算放大器，所述运算放大器与所述控制模块连接；
所述扫描信号经过所述运算放大器后输出放大扫描信号并进入所述栅极驱动模块。
在其中一个实施例中，所述栅极驱动模块设置有多个依次相连的栅极驱动单元，所述放大扫描信号依次经过多个栅极驱动单元后输出扫描电压信号。
在其中一个实施例中，还包括：
电路基板；
所述栅极驱动模块设置有输入焊点和输出焊点，所述栅极驱动单元设置有输出引脚和输入引脚，所述输出引脚与所述输出焊点相连接，所述输入引脚可以与所述输入焊点相连接，所述栅极驱动单元通过所述输入焊点和所述输出焊点固定于所述电路基板。
在其中一个实施例中，所述控制模块包括电源电路、时序转换电路；
所述时序转换电路与所述源极驱动模块和所述栅极驱动模块相连接，所述时序转换电路控制所述源极控制模块输出数据信号、控制栅极控制模块输出扫描电压信号。
在其中一个实施例中，所述栅极驱动单元包括位移寄存器，所述放大扫描信号经过所述位移寄存器处理后依次输出多条扫描电压信号。
在其中一个实施例中，所述位移寄存器为集成移位寄存器。
在其中一个实施例中，所述位移寄存器为左移寄存器或右移寄存器。
在其中一个实施例中，所述运算放大器集成设置于所述源极驱动模块内。
在其中一个实施例中，所述运算放大器为电压跟随器。
在其中一个实施例中，所述电压跟随器包括同相输入端、反向输入端和 输出端；
所述反向输入端与输出端相连，所述同相输入端与所述控制模块连接，所述输出端还与栅极驱动模块连接。
在其中一个实施例中，所述源极驱动模块包括多个设置为接收并输出所述数据信号的源极驱动单元，所述源极驱动单元输出多条数据信号。
在其中一个实施例中，所述运算放大器为可编程控制型运算放大器。
在其中一个实施例中，所述运算放大器为具有耦合电路及回馈电路的放大器。
一种显示面板驱动电路，包括：
控制模块；
源极驱动模块，所述源极驱动模块与所述控制模块相连，设置为输出数据信号；
栅极驱动模块，所述栅极驱动模块与所述控制模块相连，设置为输出扫描电压信号；
功率放大模块，所述控制模块输出的扫描信号经过所述功率放大模块放大后进入所述栅极驱动模块，
所述功率放大模块包括运算放大器，所述运算放大器与所述控制模块连接，所述扫描信号经过所述运算放大器后输出放大扫描信号并进入所述栅极驱动模块；
所述运算放大器为电压跟随器，集成设置于所述源极驱动模块内，所述电压跟随器包括同相输入端、反向输入端和输出端；
所述反向输入端与输出端相连，所述同相输入端与所述控制模块连接，所述输出端还与栅极驱动模块连接。
在其中一个实施例中，所述控制模块包括电源电路、时序转换电路，所述时序转换电路与所述源极驱动模块和所述栅极驱动模块相连接，所述时序转换电路控制所述源极控制模块输出数据信号、控制栅极控制模块输出扫描信号。
在其中一个实施例中，所述栅极驱动模块设置有多个依次相连的栅极驱动单元，所述放大扫描信号依次经过多个栅极驱动单元后输出扫描电压信号。
在其中一个实施例中，所述栅极驱动单元包括位移寄存器，所述放大扫 描信号经过所述位移寄存器处理后依次输出多条扫描电压信号。
在其中一个实施例中，所述位移寄存器为左移寄存器或右移寄存器。
一种显示面板驱动电路的驱动方法，所述显示面板驱动电路包括控制模块、源极驱动模块、栅极驱动模块、以及功率放大模块，所述方法包括以下步骤：
通过所述控制模块将扫描信号输入所述功率放大模块获得放大扫描信号；
将所述放大扫描信号输入所述栅极驱动模块后获得多个扫描电压信号；
将所述扫描电压信号输入所述像素开关元件以使所述像素开关元件开启；
通过所述源极驱动模块向开启的所述开关元件对应的像素输入数据信号。
本申请提供的显示面板驱动电路包括控制模块、与所述控制模块相连的源极驱动模块和栅极驱动模块。所述控制模块通过所述栅极驱动模块和所述源极驱动模块分别输出扫描电压信号和数据信号。所述控制模块和所述栅极驱动模块之间设置有功率放大模块。所述控制模块输出的扫描信号经过所述功率放大模块放大后进入所述栅极驱动模块。放大后的扫描信号在电路中的压降幅减小，延迟时间缩短，扫描信号的变形也相应减小，提高了信号在线路上的传输效率，提高了充电效率。
附图说明
为了使本申请的内容更容易被清楚的理解，下面根据本申请的具体实施例并结合附图，对本申请作进一步详细的说明，其中
图1为本申请实施例提供的显示面板驱动电路的模块图；
图2为本申请实施例提供的显示装置的结构图；
图3为本申请实施例提供的未加入功率放大模块时栅极驱动单元输入扫描信号示意图；
图4为本申请实施例提供的加入功率放大模块时栅极驱动单元输入扫描 信号示意图。
图5为本申请实施例提供的显示面板驱动电路的驱动方法的流程图。
具体实施方式
为了使本申请的发明目的、技术方案及技术效果更加清楚明白，以下结合附图对本申请的具体实施例进行描述。应当理解，此处所描述的具体实施例仅仅用以解释本申请，并不设置为限定本申请。
请参见图1，发明实施例提供一种显示面板驱动电路20。所述显示面板驱动电路20包括控制模块100以及与所述控制模块100相连的源极驱动模块200和栅极驱动模块300。所述控制模块100通过所述栅极驱动模块300和所述源极驱动模块200分别输出扫描电压信号和数据信号。所述控制模块100和所述栅极驱动模块300之间设置有功率放大模块400。所述功率放大模块400分别与所述控制模块100和所述栅极驱动模块300连接。所述控制模块100输出的扫描信号经过所述功率放大模块400放大后进入所述栅极驱动模块300。
具体地，所述控制模块100可以包括电源电路、时序转换电路。所述控制模块100可以接收数字电视信号，并将数字电视信号输出到时序转换电路。所述时序转换电路可以将数字电视信号进行格式转换。所述时序转换电路与所述源极驱动模块200和所述栅极驱动模块300相连接，并控制所述源极控制模块200输出数据信号、控制栅极控制模块300输出扫描电压信号。所述栅极控制模块300可以通过扫描电压信号控制开关元件的开闭。所述源极驱动模块200可以将解析后的扫描信号通过开启的开关元件控制像素电极。所述功率放大模块400设置为放大进入所述栅极控制模块300的扫描信号。放大后的扫描信号在电路中的压降幅减小，延迟时间缩短，扫描信号的变形也相应减小，提高了信号在线路上的传输效率，提高了充电效率。
本实施例中，通过功率放大模块400，增大了扫描信号的功率以弥补由于电阻效应和耦合电容效应所导致的扫描信号在电路传递过程中的损失。放 大后的扫描信号在电路中的压降幅减小，延迟时间缩短，因此，即使是逐行依次扫描像素过程中靠后的像素，扫描信号的变形也相应减小。因此所述功率放大模块400能够减少信号变形、变弱的问题，同时加快响应时间，提高充电效率。
在其中一个实施例中，所述功率放大模块400为利用三极管的电流控制作用或场效应管的电压控制作用将电源的功率转换为按照输入信号变化的放大的电流的元件。
在其中一个实施例中，所述功率放大模块400可以包括功率放大电路。所述功率放大电路可以为共基极放大电路、共射极放大电路和共集极放大电路。
请参见图2，本申请还提供了一种显示装置10，所述显示装置10包括所述的显示面板驱动电路20以及与所述显示面板驱动电路20连接的显示面板500。从所述栅极驱动模块300输出的所述扫描电压信号输入所述显示面板500。所述显示装置10可以包括PCB线路板、显示屏等元件。放大后的扫描信号可以减少RC延迟效应，提高充电效率。因此可以使所述显示面板500中的所述显示屏显示的影像更为连贯清晰。
所述显示面板可以包括显示区域和非显示区域。所述栅极驱动模块300和所述源极驱动模块310可以设置在所述非显示区域。所述显示区域可以为由像素矩阵组成的液晶显示屏。在其中一个实施例中，所述显示区域可以设置有液晶显示屏封装体。所述液晶显示屏封装体中可以设置有呈矩阵排列的像素矩阵。每个所述像素中可以设置有像素开关。所述栅极驱动模块300可以通过扫描线与所述像素连接并驱动所述像素开关开启或关闭。所述源极驱动模块310可以通过数据线与所述像素连接。所述像素开关开启后，所述数据驱动模块可以通过数据线向所述像素传递信号电压。
在其中一个实施例中，所述栅极驱动模块300设置有多个依次相连的栅极驱动单元310。所述放大扫描信号依次经过多个栅极驱动单元310后输出。所述栅极驱动单元310用以使扫描电压信号依次扫描成行排列的像素。每个 栅极驱动单元310可以扫描一部分像素。多个栅极驱动单元310配合可以扫描整个像素区域。
在其中一个实施例中，所述栅极驱动模块300的基板可以有输入和输出焊点，所述栅极驱动单元310可以具有输出引脚和输入引脚。所述输出引脚可以与输出焊点相连接。所述输入引脚可以与所述输入焊点相连接。所述栅极驱动单元310可以通过所述输入焊点和所述输出焊点固定于所述电路基板。
在其中一个实施例中，所述栅极驱动单元310包括位移寄存器311。所述放大扫描信号经过所述位移寄存器311处理后依次输出多条扫描电压信号。所述移位寄存器用以将扫描电压信号依次逐位移动以依次扫描相邻行的像素530。
所述移位寄存器311中的数据可以在移位脉冲作用下依次逐位右移或左移。数据既可以并行输入、并行输出，也可以串行输入、串行输出，还可以并行输入、串行输出，串行输入、并行输出。所述位移寄存器311可以为左移寄存器、右移寄存器。进一步地，所述移位寄存器311还可以用来寄存代码，还可以用来实现数据的串行-并行转换、数值的运算以及数据的处理。
在其中一个实施例中，所述移位寄存器311为集成移位寄存器，如八位单向移位寄存器，四位单向移存器，四位双向移位存器，为八位双向移位存器等。
在其中一个实施例中，所述源极驱动模块200包括多个设置为接收并输出所述数据信号的源极驱动单元210。所述源极驱动单元210输出多条数据信号。每个所述源极驱动单元210可以扫描整个像素矩阵区域中的部分列像素530。多个所述源极驱动单元210配合可以扫描整个像素矩阵区域。
在其中一个实施例中，所述功率放大模块400包括运算放大器410。所述运算放大器410与所述控制模块100和电源电路连接。所述扫描信号经过所述运算放大器410后输出放大扫描信号并进入所述栅极驱动模块300。所述运算放大器410可以是一种具有耦合电路及回馈电路的放大器。可以理解， 所述运算放大器410可以提高扫描信号的功率即可。所述运算放大器410可以具有很高放大倍数的电路单元。所述运算放大器410可以是一种带有特殊耦合电路及反馈的放大器。其输出信号可以是输入信号加、减或微分、积分等数学运算的结果。所述运算放大器410可以为低成本的通用型运算放大器410、差模输入阻抗高，输入偏置电流小的高阻型运算放大器410、低功耗型运算放大器410等，所述运算放大器410也可以为可编程控制型运算放大器以灵活改变信号的放大倍数。所述运算放大器410可以为在其它电路中集成的功能模块，也可以是单独加入的功能模块。
在其中一个实施例中，所述运算放大器410设置于所述源极驱动模块200。所述源极驱动模块200中通常集成所述运算放大器410。所述运算放大器410可以具有线路信号的修复功能。所述运算放大器410可以依据需要接入到电路中。在本实施例中，可以将集成在所述源极驱动模块200中的所述运算放大器410与所述栅极驱动模块300连接。因此不需要增加元件成本即可达到提高充电效率的目的。
在其中一个实施例中，所述运算放大器410为电压跟随器。所述电压跟随器的输出电压与输入电压基本相同。而电压跟随器的输入阻抗高、而输出阻抗低。因此经过运算放大器410的扫描信号功率增大，扫描信号的电压也相应增大。扫描信号的电压增大后能够加快响应时间，减轻信号变形、变弱的问题，提高充电效率。
所述电压跟随器可以作为做缓冲级及隔离级。所述电压跟随器可以是输入阻抗高，而输出阻抗低。，电压放大器的输出阻抗一般比较高，后级的输入阻抗比较小，那么信号就会有相当的部分损耗在前级的输出电阻中。所述电压跟随器可以进行缓冲，起到承上启下的作用。电压跟随器可以提高输入阻抗。
在其中一个实施例中，所述电压跟随器包括同相输入端412、反向输入端411和输出端413。所述反向输入端411与输出端413相连。所述同相输入端412与所述控制模块100连接，所述输出端413还与栅极驱动模块300连 接。
在其中一个实施例中，所述显示面板500包括多条数据线510、多条扫描线520。所述数据线510与所述栅极驱动模块300连接。所述扫描线520与所述源极驱动模块200连接。所述扫描线520通过所述源极驱动模块200向所述显示面板500输出扫描电压信号。所述数据线510通过所述源极驱动模块200向所述显示面板500输出数据信号。所述多条数据线510与所述多条扫描线520正交配置形成驱动矩阵。所述扫描电压信号经过所述扫描线520、所述数据信号经过所述数据线510输入至所述驱动矩阵。可以理解，所述驱动矩阵可以驱动LCD显示装置、OLED显示装置、QLED显示装置、曲面显示装置或其他显示装置。
在其中一个实施例中，所述驱动矩阵可以分割出多个像素区，所述像素区中可以设置有像素530。所述像素530可以包括多个子像素。所述子像素可以具有不同的电压以使得像素530显示更为清晰。所述扫描电压信号经过所述扫描线520、所述数据信号经过所述数据线510驱动所述多个像素530。所述显示面板500可以包括开关元件540。所述开关元件540可以与所述数据线510和所述扫描线520相连接。所述开关元件540在所述扫描电压信号电压的作用下开启。所述开关元件540开启后允许所述数据信号通过所述开关元件540控制像素电极以驱动像素530。在其中一个实施例中，所述开关元件可以为薄膜晶体管(TFT)。
所述薄膜晶体管可以包括源极、漏极和栅极。所述栅极受到电压触发时，所述源极和所述栅极可以导通。所述数据线510通过所述源极驱动模块200向所述显示面板500输出数据信号。所述数据信号可以触发所述栅极。进一步地，所述源极与所述数据线510相连接。所述漏极可以与像素中的像素电容相连接。所述像素电容之间可以设置有液晶分子。所述液晶分子在所述像素电容之间的电压作用下翻转以改变角度。所述液晶分子的旋转角度改变后可以改变经过像素的光线。从而使得显示面板500能够呈现不同的亮度。所述像素电容的另一端可以与公共极相连接。经过所述扫描线520的扫描电压 信号触发所述薄膜晶体管的栅极后，所述栅极和所述源极导通。与所述源极驱动模块200连接的数据线510可以向所述像素电容输出数据信号。所述数据信号具有不同的电压，不同的电压施加在所述像素电容的两端。所述液晶分子在不同电压的作用下旋转不同的角度。
下面对所述显示面板驱动电路20中扫描信号放大的效果进行说明：
请参见图3，图3为当所述显示面板驱动电路20中没有包括所述功率放大模块400时，所述栅极驱动模块300中多个依次排列的所述栅极驱动单元310中，前三个栅极驱动单元310的输入扫描信号的示意图。前三个栅极驱动单元310可以为第一栅极驱动单元、第二栅极驱动单元、第三栅极驱动单元。扫描信号可以具有VGH和VGL两个电压等级。高电压VGH时开关元件540可以开启，低电压VGL时开关元件540可以关闭。VGH1、VGH2、VGH3分别为输入所述第一栅极驱动单元、所述第二栅极驱动单元、所述第三栅极驱动单元的扫描信号的高电压。当扫描信号高电压VGH1输入第一栅极驱动单元时，扫描信号的损失最小。扫描信号为正常的方波信号，可以以最快的速度打开开关元件540，充电效率也最高。当扫描信号通过所述第一栅极驱动单元后进入第二栅极驱动单元时，由于线路的能量损失，使得扫描信号高电压VGH2低于扫描信号高电压VGH1。同时所述第二栅极驱动单元的扫描信号相比所述第一栅极驱动单元的扫描信号产生Δt1的时间延迟。当扫描信号通过第三栅极驱动单元时，能量损失更大，此时输入第三栅极驱动单元的扫描信号的高电压VGH3低于高电压VGH2，同时相比所述第一栅极驱动单元的扫描信号会产生Δt2的时间延迟。由此可见，扫描信号传递的距离越远，扫描信号的高电压VGH越低，变形越严重，充电效率越低。
请参见图4，在所述显示面板驱动电路20中加入所述信号放大模块400后，可以得到与图3相对应的波形图。其中VGH1′、VGH2′、VGH3′分别为输入所述第一栅极驱动单元、所述第二栅极驱动单元、所述第三栅极驱动单元的扫描信号的高电压。所述第二栅极驱动单元的扫描信号相比所述第一栅极驱动单元的扫描信号具有Δt1′的延迟，所述第三栅极驱动单元的扫描信号 相比所述第一栅极驱动单元的扫描信号具有Δt2′的延迟。同时VGH2′与VGH3′分别大于VGH2与VGH3，Δt1′与Δt2′分别小于Δt1与Δt2。由此可见，增加所述信号放大模块400后的所述显示面板驱动电路20的电压降幅减小，延迟时间缩短，因此扫描信号的变形也相应减小。因此加入所述信号放大模块400后的所述显示面板驱动电路20提高了信号的驱动能力，降低了信号变形的程度、提高了信号响应的时间，因此提高了充电效率。
请参见图5，本申请实施例还提供一种显示面板驱动电路的驱动方法，所述显示面板驱动电路包括控制模块100、源极驱动模块200、栅极驱动模块300、以及功率放大模块400。所述驱动方法包括以下步骤：
S100，通过所述控制模块100将扫描信号输入所述功率放大模块400获得放大扫描信号；
S200，将所述放大扫描信号输入所述栅极驱动模块300后获得多个扫描电压信号；
S300，将所述扫描电压信号输入所述像素开关元件540以使所述像素开关元件540开启；
S400，通过所述源极驱动模块200向开启的所述开关元件540对应的像素输入数据信号。
在步骤S300中，所述放大扫描信号输入到所述栅极驱动模块400后输入到多个依次相连的栅极驱动单元310。所述栅极驱动单元310包括位移寄存器311。所述放大扫描信号经过所述位移寄存器311处理后依次输出多条扫描电压信号。所述移位寄存器使得所述扫描电压信号依次逐位移动以依次扫描相邻行的像素530。所述像素开关540在扫描电压信号的作用下开启后使得源极驱动模块200的数据信号输入像素530。
所述的面板驱动电路的驱动方法使得经过所述功率放大模块400放大后的扫描信号在电路中的压降幅减小，延迟时间缩短，扫描信号的变形也相应减小，提高了信号在线路上的传输效率，提高了充电效率。
需要说明的是，当元件被称为“固定于”另一个元件，它可以直接在另 一个元件上或者也可以存在居中的元件。当一个元件被认为是“连接”另一个元件，它可以是直接连接到另一个元件或者可能同时存在居中元件。相反，当元件被称作“直接在”另一元件“上”时，不存在中间元件。本文所使用的术语“垂直的”、“水平的”、“左”、“右”以及类似的表述只是为了说明的目的。
以上所述实施例仅表达了本申请的几种实施方式，其描述较为具体和详细，但并不能因此而理解为对本申请专利范围的限制。应当指出的是，对于本领域的普通技术人员来说，在不脱离本申请构思的前提下，还可以做出若干变形和改进，这些都属于本申请的保护范围。因此，本申请专利的保护范围应以所附权利要求为准。

Claims (20)

  1. 一种显示面板驱动电路，包括：
    控制模块；
    源极驱动模块，所述源极驱动模块与所述控制模块相连，设置为输出数据信号；
    栅极驱动模块，所述栅极驱动模块与所述控制模块相连，设置为输出扫描电压信号；
    功率放大模块，所述控制模块输出的扫描信号经过所述功率放大模块放大后进入所述栅极驱动模块。
  2. 如权利要求1所述的显示面板驱动电路，其中，所述功率放大模块包括运算放大器，所述运算放大器与所述控制模块连接；
    所述扫描信号经过所述运算放大器后输出放大扫描信号并进入所述栅极驱动模块。
  3. 如权利要求2所述的显示面板驱动电路，其中，所述栅极驱动模块设置有多个依次相连的栅极驱动单元，所述放大扫描信号依次经过多个栅极驱动单元后输出扫描电压信号。
  4. 如权利要求3所述的显示面板驱动电路，其中，还包括：
    电路基板；
    所述栅极驱动模块设置有输入焊点和输出焊点，所述栅极驱动单元设置有输出引脚和输入引脚，所述输出引脚与所述输出焊点相连接，所述输入引脚可以与所述输入焊点相连接，所述栅极驱动单元通过所述输入焊点和所述输出焊点固定于所述电路基板。
  5. 如权利要求1所述的显示面板驱动电路，其中，所述控制模块包括电源电路、时序转换电路；
    所述时序转换电路与所述源极驱动模块和所述栅极驱动模块相连接，所述时序转换电路控制所述源极控制模块输出数据信号、控制栅极控制模块输出扫描电压信号。
  6. 如权利要求3所述的显示面板驱动电路，其中，所述栅极驱动单元包括位移寄存器，所述放大扫描信号经过所述位移寄存器处理后依次输出多条扫描电压信号。
  7. 如权利要求6所述的显示面板驱动电路，其中，所述位移寄存器为集成移位寄存器。
  8. 如权利要求6所述的显示面板驱动电路，其中，所述位移寄存器为左移寄存器或右移寄存器。
  9. 如权利要求2所述的显示面板驱动电路，其中，所述运算放大器集成设置于所述源极驱动模块内。
  10. 如权利要求2所述的显示面板驱动电路，其中，所述运算放大器为电压跟随器。
  11. 如权利要求10所述的显示面板驱动电路，其中，所述电压跟随器包括同相输入端、反向输入端和输出端；
    所述反向输入端与输出端相连，所述同相输入端与所述控制模块连接，所述输出端还与栅极驱动模块连接。
  12. 如权利要求2所述的显示面板驱动电路，其中，所述源极驱动模块包括多个设置为接收并输出所述数据信号的源极驱动单元，所述源极驱动单元输出多条数据信号。
  13. 如权利要求2所述的显示面板驱动电路，其中，所述运算放大器为可编程控制型运算放大器。
  14. 如权利要求2所述的显示面板驱动电路，其中，所述运算放大器为具有耦合电路及回馈电路的放大器。
  15. 一种显示面板驱动电路，包括：
    控制模块；
    源极驱动模块，所述源极驱动模块与所述控制模块相连，设置为输出数据信号；
    栅极驱动模块，所述栅极驱动模块与所述控制模块相连，设置为输出扫描电压信号；
    功率放大模块，所述控制模块输出的扫描信号经过所述功率放大模块放大后进入所述栅极驱动模块，
    所述功率放大模块包括运算放大器，所述运算放大器与所述控制模块连接，所述扫描信号经过所述运算放大器后输出放大扫描信号并进入所述栅极驱动模块；
    所述运算放大器为电压跟随器，集成设置于所述源极驱动模块内，所述电压跟随器包括同相输入端、反向输入端和输出端；
    所述反向输入端与输出端相连，所述同相输入端与所述控制模块连接，所述输出端还与栅极驱动模块连接。
  16. 如权利要求15所述的显示面板驱动电路，其中，所述控制模块包括电源电路、时序转换电路，所述时序转换电路与所述源极驱动模块和所述栅极驱动模块相连接，所述时序转换电路控制所述源极控制模块输出数据信号、控制栅极控制模块输出扫描信号。
  17. 如权利要求15所述的显示面板驱动电路，其中，所述栅极驱动模块设置有多个依次相连的栅极驱动单元，所述放大扫描信号依次经过多个栅极驱动单元后输出扫描电压信号。
  18. 如权利要求17所述的显示面板驱动电路，其中，所述栅极驱动单元包括位移寄存器，所述放大扫描信号经过所述位移寄存器处理后依次输出多条扫描电压信号。
  19. 如权利要求18所述的显示面板驱动电路，其中，所述位移寄存器为左移寄存器或右移寄存器。
  20. 一种显示面板驱动电路的驱动方法，所述显示面板驱动电路包括控制模块、源极驱动模块、栅极驱动模块、以及功率放大模块，所述方法包括以下步骤：
    通过所述控制模块将扫描信号输入所述功率放大模块获得放大扫描信号；
    将所述放大扫描信号输入所述栅极驱动模块后获得多个扫描电压信号；
    将所述扫描电压信号输入所述像素开关元件以使所述像素开关元件开启；
    通过所述源极驱动模块向开启的所述开关元件对应的像素输入数据信号。
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