WO2018223644A1 - 阵列基板、阵列基板的控制方法和显示设备 - Google Patents

阵列基板、阵列基板的控制方法和显示设备 Download PDF

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Publication number
WO2018223644A1
WO2018223644A1 PCT/CN2017/115592 CN2017115592W WO2018223644A1 WO 2018223644 A1 WO2018223644 A1 WO 2018223644A1 CN 2017115592 W CN2017115592 W CN 2017115592W WO 2018223644 A1 WO2018223644 A1 WO 2018223644A1
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Prior art keywords
array
array substrate
disposed
line
substrate
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PCT/CN2017/115592
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English (en)
French (fr)
Inventor
王瑞勇
杨瑞智
尤杨
邱云
王慧娟
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京东方科技集团股份有限公司
北京京东方显示技术有限公司
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Priority to US16/069,222 priority Critical patent/US10896926B2/en
Publication of WO2018223644A1 publication Critical patent/WO2018223644A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/29—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the position or the direction of light beams, i.e. deflection
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/13338—Input devices, e.g. touch panels
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133526—Lenses, e.g. microlenses or Fresnel lenses
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/14609—Pixel-elements with integrated switching, control, storage or amplification elements
    • H01L27/14612—Pixel-elements with integrated switching, control, storage or amplification elements involving a transistor
    • H01L27/14614—Pixel-elements with integrated switching, control, storage or amplification elements involving a transistor having a special gate structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/14625—Optical elements or arrangements associated with the device
    • H01L27/14627—Microlenses
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14643—Photodiode arrays; MOS imagers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/50—OLEDs integrated with light modulating elements, e.g. with electrochromic elements, photochromic elements or liquid crystal elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/60—OLEDs integrated with inorganic light-sensitive elements, e.g. with inorganic solar cells or inorganic photodiodes
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/29—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the position or the direction of light beams, i.e. deflection
    • G02F1/294—Variable focal length devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/709—Circuitry for control of the power supply
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
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    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors

Definitions

  • the present disclosure relates to the field of display technologies, and in particular, to an array substrate, a method for controlling an array substrate, and a display device.
  • Devices or components for realizing various functions such as a photosensor array for acquiring optical information, and the like, may be integrated in a conventional array substrate.
  • the aperture ratio of the array substrate may be affected due to the presence of integrated devices and wiring.
  • Embodiments of the present disclosure provide a display panel, a control method of the display panel, and a display device.
  • an array substrate is provided, the array substrate comprising:
  • each of the first thin film transistors in the first thin film transistor array is respectively connected to the signal line a signal line in the array, each of the photosensor arrays being respectively connected to one of the signal line arrays and one of the receiving line arrays;
  • lenses are respectively disposed on a side of each of the photosensor arrays remote from the substrate substrate to form a lens array.
  • the lens is selected from the group consisting of a microlens array, a Fresnel lens, or a liquid crystal lens.
  • the liquid crystal lens in the case where the lens is a liquid crystal lens, includes a liquid crystal layer and a control electrode for controlling a focal length of the liquid crystal lens.
  • the liquid crystal lens is disposed on a light exiting side of the array substrate.
  • the photosensor in the photosensor array includes a second thin film transistor and a photoelectric converter, and a gate of the second thin film transistor is connected to the signal line and a negative electrode of the photoelectric converter, One pole is connected to the anode of the photoelectric converter, and the second pole is connected to the receiving line.
  • the second thin film transistor includes an active layer.
  • the substrate substrate is provided with a substrate layer, the active layer, the first insulating layer, the second insulating layer and the third insulating layer in this order from bottom to top, and the first insulating layer and the second insulating layer are disposed a first through hole, a second through hole is disposed in the second insulating layer, and a third through hole, a first through hole, a second through hole, and a first through hole are disposed in the first insulating layer, the second insulating layer, and the third insulating layer
  • the orthographic projections of the three-via holes on the base substrate are all within the range of the orthographic projection of the active layer on the base substrate.
  • the gate is disposed in the second via, and the photoelectric converter is disposed on the gate; the first pole is disposed on the second insulating layer and passes through the first through hole The active layer is electrically connected; the second pole is disposed in the third through hole and electrically connected to the active layer; the receiving line is disposed on the third insulating layer, and passes through the third through hole The second pole is electrically connected, wherein the receiving line and the second pole are formed by the same patterning process.
  • the first pole is comprised of a transparent conductive material.
  • At least one of the first pole and the second pole is further formed with an ohmic contact layer at a position in contact with the active layer.
  • the substrate substrate is further provided with a data line array, wherein an arrangement direction of the receiving lines in the receiving line array and an arrangement direction or a direction of the data lines in the data line array are The arrangement direction of the signal lines in the signal line array is parallel.
  • the array substrate is divided into a plurality of sub-pixel regions by signal lines and data lines, wherein the number of photosensors in the photosensor array is less than or equal to the number of the sub-pixel regions.
  • the photosensor array includes a predetermined number of photosensors.
  • one photosensor is disposed in each of the n sub-pixel regions along at least one of the arrangement direction of the data lines and the arrangement direction of the signal lines, and n is an integer greater than or equal to 2.
  • the photosensor array is located in an open area of the array substrate.
  • a method for controlling an array substrate for the array substrate provided by the first aspect, the method comprising: controlling a light sensor to be turned on by a signal line; and receiving an electrical signal generated by the light sensor through the receiving line Obtaining optical information based on the electrical signal.
  • the step of controlling the photosensor to be turned on by the signal line includes: passing the letter While the voltage in the line controls the display of the array substrate, the photosensor is controlled to be turned on by the voltage.
  • the step of acquiring optical information according to the electrical signal includes:
  • V p is the voltage of the active signal and V g is the voltage of the signal line;
  • the optical information is obtained according to the standard value of the effective electrical signal.
  • a method of fabricating an array substrate for fabricating the array substrate provided in the first aspect is provided.
  • a display device comprising the array substrate provided by the first aspect.
  • FIG. 1 is a schematic structural view of an array substrate according to an embodiment of the present disclosure
  • 2-1 is a schematic structural diagram of another array substrate according to an embodiment of the present disclosure.
  • FIG. 2-2 is a schematic structural diagram of another array substrate according to an embodiment of the present disclosure.
  • 2-3 is a schematic structural diagram of another array substrate according to an embodiment of the present disclosure.
  • FIGS. 2-4 are schematic structural diagrams of another array substrate according to an embodiment of the present disclosure.
  • FIGS. 2-5 are schematic structural diagrams of another array substrate according to an embodiment of the present disclosure.
  • FIGS. 2-6 are schematic structural diagrams of another array substrate according to an embodiment of the present disclosure.
  • FIG. 2-7 is a schematic circuit diagram of the array substrate shown in FIG. 2-6;
  • 3-1 is a flowchart of a method for controlling an array substrate according to an embodiment of the present disclosure
  • FIG. 3-1 is a flowchart of acquiring optical information according to an electrical signal in the embodiment shown in FIG. 3-1;
  • 3-3 is a schematic diagram showing level signals of signal lines, data lines, and reception lines in the embodiment shown in FIG. 3-1.
  • the array substrate can include:
  • a first thin film transistor array 12 including a plurality of first thin film transistors 121, a signal line array 13 including a plurality of signal lines 131, and a photo sensor including a plurality of photosensors 141 for performing display control functions are disposed on the base substrate 11.
  • the array 14 and the receiving line array 15 including a plurality of receiving lines 151 are each connected to one of the signal lines 131 in the first thin film transistor array 12.
  • the signal lines in the signal line array are arranged longitudinally (the longitudinal arrangement means that the arrangement direction of the plurality of signal lines on the base substrate 11 is a longitudinal direction, and the arrangement direction may refer to a plurality of lines in the signal line array)
  • each of the first thin film transistors 121 may be connected to the same signal line 131, and each of the first thin film transistors 121 may be connected to a different signal line 131.
  • each row of the first thin film transistors 121 may be connected to different signal lines 131, and each column of the first thin film transistors 121 is connected to the same signal line 131.
  • the signal line array 13 may be a grid line array including a plurality of gate lines.
  • Each of the photosensor arrays 14 is connected to one of the signal line arrays 13, and each of the photosensors is connected to a signal line for controlling each of the photosensors.
  • Each of the photosensor arrays 14 is connected to one of the receiving line arrays 15 for receiving the optical information acquired by the photosensor array 14.
  • the array substrate provided by the embodiment of the present disclosure reduces the aperture ratio of the array substrate by reducing the line to be disposed by sharing the signal line between the photo sensor and the thin film transistor for display control.
  • the invention solves the related art that more circuits and devices are disposed in the array substrate, which may affect the opening of the array substrate. The question of the rate. It is achieved that the effect of the photosensor can be provided on the array substrate in the case where a small number of lines are provided.
  • FIG. 2-1 is a schematic structural diagram of another array substrate provided by an embodiment of the present disclosure, which adds more preferable components to the array substrate shown in FIG. Thereby, the array substrate provided by the embodiment of the present disclosure has better performance.
  • the array substrate 10 is further provided with a data line array 16 including a plurality of data lines 161 divided by the plurality of signal lines 131 and the plurality of data lines 161 into a plurality of sub-pixel regions, the sub-pixel regions. It can be rectangular, square or other shape.
  • the number of photosensors in photosensor array 14 is less than or equal to the number of sub-pixel regions.
  • the photosensor array 14 includes a predetermined number of photosensors. That is, the number of light sensors can be directly set in advance.
  • the photosensor array 14 can be formed by vapor deposition, sputtering or spin coating in combination with a photolithography process or a laser process.
  • one photo sensor is disposed in each of the n sub-pixel regions, where n is greater than or An integer equal to 2. That is, the photosensors can be evenly distributed in various regions of the array substrate, so that the number of photosensors can be reduced in the case where the photosensors are present in each region.
  • the first thin film transistor 121 may be a double gate type polysilicon thin film transistor.
  • the polysilicon thin film transistor has a faster switching speed than a conventional thin film transistor.
  • the arrangement direction A of the receiving lines 151 in the receiving line array 15 and the row of the data lines 161 in the data line array 16 are received.
  • the cloth direction B is parallel, which can reduce the length of the receiving line in the receiving line array 15, thereby reducing the area occupied by the receiving line on the array substrate and increasing the aperture ratio of the array substrate.
  • the light sensors of the same column can be connected to the same receiving line, and the light sensors of the same row can be connected to the same signal line, so that the photosensor array can be controlled in a similar manner to the control of the first thin film transistor array. That is, the electrical signal emitted by each photosensor can be separately obtained by the signal line being powered line by line.
  • each of the photosensors in the photosensor array may occupy an area of 1 square micron to 10,000 square micrometers in the array substrate.
  • the photosensor array 14 is located in the open area of the array substrate, and there is no light blocking structure above the photosensors in the photosensor array 14, such as a black matrix (BM) or the like in the color filter substrate.
  • BM black matrix
  • FIG. 2-1 For the meanings of other marks in FIG. 2-1, reference may be made to FIG. 1 , and details are not described herein again.
  • the sub-pixel regions are all rectangular, and the short sides of the sub-pixel regions are parallel to the signal lines 131.
  • the array substrate 10 provided by the embodiment of the present disclosure may be as shown in FIG. 2-2, wherein the receiving line array 15 is The arrangement direction A of the receiving line 151 is parallel to the arrangement direction C of the signal line 131 in the signal line array 13, so that the length of the receiving line in the receiving line array 15 can also be reduced, thereby reducing the area occupied by the receiving line on the array substrate. Increase the aperture ratio of the array substrate.
  • FIG. 2-2 For the meanings of other tags in Figure 2-2, refer to Figure 2-1, and details are not described herein.
  • the array substrate is further provided with a lens array 17 including a plurality of lenses 171, the lens array 17 is located on a side of the photosensor array 14 away from the substrate 11, and the lens and the photosensor in the lens array 17 All or a portion of the light sensors in array 14 are in one-to-one correspondence.
  • the lens in the lens array 17 may be formed by an imprinting, etching or grinding process, and the material of the lens may include an organic resin or a silicon-based organic resin or glass.
  • the lens array 17 is capable of increasing the light utilization of the photosensor array 14.
  • each lens in lens array 17 is a Fresnel lens that is capable of reducing the thickness of lens array 17.
  • Fresnel lens also known as threaded lens, is a sheet made of polyolefin material or glass. The surface of the lens is smooth on one side and the concentric circles on the other side are recorded. The circle is designed according to the dryness of the light involved in the disturbance and the relative sensitivity and acceptance angle requirements.
  • each lens in the lens array 17 is a microlens array in a microlens array. Consisting of multiple arrays of lenses, the microlens array can increase light utilization and reduce lens thickness.
  • light sensor array 14 can perform different functions such as fingerprint recognition, copy scanning, image recognition, face recognition, light detection, and distance detection.
  • the photosensor array 14 can be used for functions such as fingerprint recognition and image recognition, and the focal length of the lens in the lens array 17 is 20 to 50 cm.
  • the lens array 17 can be used to implement functions such as face recognition.
  • the focal length of the lens in the lens array 17 is greater than 1 meter, the lens array 17 can be used to implement functions such as light detection and distance detection.
  • the lens in the lens array 17 can also be configured as a filter structure through which only a predetermined wavelength of light can pass to further increase the accuracy of the photosensor array 14.
  • the array substrate involved in the embodiments of the present disclosure may be a liquid crystal array substrate, an organic light emitting diode (OLED) array substrate, a quantum dot light emitting diode (QLED) array substrate, or an array substrate composed of other micro display structures.
  • OLED organic light emitting diode
  • QLED quantum dot light emitting diode
  • FIG. 2-5 it is a schematic structural diagram of another array substrate provided by the embodiment of the present disclosure, wherein the lens array 17 is a liquid crystal lens array including a plurality of liquid crystal lenses, and any one of the lens arrays 17
  • the 171 includes a liquid crystal layer 171a and a control electrode 171b.
  • the control electrode 171b may be disposed in the liquid crystal layer 171a, or may be disposed on either side or either side of the liquid crystal layer 171a, and the control electrode 171b is used to control the focal length of any one of the liquid crystal lenses.
  • the control electrode 171b can generate an electric field in the liquid crystal layer, and the liquid crystal in the liquid crystal layer 171a is deflected by the electric field, thereby achieving the effect of changing the focal length of the liquid crystal lens.
  • the control electrode 171b may be made of a transparent material such as indium tin oxide or the like.
  • the lens array 17 is a liquid crystal lens array
  • different functions can be realized by changing the focal length.
  • the functions that can be realized can be referred to the array substrate shown in FIGS. 2-4.
  • the lens array 17 is disposed on the light exiting side L of the array substrate 10. Providing the lens array 17 on the light exiting side L of the array substrate 10 can prevent the electrodes in the lens array 17 from affecting devices (such as liquid crystal layers) in the array substrate 10 when the lens array 17 is disposed in the array substrate 10.
  • the lens array 17 may further include an entire liquid crystal layer covering the light emitting side of the array substrate, and each liquid crystal lens may be located in the liquid crystal layer.
  • any one of the photosensor arrays 14 includes a second thin film transistor 1411 and a photoelectric converter 1412.
  • the second thin film transistor 1411 includes an active layer 207, a first pole 1411b, a second pole 1411c, and a gate 1411d.
  • the gate electrode 1411d is connected to a predetermined signal line in the signal line array (such as the signal line array 13 in FIG. 2-1), the first electrode 1411b is connected to the positive electrode + of the photoelectric converter 1412, and the second electrode 1411c and the receiving line array are connected.
  • the predetermined receiving line connection (in the receiving line array 15 in FIG. 2-1) is connected, and the negative electrode of the photoelectric converter 1412 is connected to the gate 1411d.
  • the preset signal line and the preset receiving line may be signal lines and receiving lines in a sub-pixel area where the light sensor 141 is located.
  • the material of the photoelectric converter 1412 may include a quantum dot material, a doped silicon-based material, gallium arsenide (GaAs), gallium aluminum arsenide (GaAlAs), indium phosphide (InP), cadmium sulfide (CdS), and cadmium telluride ( CdTe) And other semiconductor materials.
  • the photoelectric converter 1412 may have or have a photovoltaic effect for light having a wavelength of from 300 nm to 2000 nm.
  • the active layer 207 is disposed on the base substrate 11.
  • a substrate layer 201 is disposed between the active layer 207 and the base substrate 11.
  • the substrate layer 201 is used to protect the active layer 207.
  • a first insulating layer 202 is disposed on the active layer 207, a second insulating layer 203 is disposed on the first insulating layer 202, and a third insulating layer 204 is disposed on the second insulating layer 203.
  • a first through hole is disposed in the first insulating layer 202 and the second insulating layer 203, and a second through hole is disposed in the second insulating layer 203, in the first insulating layer 202, the second insulating layer 203, and the third insulating layer 204.
  • the orthographic projections of the first through hole, the second through hole and the third through hole on the base substrate 11 at least partially overlap with the orthographic projection of the active layer 207 on the base substrate 11 .
  • an orthographic projection of the first via, the second via, and the third via on the base substrate 11 is located in an orthographic projection of the active layer 207 on the base substrate 11.
  • the gate electrode 1411d is disposed in the second via hole, and the photoelectric converter 1412 is disposed on the gate electrode 1411d, and the cathode of the photoelectric converter 1412 is in contact with the gate electrode 1411d.
  • the first pole 1411b is disposed on the second insulating layer 203, and the first pole 1411b is in contact with the positive electrode of the photoelectric converter 1412, and is electrically connected to the active layer 207 through the first through hole.
  • the second pole 1411c is disposed in the third through hole, and the second pole 1411c is electrically connected to the active layer 207.
  • the preset receiving line 151 is disposed on the third insulating layer 204, and the preset receiving line 151 is electrically connected to the second pole 1411c through the third through hole.
  • the second pole 1411c and the predetermined receiving line 151 are made of the same material and formed by the same patterning process to simplify the process.
  • the first pole 1411b is formed of a transparent conductive material (such as indium tin oxide).
  • the first pole 1411b can cover the positive electrode + of the photoelectric converter 1412. In this way, the contact area of the first pole 1411b and the positive electrode + can be increased without blocking the light entering the photoelectric converter 1412, thereby increasing the photoelectric conversion efficiency of the photoelectric converter 1412; and/or the negative electrode-covering of the photoelectric converter 1412 On the gate electrode 1411d, this can increase the contact area of the gate electrode 1411d and the negative electrode, thereby increasing the photoelectric conversion efficiency of the photoelectric converter 1412.
  • an ohmic contact layer 205 is also disposed at a location where the first pole 1411b and/or the second pole 1411c are in contact with the active layer 207.
  • the ohmic contact layer 205 may be disposed in the same layer as the active layer 207 and in contact with the active layer 207, and the first pole 1411b and the second pole 1411c may be in contact with the top of the ohmic contact layer 205, respectively.
  • the ohmic contact layer 205 can make the first pole 1411b and the second pole 1411c form an ohmic contact with the active layer, reducing the contact resistance between the active layer 207 and the first pole 1411b and the second pole 1411c.
  • the material of the ohmic contact layer 205 can be referred to the related art.
  • FIG. 2-7 it is a circuit structure diagram of the array substrate shown in FIG. 2-6, wherein 40 is a display structure, and the photoelectric converter 1412 can be equivalent to a diode in the circuit, and the positive electrode + first The pole 1411b is connected, its negative pole is connected to the gate 1411d, and the second pole 1411c is connected to the receiving line 151. 131 is a signal line.
  • FIG. 2-8 which is a response curve of the photoelectric converter to current and voltage in the embodiment of the present disclosure, it can be seen from the curve that the open circuit voltage and the closed circuit current of the photoelectric converter are zero.
  • the array substrate provided by the embodiment of the present disclosure reduces the aperture ratio of the array substrate by reducing the line to be disposed by sharing the signal line between the photo sensor and the thin film transistor for display control.
  • the problem of setting a large number of lines and devices in the array substrate in the related art may affect the aperture ratio of the array substrate. It is achieved that the effect of the photosensor can be provided on the array substrate in the case where a small number of lines are provided.
  • 3-1 is a flowchart of a method for controlling an array substrate according to an embodiment of the present disclosure, which is used in the array substrate provided by each embodiment, and the method includes:
  • Step 301 Control the photosensor in the photosensor array to be turned on by the signal line in the signal line array.
  • the light sensor in the photosensor array can be turned on by the voltage in the signal line when the array substrate is being displayed.
  • the execution body of the embodiment of the present disclosure may be a control circuit external to the array substrate.
  • Embodiments of the present disclosure may also turn on the photosensor by applying a voltage to the signal line when the array substrate is not being displayed.
  • the method provided by the embodiments of the present disclosure may also control the photosensor when the array substrate is not displayed.
  • Step 302 Receive an electrical signal generated by a photosensor in the photosensor array by a receiving line in the receiving line array.
  • the control circuit can sequentially acquire the lines.
  • the electrical signal produced by the light sensor is sequentially transmitted to the respective signal lines.
  • Step 303 Acquire optical information according to the electrical signal.
  • any one of the photosensor arrays includes a second thin film transistor including a active layer, a first pole, a second pole, and a receiving line, and a gate and a signal line array
  • the signal line is connected, the first pole is connected to the positive pole of the photoelectric converter, the second pole is connected with the preset receiving line in the receiving line array, and the negative pole of the photoelectric converter is connected with the preset signal line, as shown in Figure 3-2.
  • This step can include:
  • this step can include the following three sub-steps:
  • Sub-step 3031 screening at least one effective electrical signal from the electrical signals acquired through each of the receiving lines in the receiving line array, the voltage of the effective electrical signal being greater than the voltage of the signal line.
  • the external control circuit may include a detection circuit and an information acquisition circuit, and the detection circuit may be configured to determine whether the voltage of the electrical signal received by each receiving line is greater than the voltage of the signal line, and the voltage is greater than the sub-pixel area where the receiving line is located.
  • the electrical signal of the voltage of the medium signal line is determined to be an effective electrical signal. This is because the voltage of the electrical signal received by the receiving line is equal to the sum of the voltage of the signal line and the voltage generated by the photoelectric converter converting the light (the voltage and the voltage direction of the signal line are the same). If the sum is smaller than the voltage of the signal line, It indicates that the circuit may be faulty, and the electrical signal received by the receiving line is invalid. At this time, the receiving line can be re-detected to confirm the specific problem.
  • the detection circuit can send an effective electrical signal to the information acquisition circuit.
  • Sub-step 3032 Obtain a standard value of each valid electrical signal in the at least one effective electrical signal according to a preset formula
  • the information acquisition circuit may acquire a standard value of each valid electrical signal in the at least one effective electrical signal according to a preset formula.
  • the preset formula can be: V p is the voltage of the effective signal, and V g is the voltage of the signal line.
  • the preset formula is only illustrative, and the standard value of each effective electrical signal can also be obtained by other formulas, which is not limited in the embodiment of the present disclosure.
  • the information acquisition circuit can store the standard value of each valid electrical signal.
  • Sub-step 3033 obtaining optical information according to a standard value of each valid electrical signal.
  • the optical information can be obtained according to the standard values.
  • the optical information can be obtained according to the position information of the photosensor corresponding to the standard value, the pixel color corresponding to the photosensor corresponding to the standard value, and the size of the standard value, and kind of function.
  • the level of the signal line, the data line, and the receiving line in the n-th row and the n+1-th row sub-pixel region for any column of sub-pixel regions when the array substrate is displayed can be as shown in Figure 3-3. It can be seen that when there is an electrical signal on the signal line, the photoelectric converter is turned on, the receiving line can receive the electrical signal, and the adjacent two rows of photoelectric converters can follow the signal line. The power-on sequence sequentially acquires electrical signals.
  • the data lines in Figure 3-3 may have no level signal when the array substrate is not being displayed.
  • the method for controlling the array substrate opens the photoelectric converter through the signal line, reduces the number of lines to be disposed in the array substrate, and increases the aperture ratio of the array substrate.
  • the problem of setting a large number of lines and devices in the array substrate in the related art may affect the aperture ratio of the array substrate. It is achieved that the effect of the photosensor can be provided on the array substrate in the case where a small number of lines are provided.
  • the embodiment of the present disclosure further provides a method for manufacturing an array substrate, which is used to manufacture any one of the array substrates shown in FIG. 1 , FIG. 2-1 to FIG.
  • the embodiment of the present disclosure further provides a display device including any one of the array substrates shown in FIG. 1 , FIG. 2-1 to FIG. 2-6 .
  • a person skilled in the art may understand that all or part of the steps of implementing the above embodiments may be completed by hardware, or may be instructed by a program to execute related hardware, and the program may be stored in a computer readable storage medium.
  • the storage medium mentioned may be a read only memory, a magnetic disk or an optical disk or the like.

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Abstract

一种阵列基板、阵列基板的控制方法和显示设备。阵列基板包括：衬底基板(11)；布置在衬底基板(11)上的第一薄膜晶体管阵列(12)、信号线阵列(13)、光传感器阵列(14)和接收线阵列(15)。第一薄膜晶体管阵列(12)中每个第一薄膜晶体管(121)均分别连接信号线阵列(13)中的一条信号线(131)。光传感器阵列(14)中的每个光传感器(141)分别连接信号线阵列(13)中的一条信号线(131)和接收线阵列(15)中的一条接收线(151)。

Description

阵列基板、阵列基板的控制方法和显示设备
相关申请的交叉引用
本申请要求于2017年6月9日提交的、申请号为201710434368.2的中国专利申请的优先权，其全部内容通过引用并入本申请中。
技术领域
本公开涉及显示技术领域，特别涉及一种阵列基板、阵列基板的控制方法和显示设备。
背景技术
传统的阵列基板中可能集成有用于实现各种功能的器件或元件，比如用于获取光信息的光传感器阵列等。然而，在这样的阵列基板中由于所集成的器件及线路的存在，可能影响阵列基板的开口率。
发明内容
本公开实施例提供了一种显示面板、显示面板的控制方法和显示设备。根据本公开的第一方面，提供了一种阵列基板，所述阵列基板包括：
衬底基板；
布置在所述衬底基板上的第一薄膜晶体管阵列、信号线阵列、光传感器阵列和接收线阵列，其中，所述第一薄膜晶体管阵列中每个第一薄膜晶体管均分别连接所述信号线阵列中的一条信号线，所述光传感器阵列中的每个光传感器分别连接所述信号线阵列中的一条信号线和所述接收线阵列中的一条接收线；
在一个实施例中，所述光传感器阵列中的每个光传感器的远离所述衬底基板的一侧上分别布置有透镜，以形成透镜阵列。
在一个实施例中，所述透镜选自以下各项：微透镜阵列、菲涅尔透镜或液晶透镜。
在一个实施例中，在所述透镜是液晶透镜的情况下，所述液晶透镜包括液晶层和控制电极，所述控制电极用于控制液晶透镜的焦距。
在一个实施例中，所述液晶透镜设置在所述阵列基板的出光侧。
在一个实施例中，所述光传感器阵列中的光传感器包括第二薄膜晶体管和光电转换器，所述第二薄膜晶体管的栅极与所述信号线和所述光电转换器的负极连接，第一极与所述光电转换器的正极连接，第二极与接收线连接。
在一个实施例中，所述第二薄膜晶体管包括有源层。所述衬底基板上自下而上依次设置有衬底层、所述有源层、第一绝缘层、第二绝缘层和第三绝缘层，并且第一绝缘层和第二绝缘层中设置有第一通孔，第二绝缘层中设置有第二通孔，第一绝缘层、第二绝缘层和第三绝缘层中设置有第三通孔，第一通孔、第二通孔和第三通孔在所述衬底基板上的正投影均位于所述有源层在所述衬底基板上的正投影的范围内。其中，所述栅极设置在第二通孔内，并且所述光电转换器设置在所述栅极上；所述第一极设置在所述第二绝缘层上，并通过第一通孔与所述有源层电连接；所述第二极设置在第三通孔内，并与所述有源层电连接；接收线设置在第三绝缘层上，并通过第三通孔与所述第二极电连接，其中，接收线和所述第二极通过同一构图工艺形成。
在一个实施例中，所述第一极由透明导电材料构成。
在一个实施例中，所述第一极和所述第二极中的至少一个与所述有源层接触的位置处还形成有欧姆接触层。
在一个实施例中，所述衬底基板上还设置有数据线阵列，其中，所述接收线阵列中的接收线的排布方向与所述数据线阵列中的数据线的排布方向或所述信号线阵列中的信号线的排布方向平行。
在一个实施例中，所述阵列基板被信号线和数据线划分为多个子像素区域，其中，所述光传感器阵列中的光传感器的数量小于或等于所述子像素区域的数量。
在一个实施例中，所述光传感器阵列中包括预设个数的光传感器。
在一个实施例中，沿数据线的排布方向和信号线的排布方向中的至少一个方向，每n个子像素区域中设置有一个光传感器，n为大于或等于2的整数。
在一个实施例中，所述光传感器阵列位于所述阵列基板的开口区域。
根据本公开的第二方面，提供一种阵列基板的控制方法，用于第一方面提供的阵列基板，所述方法包括：通过信号线控制光传感器开启；通过接收线接收光传感器产生的电信号；根据所述电信号获取光信息。
在一个实施例中，所述通过信号线控制光传感器开启的步骤包括：在通过信 号线中的电压控制所述阵列基板进行显示的同时，通过所述电压控制所述光传感器开启。
在一个实施例中，所述根据所述电信号获取光信息的步骤包括：
从通过接收线获取的电信号中筛选出至少一个有效电信号，所述有效电信号的电压大于所述信号线的电压；
根据下式获取各个有效电信号的标准值
Figure PCTCN2017115592-appb-000001
Figure PCTCN2017115592-appb-000002
其中，Vp为有效信号的电压，Vg为信号线的电压；以及
根据有效电信号的标准值获取光信息。
根据本公开的第三方面，提供一种阵列基板的制造方法，所述方法用于制造第一方面提供的阵列基板。
根据本公开的第四方面，提供一种显示设备，所述显示设备包括第一方面提供的阵列基板。
附图说明
为了更清楚地说明本公开实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本公开的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1是本公开实施例示出的一种阵列基板的结构示意图；
图2-1是本公开实施例提供的另一种阵列基板的结构示意图；
图2-2是本公开实施例提供的另一种阵列基板的结构示意图；
图2-3是本公开实施例提供的另一种阵列基板的结构示意图；
图2-4是本公开实施例提供的另一种阵列基板的结构示意图；
图2-5是本公开实施例提供的另一种阵列基板的结构示意图；
图2-6是本公开实施例提供的另一种阵列基板的结构示意图；
图2-7是图2-6所示阵列基板的电路结构示意图；
图2-8是图2-1所示实施例中光电转换器对于电流和电压的响应曲线；
图3-1是本公开实施例提供的一种阵列基板的控制方法的流程图；
图3-2是图3-1所示实施例中根据电信号获取光信息的流程图；
图3-3是图3-1所示实施例中信号线、数据线和接收线上的电平信号示意图。
通过上述附图，已示出本公开明确的实施例，后文中将有更详细的描述。这些附图和文字描述并不是为了通过任何方式限制本公开构思的范围，而是通过参考特定实施例为本领域技术人员说明本公开的概念。
具体实施方式
为使本公开的目的、技术方案和优点更加清楚，下面将结合附图对本公开实施方式作进一步地详细描述。
图1是本公开实施例示出的一种阵列基板的结构示意图。该阵列基板可以包括：
衬底基板11。
衬底基板11上设置有用于实现显示控制功能的包括多个第一薄膜晶体管121的第一薄膜晶体管阵列12、包括多条信号线131的信号线阵列13、包括多个光传感器141的光传感器阵列14和包括多条接收线151的接收线阵列15，第一薄膜晶体管阵列12中的每个第一薄膜晶体管121均与信号线阵列13中的一条信号线131连接。在信号线阵列中的信号线纵向排布(该纵向排布是指多条信号线在衬底基板11上的排布方向为纵向，而该排布方向可以是指信号线阵列中的多条信号线的排列方向，该方向可以与信号线的长度方向垂直)时，每行第一薄膜晶体管121可以与相同信号线131连接，而每列第一薄膜晶体管121与不同信号线131连接。而在信号线阵列中的信号线横向排布时，每行第一薄膜晶体管121可以与不同信号线131连接，而每列第一薄膜晶体管121与相同信号线131连接。在一个实施例中，所述信号线阵列13可以是包括多条栅线的栅线阵列。
光传感器阵列14中的每个光传感器141分别连接信号线阵列13中的一条信号线，每个光传感器连接的信号线用于控制每个光传感器。
光传感器阵列14中的每个光传感器141分别连接接收线阵列15中的一条接收线，接收线阵列15用于接收光传感器阵列14获取的光信息。
综上所述，本公开实施例提供的阵列基板，通过使光传感器和用于显示控制的薄膜晶体管共用信号线来减少需要设置的线路，增大了阵列基板的开口率。解决了相关技术中在阵列基板中设置了较多的线路和器件，可能影响阵列基板的开 口率的问题。达到了在设置较少的线路的情况下，就能够在阵列基板上设置光传感器的效果。
进一步的，请参考图2-1，其示出了本公开实施例提供的另一种阵列基板的结构示意图，该阵列基板在图1所示的阵列基板的基础上增加了更优选的部件，从而使得本公开实施例提供的阵列基板具有更好的性能。
在一个实施例中，阵列基板10中还设置有包括多条数据线161的数据线阵列16，阵列基板被多条信号线131和多条数据线161划分成多个子像素区域，该子像素区域可以为长方形、正方形或其它形状。
光传感器阵列14中光传感器的数量小于或等于子像素区域的数量。
在一个实施例中，光传感器阵列14中包括预设个数的光传感器。即可以直接预先设定光传感器的数量。
光传感器阵列14可以通过蒸镀、溅射或旋涂的方式再搭配使用光刻工艺或激光工艺来形成。
在一个实施例中，多个子像素区域中，沿数据线161的排布方向和信号线131的排布方向中的至少一个方向，每n个子像素区域中设置有一个光传感器，n为大于或等于2的整数。即可以将光传感器平均的分布在阵列基板的各个区域中，这样能够保证各个区域均存在光传感器的情况下，减少光传感器的数量。
在一个实施例中，第一薄膜晶体管阵列12中，第一薄膜晶体管121可以为双栅型的多晶硅薄膜晶体管。多晶硅薄膜晶体管相较于常规的薄膜晶体管，开关速度较快。
在阵列基板中子像素区域均为长方形，且子像素区域的长边与信号线131平行时，则接收线阵列15中接收线151的排布方向A与数据线阵列16中数据线161的排布方向B平行，这样可以减少接收线阵列15中接收线的长度，进而减少接收线在阵列基板上所占用的面积，增大阵列基板的开口率。同一列的光传感器可以连接于同一条接收线，而同一行的光传感器可以连接于同一条信号线，这样可以以类似控制第一薄膜晶体管阵列的方法来控制光传感器阵列。即可以通过信号线逐行加电的方式来分别获取每个光传感器发出的电信号。
在图2-1中，光传感器阵列中每个光传感器在阵列基板所占的面积可以为1平方微米～10000平方微米。
在一个实施例中，光传感器阵列14位于阵列基板的开口区域，光传感器阵列14中的光传感器的上方不存在阻挡光线的结构，如彩膜基板中的黑矩阵(BM)等。
图2-1中其他标记的含义可以参考图1，在此不再赘述。
在阵列基板中子像素区域均为长方形，且子像素区域的短边与信号线131平行，则本公开实施例提供的阵列基板10可以如图2-2所示，其中，接收线阵列15中接收线151的排布方向A与信号线阵列13中信号线131的排布方向C平行，这样同样可以减少接收线阵列15中接收线的长度，进而减少接收线在阵列基板上所占用的面积，增大阵列基板的开口率。图2-2中其他标记的含义可以参考图2-1，在此不再赘述。
如图2-3所示，阵列基板还设置有包括多个透镜171的透镜阵列17，透镜阵列17位于光传感器阵列14远离衬底基板11的一侧，且透镜阵列17中的透镜与光传感器阵列14中的全部或部分光传感器一一对应。透镜阵列17中的透镜可以通过压印、刻蚀或者研磨工艺形成，而透镜的材质可以包括有机树脂或硅系有机树脂或玻璃。透镜阵列17能够提高光传感器阵列14的光线利用率。
在一个实施例中，透镜阵列17中的每个透镜为菲涅尔透镜，菲涅尔透镜能够降低透镜阵列17的厚度。菲涅尔透镜(Fresnel lens)，又名螺纹透镜，多是由聚烯烃材料或玻璃注压而成的薄片，镜片表面一面为光面，另一面刻录了由小到大的同心圆，该同心圆是根据光的干涉及扰射以及相对灵敏度和接收角度要求来设计的。
在一个实施例中，如图2-4所示，其为本公开实施例提供的另一种阵列基板的结构示意图，其中，透镜阵列17中的每个透镜为微透镜阵列，微透镜阵列中包括多个阵列排布的透镜，微透镜阵列可以提高光线利用率并降低透镜的厚度。
根据透镜阵列17中透镜的焦距的不同，光传感器阵列14能够实现不同的功能，如指纹识别、复印扫描、图像识别、人脸识别、光线检测和距离检测等。示例性的，透镜阵列17中透镜的焦距位于阵列基板出光侧的外表面时，光传感器阵列14能够用于实现指纹识别和图像识别等功能，在透镜阵列17中透镜的焦距为20至50厘米时，透镜阵列17能够用于实现人脸识别等功能，在透镜阵列17中透镜的焦距大于1米时，透镜阵列17能够用于实现光线检测和距离检测等功能。
此外，透镜阵列17中透镜也可以设置为只有预设波长的光线能够通过的滤镜结构，以进一步增加光传感器阵列14的精度。
本公开实施例中所涉及的阵列基板可以为液晶阵列基板，有机发光二极管(OLED)阵列基板、量子点发光二极管(QLED)阵列基板或其他微显示结构构成的阵列基板。
如图2-5所示，其为本公开实施例提供的另一种阵列基板的结构示意图，其中，透镜阵列17为包括多个液晶透镜的液晶透镜阵列，透镜阵列17中的任意一个液晶透镜171包括液晶层171a和控制电极171b，控制电极171b可以设置在液晶层171a中，也可以设置在液晶层171a的两侧或任意一侧，控制电极171b用于控制任意一个液晶透镜的焦距。控制电极171b能够在液晶层中生成电场，液晶层171a中的液晶会在该电场的作用下偏转，进而达到改变液晶透镜焦距的效果。控制电极171b可以由透明材料构成，如氧化铟锡等。
透镜阵列17为液晶透镜阵列时，能够通过改变焦距来实现不同的功能，所能实现的功能可以参考图2-4所示的阵列基板。
在一个实施例中，透镜阵列17设置在阵列基板10的出光侧L。将透镜阵列17设置在阵列基板10的出光侧L能够避免将透镜阵列17设置在阵列基板10中时，透镜阵列17中的电极对阵列基板10中的器件(如液晶层)造成影响。
此外，透镜阵列17还可以包括覆盖在阵列基板出光侧的一整层液晶层，而每个液晶透镜可以位于该液晶层中。
如图2-6所示，其为本公开实施例提供的另一种阵列基板的结构示意图。其中，光传感器阵列14中的任意一个光传感器141包括第二薄膜晶体管1411和光电转换器1412，第二薄膜晶体管1411包括有源层207、第一极1411b、第二极1411c和栅极1411d。
栅极1411d与信号线阵列(如图2-1中的信号线阵列13)中的预设信号线连接，第一极1411b与光电转换器1412的正极+连接，第二极1411c与接收线阵列(如图2-1中的接收线阵列15)中的预设接收线连接，光电转换器1412的负极-与栅极1411d连接。其中，预设信号线和预设接收线可以为光传感器141所在的子像素区域中的信号线和接收线。
光电转换器1412的材料可以包括量子点材料、掺杂的硅系材料、砷化镓(GaAs)、镓铝砷(GaAlAs)、磷化铟(InP)、硫化镉(CdS)和碲化镉(CdTe) 等半导体材料。光电转换器1412可以对于波长为300纳米～2000纳米的光具有或者部分具有光伏效应。
在一个实施例中，有源层207设置在衬底基板11上。
在一个实施例中，有源层207与衬底基板11之间设置有衬底层201。该衬底层201用于保护有源层207。
有源层207上设置有第一绝缘层202，第一绝缘层202上设置有第二绝缘层203，第二绝缘层203上设置有第三绝缘层204。
第一绝缘层202和第二绝缘层203中设置有第一通孔，第二绝缘层203中设置有第二通孔，第一绝缘层202、第二绝缘层203和第三绝缘层204中设置有第三通孔，第一通孔、第二通孔和第三通孔在所述衬底基板11上的正投影均与有源层207在衬底基板11上的正投影至少部分重叠。
在一个实施例中，第一通孔、第二通孔和第三通孔在所述衬底基板11上的正投影位于所述有源层207在所述衬底基板11上的正投影的范围内。
栅极1411d设置在第二通孔内，并且所述光电转换器1412设置在所述栅极1411d上，光电转换器1412的负极-与栅极1411d接触。
第一极1411b设置在第二绝缘层203上，第一极1411b与光电转换器1412的正极接触，并且通过第一通孔与有源层207电连接。
第二极1411c设置在第三通孔内，第二极1411c与有源层207电连接。
预设接收线151设置在第三绝缘层204上，预设接收线151通过第三通孔与第二极1411c电连接。
优选的，第二极1411c和预设接收线151使用相同材料，并通过同一构图工艺形成，以简化工艺。
需要说明的是，本公开实施例不对图2-6中各个结构的形成顺序和形成方式进行限制。
在一个实施例中，第一极1411b由透明导电材料(如氧化铟锡)构成，在第一极1411b由透明导电材料构成时，第一极1411b能够覆盖在光电转换器1412的正极+上，这样能够在不阻挡光线进入光电转换器1412的基础上，增加第一极1411b和正极+的接触面积，进而增加光电转换器1412的光电转化效率；和/或，光电转换器1412的负极-覆盖在栅极1411d上，这样能够增加栅极1411d和负极-的接触面积，进而增加光电转换器1412的光电转化效率。
在一个实施例中，第一极1411b和/或第二极1411c与有源层207接触的位置处还设置有欧姆接触层205。欧姆接触层205可以与有源层207同层设置并与有源层207接触，第一极1411b和第二极1411c可以分别与欧姆接触层205的顶部接触。欧姆接触层205能够使第一极1411b以及第二极1411c与有源层形成欧姆接触，减少有源层207和第一极1411b、第二极1411c之间的接触电阻。欧姆接触层205的材料可以参考相关技术。
如图2-7所示，其为图2-6所示阵列基板的电路结构示意图，其中，40为显示结构，光电转换器1412在电路中可以等效为一个二极管，其正极+与第一极1411b连接，其负极-与栅极1411d连接，第二极1411c与接收线151连接。131为信号线。
如图2-8所示，其为本公开实施例中，光电转换器对于电流和电压的响应曲线，由该曲线可知，光电转换器的开路电压和闭路电流为零。
综上所述，本公开实施例提供的阵列基板，通过使光传感器和用于显示控制的薄膜晶体管共用信号线来减少需要设置的线路，增大了阵列基板的开口率。解决了相关技术中在阵列基板中设置了较多的线路和器件，可能影响阵列基板的开口率的问题。达到了在设置较少的线路的情况下，就能够在阵列基板上设置光传感器的效果。
图3-1是本公开实施例提供的一种阵列基板的控制方法的流程图，用于上述各个实施例提供的阵列基板，该方法包括：
步骤301、通过信号线阵列中的信号线控制光传感器阵列中的光传感器开启。
可以在阵列基板进行显示时，通过信号线中的电压控制光传感器阵列中的光传感器开启。本公开实施例的执行主体可以是阵列基板外部的控制电路。
本公开实施例也可以在阵列基板未进行显示时，通过向信号线施加电压来开启光传感器。
此外，本公开实施例所提供的方法也可以在阵列基板未进行显示时，控制光传感器。
步骤302、通过接收线阵列中的接收线接收光传感器阵列中的光传感器产生的电信号。
在信号线上的电信号依次传递到各行信号线时，控制电路可以依次获取各行 光传感器产生的电信号。
步骤303、根据电信号获取光信息。
其中，光传感器阵列中的任意一个光传感器包括第二薄膜晶体管和光电转换器，第二薄膜晶体管包括有源层、第一极、第二极和接收线，栅极与信号线阵列中的预设信号线连接，第一极与光电转换器的正极连接，第二极与接收线阵列中的预设接收线连接，光电转换器的负极与预设信号线连接，如图3-2所示，本步骤可以包括：
如图3-2所示，本步骤可以包括下面3个子步骤：
子步骤3031、从通过接收线阵列中每个接收线获取的电信号中筛选出至少一个有效电信号，有效电信号的电压大于信号线的电压。
外部的控制电路可以包括检测电路和信息获取电路，该检测电路可以用于判断每条接收线所接收的电信号的电压是否大于信号线的电压，并将其中电压大于接收线所在的子像素区域中信号线的电压的电信号确定为有效电信号。这是由于接收线所接收的电信号的电压等于信号线的电压和光电转换器将光转化生成的电压(该电压和信号线的电压方向相同)的和，若该和小于信号线的电压，表明电路可能出现了故障，接收线接收的电信号无效，此时可以由该条接收线重新进行检测，以确认具体问题。
检测电路可以将有效电信号发送至信息获取电路。
子步骤3032、根据预设公式获取至少一个有效电信号中每个有效电信号的标准值
Figure PCTCN2017115592-appb-000003
信息获取电路可以根据预设公式获取至少一个有效电信号中每个有效电信号的标准值
Figure PCTCN2017115592-appb-000004
其中，预设公式可以为：
Figure PCTCN2017115592-appb-000005
Vp为有效信号的电压，Vg为信号线的电压。该预设公式仅仅是示意性的，还可以通过其他公式来获取每个有效电信号的标准值，本公开实施例不作出限制。
信息获取电路可以存储每个有效电信号的标准值。
子步骤3033、根据每个有效电信号的标准值获取光信息。
在获取了光传感器阵列中所有有效电信号的标准值后，可以根据该标准值来获取光信息。示例性的，可以根据标准值对应的光传感器的位置信息、标准值对应的光传感器对应的像素颜色以及标准值的大小等信息来获取光信息，并实现各 种功能。根据电信号获取光信息的方法可以参考相关技术，在此不再赘述。
示例性的，本公开实施例中，在阵列基板进行显示时，对于任意一列子像素区域，第n行和第n+1行子像素区域中，信号线、数据线和接收线上的电平信号可以如图3-3所示，可以看出，在信号线上有电信号时，光电转换器开启，接收线能够接收到电信号，且相邻两行的光电转换器能够依照信号线的通电次序依次获取电信号。此外，在阵列基板未进行显示时，图3-3中的数据线可以无电平信号。
综上所述，本公开实施例提供的阵列基板的控制方法，通过信号线来开启光电转换器，减少了阵列基板中需要设置的线路，增大了阵列基板的开口率。解决了相关技术中在阵列基板中设置了较多的线路和器件，可能影响阵列基板的开口率的问题。达到了在设置较少的线路的情况下，就能够在阵列基板上设置光传感器的效果。
本公开实施例还提供一种阵列基板的制造方法，该方法用于制造图1、图2-1至图2-6所示的任意一个阵列基板。
本公开实施例还提供一种显示设备，该显示设备包括图1、图2-1至图2-6所示的任意一个阵列基板。
本公开中术语“和/或”，仅仅是一种描述关联对象的关联关系，表示可以存在三种关系，例如，A和/或B，可以表示：单独存在A，同时存在A和B，单独存在B这三种情况。另外，本文中字符“/”，一般表示前后关联对象是一种“或”的关系。
需要指出的是，在附图中，为了图示的清晰可能夸大了层和区域的尺寸。而且可以理解，当元件或层被称为在另一元件或层“上”时，它可以直接在其他元件上，或者可以存在中间的层。另外，可以理解，当元件或层被称为在另一元件或层“下”时，它可以直接在其他元件下，或者可以存在一个以上的中间的层或元件。另外，还可以理解，当层或元件被称为在两层或两个元件“之间”时，它可以为两层或两个元件之间惟一的层，或还可以存在一个以上的中间层或元件。通篇相似的参考标记指示相似的元件。
在本公开中，术语“第一”、“第二”和“第三”仅用于描述目的，而不能理解为指示或暗示相对重要性。术语“多个”指两个或两个以上，除非另有明确的限定。
本领域普通技术人员可以理解实现上述实施例的全部或部分步骤可以通过硬件来完成，也可以通过程序来指令相关的硬件完成，所述的程序可以存储于一种计算机可读存储介质中，上述提到的存储介质可以是只读存储器，磁盘或光盘等。
以上所述仅为本公开的较佳实施例，并不用以限制本公开，凡在本公开的精神和原则之内，所作的任何修改、等同替换、改进等，均应包含在本公开的保护范围之内。

Claims (17)

  1. 一种阵列基板，包括：
    衬底基板；
    布置在所述衬底基板上的第一薄膜晶体管阵列、信号线阵列、光传感器阵列和接收线阵列，
    其中，
    所述第一薄膜晶体管阵列中每个第一薄膜晶体管均分别连接所述信号线阵列中的一条信号线，
    所述光传感器阵列中的每个光传感器分别连接所述信号线阵列中的一条信号线和所述接收线阵列中的一条接收线，
    所述光传感器阵列中的至少一个光传感器的远离所述衬底基板的一侧上布置有透镜，以形成透镜阵列。
  2. 根据权利要求1所述的阵列基板，其中，所述透镜选自以下各项：微透镜阵列、菲涅尔透镜或液晶透镜。
  3. 根据权利要求2所述的阵列基板，其中，在所述透镜是液晶透镜的情况下，所述液晶透镜包括液晶层和控制电极，所述控制电极用于控制液晶透镜的焦距。
  4. 根据权利要求3所述的阵列基板，其中，所述液晶透镜设置在所述阵列基板的出光侧。
  5. 根据权利要求1至4中的任一项所述的阵列基板，其中，所述光传感器阵列中的光传感器包括第二薄膜晶体管和光电转换器，所述第二薄膜晶体管的栅极与所述信号线和所述光电转换器的负极连接，第一极与所述光电转换器的正极连接，第二极与接收线连接。
  6. 根据权利要求5所述的阵列基板，其中，所述第二薄膜晶体管包括有源 层，以及
    所述衬底基板上自下而上依次设置有衬底层、所述有源层、第一绝缘层、第二绝缘层和第三绝缘层，并且第一绝缘层和第二绝缘层中设置有第一通孔，第二绝缘层中设置有第二通孔，第一绝缘层、第二绝缘层和第三绝缘层中设置有第三通孔，第一通孔、第二通孔和第三通孔在所述衬底基板上的正投影均位于所述有源层在所述衬底基板上的正投影的范围内，
    所述栅极设置在第二通孔内，并且所述光电转换器设置在所述栅极上，
    所述第一极设置在所述第二绝缘层上，并通过第一通孔与所述有源层电连接，
    所述第二极设置在第三通孔内，并与所述有源层电连接，
    接收线设置在第三绝缘层上，并通过第三通孔与所述第二极电连接，其中，接收线和所述第二极通过同一构图工艺形成。
  7. 根据权利要求6所述的阵列基板，其中，所述第一极由透明导电材料构成。
  8. 根据权利要求6所述的阵列基板，其中，所述第一极和所述第二极中的至少一个与所述有源层接触的位置处还形成有欧姆接触层。
  9. 根据权利要求6至8中的任一项所述的阵列基板，其中，所述衬底基板上还设置有数据线阵列，
    其中，所述接收线阵列中的接收线的排布方向与所述数据线阵列中的数据线的排布方向平行。
  10. 根据权利要求6至8中的任一项所述的阵列基板，其中，所述衬底基板上还设置有数据线阵列，
    其中，所述接收线阵列中的接收线的排布方向与所述信号线阵列中的信号线的排布方向平行。
  11. 根据权利要求9或10的阵列基板，其中，所述阵列基板被信号线和数 据线纵横交错划分为多个子像素区域，
    其中，所述光传感器阵列中的光传感器的数量小于或等于所述子像素区域的数量。
  12. 根据权利要求11所述的阵列基板，其中，沿数据线的排布方向和信号线的排布方向中的至少一个方向，每n个子像素区域中设置有一个光传感器，n为大于或等于2的整数。
  13. 根据权利要求1至4中的任一项所述的阵列基板，其中，所述光传感器阵列位于所述阵列基板的开口区域。
  14. 一种用于根据权利要求1至13中任一项所述的阵列基板的控制方法，包括：
    通过信号线控制光传感器开启；
    通过接收线接收光传感器产生的电信号；
    根据所述电信号获取光信息。
  15. 根据权利要求14所述的方法，其中，所述通过信号线控制光传感器开启的步骤包括：
    在通过信号线中的电压控制所述阵列基板进行显示的同时，通过所述电压控制所述光传感器开启。
  16. 根据权利要求15所述的方法，其中，所述根据所述电信号获取光信息的步骤包括：
    从通过接收线获取的电信号中筛选出至少一个有效电信号，所述有效电信号的电压大于所述信号线的电压；
    根据下式获取各个有效电信号的标准值
    Figure PCTCN2017115592-appb-100001
    Figure PCTCN2017115592-appb-100002
    其中，Vp为有效信号的电压，Vg为信号线的电压；以及
    根据有效电信号的标准值获取光信息。
  17. 一种显示设备，包括权利要求1至13中的任一项所述的阵列基板。
PCT/CN2017/115592 2017-06-09 2017-12-12 阵列基板、阵列基板的控制方法和显示设备 WO2018223644A1 (zh)

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