WO2018205349A1 - 驱动电路、驱动电路的驱动方法和显示装置 - Google Patents

驱动电路、驱动电路的驱动方法和显示装置 Download PDF

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Publication number
WO2018205349A1
WO2018205349A1 PCT/CN2017/088740 CN2017088740W WO2018205349A1 WO 2018205349 A1 WO2018205349 A1 WO 2018205349A1 CN 2017088740 W CN2017088740 W CN 2017088740W WO 2018205349 A1 WO2018205349 A1 WO 2018205349A1
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Prior art keywords
scan line
thin film
gate
display device
film transistor
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PCT/CN2017/088740
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English (en)
French (fr)
Inventor
陈猷仁
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HKC Co Ltd
Chongqing HKC Optoelectronics Technology Co Ltd
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HKC Co Ltd
Chongqing HKC Optoelectronics Technology Co Ltd
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Priority to US15/744,828 priority Critical patent/US10755659B2/en
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3696—Generation of voltages supplied to electrode drivers

Definitions

  • Embodiments of the present invention relate to the field of display driving technologies, and in particular, to a driving circuit, a driving method of the driving circuit, and a display device.
  • TFT-LCD Thin Film Transistor Liquid Crystal Display
  • the driving principle of the TFT-LCD is that the system board connects the R/G/B compression signal and the control signal through the wire to the connector on the PCB board, and the data signal and the control signal pass through the timing controller on the PCB board (Timing Controller, TCON).
  • TCON Timing Controller
  • S-COF source-chip on film
  • G-COF gate-chip on film
  • the data line and the scan line of the area respectively obtain the required data signal and gate drive signal.
  • the charging current of the pixels of the TFT-LCD display area is reduced due to the temperature drop, because the moving speed of the conductive carriers of the TFTs connected to the pixel electrodes becomes slower as the temperature drops, and the conduction current of the TFTs The reduction also causes a problem of insufficient contrast and flicker due to insufficient charging of the display panel.
  • the embodiment of the invention provides a driving circuit, a driving method of the driving circuit and a display device, so as to solve the problem that the pixel of the display panel is insufficiently charged, thereby causing insufficient contrast and flicker of the display panel.
  • An embodiment of the present invention provides a driving circuit, including: a signal output module, the signal output module includes N output ends, and is configured to output a gate driving signal to N scanning lines step by step;
  • the embodiment of the present invention further provides a driving circuit driving method, which is applicable to the driving circuit provided by any embodiment of the present invention, and includes:
  • the signal output module outputs the gate drive signal to the N scan lines step by step through the N output terminals.
  • the signal output module when the signal output module outputs the gate driving signal to the i-1th scan line, the i-1th scan line turns on the switch module corresponding to the i th scan line, the first level signal Provided by the switch module to the ith scan line, where N is a positive integer and i is a positive integer greater than 1, less than or equal to N.
  • the driving circuit of the embodiment of the present invention when a row of pixels is charged, the next row of pixels is also charged, so that each row of pixels acquires a longer charging time, thereby solving the problem that the pixel of the display panel is insufficiently charged, thereby causing the display panel.
  • FIG. 1 is a schematic structural diagram of a driving circuit according to an embodiment of the present invention.
  • FIG. 3 is a schematic structural diagram of a display panel according to an embodiment of the present invention.
  • FIG. 3b is a schematic structural diagram of another display panel according to an embodiment of the present invention.
  • 4a is a partial schematic structural diagram of a driving circuit according to an embodiment of the present invention.
  • 4b is a voltage measurement waveform diagram of a scan line corresponding to the driving circuit of FIG. 4a;
  • FIG. 5 is a schematic structural diagram of another driving circuit according to an embodiment of the present invention.
  • FIG. 6 is a flowchart of a driving method of a driving circuit according to an embodiment of the present invention.
  • FIG. 7 is a schematic diagram of a display device according to an embodiment of the present invention.
  • FIG. 1 is a schematic structural diagram of a driving circuit according to an embodiment of the present invention.
  • the driving circuit includes a signal output module 11 and a plurality of switch modules 12 .
  • the signal output module 11 includes N output terminals 111 arranged to output gate drive signals to N scan lines 2 in stages.
  • each switch module 12 is electrically connected to the i-1th scan line 2, and the first connection end 122 and the corresponding i-th line
  • the scan line 2 is electrically connected, and the second connection end 123 is electrically connected to the first level signal output terminal 13 of the drive circuit, wherein N is a positive integer and i is a positive integer greater than 1, less than or equal to N.
  • FIG. 2 is a driving structure diagram of a thin film transistor liquid crystal display according to an embodiment of the present invention.
  • the system board of the display transmits the R/G/B compression signal, control signal and power to the PCB through the wire.
  • the data signal is transmitted to the display area of the display panel through the S-COF. 3.
  • the data signal is transmitted to the display area 3 through the G-COF.
  • a non-display area 4 that is, a fan-out area, is disposed around the display area 3.
  • the gray scale voltage is still maintained by the storage capacitor until the next time the TFT controlling the pixel is turned on to update the gray scale voltage.
  • the scan line 11 sequentially turns on the TFTs on each row, and then the gray line voltage of the pixels is updated by the data lines, and the TFT-LCD continuously loops in this way to update the picture.
  • the driving circuit further includes a plurality of switch modules 12, each of which corresponds to one scan line 2.
  • the first connection end 122 of each switch module 12 is electrically connected to the corresponding scan line 2, and the second connection end 123
  • the switch module 12 when the switch module 12 is turned on, the corresponding sweep
  • the voltage value of the trace 2 rises to the first level, and the corresponding scan line 2 turns on a row of TFTs on the array substrate that it controls, and the data line charges the storage capacitor of the pixel through the opened TFT.
  • the control terminal 121 of each switch module 12 is electrically connected to the previous scan line 2 of the corresponding scan line 2.
  • the corresponding scan line 2 is also charged to the first by the previous scan line 2 through the switch module 12.
  • the level that is, a row of TFTs corresponding to the control of the scan line 2 is turned on.
  • the i-1th output terminal 111 outputs the gate driving signal to the i-1th scan line 2
  • the i-1th line TFT is turned on, and the storage capacitor of the i-1th line pixel is charged;
  • the i-1th scan line 2 passes through the switch module 12 to cause the first level signal output terminal 13 to output the first level signal to the ith scan line 2, thereby turning on the ith row of TFTs, and the data lines are pixels of the ith row
  • the storage capacitor is charged, when the ith output terminal 111 outputs the gate driving signal to the ith scan line 2, the data line continues to charge the storage capacitor of the ith row of pixels. Overall, the charging time of the i-th row of pixels has increased.
  • the driving circuit of the embodiment of the present invention when a row of pixels is charged, the next row of pixels is also charged, so that each row of pixels acquires a longer charging time, thereby solving the problem that the pixel of the display panel is insufficiently charged, thereby causing the display panel.
  • FIG. 3a is a schematic structural diagram of a display panel according to an embodiment of the present invention.
  • the signal output module 11 is disposed on the gate flip chip 5, and the plurality of switch modules 12 are disposed on the array substrate.
  • the non-display area 4 On the non-display area 4.
  • the TFT module process of the existing array substrate is used, and the switch module 12 is disposed in the non-display area 4, and the setting process is relatively simple, and does not need to be the same as the conventional pre-charging method.
  • the enable precharge function is set on the corresponding function pin of the gate flip chip 5, and the output waveform of the gate flip chip 5 is controlled by the timing controller.
  • the switch module 12 is disposed on the non-display area 4 of the array substrate, which saves the internal logic circuit of the gate flip chip 5 and the control signal of the timing controller, reduces the cost, and enhances the generality of the driving circuit in this embodiment. Sex.
  • the switch module 12 is disposed on the non-display area 4 at the end position of the scan line 2 , and the head end of the scan line 2 is electrically connected to the corresponding output end of the signal output module 11 .
  • the switch module 12 and the first level signal output terminal 13 are disposed at the end of the scan line 2, and the switch module 12 is connected to the end of the scan line 2.
  • the head end of the scan line 2 is set to be the same as the existing drive circuit, directly with the signal
  • the corresponding output terminals of the output module 11 are electrically connected, and the solution only needs to be improved and set in the non-display area 4 at the end position of the scan line 2 on the basis of the existing drive circuit, and the process is simple and cost-saving.
  • FIG. 3b is a schematic structural diagram of another display panel according to an embodiment of the present invention.
  • the switch module 12 and the first level signal output terminal 13 may also be disposed on the non-display area 4 at the head end position of the scanning line 2, and the signal output module 11 and the switch module 12 are both connected to the head end of the scanning line 2.
  • multiple layers of traces are required, which is more complicated than the structure shown in Figure 3a.
  • the switch module 12 is a thin film transistor. In this embodiment, it may be an N-type thin film transistor. When the N-type thin film transistor is triggered at a high level, the circuit structure of the high-level TFT of the driving circuit can be well matched, and the solution of the embodiment of the present invention is implemented. If the switch module 12 is a P-type transistor, it is a low level trigger. In the related art, the scan line 2 is a high level to turn on the TFT, and when one of the scan lines 2 is at a high level, the other scan lines 2 are low. Level.
  • the switch module 12 is a P-type transistor triggered by a low level, the switch module 12 controlled by the other scan lines 2 will be turned on, and the display function cannot be realized. Therefore, if the switch module 12 is a P-type transistor, the TFT structure and the drive circuit structure in the array substrate need to be changed, which is costly. In the embodiment, the switch module 12 is an N-type thin film transistor, which can solve this problem.
  • FIG. 4a is a partial structural diagram of a driving circuit according to an embodiment of the present invention.
  • the voltage value of the gate driving signal is greater than the turn-on voltage value of the control terminal of the N-type thin film transistor, and the turn-on voltage value of the control terminal of the N-type thin film transistor is greater than the voltage value of the first level signal.
  • the voltage value of the gate driving signal is greater than the turn-on voltage value of the control terminal of the N-type thin film transistor, and the gate driving signal can be used to drive the N-type thin film transistor, so the voltage value of the gate driving signal is greater than the turn-on voltage of the control terminal of the N-type thin film transistor.
  • the voltage value of the scan line Gate i-1 is V 1 , and the N-type corresponding to the scan line Gate i is required.
  • the thin film transistor M2 is not turned on by voltage V 1 is to avoid problems not display screen, the need to open the control terminal voltage N-type thin film transistor is greater than the first voltage level signal.
  • the voltage value of the gate driving signal can be set to V on , the turn-on voltage value V 0 of the control terminal of the N-type thin film transistor, and the voltage value of the first level signal is V 1 , then V on >V 0 >V 1 .
  • the turn-on voltage of the control terminal of the N-type thin film transistor is set to be 90% of the voltage value of the gate drive signal, and the voltage value of the first level signal is 80% of the voltage value of the gate drive signal, thereby ensuring V on , V 0 and V 1 are not too close, causing false triggering of the N-type thin film transistor.
  • the switch module 12 is an N-type metal-oxide semiconductor field effect transistor.
  • the TFT of the pixel electrode is a process of an N-type metal-oxide semiconductor field effect transistor
  • the switch module 12 is an N-type metal-oxide semiconductor field effect transistor, which can share the liquid crystal display panel. Existing processes save costs.
  • the voltage value of the gate driving signal is 30V
  • the turn-on voltage value of the control terminal of the N-type metal-oxide semiconductor field effect transistor is 27V
  • the working process of the driving circuit is that when the previous scanning line of the scanning line Gate i-1 is at a high level, that is, 30V, the scanning line Gate i-1 is at a low level, that is, the voltage value is zero. Then at this time N-type metal - The oxide semiconductor field effect transistor M1 is turned on by the high level of the previous scan line of the scan line Gate i-1, and the voltage value on the scan line Gate i-1 on the corresponding display area 3 is the first level signal. The voltage value is 24V, and the voltage value 24V is smaller than the turn-on voltage of the N-type metal-oxide semiconductor field effect transistor M2, then M2 cannot be turned on, and the voltage value on the scan line Gate i is zero;
  • the other scan lines include Gate i as a low level, then the gate voltage of M2 is 30V, which is greater than the gate turn-on voltage of M2 by 27V, then M2 is turned on, and the corresponding display
  • the voltage value on the scan line Gate i on the area 3 is 24V of the first level signal.
  • the voltage value of 24V is not enough to turn on the next N-type metal-oxide semiconductor field effect transistor, the next scan The voltage value on the line is zero;
  • the scan line Gate i-1 and its previous scan line are both low and the M1 and M2 are not turned on, the scan line Gate i-1 and the scan line Gate i have zero voltage values.
  • FIG. 4b is a voltage measurement waveform diagram of a scan line corresponding to the driving circuit of FIG. 4a. It can be seen from the waveform diagram of the voltage value of the scan line that when the drive circuit scans the current scan line, the next scan line is pre-scanned, and the scan voltage is the first level signal voltage value.
  • the gate driving signal functions as a switch.
  • the driving circuit outputs a gate driving signal
  • the gate of the TFT in the pixel array is turned on, the pixel is charged by the source.
  • the brightness actually displayed by the pixel is determined by the charging voltage of the source and the charging time, i.e., by the area of the shaded portion 7 in Fig. 4b, and the effect of precharging is to increase the charging time.
  • the scanning lines Gate i-1 and Gate i have different opening times, the area of the opening period is the same. Then, each pixel can obtain sufficient charging time and accurately display the pixel gray scale when the scanning time of each scanning line is too short.
  • FIG. 5 is a schematic structural diagram of another driving circuit according to an embodiment of the present invention.
  • the number of the switch modules 12 and the number of scan lines 2 are the same; the first switch module 12 is first.
  • the connecting end 122 is electrically connected to the corresponding first scanning line 2, and the control end 121 is electrically connected to the last scanning line 2,
  • the two connection terminals 123 are electrically connected to the first level signal output terminal 13 of the drive circuit.
  • N switch modules 12 Corresponding to the N scan lines 2, there may be N switch modules 12, and when the drive circuit scans the last scan line 2 in one frame, the last scan line 2 is turned on by the control end 121 of the first switch module 12
  • the switch module 12 is electrically connected to the first level signal output terminal 13 to realize pre-charging of the first row of pixels, so that each row of pixels can be pre-charged to prevent insufficient pixel charging.
  • a suitable trigger signal may be additionally provided to control the first switch module 12 to be turned on, and the other switch modules 12 may be controlled to be turned on by the previous scan line 2. It is also possible to precharge the pixels of each line.
  • the number of the switch modules 12 and the number of scan lines 2 may not be equal.
  • N-1 switching modules are provided, corresponding to the 2nd to Nth scanning lines 2, respectively. Pre-charging of the pixels in the second to N-th rows can be realized, and the problem of insufficient charging can be solved to some extent, and the flicker is displayed.
  • a smaller number of switch modules 12 are provided, which is not limited in this embodiment of the present invention, except that the smaller the number of switch modules 12, the worse the solution effect.
  • FIG. 6 is a flowchart of a driving method of a driving circuit according to an embodiment of the present invention. Methods include:
  • the signal output module outputs the gate drive signal to the N scan lines step by step through the N output terminals;
  • the switch module sends a first level signal of the driving circuit of the second connection end of the switch module to the ith scan line through the first connection end, where N is a positive integer, and i is greater than 1. , a positive integer less than or equal to N.
  • the driving method of the driving circuit adds a plurality of switching modules to the driving circuit on the basis of the signal output module, and each switching module corresponds to one scanning line for controlling the first level signal output end and When the corresponding scan line is connected or disconnected, and each switch module is controlled to be turned on or off by the previous scan line, the gate output signal is outputted to the previous scan line at the signal output module, and the upper row of TFTs is turned on to make the data line When charging the previous row of pixels, the current switch module is turned on, so that the current scan line acquires the first level signal, and the data line charges the current row of pixels.
  • the driving method of the driving circuit of the embodiment of the present invention when a row of pixels is charged, the next row of pixels is also charged, so that each row of pixels acquires a longer charging time, thereby solving the problem that the pixel of the display panel is insufficiently charged, thereby Causes insufficient contrast and flicker of the display panel.
  • the switch module may be a thin film transistor.
  • the switch module is an N-type thin film transistor
  • the voltage value of the gate drive signal is greater than the turn-on voltage value of the control terminal of the N-type thin film transistor
  • the turn-on voltage value of the control terminal of the N-type thin film transistor is greater than the voltage value of the first level signal.
  • the switch module is an N-type metal-oxide semiconductor field effect transistor.
  • the signal output module is disposed on the gate flip chip, and the plurality of switch modules are disposed on the non-display area of the array substrate.
  • the switch module is disposed in a non-display area at an end position of the scan line, and the first end of the scan line is electrically connected to a corresponding output end of the signal output module.
  • the number of the switch modules is the same as the number of scan lines, and both are positive integers N;
  • the last scan line opens the first switch module through the control end of the first switch module corresponding to the first scan line, and the first switch module turns the second connection end A level signal is delivered to the first scan line through the first connection end to enable the first scan line to be precharged.
  • FIG. 7 is a schematic diagram of a display device according to an embodiment of the invention.
  • Display device 8 includes a drive circuit 9 provided by any of the embodiments of the present invention.
  • the display device 8 is a liquid crystal display device or an organic light emitting diode display device, or other display device having the driving circuit 9.
  • Embodiments of the present disclosure also provide another display device.
  • the display device includes: a plurality of display units, N scanning lines, and M data lines.
  • a plurality of display units are arranged as a matrix of N rows and M columns.
  • Each display unit includes a first thin film transistor having a first threshold voltage.
  • Each of the gate lines is electrically connected to a gate of the first thin film transistor of a corresponding one of the N rows.
  • Each of the data lines is electrically connected to a source of a first thin film transistor of a corresponding one of the M columns.
  • each display unit includes a pixel electrode electrically connected to a drain of the first thin film transistor.
  • the display device further includes a gate driving signal output module, a first level signal line, and N second thin film transistors corresponding to the N scanning lines.
  • the gate driving signal output module has N output terminals one-to-one corresponding to the N scanning lines, each output terminal is connected to a corresponding scan line, and the N output terminals sequentially provide gates to the N scan lines Pole drive signal.
  • the first level signal line is arranged to provide a first level signal, the first level signal being less than the first threshold voltage.
  • the second thin film transistor has a second threshold voltage.
  • the gate drive signal is greater than the first threshold voltage and the second threshold voltage.
  • the gate of the ith second thin film transistor is electrically connected to the i-1th scan line, and the source of the ith second thin film transistor is electrically connected to the first level signal line, and the ith second thin film transistor is electrically connected
  • the drain is electrically connected to the ith scan line.
  • the gate drive signal output module When the gate drive signal output module outputs the gate drive signal to the i-1th scan line, the second thin film transistor corresponding to the i th scan line is turned on, and the first level signal is supplied to the i th scan line.
  • the first thin film transistor and the second thin film transistor are both N-type thin film transistors.
  • the voltage value of the first level signal is 80% of the voltage value of the gate driving signal.
  • the first threshold voltage and the second threshold voltage are equal.
  • the plurality of first thin film transistors are disposed in a display area of the display device, and the N second thin film transistors are disposed in a non-display area of the display device.
  • the display device further includes a gate flip chip, and the gate driving signal output module is disposed on the gate flip chip.
  • the display device may also be, for example, an LCD display device, an OLED display device, a QLED display device, a curved display device, or other display device.

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  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
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Abstract

一种驱动电路（9）、驱动电路（9）的驱动方法和显示装置（8）。其中，驱动电路（9）包括：信号输出模块（11），包括N个输出端（111），设置为逐级输出栅极驱动信号至N条扫描线（2）；第一电平信号输出端（13）；以及多个开关模块（12），每个开关模块（12）对应一条扫描线（2），且第i个开关模块（12）的控制端（121, B）与第i-1条扫描线（Gate i-1）电连接，第一连接端（122）与对应的第i条扫描线（Gate i）电连接，第二连接端（123）与第一电平信号输出端（13）电连接；其中，N为正整数，i为大于1，小于或等于N的正整数。

Description

驱动电路、驱动电路的驱动方法和显示装置 技术领域
本发明实施例涉及显示器驱动技术领域，尤其涉及一种驱动电路、驱动电路的驱动方法和显示装置。
背景技术
薄膜晶体管液晶显示器(Thin Film Transistor Liquid Crystal Display，TFT-LCD)是当前平板显示的主要品种之一，已经成为了现代IT、视讯产品中重要的显示平台。TFT-LCD的驱动原理为系统主板将R/G/B压缩信号、控制信号通过线材与PCB板上的连接器相连接，数据信号和控制信号经过PCB板上的时序控制器(Timing Controller，TCON)IC处理后，分别通过源极覆晶薄膜(Source-Chip on Film，S-COF)和栅极覆晶薄膜(Gate-Chip on Film，G-COF)与显示区连接，从而使得LCD的显示区的数据线和扫描线分别获得所需的数据信号和栅极驱动信号。
在实际应用中，TFT-LCD显示区的像素在充电过程中会发生像素充电不足的问题，原因在于随着如今TFT-LCD产品分辨率要求越来越高，相应的扫描线会越来越多，在帧周期不变的情况下，每条扫描线的扫描时间过短，从而像素充电时间过短，则造成像素充电不足的问题，在显示效果上产生对比不足与闪烁等问题。另外，TFT-LCD显示区的像素的充电电流会因温度下降而减小，这是因为连接像素电极的TFT的导电载子的移动速度随温度降底而变慢，则TFT的导通电流会减小，同样会造成因显示面板充电不足而对比不足与闪烁的问题。
发明内容
本发明实施例提供一种驱动电路、驱动电路的驱动方法和显示装置，以解决显示面板的像素充电不足，从而造成显示面板对比不足与闪烁的问题。
本发明实施例提供了一种驱动电路，包括：信号输出模块，所述信号输出模块包括N个输出端，设置为逐级输出栅极驱动信号至N条扫描线；
第一电平信号输出端；以及
多个开关模块，每个所述开关模块对应一条扫描线，且第i个开关模块的控制端与第i-1条扫描线电连接，第一连接端与对应的第i条扫描线电连接，第二连接端与第一电平信号输出端电连接，其中，N为正整数，i为大于1，小于或等于N的正整数。
本发明实施例还提供了一种驱动电路的驱动方法，适用于本发明任意实施例提供的驱动电路，包括：
信号输出模块通过N个输出端逐级输出栅极驱动信号至N条扫描线，
其中，当所述信号输出模块输出栅极驱动信号至第i-1条扫描线时，所述第i-1条扫描线使第i条扫描线对应的开关模块导通，第一电平信号通过开关模块提供到第i条扫描线，其中，N为正整数，i为大于1，小于或等于N的正整数。
本发明实施例还提供了一种显示装置，包括显示面板；以及本发明任意实施例所述的驱动电路。
本发明实施例提供的技术方案，在信号输出模块的基础上，为驱动电路增设了多个开关模块，每个开关模块对应一条扫描线，用于控制第一电平信号输出端与对应的扫描线的连接或断开，并且每个开关模块由上一条扫描线控制其打开或关断，则在信号输出模块输出栅极驱动信号至上一条扫描线，上一行TFT 开启，使数据线为上一行像素充电时，当前开关模块被打开，使得当前扫描线获取第一电平信号，数据线为当前行像素充电。本发明实施例的驱动电路，在使某一行像素进行充电时，也使下一行像素进行充电，从而使得每行像素获取更长的充电时间，解决了显示面板的像素充电不足，从而造成显示面板对比不足与闪烁的问题。
附图说明
图1是本发明实施例提供的一种驱动电路的结构示意图；
图2是本发明实施例提供的一种薄膜晶体管液晶显示器驱动结构图；
图3a是本发明实施例提供的显示面板的结构示意图；
图3b是本发明实施例提供的另一显示面板的结构示意图；
图4a是本发明实施例提供的驱动电路的局部结构示意图；
图4b是图4a中驱动电路对应的扫描线的电压测量波形图；
图5是本发明实施例提供的另一种驱动电路的结构示意图；
图6是本发明实施例提供的一种驱动电路的驱动方法的流程图；
图7是本发明实施例提供的一种显示装置的示意图。
具体实施方式
本发明实施例提供一种驱动电路，参考图1，图1是本发明实施例提供的一种驱动电路的结构示意图，该驱动电路包括：信号输出模块11以及多个开关模块12。
信号输出模块11包括N个输出端111，设置为逐级输出栅极驱动信号至N条扫描线2。
多个开关模块12，每个开关模块12对应一条扫描线2，且每个开关模块12的控制端121与第i-1条扫描线2电连接，第一连接端122与对应的第i条扫描线2电连接，第二连接端123与驱动电路的第一电平信号输出端13电连接，其中，N为正整数，i为大于1，小于或等于N的正整数。
一般的，薄膜晶体管液晶显示器的显示面板分为显示区域和周围的非显示区域，参考图2，图2是本发明实施例提供的一种薄膜晶体管液晶显示器驱动结构图。显示器的系统主板将R/G/B压缩信号、控制信号及动力通过线材传输至PCB板，上述数据经过PCB板的时序控制器处理后，通过S-COF将数据信号传输至显示面板的显示区域3，通过G-COF将数据信号传输至显示区域3。显示区域3的周围设置有非显示区域4，即扇出区域。在非显示区域4中可设置走线、测试点，以及根据需要设置驱动电路等。参考图2，显示区域3设置有许多相互交错的扫描线2和数据线5，扫描线2和数据线5交错的区域为一像素单元，像素单元以一晶体管作为像素的开关，显示驱动原理为每一条扫描线2循序送出栅极驱动信号给一行TFT的栅极，当TFT被导通时，数据线经由导通的TFT对像素的储存电容充电而写入一灰阶电压。在TFT被关闭后，该灰阶电压仍被储存电容维持着，直到下一次控制此像素的TFT被开启时才会再更新灰阶电压。扫描线11会循序不断的开启每一行上的TFT，然后由数据线更新像素的灰阶电压，TFT-LCD即以此方式不断地循环动作以更新画面。
参考图1，驱动电路包括信号输出模块11，信号输出模块11包括和扫描线2条数相同的输出端111，N个输出端111逐级输出栅极驱动信号至N条扫描线2。
驱动电路还包括多个开关模块12，每个开关模块12对应一条扫描线2，参考图1，每个开关模块12的第一连接端122与对应的扫描线2电连接，第二连接端123与驱动电路的第一电平信号输出端13电连接，当开关模块12开启时，对应的扫 描线2电压值升至第一电平，对应的扫描线2将其控制的阵列基板上的一行TFT开启，由数据线通过开启的TFT为像素的储存电容充电。并且每个开关模块12的控制端121与对应扫描线2的上一条扫描线2电连接，在上一行TFT开启时，对应扫描线2也被上一条扫描线2通过开关模块12充电至第一电平，即开启了对应扫描线2控制的一行TFT。示例性的，当第i-1条输出端111输出栅极驱动信号至第i-1条扫描线2，则第i-1行TFT开启，第i-1行像素的储存电容充电；同时，第i-1条扫描线2通过开关模块12使得第一电平信号输出端13输出第一电平信号至第i条扫描线2，从而开启第i行TFT，数据线为第i行像素的储存电容充电，则当第i条输出端111输出栅极驱动信号至第i条扫描线2时，数据线继续为第i行像素的储存电容充电。总体看来，第i行像素的充电时间得到了增加。
本发明实施例提供的技术方案，在信号输出模块11的基础上，为驱动电路增设了多个开关模块12，每个开关模块12对应一条扫描线2，用于控制第一电平信号输出端13与对应的扫描线2的连接或断开，并且每个开关模块12由上一条扫描线2控制其打开或关断，则在信号输出模块11输出栅极驱动信号至上一条扫描线2，上一行TFT开启，使数据线为上一行像素充电时，当前开关模块12被打开，使得当前扫描线2获取第一电平信号，使数据线为当前行像素充电。本发明实施例的驱动电路，在使某一行像素进行充电时，也使下一行像素进行充电，从而使得每行像素获取更长的充电时间，解决了显示面板的像素充电不足，从而造成显示面板对比不足与闪烁的问题。
在上述实施例的基础上，参考图3a，图3a是本发明实施例提供的显示面板的结构示意图，信号输出模块11设置于栅极覆晶薄膜5上，多个开关模块12设置于阵列基板的非显示区域4上。本实施例利用现有阵列基板的TFT制程，在非显示区域4设置开关模块12，设置工艺较为简单，而不需要像传统预充电方法一样， 在栅极覆晶薄膜5的对应功能引脚上设定启用预充电功能，并且通过时序控制器控制栅极覆晶薄膜5的输出波形。将开关模块12设置于阵列基板的非显示区域4上，节省了栅极覆晶薄膜5的内部逻辑电路及时序控制器的控制讯号，降低了成本，并增强了本实施例中驱动电路的通用性。
可选的，参考图3a，开关模块12设置于扫描线2的末端位置处的非显示区域4，扫描线2的首端与信号输出模块11的对应的输出端电连接。将开关模块12及第一电平信号输出端13设置在扫描线2的末端，开关模块12与扫描线2的末端相连，扫描线2的首端与现有的驱动电路设置相同，直接与信号输出模块11的对应的输出端电连接，则本方案只需在现有的驱动电路的基础上，在扫描线2的末端位置处的非显示区域4进行改进和设置，工艺简单，节省成本。
同样的，参考图3b，图3b是本发明实施例提供的另一显示面板的结构示意图。开关模块12和第一电平信号输出端13也可以设置在扫描线2的首端位置处的非显示区域4上，则信号输出模块11和开关模块12都与扫描线2的首端相连。但是因为图3b所示的结构，需要多层布置走线，相较于图3a所示的结构，工艺较为复杂。
可选的，开关模块12为薄膜晶体管。在本实施例中，可以为N型薄膜晶体管。N型薄膜晶体管为高电平触发，则能够较好的配合驱动电路高电平开启TFT的电路结构，实施本发明实施例的方案。若开关模块12为P型晶体管，则为低电平触发，相关技术中，扫描线2都是高电平开启TFT，则当其中一条扫描线2为高电平，其他扫描线2都为低电平。因此若开关模块12为低电平触发的P型晶体管，则其他扫描线2所控制的开关模块12都会被打开，无法实现显示功能。因此，若开关模块12为P型晶体管，则阵列基板中TFT结构，驱动电路结构都需要改变，则浪费成本。本实施例中开关模块12为N型薄膜晶体管，可解决这一问题。
参考图4a，图4a是本发明实施例提供的驱动电路的局部结构示意图。可选的，栅极驱动信号的电压值大于N型薄膜晶体管的控制端的开启电压值，N型薄膜晶体管的控制端的开启电压值大于第一电平信号的电压值。
栅极驱动信号的电压值大于N型薄膜晶体管的控制端的开启电压值，栅极驱动信号可用于驱动N型薄膜晶体管，所以栅极驱动信号的电压值要大于N型薄膜晶体管的控制端的开启电压值；参考图4a，若非显示区域4内的N型薄膜晶体管M1通过控制端A被开启时，则扫描线Gate i-1的电压值为V1，又需要使扫描线Gate i对应的N型薄膜晶体管M2不被电压V1开启，以避免出现显示不出画面的问题，则需要N型薄膜晶体管的控制端的开启电压值要大于第一电平信号的电压值。
可设定栅极驱动信号的电压值为Von，N型薄膜晶体管的控制端的开启电压值V0，第一电平信号的电压值为V1，则Von＞V0＞V1。可选的，可设置N型薄膜晶体管的控制端的开启电压值为栅极驱动信号的电压值的90％，第一电平信号的电压值为栅极驱动信号的电压值的80％，从而保证Von、V0和V1不会太接近，造成N型薄膜晶体管的误触发。
可选的，开关模块12为N型金属-氧化物半导体场效应晶体管。现有的液晶显示面板的制程中，像素电极的TFT即为N型金属-氧化物半导体场效应晶体管的制程，开关模块12为N型金属-氧化物半导体场效应晶体管，可共用液晶显示面板的现有制程，节省成本。
可选的，栅极驱动信号的电压值为30V，N型金属-氧化物半导体场效应晶体管的控制端的开启电压值为27V，第一电平信号的电压值为24V。即Von＝30V，V0＝27V，V1＝24V。
参考图4a，驱动电路的工作过程为，当扫描线Gate i-1的上一条扫描线为高电平，即为30V时，扫描线Gate i-1为低电平，即电压值为零，则此时N型金属- 氧化物半导体场效应晶体管M1在扫描线Gate i-1的上一条扫描线高电平的作用下开启，对应的显示区域3上的扫描线Gate i-1上的电压值为第一电平信号的电压值24V，而电压值24V小于N型金属-氧化物半导体场效应晶体管M2的开启电压，则M2无法被开启，扫描线Gate i上的电压值为零；
当扫描线Gate i-1为高电平30V时，其他扫描线包括Gate i为低电平，则M2的栅极电压为30V，大于M2的栅极开启电压27V，则M2开启，对应的显示区域3上的扫描线Gate i上的电压值为第一电平信号的电压值24V，同样的，24V的电压值还不足以开启下一个N型金属-氧化物半导体场效应晶体管，下一条扫描线上的电压值为零；
当扫描线Gate i-1及其上一条扫描线，扫描线Gate i都为低电平时，M1和M2都不会开启，则扫描线Gate i-1和扫描线Gate i电压值为零。
参考图4b，图4b是图4a中驱动电路对应的扫描线的电压测量波形图。从扫描线的电压值波形图可看出，驱动电路在对当前扫描线进行扫描时，会对下一条扫描线进行预扫描，扫描电压为第一电平信号电压值。
在液晶显示面板的像素阵列中，栅极驱动信号起到开关的作用，当驱动电路输出栅极驱动信号时，像素阵列中TFT的栅极开启时，由源极对像素进行充电。像素实际显示的亮度是由源极的充电电压和充电时间决定的，即由图4b中的阴影部分7的面积决定，预充电的作用是增长充电时间。扫描线Gate i-1和Gate i虽然开启时间不同，但是其开启时段的面积相同。则每个像素能够在每条扫描线扫描时间过短的情况下，获得充足的充电时间，准确显示像素灰阶。
可选的，参考图5，图5是本发明实施例提供的另一种驱动电路的结构示意图，开关模块12的个数和扫描线2的条数相同；第一个开关模块12的第一连接端122与对应的第一条扫描线2电连接，控制端121与最后一条扫描线2电连接，第 二连接端123与驱动电路的第一电平信号输出端13电连接。
对应N条扫描线2，可以有N个开关模块12，则驱动电路在扫描一帧中的最后一条扫描线2时，最后一条扫描线2通过第一个开关模块12的控制端121开启第一个开关模块12，则第一条扫描线2与第一电平信号输出端13电连接，实现第一行像素的预充电，则每一行像素都能预充电，防止像素充电不足。
或者，当开关模块12的个数和扫描线2的条数相同时，也可以另设合适的触发信号控制第一个开关模块12打开，其他开关模块12都可以通过上一条扫描线2控制开启，同样能够实现每行像素的预充电。
另外，开关模块12的个数和扫描线2的条数也可以不相等。示例性的，对于N条扫描线2，设置N-1个开关模块，分别与第2条至第N条扫描线2相对应。能够实现第2至第N行像素的预充电，也能够在一定程度上解决充电不足，显示闪烁的问题。或者，设置数量更少的开关模块12，本发明实施例对此不进行限定，只是若开关模块12的数量越少，方案效果越差。
本发明实施例还提供了一种驱动电路的驱动方法，适用于本发明任意实施例所述的驱动电路，图6是本发明实施例提供的一种驱动电路的驱动方法的流程图，该驱动方法包括：
S610、信号输出模块通过N个输出端逐级输出栅极驱动信号至N条扫描线；
S620、当所述信号输出模块输出栅极驱动信号至第i-1条扫描线时，所述第i-1条扫描线通过第i条扫描线对应的开关模块的控制端将所述开关模块打开，其中，每个开关模块对应一条扫描线；
S630、所述开关模块将所述开关模块的第二连接端的所述驱动电路的第一电平信号通过第一连接端输送至第i条扫描线，其中，N为正整数，i为大于1，小于或等于N的正整数。
本发明实施例提供的驱动电路的驱动方法，在信号输出模块的基础上，为驱动电路增设了多个开关模块，每个开关模块对应一条扫描线，用于控制第一电平信号输出端与对应的扫描线的连接或断开，并且每个开关模块由上一条扫描线控制其打开或关断，则在信号输出模块输出栅极驱动信号至上一条扫描线，上一行TFT开启，使数据线为上一行像素充电时，当前开关模块被打开，使得当前扫描线获取第一电平信号，数据线为当前行像素充电。本发明实施例的驱动电路的驱动方法，在使某一行像素进行充电时，也使下一行像素进行充电，从而使得每行像素获取更长的充电时间，解决了显示面板的像素充电不足，从而造成显示面板对比不足与闪烁的问题。
在上述实施例的基础上，开关模块可以为薄膜晶体管。
可选的，开关模块为N型薄膜晶体管，栅极驱动信号的电压值大于N型薄膜晶体管的控制端的开启电压值，N型薄膜晶体管的控制端的开启电压值大于第一电平信号的电压值。
可选的，开关模块为N型金属-氧化物半导体场效应晶体管。
可选的，信号输出模块设置于栅极覆晶薄膜上，多个开关模块设置于阵列基板的非显示区域。
可选的，开关模块设置于扫描线的末端位置处的非显示区域，扫描线的首端与信号输出模块的对应的输出端电连接。
可选的，开关模块的个数和扫描线的条数相同，都为正整数N；
当信号输出模块扫描到最后一条扫描线时，最后一条扫描线通过第一条扫描线对应的第一个开关模块的控制端打开第一个开关模块，第一个开关模块将第二连接端的第一电平信号通过第一连接端输送至第一条扫描线，以使第一条扫描线能够进行预充电。
本发明实施例还提供了一种显示装置，图7是本发明实施例提供的一种显示装置的示意图。显示装置8包括本发明任意实施例提供的驱动电路9。
可选的，显示装置8为液晶显示装置或者有机发光二极管显示装置，或者为其他具有驱动电路9的显示装置。
本公开的实施例还提供另一种显示装置。该显示装置包括：多个显示单元，N条扫描线以及M条数据线。多个显示单元设置为N行M列的矩阵。每个显示单元包括第一薄膜晶体管，第一薄膜晶体管具有第一阈值电压。每条栅极线电连接N行中的对应一行的第一薄膜晶体管的栅极。每条数据线电连接M列中对应一列的第一薄膜晶体管的源极。
可选地，每个显示单元包括像素电极，该像素电极电连接第一薄膜晶体管的漏极。
该显示装置还包括：栅极驱动信号输出模块，第一电平信号线以及与所述N条扫描线一一对应的N个第二薄膜晶体管。
栅极驱动信号输出模块具有与所述N条扫描线一一对应的N个输出端，每个输出端与对应的扫描线连接，所述N个输出端依次向所述N条扫描线提供栅极驱动信号。
第一电平信号线设置为提供第一电平信号，所述第一电平信号小于所述第一阈值电压。
第二薄膜晶体管具有第二阈值电压。栅极驱动信号大于第一阈值电压和第二阈值电压。
第i个第二薄膜晶体管的栅极与第i-1条扫描线电连接，第i个第二薄膜晶体管的源极电连接所述第一电平信号线，第i个第二薄膜晶体管的漏极电连接第i条扫描线。其中，N和i均为正整数，1＜i≤N。
当栅极驱动信号输出模块向第i-1条扫描线输出栅极驱动信号时，第i条扫描线对应的第二薄膜晶体管导通，第一电平信号被提供给第i条扫描线。
可选地，所述第一薄膜晶体管和所述第二薄膜晶体管均为N型薄膜晶体管。
可选地，第一电平信号的电压值为栅极驱动信号的电压值的80％。
可选地，第一阈值电压和第二阈值电压相等。
可选地，所述多个第一薄膜晶体管设置在显示装置的显示区域，所述N个第二薄膜晶体管设置在显示装置的非显示区域。
可选地，该显示装置还包括栅极覆晶薄膜，所述栅极驱动信号输出模块设置在所述栅极覆晶薄膜上。
显示装置还可例如为LCD显示装置、OLED显示装置、QLED显示装置、曲面显示装置或其他显示装置。

Claims (20)

  1. 一种驱动电路，包括：
    信号输出模块，所述信号输出模块包括N个输出端，设置为逐级输出栅极驱动信号至N条扫描线；
    第一电平信号输出端；以及
    多个开关模块，每个所述开关模块对应一条扫描线，且第i个所述开关模块的控制端与第i-1条扫描线电连接，第一连接端与对应的第i条扫描线电连接，第二连接端与所述第一电平信号输出端电连接，
    其中，N为正整数，i为大于1，小于或等于N的正整数。
  2. 根据权利要求1所述的驱动电路，其中，所述开关模块为薄膜晶体管。
  3. 根据权利要求2所述的驱动电路，其中，所述开关模块为N型薄膜晶体管，所述栅极驱动信号的电压值大于所述N型薄膜晶体管的控制端的开启电压值，所述N型薄膜晶体管的控制端的开启电压值大于所述第一电平信号的电压值。
  4. 根据权利要求3所述的驱动电路，其中，所述开关模块为N型金属-氧化物半导体场效应晶体管。
  5. 根据权利要求1所述的驱动电路，其中，所述信号输出模块设置于栅极覆晶薄膜上，所述多个开关模块设置于阵列基板的非显示区域。
  6. 根据权利要求5所述的驱动电路，其中，所述扫描线的第一端与所述信号输出模块的对应的输出端电连接，所述开关模块设置于扫描线的第二端侧的非显示区域。
  7. 根据权利要求1所述的驱动电路，其中，所述开关模块的个数和所述扫描线的条数相同；
    第一个开关模块的第一连接端与对应的第一条扫描线电连接，控制端与最 后一条扫描线电连接，第二连接端与所述第一电平信号输出端电连接。
  8. 一种显示装置，包括：显示面板以及如权利要求1所述的驱动电路。
  9. 根据权利要求8所述的显示装置，其中，所述开关模块为薄膜晶体管。
  10. 根据权利要求9所述的显示装置，其中，所述开关模块为N型薄膜晶体管，所述栅极驱动信号的电压值大于所述N型薄膜晶体管的控制端的开启电压值，所述N型薄膜晶体管的控制端的开启电压值大于所述第一电平信号的电压值。
  11. 根据权利要求8所述的显示装置，其中，所述信号输出模块设置于栅极覆晶薄膜上，所述多个开关模块设置于阵列基板的非显示区域。
  12. 一种驱动方法，用于驱动权利要求1所述的驱动电路，包括：
    信号输出模块通过N个输出端逐级输出栅极驱动信号至N条扫描线，
    其中，当所述信号输出模块输出栅极驱动信号至第i-1条扫描线时，所述第i-1条扫描线使第i条扫描线对应的开关模块导通，第一电平信号通过开关模块提供到第i条扫描线，其中，N为正整数，i为大于1，小于或等于N的正整数。
  13. 根据权利要求12所述的驱动电路的驱动方法，其中，所述开关模块为薄膜晶体管。
  14. 根据权利要求12所述的驱动电路的驱动方法，所述第一电平信号小于所述栅极驱动信号。
  15. 一种显示装置，包括：
    N条扫描线，每条扫描线连接多个第一薄膜晶体管，所述第一薄膜晶体管具有第一阈值电压；
    栅极驱动信号输出模块，具有与所述N条扫描线一一对应的N个输出端，每个输出端与对应的扫描线连接，所述N个输出端依次向所述N条扫描线提供 栅极驱动信号；
    第一电平信号线，设置为提供第一电平信号，所述第一电平信号小于所述第一阈值电压；
    与所述N条扫描线一一对应的N个第二薄膜晶体管，所述第二薄膜晶体管具有第二阈值电压；
    其中，第i个第二薄膜晶体管的栅极与第i-1条扫描线电连接，第i个第二薄膜晶体管的源极电连接所述第一电平信号线，第i个第二薄膜晶体管的漏极电连接对应的扫描线，N和i均为正整数，1＜i≤N，
    栅极驱动信号大于第一阈值电压和第二阈值电压。
  16. 根据权利要求15所述的显示装置，其中，所述第一薄膜晶体管和所述第二薄膜晶体管均为N型薄膜晶体管。
  17. 根据权利要求15所述的显示装置，其中，第一电平信号的电压值为栅极驱动信号的电压值的80％。
  18. 根据权利要求15所述的显示装置，其中，第一阈值电压和第二阈值电压相等。
  19. 根据权利要求15所述的显示装置，其中，所述多个第一薄膜晶体管设置在显示装置的显示区域，所述N个第二薄膜晶体管设置在显示装置的非显示区域。
  20. 根据权利要求15所述的显示装置，还包括栅极覆晶薄膜，所述栅极驱动信号输出模块设置在所述栅极覆晶薄膜上。
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