WO2018205171A1

WO2018205171A1 - Radio frequency circuit switch chip, radio frequency circuit, antenna device, and electronic device

Info

Publication number: WO2018205171A1
Application number: PCT/CN2017/083838
Authority: WO
Inventors: 丛明; 冯斌
Original assignee: 广东欧珀移动通信有限公司
Priority date: 2017-05-10
Filing date: 2017-05-10
Publication date: 2018-11-15
Also published as: CN110546906B; CN110546906A

Abstract

A radio frequency circuit switch chip. By means of a first combiner and a second combiner having different states of connection to a second switch and two output ports of a first switch, the present invention achieves carrier aggregation of high-frequency signals and medium-frequency signals, carrier aggregation of high-frequency signals and low-frequency signals, carrier aggregation of medium-frequency signals and low-frequency signals, or carrier aggregation of high-frequency signals, medium-frequency signals, and low-frequency signals. A radio frequency circuit, an antenna device, and an electronic device are also provided.

Description

RF circuit switch chip, RF circuit, antenna device and electronic device

Technical field

The present invention relates to the field of communications technologies, and in particular, to a radio frequency circuit switch chip, a radio frequency circuit, an antenna device, and an electronic device.

Background technique

With the development of communication technologies, more and more communication bands can be supported by mobile terminals. For example, LTE (Long Term The Evolution, Long Term Evolution communication signal may include signals having a frequency between 700 MHz and 2700 MHz.

The radio frequency signals that the mobile terminal can support can be divided into a low frequency signal, an intermediate frequency signal, and a high frequency signal. The low frequency signal, the intermediate frequency signal, and the high frequency signal each include a plurality of sub-band signals. Each sub-band signal needs to be transmitted to the outside through the antenna.

Thus, carrier aggregation (carrier) Aggregation, referred to as CA) technology. Through carrier aggregation, multiple sub-band signals can be aggregated together to improve the uplink and downlink transmission rates of the network.

At present, the frequency resources of various communication markets around the world are different. Communication operators in different regions have different communication spectrum allocations, so there are different carrier aggregation band combinations. However, the current carrier aggregation is capable of a single frequency band of aggregation, lacking diversity, and cannot meet the above requirements.

technical problem

The embodiment of the invention provides a radio frequency circuit switch chip, a radio frequency circuit, an antenna device and an electronic device, which can improve the diversity of carrier aggregation of the radio frequency signal by the electronic device.

Technical solution

In a first aspect, an embodiment of the present invention provides a radio frequency circuit switch chip, including a first switch, a second switch, a first combiner, and a second combiner, the first switch having a first output port and a second output a port, the first output port and the second output port can both output a high frequency signal or an intermediate frequency signal, and the second switch can output a low frequency signal;

When the first output port and the second output port respectively output a high frequency signal and an intermediate frequency signal, the first output port and the second output port can be connected to the first combiner to implement a high frequency signal and an intermediate frequency signal carrier. polymerization;

The first output port or the second output port can be connected to the second combiner, and the second switch turns on the second combiner to implement high frequency signal or intermediate frequency signal and low frequency signal carrier aggregation;

When the first output port and the second output port respectively output a high frequency signal and an intermediate frequency signal, the first output port and the second output port may be connected to the first combiner, the first combiner and the first The second switch turns on the second combiner to realize high frequency signal, intermediate frequency signal, and low frequency signal carrier aggregation.

In a second aspect, an embodiment of the present invention provides a radio frequency circuit, including a radio frequency transceiver, a radio frequency circuit switch chip, and an antenna, where the radio frequency transceiver, the radio frequency circuit switch chip, and the antenna are sequentially connected;

The RF circuit switch chip includes a first switch, a second switch, a first combiner and a second combiner, the first switch having a first output port and a second output port, the first output port and the second output The port can output a high frequency signal or an intermediate frequency signal, and the second switch can output a low frequency signal;

In a third aspect, an embodiment of the present invention provides an antenna apparatus, including the foregoing radio frequency circuit.

In a fourth aspect, an embodiment of the present invention provides an electronic device including a housing and a circuit board. The circuit board is mounted inside the housing. The circuit board is provided with a radio frequency circuit, and the radio frequency circuit is the radio frequency circuit.

Beneficial effect

DRAWINGS

FIG. 1 is an exploded perspective view of an electronic device according to an embodiment of the present invention.

FIG. 2 is a schematic structural diagram of an electronic device according to an embodiment of the present invention.

FIG. 3 is a schematic diagram of a first structure of a radio frequency circuit according to an embodiment of the present invention.

FIG. 4 is a schematic diagram of a second structure of a radio frequency circuit according to an embodiment of the present invention.

FIG. 5 is a third schematic structural diagram of a radio frequency circuit according to an embodiment of the present invention.

FIG. 6 is a schematic diagram of a fourth structure of a radio frequency circuit according to an embodiment of the present invention.

FIG. 7 is a first schematic structural diagram of a radio frequency circuit switch chip according to an embodiment of the present invention.

FIG. 8 is a schematic diagram of a second structure of a radio frequency circuit switch chip according to an embodiment of the present invention.

FIG. 9 is a third schematic structural diagram of a radio frequency circuit switch chip according to an embodiment of the present invention.

FIG. 10 is a fourth structural diagram of a radio frequency circuit switch chip according to an embodiment of the present invention.

FIG. 11 is a fifth structural diagram of a radio frequency circuit according to an embodiment of the present invention.

FIG. 12 is another schematic structural diagram of an electronic device according to an embodiment of the present invention.

BEST MODE FOR CARRYING OUT THE INVENTION

The technical solutions in the embodiments of the present invention will be clearly and completely described in the following with reference to the accompanying drawings. It is apparent that the described embodiments are only a part of the embodiments of the invention, and not all of the embodiments. All other embodiments obtained by a person skilled in the art based on the embodiments of the present invention without creative efforts are within the scope of the present invention.

In the description of the present invention, it is to be understood that the terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", " Orientations of "post", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", etc. The positional relationship is based on the orientation or positional relationship shown in the drawings, and is merely for the convenience of the description of the present invention and the simplified description, and is not intended to indicate or imply that the device or component referred to has a specific orientation, and is constructed and operated in a specific orientation. Therefore, it should not be construed as limiting the invention. Moreover, the terms "first" and "second" are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, features defining "first" or "second" may include one or more of the described features either explicitly or implicitly. In the description of the present invention, the meaning of "a plurality" is two or more unless specifically and specifically defined otherwise.

In the description of the present invention, it should be noted that the terms "installation", "connected", and "connected" are to be understood broadly, and may be fixed or detachable, for example, unless otherwise explicitly defined and defined. Connected, or integrally connected; may be mechanically connected, may be electrically connected or may communicate with each other; may be directly connected, or may be indirectly connected through an intermediate medium, may be internal communication of two elements or interaction of two elements relationship. For those skilled in the art, the specific meanings of the above terms in the present invention can be understood on a case-by-case basis.

In the present invention, the first feature "on" or "under" the second feature may include direct contact of the first and second features, and may also include first and second features, unless otherwise specifically defined and defined. It is not in direct contact but through additional features between them. Moreover, the first feature "above", "above" and "above" the second feature includes the first feature directly above and above the second feature, or merely indicating that the first feature level is higher than the second feature. The first feature "below", "below" and "below" the second feature includes the first feature directly below and below the second feature, or merely the first feature level being less than the second feature.

The following disclosure provides many different embodiments or examples for implementing different structures of the present invention. In order to simplify the disclosure of the present invention, the components and arrangements of the specific examples are described below. Of course, they are merely examples and are not intended to limit the invention. In addition, the present invention may be repeated with reference to the numerals and/or reference numerals in the various examples, which are for the purpose of simplicity and clarity, and do not indicate the relationship between the various embodiments and/or arrangements discussed. Moreover, the present invention provides examples of various specific processes and materials, but one of ordinary skill in the art will recognize the use of other processes and/or the use of other materials.

Embodiments of the present invention provide an electronic device. The electronic device can be a device such as a smartphone or a tablet. Referring to FIGS. 1 and 2, the electronic device 100 includes a cover 101, a display screen 102, a circuit board 103, a battery 104, and a housing 105.

The cover plate 101 is mounted to the display screen 102 to cover the display screen 102. The cover plate 101 may be a transparent glass cover. In some embodiments, the cover plate 101 can be a glass cover plate made of a material such as sapphire.

The display screen 102 is mounted on the housing 105 to form a display surface of the electronic device 100. The display screen 102 can include a display area 102A and a non-display area 102B. The display area 102A is for displaying information such as images, texts, and the like. The non-display area 102B does not display information. The bottom of the non-display area 102B may be provided with functional components such as a fingerprint module and a touch circuit.

The circuit board 103 is mounted inside the housing 105. The circuit board 103 can be a motherboard of the electronic device 100. Functional components such as a camera, a proximity sensor, and a processor can be integrated on the circuit board 103. At the same time, the display screen 102 can be electrically connected to the circuit board 103.

In some embodiments, the radio frequency (RF, Radio) is provided on the circuit board 103. Frequency) circuit. The radio frequency circuit can communicate with a network device (eg, a server, a base station, etc.) or other electronic device (eg, a smart phone, etc.) through a wireless network to complete transceiving information with the network device or other electronic device.

In some embodiments, as shown in FIG. 3, the radio frequency circuit 200 includes a radio frequency transceiver 21, a power amplifying unit 22, a filtering unit 23, a radio frequency circuit switching chip 24, and an antenna 25. The power amplifying unit 22, the filtering unit 23, the radio frequency circuit switching chip 24, and the antenna 25 are sequentially connected.

The radio frequency transceiver 21 has a transmit port TX and a receive port RX. The transmitting port TX is used to transmit a radio frequency signal (uplink signal), and the receiving port RX is used to receive a radio frequency signal (downlink signal). The transmitting port TX of the radio frequency transceiver 21 is connected to the power amplifying unit 22, and the receiving port RX is connected to the filtering unit 23.

The power amplifying unit 22 is configured to amplify the uplink signal transmitted by the radio frequency transceiver 21 and send the amplified uplink signal to the filtering unit 23.

The filtering unit 23 is configured to filter the uplink signal transmitted by the radio frequency transceiver 21 and send the filtered uplink signal to the antenna 25. The filtering unit 23 is further configured to filter the downlink signal received by the antenna 25, and send the filtered downlink signal to the radio frequency transceiver 21.

The RF circuit switch chip 24 is used to selectively turn on the communication band between the RF transceiver 21 and the antenna 25. The detailed structure and function of the RF circuit switch chip 24 will be described below.

The antenna 25 is configured to transmit an uplink signal sent by the radio frequency transceiver 21 to the outside, or receive a radio frequency signal from the outside, and send the received downlink signal to the radio frequency transceiver 21.

In some embodiments, as shown in FIG. 4, the radio frequency circuit 200 also includes a control circuit 26. The control circuit 26 is connected to the RF circuit switch chip 24. Control circuitry 26 may also be coupled to a processor in electronic device 100 to control the state of radio frequency circuit switch chip 24 in accordance with instructions from the processor.

In some embodiments, as shown in FIG. 5, the radio frequency transceiver 21 includes a high frequency port 21H, an intermediate frequency port 21M, and a low frequency port 21L. The high frequency port 21H, the intermediate frequency port 21M, and the low frequency port 21L may respectively include a plurality of radio frequency transmitting ports and a plurality of radio frequency receiving ports. The high frequency port 21H is used for transmitting and receiving high frequency radio frequency signals, the intermediate frequency port 21M is used for transmitting and receiving intermediate frequency radio frequency signals, and the low frequency port 21L is used for transmitting and receiving low frequency radio frequency signals.

It should be noted that the above-mentioned high frequency radio frequency signal, intermediate frequency radio frequency signal, and low frequency radio frequency signal are only relative concepts, and there is no absolute frequency range distinction.

For example, the radio frequency transceiver 21 includes nine radio frequency transmitting ports a1, a2, a3, a4, a5, a6, a7, a8, a9, and nine radio frequency receiving ports b1, b2, b3, b4, b5, b6, b7, B8, b9.

Among them, a1, a2, and a3 are high-frequency transmitting ports for transmitting high-frequency radio frequency signals (for example, radio frequency signals in bands such as band7, band40, and band41). B1, b2, and b3 are high frequency receiving ports for receiving high frequency RF signals. A4, a5, and a6 are intermediate frequency transmission ports for transmitting intermediate frequency radio frequency signals (for example, radio frequency signals in bands of band 1, band 2, and band 3). B4, b5, and b6 are intermediate frequency receiving ports for receiving intermediate frequency radio frequency signals. A7, a8, and a9 are low-frequency transmitting ports for transmitting low-frequency RF signals (for example, RF signals in bands such as band8, band12, and band20). B7, b8, and b9 are low frequency receiving ports for receiving low frequency RF signals.

It should be noted that the above embodiment only takes the high frequency port 21H, the intermediate frequency port 21M, and the low frequency port 21L of the radio frequency transceiver 21 as three radio frequency transmitting ports and three radio frequency receiving ports as an example for description. In some other embodiments, the high frequency port 21H, the intermediate frequency port 21M, and the low frequency port 21L may also include other numbers of radio frequency transmitting ports and radio frequency receiving ports, respectively. It suffices that the number of the radio frequency transmitting port and the radio frequency receiving port included in each of the high frequency port 21H, the intermediate frequency port 21M, and the low frequency port 21L is the same and greater than one.

The power amplifying unit 22 includes nine amplifiers 221, 222, 223, 224, 225, 226, 227, 228, 229. The amplifiers 221, 222, 223, 224, 225, 226, 227, 228, 229 are respectively connected to the radio frequency transmitting ports a1, a2, a3, a4, a5, a6, a7, a8, a9 of the radio frequency transceiver 21.

The filtering unit 23 includes nine duplexers 231, 232, 233, 234, 235, 236, 237, 238, 239. Among them, the duplexers 231, 232, 233, 234, 235, 236, 237, 238, 239 are connected to the amplifiers 221, 222, 223, 224, 225, 226, 227, 228, 229, respectively. And, the duplexers 231, 232, 233, 234, 235, 236, 237, 238, 239 are respectively connected to the radio frequency receiving ports b1, b2, b3, b4, b5, b6, b7, b8, b9 of the radio frequency transceiver 21. .

The input of the RF circuit switch chip 24 includes nine sub-input ports c1, c2, c3, c4, c5, c6, c7, c8, c9. The sub-input ports c1, c2, c3, c4, c5, c6, c7, c8, and c9 are connected to the duplexers 231, 232, 233, 234, 235, 236, 237, 238, and 239, respectively.

In some embodiments, as shown in FIG. 6, the filtering unit 23 includes a filter 231, a filter 232, and seven duplexers 233, 234, 235, 236, 237, 238, 239. The filter 231, the filter 232, and the seven duplexers 233, 234, 235, 236, 237, 238, and 239 are connected to the amplifiers 221, 222, 223, 224, 225, 226, 227, 228, and 229, respectively. Moreover, the filter 231, the filter 232, and the seven duplexers 233, 234, 235, 236, 237, 238, 239 and the radio frequency receiving ports b1, b2, b3, b4, b5, b6 of the radio frequency transceiver 21, respectively B7, b8, b9 are connected.

The input of the RF circuit switch chip 24 includes nine sub-input ports c1, c2, c3, c4, c5, c6, c7, c8, c9. The sub-input ports c1, c2, c3, c4, c5, c6, c7, c8, and c9 are respectively connected to the filter 231, the filter 232, and the seven duplexers 233, 234, 235, 236, 237, 238, and 239. connection.

It should be noted that the above embodiment is described by taking only the filter unit 23 including two filters and seven duplexers as an example. In other embodiments, filtering unit 23 may also include other numbers of filters and duplexers.

Long Term Evolution (Long Term Evolution, referred to as LTE) communication network, according to different duplex modes, LTE communication frequency band is divided into frequency division duplex (Frequency Division Duplex (FDD for short) and time division duplex (Time Division Duplex, referred to as TDD, is two types. In the communication frequency band in FDD mode, the uplink and downlink communication links use different frequencies. At this time, the duplexer needs to filter the uplink and downlink communication signals in the RF circuit. In the communication frequency band in TDD mode, the uplink and downlink communication links use the same frequency to transmit RF signals in different time slots. At this time, the RF circuit needs a filter to filter the uplink and downlink communication signals.

Therefore, in practical applications, the number of filters and the number of duplexers included in the filtering unit 23 depend on the duplex mode in which the radio frequency signals of the respective frequency bands transmitted by the radio frequency transceiver 21 are located. In the FDD mode, the RF transmit port and the RF receive port are connected to a duplexer; in the TDD mode, the RF transmit port and the RF receive port are connected to a filter. For example, the band1 and band2 bands work in the FDD mode, and the transmit port and the receive port of the band1 and band2 radio signals are connected to the duplexer; and the band40 and band41 bands operate in the TDD mode, and the transmit and receive ports of the band 40 and band41 radio frequency signals are transmitted. Connected to the filter.

Referring to FIG. 7, in some embodiments, the radio frequency circuit switch chip 24 includes a first switch 241, a second switch 242, and a combiner 243.

The first switch 241 is a double-pole multi-throw switch. The first switch 241 includes a first output port D1 and a second output port D2. The second switch 242 is a single-pole multi-throw switch. For example, the first switch 241 includes six sub-input ports c1, c2, c3, c4, c5, c6. The output ports D1 and D2 can be connected to any one of the c1, c2, c3, c4, c5, and c6 sub-input ports. The second switch 242 includes three sub-input ports c7, c8, c9. The output of the second switch 242 can be connected to any one of the c7, c8, c9 sub-input ports. The first output port D1 and the second output port D2 of the first switch 241 and the output of the second switch 242 are both connected to the input of the combiner 243.

The combiner 243 can be a three-frequency combiner. The output of combiner 243 is coupled to antenna 25.

It should be noted that the above connection relationship only indicates a direct connection between components, and does not mean that the components connected to each other are electrically connected.

In some embodiments, sub-input ports c1, c2, c3 can be coupled to high frequency ports in radio frequency transceiver 21, respectively. The sub-input ports c4, c5, c6 can be respectively connected to the intermediate frequency ports in the radio frequency transceiver 21. Sub-input ports c7, c8, c9 can be connected to the low frequency ports in the radio frequency transceiver 21, respectively.

When the first output port D1 of the switch 241 is turned on by any one of c1, c2, and c3, the second output port D2 of the switch 241 is turned on by any one of c4, c5, and c6, and when the switch 242 is turned off, the combiner 243 can realize carrier aggregation of high frequency signals and intermediate frequency signals.

When the first output port D1 of the switch 241 is turned on any one of c1, c2, c3, the second output port D2 of the switch 241 is turned off, and the switch 242 is turned on any one of c7, c8, c9, the combiner 243 can realize carrier aggregation of high frequency signals and low frequency signals.

When the first output port D1 of the switch 241 is turned off, the second output port D2 of the switch 241 is turned on by any one of c1, c2, and c3, and when the switch 242 is turned on by any one of c7, c8, and c9, the combiner 243 can also achieve carrier aggregation of high frequency signals and low frequency signals.

When the first output port D1 of the switch 241 is turned on by any one of c4, c5, and c6, the second output port D2 of the switch 241 is turned off, and the switch 242 is turned on by any one of c7, c8, and c9, the combiner 243 can realize carrier aggregation of intermediate frequency signals and low frequency signals.

When the first output port D1 of the switch 241 is turned off, the second output port D2 of the switch 241 is turned on by any one of c4, c5, and c6, and when the switch 242 is turned on by any one of c7, c8, and c9, the combiner 243 can also implement carrier aggregation of IF signals and low frequency signals.

When the first output port D1 of the switch 241 is turned on by any one of c1, c2, and c3, the second output port D2 of the switch 241 is turned on by any one of c4, c5, and c6, and the switch 242 is turned on by c7, c8, and c9. In any of the ways, the combiner 243 can implement carrier aggregation of the high frequency signal, the intermediate frequency signal, and the low frequency signal.

When the first output port D1 of the switch 241 is turned on by any one of c4, c5, and c6, the second output port D2 of the switch 241 is turned on by any one of c1, c2, and c3, and the switch 242 is turned on by c7, c8, and c9. In any of the ways, the combiner 243 can also implement carrier aggregation of the high frequency signal, the intermediate frequency signal, and the low frequency signal.

Referring to FIG. 8 , in some embodiments, the RF circuit switch chip 24 includes a first switch 241 , a second switch 242 , a switch assembly 245 , and a first combiner 243 , a second combiner 244 .

The first switch 241 is a double-pole multi-throw switch. The first switch 241 includes a first output port D1 and a second output port D2. The second switch 242 is a single-pole multi-throw switch. For example, the first switch 241 includes six sub-input ports c1, c2, c3, c4, c5, c6. The output ports D1 and D2 can be connected to any one of the c1, c2, c3, c4, c5, and c6 sub-input ports. The second switch 242 includes three sub-input ports c7, c8, c9. The output of the second switch 242 can be connected to any one of the c7, c8, c9 sub-input ports. The first output port D1 and the second output port D2 of the first switch 241 are connected to the switch assembly 245. The output of the second switch 242 is coupled to the first input of the combiner 244.

The switch assembly 245 has three input terminals P1, P2, P3 and three output terminals Q1, Q2, Q3. The input terminal P1 is connected to the first output port D1 of the switch 241. The input terminal P2 is connected to the second output port D2 of the switch 241. The input terminal P3 is connected to the output of the first combiner 243. The output terminal Q1 is connected to the first input of the combiner 243. The output terminal Q2 is connected to the second input terminal of the combiner 243. The output terminal Q3 is connected to the second input terminal of the second combiner 244.

The first combiner 243 and the second combiner 244 are both dual frequency combiners. The output of the second combiner 244 is connected to the antenna 25.

In some embodiments, the switch assembly 245 includes switches K1, K2, K3. Among them, the switches K1 and K2 are single-pole double-throw switches, and K3 is a single-pole single-throw switch.

The fixed end of the switch K1 is connected to the input P1 of the switch assembly 245. The gates of switch K1 are connected to the output terminals Q1, Q3 of switch assembly 245, respectively. The switch K1 can selectively turn on the input terminal P1 and the output terminal Q1 or Q3.

The fixed end of the switch K2 is connected to the input P2 of the switch assembly 245. The gates of switch K2 are coupled to outputs Q2, Q3 of switch assembly 245, respectively. The switch K2 can selectively turn on the input terminal P2 and the output terminal Q2 or Q3.

The input and output of switch K3 are coupled to input P3 and output Q3 of switch assembly 245, respectively. The switch K3 can turn on or off the input terminal P3 and the output terminal Q3.

In some embodiments, the sub-input ports c1, c2, c3 may be respectively connected to the high frequency port in the radio frequency transceiver 21, and the sub input ports c4, c5, c6 may be respectively connected to the intermediate frequency port in the radio frequency transceiver 21, Input ports c7, c8, c9 can be respectively connected to the low frequency ports in the radio frequency transceiver 21.

When the first output port D1 of the switch 241 is turned on any one of c1, c2, c3, the switch K1 turns on P1 and Q1, and the second output port D2 of the switch 241 turns on any one of c4, c5, c6, the switch When K2 turns on P2 and Q2, combiner 243 can realize carrier aggregation of high frequency signal and intermediate frequency signal.

Further, when the switch K3 turns on P3 and Q3, and the switch 242 turns on any one of c7, c8, and c9, the combiner 244 can realize carrier aggregation of the high frequency signal, the intermediate frequency signal, and the low frequency signal.

When the first output port D1 of the switch 241 is turned on, any one of c1, c2, c3 is turned on, the switch K1 is turned on P1 and Q3, the second output port D2 of the switch 241 is turned off, and the switch 242 is turned on in c7, c8, c9. At any of the ways, combiner 244 can implement carrier aggregation of high frequency signals and low frequency signals.

When the first output port D1 of the switch 241 is turned off, the second output port D2 of the switch 241 is turned on by any one of c4, c5, and c6, the switch K2 is turned on for P2 and Q3, and the switch 242 is turned on for c7, c8, and c9. When any one of the ways, the combiner 244 can implement carrier aggregation of the intermediate frequency signal and the low frequency signal.

For example, the sub-input port c1 can be connected to the HF band 40 transmit port in the RF transceiver 21, the sub-input port c4 can be connected to the IF band 3 transmit port in the RF transceiver 21, and the sub-input port c7 can be transceived with the RF The low frequency band band 12 in the 21 is connected to the transmit port.

When the first output port D1 of the switch 241 is turned on c1, the switch K1 is turned on P1 and Q1, the second output port D2 of the switch 241 is turned on c4, and the switch K2 is turned on to P2 and Q2, the combiner 243 can implement band40 and Carrier aggregation of band3.

Further, when the switch K3 turns on P3 and Q3, and the switch 242 turns on c7, the combiner 244 can implement carrier aggregation of band 40, band 3, and band 12.

When the first output port D1 of the switch 241 is turned on c1, the switch K1 is turned on P1 and Q3, the second output port D2 of the switch 241 is turned off, and the switch 242 is turned on c7, the combiner 244 can implement the carrier of band 40 and band12 polymerization.

When the first output port D1 of the switch 241 is turned off, the second output port D2 of the switch 241 is turned on c4, the switch K2 is turned on P2 and Q3, the switch 242 is turned on c7, and the combiner 244 can implement carrier aggregation of band3 and band12. .

Referring to FIG. 9 , in some embodiments, the RF circuit switch chip 24 includes a first switch 241 , a second switch 242 , a switch assembly 245 , and a first combiner 243 , a second combiner 244 .

In some embodiments, the first switch 241 and the second switch 242 may be packaged to form the first chip 246.

In some embodiments, the switch assembly 245 includes switches K1, K2, K3. Among them, the switches K1 and K2 are single-pole single-throw switches, and K3 is a single-pole three-throw switch.

The input and output of switch K1 are coupled to input P1 and output Q1 of switch assembly 245, respectively. The switch K1 can turn on or off the input terminal P1 and the output terminal Q1.

The input and output of switch K2 are coupled to input P2 and output Q2 of switch assembly 245, respectively. The switch K2 can turn on or off the input terminal P2 and the output terminal Q2.

The fixed end of the switch K3 is connected to the output terminal Q3 of the switch assembly 245. The three strobe terminals of the switch K3 are respectively connected to the input terminal P1, the input terminal P2, and the input terminal P3 of the switch assembly 245. The switch K3 can selectively turn on the input terminal P1, the input terminal P2 or the input terminal P3 and the output terminal Q3.

When the first output port D1 of the switch 241 is turned on any one of c1, c2, c3, the switch K3 turns on P1 and Q3, the second output port D2 of the switch 241 is turned off, and the switch 242 is turned on in c7, c8, c9. At any of the ways, combiner 244 can implement carrier aggregation of high frequency signals and low frequency signals.

When the first output port D1 of the switch 241 is turned off, the second output port D2 of the switch 241 is turned on by any one of c4, c5, and c6, the switch K3 is turned on for P2 and Q3, and the switch 242 is turned on for c7, c8, and c9. When any one of the ways, the combiner 244 can implement carrier aggregation of the intermediate frequency signal and the low frequency signal.

Referring to FIG. 10, in some embodiments, the radio frequency circuit switch chip 24 includes a first switch 241, a second switch 242, a switch assembly 245, and a first combiner 243, a second combiner 244.

In some embodiments, the first switch 241, the second switch 242, and the switch assembly 245 can be packaged to form the second chip 247.

In some embodiments, the switch assembly 245 includes switches K1, K2, K3, K4, K5. Among them, the switches K1, K2, K3, K4, and K5 are single-pole single-throw switches.

The input and output of switch K3 are coupled to input P2 and output Q3 of switch assembly 245, respectively. The switch K3 can turn on or off the input terminal P2 and the output terminal Q3.

The input and output of switch K4 are coupled to input P1 and output Q3 of switch assembly 245, respectively. The switch K4 can turn on or off the input terminal P1 and the output terminal Q3.

The input and output of switch K5 are coupled to input P3 and output Q3 of switch assembly 245, respectively. The switch K5 can turn on or off the input terminal P3 and the output terminal Q3.

Further, when the switch K5 turns on P3 and Q3, and the switch 242 turns on any one of c7, c8, and c9, the combiner 244 can realize carrier aggregation of the high frequency signal, the intermediate frequency signal, and the low frequency signal.

When the first output port D1 of the switch 241 is turned on any one of c1, c2, c3, the switch K4 turns on P1 and Q3, the second output port D2 of the switch 241 is turned off, and the switch 242 is turned on in c7, c8, c9. At any of the ways, combiner 244 can implement carrier aggregation of high frequency signals and low frequency signals.

Referring to FIG. 11, FIG. 11 is a schematic structural diagram of a radio frequency circuit 200. The radio frequency transceiver 21 includes nine radio frequency transmitting ports a1, a2, a3, a4, a5, a6, a7, a8, a9, and nine radio frequency receiving ports b1, b2, b3, b4, b5, b6, b7, B8, b9.

It should be noted that the foregoing embodiment only takes the high frequency port, the intermediate frequency port, and the low frequency port of the radio frequency transceiver 21 as three radio frequency transmitting ports and three radio frequency receiving ports as an example for description. In some other embodiments, the high frequency port, the intermediate frequency port, and the low frequency port may also include other numbers of radio frequency transmitting ports and radio frequency receiving ports, respectively. It only needs to satisfy the same number of radio frequency transmitting ports and radio frequency receiving ports included in the high frequency port, the intermediate frequency port, and the low frequency port, and is greater than one.

The RF circuit switch chip 24 includes a first switch 241, a second switch 242, a switch assembly 245, and a first combiner 243 and a second combiner 244.

The first output port D1 of the first switch 241 and the second output port D2 of the first switch 241 are connected to the switch component 245. The output of the second switch 242 is coupled to the first input of the second combiner 244.

The first switch 241 is a double-pole multi-throw switch. The first switch 241 includes a first output port D1 and a second output port D2. The second switch 242 is a single-pole multi-throw switch. For example, the first switch 241 includes six sub-input ports c1, c2, c3, c4, c5, c6. The output ports D1 and D2 can be connected to any one of the c1, c2, c3, c4, c5, and c6 sub-input ports. The second switch 242 includes three sub-input ports c7, c8, c9. The output of the second switch 242 can be connected to any one of the c7, c8, c9 sub-input ports. The sub-input ports c1, c2, c3, c4, c5, c6, c7, c8, and c9 are connected to the duplexers 231, 232, 233, 234, 235, 236, 237, 238, and 239, respectively.

In the embodiment of the present invention, the radio frequency circuit switch chip 24 can control the high frequency port and the intermediate frequency port of the radio frequency transceiver 21 to be connected to the first combiner 243 to realize high frequency signal and intermediate frequency signal carrier aggregation; and the radio frequency transceiver 21 can be controlled. The high frequency port and the intermediate frequency port are connected to the first combiner 243, and the first combiner 243 and the low frequency port of the radio frequency transceiver 21 are connected to the second combiner 244 to implement a high frequency signal, an intermediate frequency signal, and a low frequency. The carrier aggregation of the signal; the high frequency port and the low frequency port of the radio frequency transceiver 21 can be controlled to be connected to the second combiner 244 to implement high frequency signal and low frequency signal carrier aggregation; and the intermediate frequency port and the low frequency of the radio frequency transceiver 21 can be controlled. The port turns on the second combiner 244 to implement carrier aggregation of the intermediate frequency signal and the low frequency signal. The radio frequency circuit switch chip 24 can control the radio frequency signals of different frequency bands for carrier aggregation, thereby improving the diversity of carrier aggregation of the radio frequency signals by the electronic device 100.

Continue to refer to Figures 1 and 2. Among them, the battery 104 is mounted inside the casing 105. Battery 104 is used to provide electrical energy to electronic device 100.

The housing 105 is used to form an outer contour of the electronic device 100. The material of the casing 105 may be plastic or metal. The housing 105 can be integrally formed.

Referring to FIG. 12, FIG. 12 is another schematic structural diagram of an electronic device 100 according to an embodiment of the present invention. The electronic device 100 includes an antenna device 10, a memory 20, a display unit 30, a power source 40, and a processor 50. Those skilled in the art can appreciate that the structure of the electronic device 100 shown in FIG. 12 does not constitute a limitation on the electronic device 100. Electronic device 100 may include more or fewer components than illustrated, or some components in combination, or different component arrangements.

The antenna device 10 includes the radio frequency circuit 200 described in any of the above embodiments. The antenna device 10 can communicate with a network device (eg, a server) or other electronic device (eg, a smart phone) over a wireless network to perform transceiving of information with a network device or other electronic device.

Memory 20 can be used to store applications and data. The application stored in the memory 20 contains executable program code. Applications can form various functional modules. The processor 50 executes various functional applications and data processing by running an application stored in the memory 20.

The display unit 30 can be used to display information input by the user to the electronic device 100 or information provided to the user and various graphical user interfaces of the electronic device 100. These graphical user interfaces can be composed of graphics, text, icons, video, and any combination thereof. The display unit 30 may include a display panel.

The power source 40 is used to power various components of the electronic device 100. In some embodiments, the power source 40 can be logically coupled to the processor 50 through a power management system to enable functions such as managing charging, discharging, and power management through the power management system.

The processor 50 is a control center of the electronic device 100. The processor 50 connects various parts of the entire electronic device 100 using various interfaces and lines, performs various functions of the electronic device 100 by running or executing an application stored in the memory 20, and calling data stored in the memory 20. The data is processed to perform overall monitoring of the electronic device 100.

In addition, the electronic device 100 may further include a camera module, a Bluetooth module, and the like, and details are not described herein again.

The radio frequency circuit switch chip, the radio frequency circuit, the antenna device and the electronic device provided by the embodiments of the present invention are described in detail. The principles and implementation manners of the present invention are described in the specific examples. The description of the above embodiments is only used. To help understand the invention. In the meantime, the present invention is not limited by the scope of the present invention.

Claims

A radio frequency circuit switch chip, wherein the radio frequency circuit switch chip comprises a first switch, a second switch, a first combiner and a second combiner, the first switch having a first output port and a second output a port, the first output port and the second output port may each output a high frequency signal or an intermediate frequency signal, and the second switch may output a low frequency signal;

When the first output port and the second output port respectively output a high frequency signal and an intermediate frequency signal, the first output port and the second output port may be connected to the first combiner to implement a high frequency signal and IF signal carrier aggregation;

The first output port or the second output port may turn on the second combiner, and the second switch turns on the second combiner to implement high frequency signal or intermediate frequency signal and low frequency signal carrier aggregation ;

When the first output port and the second output port respectively output a high frequency signal and an intermediate frequency signal, the first output port and the second output port may be connected to the first combiner, the first combined circuit And the second switch turns on the second combiner to implement high frequency signal, intermediate frequency signal, and low frequency signal carrier aggregation.
The RF circuit switch chip of claim 1 wherein:

The first output port and the second output port of the first switch are connected to the input end of the first combiner and the input end of the second combiner;

The second switch is coupled to an input of the second combiner;

An output of the first combiner is coupled to an input of the second combiner.
The radio frequency circuit switch chip of claim 2, wherein the first switch and the second switch package form a first chip.
The radio frequency circuit switch chip of claim 2, further comprising a switch component respectively coupled to the first output port and the second output port of the first switch and the input of the first combiner The end is connected to the output end and the input end of the second combiner.
The radio frequency circuit switch chip according to claim 4, wherein the first input port, the second input port, and the third input port of the switch component are respectively connected to the first output port of the first switch and the first switch a second output port, the output end of the first combiner is connected, and the first output port, the second output port, and the third output port of the switch component are respectively connected to the first input port of the first combiner The second input port of the first combiner and the input end of the second combiner are connected.
The RF circuit switch chip of claim 5 wherein:

The first input port of the switch component can selectively turn on the first output port or the third output port of the switch component;

The second input port of the switch component can selectively turn on the second output port or the third output port of the switch component;

A third input port of the switch assembly selectively turns on a third output port of the switch assembly.
The radio frequency circuit switch chip according to claim 6, wherein the switch assembly comprises a first single pole double throw switch, a second single pole double throw switch, and a single pole single throw switch;

a fixed end of the first single pole double throw switch is connected to a first input port of the switch assembly, a gate end of the first single pole double throw switch and a first output port and a third output of the switch assembly respectively Port connection

a fixed end of the second single pole double throw switch is connected to a second input port of the switch assembly, and a gate end of the second single pole double throw switch is respectively connected to a second output port and a third output of the switch assembly Port connection

An input end and an output end of the single-pole single-throw switch are respectively connected to a third input port and a third output port of the switch assembly.
The RF circuit switch chip of claim 6 wherein said switch assembly comprises a first single pole single throw switch, a second single pole single throw switch, and a single pole triple throw switch;

The input end and the output end of the first single-pole single-throw switch are respectively connected to the first input port and the first output port of the switch assembly;

The input end and the output end of the second single-pole single-throw switch are respectively connected to the second input port and the second output port of the switch assembly;

a fixed end of the single-pole three-throw switch is connected to a third output port of the switch assembly, and a gate end of the single-pole three-throw switch is respectively connected with a first input port, a second input port, and a third of the switch assembly Input port connection.
The radio frequency circuit switch chip of claim 6 wherein said switch assembly comprises five single pole single throw switches, wherein:

An input end and an output end of the first single-pole single-throw switch are respectively connected to the first input port and the first output port of the switch assembly;

An input end and an output end of the second single-pole single-throw switch are respectively connected to the second input port and the second output port of the switch assembly;

The input end and the output end of the third single-pole single-throw switch are respectively connected to the second input port and the third output port of the switch assembly;

An input end and an output end of the fourth single-pole single-throw switch are respectively connected to the first input port and the third output port of the switch assembly;

An input end and an output end of the fifth single-pole single-throw switch are respectively connected to the third input port and the third output port of the switch assembly.
The radio frequency circuit switch chip of claim 4, wherein the first switch, the second switch, and the switch component package form a second chip.
The radio frequency circuit switch chip according to claim 1, wherein the first combiner and the second combiner are both dual frequency combiners.
A radio frequency circuit, wherein the radio frequency circuit comprises a radio frequency transceiver, a radio frequency circuit switch chip and an antenna, and the radio frequency transceiver, the radio frequency circuit switch chip and the antenna are sequentially connected;

The radio frequency circuit switch chip includes a first switch, a second switch, a first combiner and a second combiner, the first switch having a first output port and a second output port, the first output port and The second output port can output a high frequency signal or an intermediate frequency signal, and the second switch can output a low frequency signal;

When the first output port and the second output port respectively output a high frequency signal and an intermediate frequency signal, the first output port and the second output port may be connected to the first combiner to implement a high frequency signal and IF signal carrier aggregation;

The first output port or the second output port may turn on the second combiner, and the second switch turns on the second combiner to implement high frequency signal or intermediate frequency signal and low frequency signal carrier aggregation ;

When the first output port and the second output port respectively output a high frequency signal and an intermediate frequency signal, the first output port and the second output port may be connected to the first combiner, the first combined circuit And the second switch turns on the second combiner to implement high frequency signal, intermediate frequency signal, and low frequency signal carrier aggregation.
The radio frequency circuit of claim 12 wherein:

The first output port and the second output port of the first switch are connected to the input end of the first combiner and the input end of the second combiner;

The second switch is coupled to an input of the second combiner;

An output of the first combiner is coupled to an input of the second combiner.
The radio frequency circuit according to claim 13, wherein the radio frequency transceiver comprises a high frequency port, an intermediate frequency port and a low frequency port, wherein the high frequency port and the intermediate frequency port are both connected to an input end of the first switch, A low frequency port is coupled to the input of the second switch.
The radio frequency circuit of claim 14 wherein:

The high frequency port includes a sub-transmitting port of N1 different frequency bands and a sub-receiving port of N1 different frequency bands, and the input end of the first switch includes N1 high-frequency sub-input ports, the N1 sub-transmitting ports and the N1 high frequency sub-input ports are connected one by one, and the N1 sub-receiving ports are connected to the N1 high-frequency sub-input ports one by one;

The intermediate frequency port includes N2 different sub-bands of different frequency bands and N2 different sub-bands of different frequency bands, and the input end of the first switch further includes N2 intermediate frequency sub-input ports, the N2 sub-transmitting ports and the N2 The intermediate frequency sub-input ports are connected one by one, and the N2 sub-receiving ports are connected to the N2 intermediate frequency sub-input ports one by one;

The low frequency port includes a sub-transmitting port of N3 different frequency bands and a sub-receiving port of N3 different frequency bands, and the input end of the second switch includes N3 low frequency sub-input ports, the N3 sub-transmitting ports and the N3 The low frequency sub-input ports are connected one by one, and the N3 sub-receiving ports are connected to the N3 low-frequency sub-input ports one by one;

Among them, N1, N2, and N3 are all natural numbers greater than 1.
The radio frequency circuit according to claim 15, wherein each of the sub-transmitting ports of the high frequency port and each of the first switches correspond to a high frequency sub input port, and each of the intermediate frequency ports transmits A power amplifier is connected between each port of the low frequency port and each of the corresponding low frequency sub input ports of the first switch, and a corresponding one of the low frequency sub input ports of the first switch.
The radio frequency circuit according to claim 15, wherein each of the sub-transmitting ports of the high frequency port and each of the first switches correspond to a high frequency sub input port, and each of the intermediate frequency ports transmits A duplexer is connected between each port of the low frequency port and each of the corresponding low frequency sub input ports of the first switch, and each of the low frequency sub input ports of the first switch Or filter.
The radio frequency circuit of claim 12 wherein the output of said second combiner is coupled to said antenna.
An antenna device, wherein the antenna device comprises the radio frequency circuit of claim 12.
An electronic device, wherein the electronic device includes a housing and a circuit board, the circuit board is mounted inside the housing, the circuit board is provided with a radio frequency circuit, and the radio frequency circuit is according to claim 12. RF circuit.