CN110546906B - Radio frequency circuit switch chip, radio frequency circuit, antenna device and electronic equipment - Google Patents
Radio frequency circuit switch chip, radio frequency circuit, antenna device and electronic equipment Download PDFInfo
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- CN110546906B CN110546906B CN201780089417.1A CN201780089417A CN110546906B CN 110546906 B CN110546906 B CN 110546906B CN 201780089417 A CN201780089417 A CN 201780089417A CN 110546906 B CN110546906 B CN 110546906B
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- H04—ELECTRIC COMMUNICATION TECHNIQUE
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Abstract
A radio frequency circuit switch chip can realize carrier aggregation of high-frequency signals and intermediate-frequency signals, carrier aggregation of high-frequency signals and low-frequency signals, carrier aggregation of intermediate-frequency signals and low-frequency signals or carrier aggregation of high-frequency signals, intermediate-frequency signals and low-frequency signals through two output ports of a first switch and different connection states between a second switch and a first combiner and a second combiner. The invention also provides a radio frequency circuit, an antenna device and electronic equipment.
Description
Technical Field
The present invention relates to the field of communications technologies, and in particular, to a radio frequency circuit switch chip, a radio frequency circuit, an antenna device, and an electronic apparatus.
Background
With the development of communication technology, more and more communication frequency bands can be supported by the mobile terminal. For example, an LTE (Long Term Evolution) communication signal may include a signal having a frequency between 700MHz and 2700 MHz.
Radio frequency signals that can be supported by a mobile terminal can be divided into low frequency signals, intermediate frequency signals, and high frequency signals. The low-frequency signal, the intermediate-frequency signal and the high-frequency signal respectively comprise a plurality of sub-frequency band signals. Each sub-band signal needs to be transmitted to the outside world via an antenna.
Thus, a Carrier Aggregation (CA) technique has been produced. Through carrier aggregation, a plurality of sub-frequency band signals can be aggregated together to improve the uplink and downlink transmission rate of the network.
Currently, the frequency resources of the various communication markets around the world are different from each other. Communication operators in different regions have different communication spectrum allocations, so that different frequency band combination requirements of carrier aggregation exist. However, the frequency band for aggregation in the current carrier aggregation is single, and the diversity is lacking, so that the above requirements cannot be met.
Disclosure of the invention
Technical problem
The embodiment of the invention provides a radio frequency circuit switch chip, a radio frequency circuit, an antenna device and electronic equipment, which can improve the diversity of carrier aggregation of radio frequency signals by the electronic equipment.
Solution to the problem
Technical solution
In a first aspect, an embodiment of the present invention provides a radio frequency circuit switch chip, including a first switch, a second switch, a first combiner, and a second combiner, where the first switch has a first output port and a second output port, both of the first output port and the second output port may output a high-frequency signal or an intermediate-frequency signal, and the second switch may output a low-frequency signal;
when the first output port and the second output port respectively output a high-frequency signal and an intermediate-frequency signal, the first output port and the second output port can be connected with the first combiner to realize carrier aggregation of the high-frequency signal and the intermediate-frequency signal;
the first output port or the second output port can be connected with the second combiner, and the second switch is connected with the second combiner to realize carrier aggregation of high-frequency signals or intermediate-frequency signals and low-frequency signals;
when the first output port and the second output port respectively output a high-frequency signal and an intermediate-frequency signal, the first output port and the second output port can be connected with the first combiner, and the first combiner and the second switch are connected with the second combiner, so that carrier aggregation of the high-frequency signal, the intermediate-frequency signal and the low-frequency signal is realized.
In a second aspect, an embodiment of the present invention provides a radio frequency circuit, including a radio frequency transceiver, a radio frequency circuit switch chip, and an antenna, where the radio frequency transceiver, the radio frequency circuit switch chip, and the antenna are connected in sequence;
the radio frequency circuit switch chip comprises a first switch, a second switch, a first combiner and a second combiner, wherein the first switch is provided with a first output port and a second output port, the first output port and the second output port can both output high-frequency signals or medium-frequency signals, and the second switch can output low-frequency signals;
when the first output port and the second output port respectively output a high-frequency signal and an intermediate-frequency signal, the first output port and the second output port can be connected with the first combiner to realize carrier aggregation of the high-frequency signal and the intermediate-frequency signal;
the first output port or the second output port can be connected with the second combiner, and the second switch is connected with the second combiner to realize carrier aggregation of high-frequency signals or intermediate-frequency signals and low-frequency signals;
when the first output port and the second output port respectively output a high-frequency signal and an intermediate-frequency signal, the first output port and the second output port can be connected with the first combiner, and the first combiner and the second switch are connected with the second combiner, so that carrier aggregation of the high-frequency signal, the intermediate-frequency signal and the low-frequency signal is realized.
In a third aspect, an embodiment of the present invention provides an antenna apparatus, including the radio frequency circuit.
In a fourth aspect, an embodiment of the present invention provides an electronic device, which includes a housing and a circuit board, where the circuit board is installed inside the housing, and a radio frequency circuit is disposed on the circuit board, where the radio frequency circuit is the radio frequency circuit.
Advantageous effects of the invention
Advantageous effects
The embodiment of the invention provides a radio frequency circuit switch chip, a radio frequency circuit, an antenna device and electronic equipment, which can improve the diversity of carrier aggregation of radio frequency signals by the electronic equipment.
Brief description of the drawings
Drawings
Fig. 1 is an exploded schematic view of an electronic device according to an embodiment of the present invention.
Fig. 2 is a schematic structural diagram of an electronic device according to an embodiment of the present invention.
Fig. 3 is a schematic diagram of a first structure of a radio frequency circuit according to an embodiment of the present invention.
Fig. 4 is a schematic diagram of a second structure of the rf circuit according to the embodiment of the present invention.
Fig. 5 is a schematic diagram of a third structure of the rf circuit according to the embodiment of the present invention.
Fig. 6 is a schematic diagram of a fourth structure of the rf circuit according to the embodiment of the present invention.
Fig. 7 is a schematic diagram of a first structure of a rf circuit switch chip according to an embodiment of the present invention.
Fig. 8 is a schematic diagram of a second structure of the rf circuit switch chip according to the embodiment of the present invention.
Fig. 9 is a schematic diagram of a third structure of a rf circuit switch chip according to an embodiment of the present invention.
Fig. 10 is a schematic diagram of a fourth structure of the rf circuit switch chip according to the embodiment of the present invention.
Fig. 11 is a schematic diagram of a fifth structure of the rf circuit according to the embodiment of the present invention.
Fig. 12 is another schematic structural diagram of an electronic device according to an embodiment of the present invention.
Best mode for carrying out the invention
Best mode for carrying out the invention
The technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the description of the present invention, it is to be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", and the like, indicate orientations and positional relationships based on those shown in the drawings, and are used only for convenience of description and simplicity of description, and do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be considered as limiting the present invention. Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, features defined as "first", "second", may explicitly or implicitly include one or more of the described features. In the description of the present invention, "a plurality" means two or more unless specifically defined otherwise.
In the description of the present invention, it should be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; may be mechanically connected, may be electrically connected or may be in communication with each other; either directly or indirectly through intervening media, either internally or in any other relationship. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.
In the present invention, unless otherwise expressly stated or limited, "above" or "below" a first feature means that the first and second features are in direct contact, or that the first and second features are not in direct contact but are in contact with each other via another feature therebetween. Also, the first feature being "on," "above" and "over" the second feature includes the first feature being directly on and obliquely above the second feature, or merely indicating that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature includes the first feature being directly under and obliquely below the second feature, or simply meaning that the first feature is at a lesser elevation than the second feature.
The following disclosure provides many different embodiments or examples for implementing different features of the invention. To simplify the disclosure of the present invention, the components and arrangements of specific examples are described below. Of course, they are merely examples and are not intended to limit the present invention. Furthermore, the present invention may repeat reference numerals and/or letters in the various examples, such repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. In addition, the present invention provides examples of various specific processes and materials, but one of ordinary skill in the art may recognize applications of other processes and/or uses of other materials.
The embodiment of the invention provides electronic equipment. The electronic device can be a smart phone, a tablet computer and the like. Referring to fig. 1 and2, the electronic device 100 includes a cover plate 101, a display screen 102, a circuit board 103, a battery 104, and a housing 105.
Wherein the cover plate 101 is mounted to the display screen 102 to cover the display screen 102. The cover plate 101 may be a transparent glass cover plate. In some embodiments, the cover plate 101 may be a glass cover plate made of a material such as sapphire.
The display screen 102 is mounted on the housing 105 to form a display surface of the electronic device 100. The display screen 102 may include a display area 102A and a non-display area 102B. The display area 102A is used to display information such as images and texts. The non-display area 102B does not display information. The bottom of the non-display area 102B may be provided with functional elements such as a fingerprint module, a touch circuit, and the like.
The circuit board 103 is mounted inside the housing 105. The circuit board 103 may be a motherboard of the electronic device 100. Functional components such as a camera, a proximity sensor, and a processor may be integrated on the circuit board 103. Meanwhile, the display screen 102 may be electrically connected to the circuit board 103.
In some embodiments, Radio Frequency (RF) circuitry is disposed on the circuit board 103. The radio frequency circuit can communicate with a network device (e.g., a server, a base station, etc.) or other electronic devices (e.g., a smart phone, etc.) through a wireless network to complete information transceiving with the network device or other electronic devices.
In some embodiments, as shown in fig. 3, the rf circuit 200 includes an rf transceiver 21, a power amplifying unit 22, a filtering unit 23, an rf circuit switch chip 24, and an antenna 25. The power amplifying unit 22, the filtering unit 23, the rf circuit switch chip 24, and the antenna 25 are connected in sequence.
The radio frequency transceiver 21 has a transmission port TX and a reception port RX. The transmission port TX is used for transmitting radio frequency signals (uplink signals), and the reception port RX is used for receiving radio frequency signals (downlink signals). The transmission port TX of the radio frequency transceiver 21 is connected to the power amplification unit 22, and the reception port RX is connected to the filtering unit 23.
The power amplifying unit 22 is configured to amplify the uplink signal transmitted by the radio frequency transceiver 21, and send the amplified uplink signal to the filtering unit 23.
The filtering unit 23 is configured to filter the uplink signal transmitted by the radio frequency transceiver 21, and send the filtered uplink signal to the antenna 25. The filtering unit 23 is further configured to filter the downlink signal received by the antenna 25 and send the filtered downlink signal to the radio frequency transceiver 21.
The rf circuit switch chip 24 is used to selectively switch on the communication band between the rf transceiver 21 and the antenna 25. The detailed structure and function of the rf circuit switch chip 24 will be described below.
The antenna 25 is used for transmitting the uplink signal transmitted by the radio frequency transceiver 21 to the outside, or receiving a radio frequency signal from the outside, and transmitting the received downlink signal to the radio frequency transceiver 21.
In some embodiments, as shown in fig. 4, rf circuit 200 also includes control circuit 26. The control circuit 26 is connected to the rf circuit switch chip 24. The control circuit 26 may also be connected to a processor in the electronic device 100 to control the state of the rf circuit switch chip 24 according to instructions from the processor.
In some embodiments, as shown in fig. 5, the radio frequency transceiver 21 includes a high frequency port 21H, an intermediate frequency port 21M, and a low frequency port 21L. The high frequency port 21H, the intermediate frequency port 21M, and the low frequency port 21L may respectively include a plurality of rf transmitting ports and a plurality of rf receiving ports. The high-frequency port 21H is used for transceiving high-frequency radio frequency signals, the intermediate-frequency port 21M is used for transceiving intermediate-frequency radio frequency signals, and the low-frequency port 21L is used for transceiving low-frequency radio frequency signals.
It should be noted that the high frequency rf signal, the intermediate frequency rf signal, and the low frequency rf signal are only relative concepts, and are not absolute frequency range differentiation.
For example, the radio frequency transceiver 21 includes 9 radio frequency transmission ports a1, a2, a3, a4, a5, a6, a7, a8, a9, and 9 radio frequency reception ports b1, b2, b3, b4, b5, b6, b7, b8, b 9.
Wherein, a1, a2 and a3 are high-frequency transmitting ports for transmitting high-frequency radio frequency signals (for example, radio frequency signals of band7, band40, band41 and other frequency bands). b1, b2 and b3 are high frequency receiving ports for receiving high frequency radio frequency signals. a4, a5 and a6 are intermediate frequency transmitting ports, and are used for transmitting intermediate frequency radio frequency signals (for example, radio frequency signals of band1, band2, band3 and other frequency bands). b4, b5 and b6 are intermediate frequency receiving ports for receiving intermediate frequency radio frequency signals. a7, a8 and a9 are low-frequency transmitting ports for transmitting low-frequency radio frequency signals (for example, radio frequency signals in band8, band12, band20 and other frequency bands). b7, b8, b9 are low frequency receiving ports for receiving low frequency radio frequency signals.
It should be noted that, in the above embodiment, only the high-frequency port 21H, the intermediate-frequency port 21M, and the low-frequency port 21L of the radio frequency transceiver 21 respectively include 3 radio frequency transmitting ports and3 radio frequency receiving ports are taken as an example for description. In other embodiments, the high frequency port 21H, the intermediate frequency port 21M, and the low frequency port 21L may further include other numbers of rf transmitting ports and rf receiving ports, respectively. It is only necessary to satisfy that the number of the radio frequency transmitting ports and the number of the radio frequency receiving ports included in the high frequency port 21H, the intermediate frequency port 21M, and the low frequency port 21L are the same and greater than 1.
The power amplification unit 22 includes 9 amplifiers 221, 222, 223, 224, 225, 226, 227, 228, 229. The amplifiers 221, 222, 223, 224, 225, 226, 227, 228, 229 are respectively connected to the rf transmitting ports a1, a2, a3, a4, a5, a6, a7, a8, a9 of the rf transceiver 21.
The filtering unit 23 includes 9 duplexers 231, 232, 233, 234, 235, 236, 237, 238, 239. The duplexers 231, 232, 233, 234, 235, 236, 237, 238, and 239 are respectively connected to the amplifiers 221, 222, 223, 224, 225, 226, 227, 228, and 229. The duplexers 231, 232, 233, 234, 235, 236, 237, 238, and 239 are respectively connected to rf receiving ports b1, b2, b3, b4, b5, b6, b7, b8, and b9 of the rf transceiver 21.
The input end of the radio frequency circuit switch chip 24 comprises 9 sub-input ports c1, c2, c3, c4, c5, c6, c7, c8 and c 9. The sub-input ports c1, c2, c3, c4, c5, c6, c7, c8 and c9 are respectively connected to the duplexers 231, 232, 233, 234, 235, 236, 237, 238 and 239.
In some embodiments, as shown in fig. 6, the filtering unit 23 includes a filter 231, a filter 232, and7 duplexers 233, 234, 235, 236, 237, 238, 239. The filter 231, the filter 232, and the 7 duplexers 233, 234, 235, 236, 237, 238, and 239 are connected to the amplifiers 221, 222, 223, 224, 225, 226, 227, 228, and 229, respectively. The filter 231, the filter 232, and the 7 duplexers 233, 234, 235, 236, 237, 238, and 239 are respectively connected to rf receiving ports b1, b2, b3, b4, b5, b6, b7, b8, and b9 of the rf transceiver 21.
The input end of the radio frequency circuit switch chip 24 comprises 9 sub-input ports c1, c2, c3, c4, c5, c6, c7, c8 and c 9. The sub-input ports c1, c2, c3, c4, c5, c6, c7, c8 and c9 are respectively connected to the filter 231, the filter 232 and the 7 duplexers 233, 234, 235, 236, 237, 238 and 239.
It should be noted that the above embodiment only exemplifies that the filtering unit 23 includes 2 filters and7 duplexers. In other embodiments, the filtering unit 23 may further include other numbers of filters and duplexers.
In a Long Term Evolution (LTE) communication network, according to different Duplex modes, the LTE communication Frequency band is divided into two types, Frequency Division Duplex (FDD) and Time Division Duplex (TDD). In the communication frequency band in the FDD mode, the uplink and downlink communication links use different frequencies, and at this time, the rf circuit needs a duplexer to filter the uplink and downlink communication signals. In the communication frequency band in the TDD mode, the uplink and downlink communication links use the same frequency and transmit radio frequency signals in different time slots, and at this time, a filter is required in the radio frequency circuit to filter the uplink and downlink communication signals.
Therefore, in practical applications, the number of filters and the number of duplexers included in the filtering unit 23 depend on the duplex mode of the radio frequency signals of each frequency band transmitted by the radio frequency transceiver 21. In the frequency band of the FDD mode, a duplexer is connected with a radio frequency transmitting port and a radio frequency receiving port; in the frequency band of the TDD mode, a radio frequency transmitting port and a radio frequency receiving port are connected with a filter. For example, the band1 and the band2 frequency bands operate in an FDD mode, and the transmitting ports and the receiving ports of the band1 and the band2 radio frequency signals are connected with duplexers; and the band40 and the band41 frequency bands work in a TDD mode, and the transmitting ports and the receiving ports of the band40 and the band41 radio frequency signals are connected with filters.
Referring to fig. 7, in some embodiments, the radio frequency circuit switch chip 24 includes a first switch 241, a second switch 242, and a combiner 243.
The first switch 241 is a double-pole multi-throw switch. The first switch 241 includes a first output port D1 and a second output port D2. The second switch 242 is a single-pole, multi-throw switch. For example, the first switch 241 includes 6 sub-input ports c1, c2, c3, c4, c5, c 6. The output ports D1 and D2 can be connected to any one of the sub-input ports c1, c2, c3, c4, c5 and c 6. The second switch 242 includes 3 sub-input ports c7, c8, c 9. The output terminal of the second switch 242 may be connected to any one of the sub-input ports c7, c8, c 9. The first and second output ports D1 and D2 of the first switch 241 and the output terminal of the second switch 242 are connected to the input terminal of the combiner 243.
The combiner 243 may be a triple-band combiner. The output of the combiner 243 is connected to the antenna 25.
The above connection relation merely represents direct connection between the components, and does not represent that the components connected to each other are electrically connected to each other.
In some embodiments, the sub-input ports c1, c2, c3 may be connected with high frequency ports in the radio frequency transceiver 21, respectively. The sub-input ports c4, c5, c6 may be connected with intermediate frequency ports in the radio frequency transceiver 21, respectively. The sub-input ports c7, c8, c9 may be connected with low frequency ports in the radio frequency transceiver 21, respectively.
When the first output port D1 of the switch 241 is turned on any one of c1, c2 and c3, the second output port D2 of the switch 241 is turned on any one of c4, c5 and c6, and the switch 242 is turned off, the combiner 243 may implement carrier aggregation of the high frequency signal and the intermediate frequency signal.
When the first output port D1 of the switch 241 is turned on any one of c1, c2 and c3, the second output port D2 of the switch 241 is turned off, and the switch 242 is turned on any one of c7, c8 and c9, the combiner 243 may implement carrier aggregation of the high frequency signal and the low frequency signal.
When the first output port D1 of the switch 241 is turned off, the second output port D2 of the switch 241 is turned on any one of c1, c2 and c3, and the switch 242 is turned on any one of c7, c8 and c9, the combiner 243 may also implement carrier aggregation of the high-frequency signal and the low-frequency signal.
When the first output port D1 of the switch 241 is turned on any one of c4, c5 and c6, the second output port D2 of the switch 241 is turned off, and the switch 242 is turned on any one of c7, c8 and c9, the combiner 243 may implement carrier aggregation of the intermediate frequency signal and the low frequency signal.
When the first output port D1 of the switch 241 is turned off, the second output port D2 of the switch 241 is turned on any one of c4, c5, and c6, and the switch 242 is turned on any one of c7, c8, and c9, the combiner 243 may also implement carrier aggregation of the intermediate frequency signal and the low frequency signal.
When the first output port D1 of the switch 241 is turned on any one of c1, c2 and c3, the second output port D2 of the switch 241 is turned on any one of c4, c5 and c6, and the switch 242 is turned on any one of c7, c8 and c9, the combiner 243 can realize carrier aggregation of the high-frequency signal, the intermediate-frequency signal and the low-frequency signal.
When the first output port D1 of the switch 241 is turned on any one of c4, c5 and c6, the second output port D2 of the switch 241 is turned on any one of c1, c2 and c3, and the switch 242 is turned on any one of c7, c8 and c9, the combiner 243 may also implement carrier aggregation of the high frequency signal, the intermediate frequency signal and the low frequency signal.
Referring to fig. 8, in some embodiments, the radio frequency circuit switch chip 24 includes a first switch 241, a second switch 242, a switch assembly 245, and first and second combiners 243 and 244.
The first switch 241 is a double-pole multi-throw switch. The first switch 241 includes a first output port D1 and a second output port D2. The second switch 242 is a single-pole, multi-throw switch. For example, the first switch 241 includes 6 sub-input ports c1, c2, c3, c4, c5, c 6. The output ports D1 and D2 can be connected to any one of the sub-input ports c1, c2, c3, c4, c5 and c 6. The second switch 242 includes 3 sub-input ports c7, c8, c 9. The output terminal of the second switch 242 may be connected to any one of the sub-input ports c7, c8, c 9. The first output port D1 and the second output port D2 of the first switch 241 are connected to the switch assembly 245. An output of the second switch 242 is connected to a first input of a combiner 244.
The switching element 245 has 3 inputs P1, P2, P3 and3 outputs Q1, Q2, Q3. The input terminal P1 is connected to the first output port D1 of the switch 241. The input terminal P2 is connected to the second output port D2 of the switch 241. The input terminal P3 is connected to the output terminal of the first combiner 243. The output Q1 is connected to a first input of the combiner 243. The output Q2 is connected to a second input of the combiner 243. The output Q3 is connected to a second input of the second combiner 244.
The first combiner 243 and the second combiner 244 are dual-frequency combiners. The output of the second combiner 244 is connected to the antenna 25.
In some embodiments, the switch assembly 245 includes switches K1, K2, K3. Wherein, the switches K1 and K2 are single-pole double-throw switches, and K3 is a single-pole single-throw switch.
The fixed end of the switch K1 is connected to the input terminal P1 of the switch assembly 245. The gate terminals of the switch K1 are connected to the output terminals Q1, Q3 of the switching element 245, respectively. The switch K1 can selectively connect the input terminal P1 with the output terminals Q1 or Q3.
The fixed end of the switch K2 is connected to the input terminal P2 of the switch assembly 245. The gate terminals of the switch K2 are connected to the output terminals Q2, Q3 of the switching element 245, respectively. The switch K2 can selectively connect the input terminal P2 with the output terminals Q2 or Q3.
The input and output of the switch K3 are connected to the input P3 and the output Q3, respectively, of the switching component 245. The switch K3 can turn on or off the input terminal P3 and the output terminal Q3.
In some embodiments, the sub-input ports c1, c2, c3 may be connected to high frequency ports in the radio frequency transceiver 21, the sub-input ports c4, c5, c6 may be connected to intermediate frequency ports in the radio frequency transceiver 21, and the sub-input ports c7, c8, c9 may be connected to low frequency ports in the radio frequency transceiver 21, respectively.
When the first output port D1 of the switch 241 is turned on any one of c1, c2 and c3, the switch K1 is turned on P1 and Q1, the second output port D2 of the switch 241 is turned on any one of c4, c5 and c6, and the switch K2 is turned on P2 and Q2, the combiner 243 may implement carrier aggregation between the high frequency signal and the intermediate frequency signal.
Further, when the switch K3 turns on the P3 and the Q3, and the switch 242 turns on any one of the c7, c8, and c9, the combiner 244 may implement carrier aggregation of a high frequency signal, an intermediate frequency signal, and a low frequency signal.
When the first output port D1 of the switch 241 is turned on any one of c1, c2 and c3, the switch K1 is turned on P1 and Q3, the second output port D2 of the switch 241 is turned off, and the switch 242 is turned on any one of c7, c8 and c9, the combiner 244 may implement carrier aggregation of the high frequency signal and the low frequency signal.
When the first output port D1 of the switch 241 is turned off, the second output port D2 of the switch 241 is turned on any one of c4, c5, and c6, the switch K2 is turned on P2 and Q3, and the switch 242 is turned on any one of c7, c8, and c9, the combiner 244 may implement carrier aggregation of the intermediate frequency signal and the low frequency signal.
For example, the sub-input port c1 may be connected to a high-frequency band40 transmission port in the radio frequency transceiver 21, the sub-input port c4 may be connected to a medium-frequency band3 transmission port in the radio frequency transceiver 21, and the sub-input port c7 may be connected to a low-frequency band12 transmission port in the radio frequency transceiver 21.
When the first output port D1 of the switch 241 turns on c1, the switch K1 turns on P1 and Q1, the second output port D2 of the switch 241 turns on c4, and the switch K2 turns on P2 and Q2, the combiner 243 may implement carrier aggregation of the band40 and the band 3.
Further, when the switch K3 turns on P3 and Q3, and the switch 242 turns on c7, the combiner 244 may implement carrier aggregation for band40, band3, and band 12.
When the first output port D1 of the switch 241 is turned on c1, the switch K1 is turned on P1 and Q3, the second output port D2 of the switch 241 is turned off, and the switch 242 is turned on c7, the combiner 244 may implement carrier aggregation of the band40 and the band 12.
When the first output port D1 of the switch 241 is turned off, the second output port D2 of the switch 241 is turned on c4, the switch K2 is turned on P2 and Q3, the switch 242 is turned on c7, and the combiner 244 may implement carrier aggregation of the band3 and the band 12.
Referring to fig. 9, in some embodiments, the radio frequency circuit switch chip 24 includes a first switch 241, a second switch 242, a switch assembly 245, and first and second combiners 243 and 244.
The first switch 241 is a double-pole multi-throw switch. The first switch 241 includes a first output port D1 and a second output port D2. The second switch 242 is a single-pole, multi-throw switch. For example, the first switch 241 includes 6 sub-input ports c1, c2, c3, c4, c5, c 6. The output ports D1 and D2 can be connected to any one of the sub-input ports c1, c2, c3, c4, c5 and c 6. The second switch 242 includes 3 sub-input ports c7, c8, c 9. The output terminal of the second switch 242 may be connected to any one of the sub-input ports c7, c8, c 9. The first output port D1 and the second output port D2 of the first switch 241 are connected to the switch assembly 245. An output of the second switch 242 is connected to a first input of a combiner 244.
In some embodiments, the first switch 241 and the second switch 242 may be packaged to form a first chip 246.
The switching element 245 has 3 inputs P1, P2, P3 and3 outputs Q1, Q2, Q3. The input terminal P1 is connected to the first output port D1 of the switch 241. The input terminal P2 is connected to the second output port D2 of the switch 241. The input terminal P3 is connected to the output terminal of the first combiner 243. The output Q1 is connected to a first input of the combiner 243. The output Q2 is connected to a second input of the combiner 243. The output Q3 is connected to a second input of the second combiner 244.
The first combiner 243 and the second combiner 244 are dual-frequency combiners. The output of the second combiner 244 is connected to the antenna 25.
In some embodiments, the switch assembly 245 includes switches K1, K2, K3. Wherein, the switches K1 and K2 are single-pole single-throw switches, and K3 is a single-pole three-throw switch.
The input and output of the switch K1 are connected to the input P1 and the output Q1, respectively, of the switching component 245. The switch K1 can turn on or off the input terminal P1 and the output terminal Q1.
The input and output of the switch K2 are connected to the input P2 and the output Q2, respectively, of the switching component 245. The switch K2 can turn on or off the input terminal P2 and the output terminal Q2.
The fixed end of the switch K3 is connected to the output Q3 of the switch assembly 245. Three gating terminals of the switch K3 are connected to the input terminal P1, the input terminal P2, and the input terminal P3 of the switch module 245, respectively. The switch K3 can selectively connect the input terminal P1, the input terminal P2 or the input terminal P3 and the output terminal Q3.
In some embodiments, the sub-input ports c1, c2, c3 may be connected to high frequency ports in the radio frequency transceiver 21, the sub-input ports c4, c5, c6 may be connected to intermediate frequency ports in the radio frequency transceiver 21, and the sub-input ports c7, c8, c9 may be connected to low frequency ports in the radio frequency transceiver 21, respectively.
When the first output port D1 of the switch 241 is turned on any one of c1, c2 and c3, the switch K1 is turned on P1 and Q1, the second output port D2 of the switch 241 is turned on any one of c4, c5 and c6, and the switch K2 is turned on P2 and Q2, the combiner 243 may implement carrier aggregation between the high frequency signal and the intermediate frequency signal.
Further, when the switch K3 turns on the P3 and the Q3, and the switch 242 turns on any one of the c7, c8, and c9, the combiner 244 may implement carrier aggregation of a high frequency signal, an intermediate frequency signal, and a low frequency signal.
When the first output port D1 of the switch 241 is turned on any one of c1, c2 and c3, the switch K3 is turned on P1 and Q3, the second output port D2 of the switch 241 is turned off, and the switch 242 is turned on any one of c7, c8 and c9, the combiner 244 may implement carrier aggregation of the high frequency signal and the low frequency signal.
When the first output port D1 of the switch 241 is turned off, the second output port D2 of the switch 241 is turned on any one of c4, c5, and c6, the switch K3 is turned on P2 and Q3, and the switch 242 is turned on any one of c7, c8, and c9, the combiner 244 may implement carrier aggregation of the intermediate frequency signal and the low frequency signal.
Referring to fig. 10, in some embodiments, the radio frequency circuit switch chip 24 includes a first switch 241, a second switch 242, a switch assembly 245, and first and second combiners 243 and 244.
The first switch 241 is a double-pole multi-throw switch. The first switch 241 includes a first output port D1 and a second output port D2. The second switch 242 is a single-pole, multi-throw switch. For example, the first switch 241 includes 6 sub-input ports c1, c2, c3, c4, c5, c 6. The output ports D1 and D2 can be connected to any one of the sub-input ports c1, c2, c3, c4, c5 and c 6. The second switch 242 includes 3 sub-input ports c7, c8, c 9. The output terminal of the second switch 242 may be connected to any one of the sub-input ports c7, c8, c 9. The first output port D1 and the second output port D2 of the first switch 241 are connected to the switch assembly 245. An output of the second switch 242 is connected to a first input of a combiner 244.
The switching element 245 has 3 inputs P1, P2, P3 and3 outputs Q1, Q2, Q3. The input terminal P1 is connected to the first output port D1 of the switch 241. The input terminal P2 is connected to the second output port D2 of the switch 241. The input terminal P3 is connected to the output terminal of the first combiner 243. The output Q1 is connected to a first input of the combiner 243. The output Q2 is connected to a second input of the combiner 243. The output Q3 is connected to a second input of the second combiner 244.
The first combiner 243 and the second combiner 244 are dual-frequency combiners. The output of the second combiner 244 is connected to the antenna 25.
In some embodiments, the first switch 241, the second switch 242, and the switch assembly 245 may be packaged to form a second chip 247.
In some embodiments, switch assembly 245 includes switches K1, K2, K3, K4, K5. Wherein, the switches K1, K2, K3, K4 and K5 are single-pole single-throw switches.
The input and output of the switch K1 are connected to the input P1 and the output Q1, respectively, of the switching component 245. The switch K1 can turn on or off the input terminal P1 and the output terminal Q1.
The input and output of the switch K2 are connected to the input P2 and the output Q2, respectively, of the switching component 245. The switch K2 can turn on or off the input terminal P2 and the output terminal Q2.
The input and output of the switch K3 are connected to the input P2 and the output Q3, respectively, of the switching component 245. The switch K3 can turn on or off the input terminal P2 and the output terminal Q3.
The input and output of the switch K4 are connected to the input P1 and the output Q3, respectively, of the switching component 245. The switch K4 can turn on or off the input terminal P1 and the output terminal Q3.
The input and output of the switch K5 are connected to the input P3 and the output Q3, respectively, of the switching component 245. The switch K5 can turn on or off the input terminal P3 and the output terminal Q3.
In some embodiments, the sub-input ports c1, c2, c3 may be connected to high frequency ports in the radio frequency transceiver 21, the sub-input ports c4, c5, c6 may be connected to intermediate frequency ports in the radio frequency transceiver 21, and the sub-input ports c7, c8, c9 may be connected to low frequency ports in the radio frequency transceiver 21, respectively.
When the first output port D1 of the switch 241 is turned on any one of c1, c2 and c3, the switch K1 is turned on P1 and Q1, the second output port D2 of the switch 241 is turned on any one of c4, c5 and c6, and the switch K2 is turned on P2 and Q2, the combiner 243 may implement carrier aggregation between the high frequency signal and the intermediate frequency signal.
Further, when the switch K5 turns on the P3 and the Q3, and the switch 242 turns on any one of the c7, c8, and c9, the combiner 244 may implement carrier aggregation of a high frequency signal, an intermediate frequency signal, and a low frequency signal.
When the first output port D1 of the switch 241 is turned on any one of c1, c2 and c3, the switch K4 is turned on P1 and Q3, the second output port D2 of the switch 241 is turned off, and the switch 242 is turned on any one of c7, c8 and c9, the combiner 244 may implement carrier aggregation of the high frequency signal and the low frequency signal.
When the first output port D1 of the switch 241 is turned off, the second output port D2 of the switch 241 is turned on any one of c4, c5, and c6, the switch K3 is turned on P2 and Q3, and the switch 242 is turned on any one of c7, c8, and c9, the combiner 244 may implement carrier aggregation of the intermediate frequency signal and the low frequency signal.
Referring to fig. 11, fig. 11 is a schematic structural diagram of the rf circuit 200. Wherein, the radio frequency transceiver 21 includes 9 radio frequency transmitting ports a1, a2, a3, a4, a5, a6, a7, a8, a9, and 9 radio frequency receiving ports b1, b2, b3, b4, b5, b6, b7, b8, b 9.
Wherein, a1, a2 and a3 are high-frequency transmitting ports for transmitting high-frequency radio frequency signals (for example, radio frequency signals of band7, band40, band41 and other frequency bands). b1, b2 and b3 are high frequency receiving ports for receiving high frequency radio frequency signals. a4, a5 and a6 are intermediate frequency transmitting ports, and are used for transmitting intermediate frequency radio frequency signals (for example, radio frequency signals of band1, band2, band3 and other frequency bands). b4, b5 and b6 are intermediate frequency receiving ports for receiving intermediate frequency radio frequency signals. a7, a8 and a9 are low-frequency transmitting ports for transmitting low-frequency radio frequency signals (for example, radio frequency signals in band8, band12, band20 and other frequency bands). b7, b8, b9 are low frequency receiving ports for receiving low frequency radio frequency signals.
It should be noted that, in the above embodiment, only the high frequency port, the intermediate frequency port, and the low frequency port of the radio frequency transceiver 21 respectively include 3 radio frequency transmitting ports and3 radio frequency receiving ports as an example for description. In other embodiments, the high frequency port, the intermediate frequency port, and the low frequency port may further include other numbers of rf transmitting ports and rf receiving ports, respectively. The number of the radio frequency transmitting ports and the number of the radio frequency receiving ports which are respectively included in the high-frequency port, the intermediate-frequency port and the low-frequency port are the same and are more than 1.
The power amplification unit 22 includes 9 amplifiers 221, 222, 223, 224, 225, 226, 227, 228, 229. The amplifiers 221, 222, 223, 224, 225, 226, 227, 228, 229 are respectively connected to the rf transmitting ports a1, a2, a3, a4, a5, a6, a7, a8, a9 of the rf transceiver 21.
The filtering unit 23 includes 9 duplexers 231, 232, 233, 234, 235, 236, 237, 238, 239. The duplexers 231, 232, 233, 234, 235, 236, 237, 238, and 239 are respectively connected to the amplifiers 221, 222, 223, 224, 225, 226, 227, 228, and 229. The duplexers 231, 232, 233, 234, 235, 236, 237, 238, and 239 are respectively connected to rf receiving ports b1, b2, b3, b4, b5, b6, b7, b8, and b9 of the rf transceiver 21.
The rf circuit switch chip 24 includes a first switch 241, a second switch 242, a switch component 245, and a first combiner 243 and a second combiner 244.
The first output port D1 of the first switch 241 and the second output port D2 of the first switch 241 are connected to the switch assembly 245. An output of the second switch 242 is connected to a first input of a second combiner 244.
The first switch 241 is a double-pole, multiple-throw switch. The first switch 241 includes a first output port D1 and a second output port D2. The second switch 242 is a single-pole, multi-throw switch. For example, the first switch 241 includes 6 sub-input ports c1, c2, c3, c4, c5, c 6. The output ports D1 and D2 can be connected to any one of the sub-input ports c1, c2, c3, c4, c5 and c 6. The second switch 242 includes 3 sub-input ports c7, c8, c 9. The output terminal of the second switch 242 may be connected to any one of the sub-input ports c7, c8, c 9. The sub-input ports c1, c2, c3, c4, c5, c6, c7, c8 and c9 are respectively connected to the duplexers 231, 232, 233, 234, 235, 236, 237, 238 and 239.
The switching element 245 has 3 inputs P1, P2, P3 and3 outputs Q1, Q2, Q3. The input terminal P1 is connected to the first output port D1 of the switch 241. The input terminal P2 is connected to the second output port D2 of the switch 241. The input terminal P3 is connected to the output terminal of the first combiner 243. The output Q1 is connected to a first input of the combiner 243. The output Q2 is connected to a second input of the combiner 243. The output Q3 is connected to a second input of the second combiner 244.
The first combiner 243 and the second combiner 244 are dual-frequency combiners. The output of the second combiner 244 is connected to the antenna 25.
In the embodiment of the present invention, the radio frequency circuit switch chip 24 may control the high frequency port and the intermediate frequency port of the radio frequency transceiver 21 to connect to the first combiner 243, so as to implement carrier aggregation of the high frequency signal and the intermediate frequency signal; the high-frequency port and the intermediate-frequency port of the radio frequency transceiver 21 may be controlled to be connected to the first combiner 243, and the low-frequency ports of the first combiner 243 and the radio frequency transceiver 21 are connected to the second combiner 244, so as to implement carrier aggregation of the high-frequency signal, the intermediate-frequency signal, and the low-frequency signal; the high-frequency port and the low-frequency port of the radio frequency transceiver 21 may also be controlled to be connected to the second combiner 244, so as to implement carrier aggregation of the high-frequency signal and the low-frequency signal; the intermediate frequency port and the low frequency port of the radio frequency transceiver 21 may be controlled to connect the second combiner 244, so as to implement carrier aggregation of the intermediate frequency signal and the low frequency signal. The rf circuit switch chip 24 can control rf signals of different frequency bands to perform carrier aggregation, so as to improve the diversity of carrier aggregation performed on the rf signals by the electronic device 100.
Continuing with reference to fig. 1 and 2. Wherein the battery 104 is mounted inside the housing 105. The battery 104 is used to provide power to the electronic device 100.
The housing 105 is used to form the outer contour of the electronic device 100. The material of the housing 105 may be plastic or metal. The housing 105 may be integrally formed.
Referring to fig. 12, fig. 12 is a schematic view of another structure of the electronic device 100 according to the embodiment of the present invention. The electronic device 100 includes an antenna apparatus 10, a memory 20, a display unit 30, a power supply 40, and a processor 50. Those skilled in the art will appreciate that the configuration of the electronic device 100 shown in fig. 12 does not constitute a limitation of the electronic device 100. Electronic device 100 may include more or fewer components than shown, or some components may be combined, or a different arrangement of components.
The antenna device 10 includes the rf circuit 200 described in any of the above embodiments. The antenna device 10 can communicate with a network device (e.g., a server) or other electronic devices (e.g., a smart phone) through a wireless network, and complete information transceiving with the network device or other electronic devices.
The memory 20 may be used to store applications and data. The memory 20 stores applications containing executable program code. The application programs may constitute various functional modules. The processor 50 executes various functional applications and data processing by running the application programs stored in the memory 20.
The display unit 30 may be used to display information input to the electronic apparatus 100 by a user or information provided to the user and various graphic user interfaces of the electronic apparatus 100. These graphical user interfaces may be made up of graphics, text, icons, video, and any combination thereof. The display unit 30 may include a display panel.
The power supply 40 is used to power the various components of the electronic device 100. In some embodiments, power supply 40 may be logically coupled to processor 50 through a power management system, such that functions to manage charging, discharging, and power consumption management are performed through the power management system.
The processor 50 is the control center of the electronic device 100. The processor 50 connects various parts of the entire electronic device 100 using various interfaces and lines, performs various functions of the electronic device 100 and processes data by running or executing an application program stored in the memory 20 and calling data stored in the memory 20, thereby monitoring the electronic device 100 as a whole.
In addition, the electronic device 100 may further include a camera module, a bluetooth module, and the like, which are not described herein again.
The radio frequency circuit switch chip, the radio frequency circuit, the antenna device and the electronic device provided by the embodiments of the present invention are described in detail above, and the principle and the implementation manner of the present invention are explained in this document by applying specific examples, and the description of the above embodiments is only used to help understanding of the present invention. Meanwhile, for those skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.
Claims (20)
1. A radio frequency circuit switch chip comprises a first switch, a second switch, a first combiner and a second combiner, wherein the first switch is provided with a first output port and a second output port, the first output port and the second output port can both output high-frequency signals or intermediate-frequency signals, and the second switch can output low-frequency signals;
when the first output port and the second output port respectively output a high-frequency signal and an intermediate-frequency signal, the first output port and the second output port can be connected with the first combiner to realize carrier aggregation of the high-frequency signal and the intermediate-frequency signal;
the first output port or the second output port can be connected with the second combiner and disconnected with the first combiner, and the second switch is connected with the second combiner so as to realize carrier aggregation of high-frequency signals or intermediate-frequency signals and low-frequency signals through the second combiner;
when the first output port and the second output port respectively output a high-frequency signal and an intermediate-frequency signal, the first output port and the second output port can be connected with the first combiner, and the first combiner and the second switch are connected with the second combiner, so that carrier aggregation of the high-frequency signal, the intermediate-frequency signal and the low-frequency signal is realized.
2. The radio frequency circuit switch chip of claim 1, wherein:
a first output port and a second output port of the first switch are connected with an input end of the first combiner and an input end of the second combiner;
the second switch is connected with the input end of the second combiner; and
and the output end of the first combiner is connected with the input end of the second combiner.
3. The radio frequency circuit switch chip of claim 2, wherein the first switch and the second switch package form a first chip.
4. The radio frequency circuit switch chip of claim 2, further comprising switch components connected to the first and second output ports of the first switch and the input and output terminals of the first and second combiners, respectively.
5. The radio frequency circuit switch chip according to claim 4, wherein the first input port, the second input port, and the third input port of the switch assembly are respectively connected to the first output port of the first switch, the second output port of the first switch, and the output terminal of the first combiner, and the first output port, the second output port, and the third output port of the switch assembly are respectively connected to the first input port of the first combiner, the second input port of the first combiner, and the input terminal of the second combiner.
6. The radio frequency circuit switch chip of claim 5, wherein:
the first input port of the switch assembly can be selectively connected with the first output port or the third output port of the switch assembly;
the second input port of the switch assembly can be selectively connected with the second output port or the third output port of the switch assembly;
the third input port of the switch assembly may selectively turn on the third output port of the switch assembly.
7. The radio frequency circuit switch chip of claim 6, wherein the switch assembly comprises a first single pole double throw switch, a second single pole double throw switch, and a single pole single throw switch;
the fixed end of the first single-pole double-throw switch is connected with a first input port of the switch assembly, and the gating end of the first single-pole double-throw switch is respectively connected with a first output port and a third output port of the switch assembly;
the fixed end of the second single-pole double-throw switch is connected with a second input port of the switch assembly, and the gating end of the second single-pole double-throw switch is respectively connected with a second output port and a third output port of the switch assembly;
and the input end and the output end of the single-pole single-throw switch are respectively connected with a third input port and a third output port of the switch assembly.
8. The radio frequency circuit switch chip of claim 6, wherein the switch assembly comprises a first single pole single throw switch, a second single pole single throw switch, and a single pole triple throw switch;
the input end and the output end of the first single-pole single-throw switch are respectively connected with a first input port and a first output port of the switch assembly;
the input end and the output end of the second single-pole single-throw switch are respectively connected with a second input port and a second output port of the switch assembly;
the fixed end of the single-pole three-throw switch is connected with the third output port of the switch assembly, and the gating end of the single-pole three-throw switch is respectively connected with the first input port, the second input port and the third input port of the switch assembly.
9. The radio frequency circuit switch chip of claim 6, wherein the switch assembly comprises five single pole, single throw switches, wherein:
the input end and the output end of the first single-pole single-throw switch are respectively connected with the first input port and the first output port of the switch assembly;
the input end and the output end of the second single-pole single-throw switch are respectively connected with a second input port and a second output port of the switch assembly;
the input end and the output end of the third single-pole single-throw switch are respectively connected with the second input port and the third output port of the switch assembly;
the input end and the output end of the fourth single-pole single-throw switch are respectively connected with the first input port and the third output port of the switch assembly;
and the input end and the output end of the fifth single-pole single-throw switch are respectively connected with the third input port and the third output port of the switch assembly.
10. The radio frequency circuit switch chip of claim 4, wherein the first switch, the second switch, and the switch component package form a second chip.
11. The radio frequency circuit switch chip of claim 1, wherein the first and second combiners are dual-frequency combiners.
12. A radio frequency circuit comprises a radio frequency transceiver, a radio frequency circuit switch chip and an antenna, wherein the radio frequency transceiver, the radio frequency circuit switch chip and the antenna are connected in sequence;
the radio frequency circuit switch chip comprises a first switch, a second switch, a first combiner and a second combiner, wherein the first switch is provided with a first output port and a second output port, the first output port and the second output port can both output high-frequency signals or medium-frequency signals, and the second switch can output low-frequency signals;
when the first output port and the second output port respectively output a high-frequency signal and an intermediate-frequency signal, the first output port and the second output port can be connected with the first combiner to realize carrier aggregation of the high-frequency signal and the intermediate-frequency signal;
the first output port or the second output port can be connected with the second combiner and disconnected with the first combiner, and the second switch is connected with the second combiner so as to realize carrier aggregation of high-frequency signals or intermediate-frequency signals and low-frequency signals through the second combiner;
when the first output port and the second output port respectively output a high-frequency signal and an intermediate-frequency signal, the first output port and the second output port can be connected with the first combiner, and the first combiner and the second switch are connected with the second combiner, so that carrier aggregation of the high-frequency signal, the intermediate-frequency signal and the low-frequency signal is realized.
13. The radio frequency circuit of claim 12, wherein:
a first output port and a second output port of the first switch are connected with an input end of the first combiner and an input end of the second combiner;
the second switch is connected with the input end of the second combiner; and
and the output end of the first combiner is connected with the input end of the second combiner.
14. The radio frequency circuit of claim 13, wherein the radio frequency transceiver includes a high frequency port, an intermediate frequency port, and a low frequency port, the high frequency port and the intermediate frequency port each connected to an input of the first switch, the low frequency port connected to an input of the second switch.
15. The radio frequency circuit of claim 14, wherein:
the high frequency port comprises N1Sub-transmitting ports of different frequency bands and N1A sub-receiving port with different frequency bands, the input end of the first switch comprises N1A high frequency sub-input port, N1Sub-transmitting ports and the N1The high-frequency sub input ports are connected one by one, and N is1Sub-receiving port and the N1The high-frequency sub input ports are connected one by one;
the intermediate frequency port comprises N2Sub-transmitting ports of different frequency bands and N2Sub-receiving ports of different frequency bands are provided,the input end of the first switch also comprises N2A middle frequency sub-input port, N2Sub-transmitting ports and the N2The intermediate frequency sub input ports are connected one by one, N2Sub-receiving port and the N2The intermediate frequency sub input ports are connected one by one;
the low frequency port comprises N3Sub-transmitting ports of different frequency bands and N3A sub-receiving port of different frequency bands, the input end of the second switch includes N3A low frequency sub-input port, N3Sub-transmitting ports and the N3The low frequency sub input ports are connected one by one, N3Sub-receiving port and the N3The low-frequency sub input ports are connected one by one;
wherein N is1、N2、N3Are all natural numbers greater than 1.
16. The radio frequency circuit of claim 15, wherein a power amplifier is connected between each sub-transmit port of the high frequency port and each corresponding high frequency sub-input port of the first switch, between each sub-transmit port of the intermediate frequency port and each corresponding intermediate frequency sub-input port of the first switch, and between each sub-transmit port of the low frequency port and each corresponding low frequency sub-input port of the first switch.
17. The radio frequency circuit of claim 15, wherein a diplexer or filter is connected between each sub-transmit port of the high frequency port and each corresponding high frequency sub-input port of the first switch, between each sub-transmit port of the intermediate frequency port and each corresponding intermediate frequency sub-input port of the first switch, and between each sub-transmit port of the low frequency port and each corresponding low frequency sub-input port of the first switch.
18. The radio frequency circuit of claim 12, wherein an output of the second combiner is connected to the antenna.
19. An antenna arrangement, wherein the antenna arrangement comprises the radio frequency circuit of claim 12.
20. An electronic device, wherein the electronic device comprises a housing and a circuit board, the circuit board is mounted inside the housing, and the circuit board is provided with a radio frequency circuit, and the radio frequency circuit is the radio frequency circuit of claim 12.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/CN2017/083838 WO2018205171A1 (en) | 2017-05-10 | 2017-05-10 | Radio frequency circuit switch chip, radio frequency circuit, antenna device, and electronic device |
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| CN110546906A CN110546906A (en) | 2019-12-06 |
| CN110546906B true CN110546906B (en) | 2022-04-01 |
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| CN112751578B (en) * | 2021-01-06 | 2023-05-05 | Oppo广东移动通信有限公司 | Radio frequency ELNA device and radio frequency system |
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| WO2018205171A1 (en) | 2018-11-15 |
| CN110546906A (en) | 2019-12-06 |
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