CN110546891B

CN110546891B - Radio frequency circuit switch chip, radio frequency circuit, antenna device and electronic equipment

Info

Publication number: CN110546891B
Application number: CN201780089455.7A
Authority: CN
Inventors: 丛明; 冯斌
Original assignee: Guangdong Oppo Mobile Telecommunications Corp Ltd
Current assignee: Guangdong Oppo Mobile Telecommunications Corp Ltd
Priority date: 2017-05-10
Filing date: 2017-05-10
Publication date: 2021-05-25
Anticipated expiration: 2037-05-10
Also published as: CN110546891A; WO2018205173A1

Abstract

A radio frequency circuit switch chip can divide a received signal into a high-frequency signal and an intermediate-frequency signal, a high-frequency signal and a low-frequency signal, an intermediate-frequency signal and a low-frequency signal, or a high-frequency signal, an intermediate-frequency signal and a low-frequency signal through different conduction states between a first switch and a second switch and between a first frequency divider and a second frequency divider. The invention also provides a radio frequency circuit, an antenna device and electronic equipment.

Description

Radio frequency circuit switch chip, radio frequency circuit, antenna device and electronic equipment

Technical Field

The present invention relates to the field of communications technologies, and in particular, to a radio frequency circuit switch chip, a radio frequency circuit, an antenna device, and an electronic apparatus.

Background

With the development of communication technology, more and more communication frequency bands can be supported by the mobile terminal. For example, an LTE (Long Term Evolution) communication signal may include a signal having a frequency between 700MHz and 2700 MHz.

Radio frequency signals that can be supported by a mobile terminal can be divided into low frequency signals, intermediate frequency signals, and high frequency signals. The low-frequency signal, the intermediate-frequency signal and the high-frequency signal respectively comprise a plurality of sub-frequency band signals. Each sub-band signal needs to be transmitted to the outside world via an antenna.

Thus, a Carrier Aggregation (CA) technique has been produced. Through carrier aggregation, a plurality of sub-frequency band signals can be aggregated together to improve the uplink and downlink transmission rate of the network.

Currently, the frequency resources of the various communication markets around the world are different from each other. Communication operators in different areas have different communication spectrum allocations, and different frequency band combination requirements of carrier aggregation exist. Correspondingly, when the terminal is in a carrier aggregation state, that is, receives radio frequency signals of different frequency band combinations, frequency division operation needs to be performed on the radio frequency signals to obtain the radio frequency signals of a specific frequency band. However, the current frequency division method is single, lacks diversity, and cannot meet the above requirements.

Disclosure of the invention

Technical problem

The embodiment of the invention provides a radio frequency circuit switch chip, a radio frequency circuit, an antenna device and electronic equipment, which can improve the diversity of frequency division of radio frequency signals by the electronic equipment.

Solution to the problem

Technical solution

In a first aspect, an embodiment of the present invention provides a radio frequency circuit switch chip, including a first switch, a second switch, a first frequency divider, and a second frequency divider, where the first switch is configured to receive a high frequency signal or an intermediate frequency signal, and the second switch is configured to receive a low frequency signal;

when the first input port and the second input port of the first switch are respectively used for receiving different signals, the first input port and the second input port of the first switch are selectively connected with the first frequency divider, and the first frequency divider divides the received signals into high-frequency signals and intermediate-frequency signals; when the first frequency divider and the second switch selectively switch on the second frequency divider, the first frequency divider and the second frequency divider divide the frequency of the received signal into a high-frequency signal, an intermediate-frequency signal and a low-frequency signal;

when the second input port of the first switch and the second switch selectively turn on the second frequency divider, the second frequency divider divides the received signal into an intermediate frequency signal and a low frequency signal or a high frequency signal and a low frequency signal.

In a second aspect, an embodiment of the present invention provides a radio frequency circuit, including a radio frequency transceiver, a radio frequency circuit switch chip, and an antenna, where the radio frequency transceiver, the radio frequency circuit switch chip, and the antenna are connected in sequence;

the radio frequency circuit switch chip comprises a first switch, a second switch, a first frequency divider and a second frequency divider, wherein a first input port and a second input port of the first switch are used for receiving high-frequency signals or intermediate-frequency signals, and the second switch is used for receiving low-frequency signals;

when the first input port and the second input port of the first switch are respectively used for receiving different signals, the first input port and the second input port of the first switch are selectively connected with the first frequency divider, and the first frequency divider divides the received signals into high-frequency signals and intermediate-frequency signals; when the first frequency divider and the second switch selectively switch on the second frequency divider, the first frequency divider and the second frequency divider divide the received signal into a high-frequency signal, an intermediate-frequency signal and a low-frequency signal;

when the second input port of the first switch and the second switch selectively turn on the second frequency divider, the second frequency divider divides the frequency of the received signal into an intermediate frequency signal and a low frequency signal or a high frequency signal and a low frequency signal.

In a third aspect, an embodiment of the present invention provides an antenna apparatus, including the radio frequency circuit.

In a fourth aspect, an embodiment of the present invention provides an electronic device, which includes a housing and a circuit board, where the circuit board is installed inside the housing, and a radio frequency circuit is disposed on the circuit board, where the radio frequency circuit is the radio frequency circuit.

Advantageous effects of the invention

Advantageous effects

Brief description of the drawings

Drawings

Fig. 1 is an exploded schematic view of an electronic device according to an embodiment of the present invention.

Fig. 2 is a schematic structural diagram of an electronic device according to an embodiment of the present invention.

Fig. 3 is a schematic diagram of a first structure of a radio frequency circuit according to an embodiment of the present invention.

Fig. 4 is a schematic diagram of a second structure of the rf circuit according to the embodiment of the present invention.

Fig. 5 is a schematic diagram of a third structure of the rf circuit according to the embodiment of the present invention.

Fig. 6 is a schematic diagram of a fourth structure of the rf circuit according to the embodiment of the present invention.

Fig. 7 is a schematic diagram of a fifth structure of the rf circuit according to the embodiment of the present invention.

Fig. 8 is a schematic diagram of a sixth structure of the rf circuit according to the embodiment of the present invention.

Fig. 9 is a schematic diagram of a seventh structure of the rf circuit according to the embodiment of the present invention.

Fig. 10 is a schematic diagram of an eighth structure of the rf circuit according to the embodiment of the present invention.

Fig. 11 is a schematic diagram of a ninth structure of the rf circuit according to the embodiment of the present invention.

Fig. 12 is a schematic diagram of a tenth structure of the rf circuit according to the embodiment of the present invention.

Fig. 13 is a schematic diagram of an eleventh structure of the rf circuit according to the embodiment of the present invention.

Fig. 14 is a schematic diagram of a twelfth structure of the rf circuit according to the embodiment of the present invention.

Fig. 15 is a schematic diagram of a first structure of a rf circuit switch chip according to an embodiment of the present invention.

Fig. 16 is a schematic diagram of a second structure of the rf circuit switch chip according to the embodiment of the present invention.

Fig. 17 is a schematic diagram of a third structure of a rf circuit switch chip according to an embodiment of the present invention.

Fig. 18 is a schematic diagram of a fourth structure of the rf circuit switch chip according to the embodiment of the present invention.

Fig. 19 is a schematic diagram of a thirteenth structure of the rf circuit according to the embodiment of the present invention.

Fig. 20 is another schematic structural diagram of an electronic device according to an embodiment of the present invention.

Best mode for carrying out the invention

The technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

In the description of the present invention, it is to be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", and the like, indicate orientations and positional relationships based on those shown in the drawings, and are used only for convenience of description and simplicity of description, and do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be considered as limiting the present invention. Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, features defined as "first", "second", may explicitly or implicitly include one or more of the described features. In the description of the present invention, "a plurality" means two or more unless specifically defined otherwise.

In the description of the present invention, it should be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; may be mechanically connected, may be electrically connected or may be in communication with each other; either directly or indirectly through intervening media, either internally or in any other relationship. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.

In the present invention, unless otherwise expressly stated or limited, "above" or "below" a first feature means that the first and second features are in direct contact, or that the first and second features are not in direct contact but are in contact with each other via another feature therebetween. Also, the first feature being "on," "above" and "over" the second feature includes the first feature being directly on and obliquely above the second feature, or merely indicating that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature includes the first feature being directly under and obliquely below the second feature, or simply meaning that the first feature is at a lesser elevation than the second feature.

The following disclosure provides many different embodiments or examples for implementing different features of the invention. To simplify the disclosure of the present invention, the components and arrangements of specific examples are described below. Of course, they are merely examples and are not intended to limit the present invention. Furthermore, the present invention may repeat reference numerals and/or letters in the various examples, such repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. In addition, the present invention provides examples of various specific processes and materials, but one of ordinary skill in the art may recognize applications of other processes and/or uses of other materials.

The embodiment of the invention provides electronic equipment. The electronic device can be a smart phone, a tablet computer and the like. Referring to fig. 1 and2, the electronic device 100 includes a cover plate 101, a display screen 102, a circuit board 103, a battery 104, and a housing 105.

Wherein the cover plate 101 is mounted to the display screen 102 to cover the display screen 102. The cover plate 101 may be a transparent glass cover plate. In some embodiments, the cover plate 101 may be a glass cover plate made of a material such as sapphire.

The display screen 102 is mounted on the housing 105 to form a display surface of the electronic device 100. The display screen 102 may include a display area 102A and a non-display area 102B. The display area 102A is used to display information such as images and texts. The non-display area 102B does not display information. The bottom of the non-display area 102B may be provided with functional elements such as a fingerprint module, a touch circuit, and the like.

The circuit board 103 is mounted inside the housing 105. The circuit board 103 may be a motherboard of the electronic device 100. Functional components such as a camera, a proximity sensor, and a processor may be integrated on the circuit board 103. Meanwhile, the display screen 102 may be electrically connected to the circuit board 103.

In some embodiments, Radio Frequency (RF) circuitry is disposed on the circuit board 103. The radio frequency circuit can communicate with a network device (e.g., a server, a base station, etc.) or other electronic devices (e.g., a smart phone, etc.) through a wireless network to complete information transceiving with the network device or other electronic devices.

In some embodiments, as shown in fig. 3, the rf circuit 200 includes an rf transceiver 21, a power amplifying unit 22, a filtering unit 23, an rf circuit switch chip 24, and an antenna 25. The power amplifying unit 22, the filtering unit 23, the rf circuit switch chip 24, and the antenna 25 are connected in sequence.

The radio frequency transceiver 21 has a transmission port TX and a reception port RX. The transmission port TX is used for transmitting radio frequency signals (uplink signals), and the reception port RX is used for receiving radio frequency signals (downlink signals). The transmission port TX of the radio frequency transceiver 21 is connected to the power amplification unit 22, and the reception port RX is connected to the filtering unit 23.

The power amplifying unit 22 is configured to amplify the uplink signal transmitted by the radio frequency transceiver 21, and send the amplified uplink signal to the filtering unit 23.

The filtering unit 23 is configured to filter the uplink signal transmitted by the radio frequency transceiver 21, and send the filtered uplink signal to the antenna 25. The filtering unit 23 is further configured to filter the downlink signal received by the antenna 25 and send the filtered downlink signal to the radio frequency transceiver 21.

The rf circuit switch chip 24 is used to selectively switch on the communication band between the rf transceiver 21 and the antenna 25. The detailed structure and function of the rf circuit switch chip 24 will be described below.

The antenna 25 is used for transmitting the uplink signal transmitted by the radio frequency transceiver 21 to the outside, or receiving a radio frequency signal from the outside, and transmitting the received downlink signal to the radio frequency transceiver 21.

In some embodiments, as shown in fig. 4, rf circuit 200 also includes control circuit 26. The control circuit 26 is connected to the rf circuit switch chip 24. The control circuit 26 may also be connected to a processor in the electronic device 100 to control the state of the rf circuit switch chip 24 according to instructions from the processor.

In some embodiments, as shown in fig. 5, the rf circuit 200 further includes a low noise amplification unit 27. A low-noise amplification unit 27 is connected between the receiving port RX of the radio frequency transceiver 21 and the filtering unit 23, and the low-noise amplification unit 27 is used for amplifying weak signals and reducing noise in downlink signals.

In some embodiments, as shown in fig. 6, rf circuit 200 also includes a Phase Shift unit 28. A phase shift unit 28 is connected between the filter unit 23 and the rf circuit switch chip 24. The phase shift unit 28 is used to adjust the phase of the signal amplitude of the upstream signal or the downstream signal.

In some embodiments, as shown in fig. 7, the rf circuit 200 further includes a low noise amplification unit 27 and a phase shift unit 28. Wherein, a low noise amplification unit 27 is connected between the receiving port RX of the radio frequency transceiver 21 and the filtering unit 23; the low-noise amplification unit 27 is used for amplifying weak signals and reducing noise in downlink signals. A phase translation unit 28 is connected between the filtering unit 23 and the radio frequency circuit switch chip 24; the phase shift unit 28 is used to adjust the phase of the signal amplitude of the upstream signal or the downstream signal.

In some embodiments, as shown in fig. 8, the radio frequency transceiver 21 includes a high frequency port 21H, an intermediate frequency port 21M, and a low frequency port 21L. The high frequency port 21H, the intermediate frequency port 21M, and the low frequency port 21L may respectively include a plurality of rf transmitting ports and a plurality of rf receiving ports. The high-frequency port 21H is used for transceiving high-frequency radio frequency signals, the intermediate-frequency port 21M is used for transceiving intermediate-frequency radio frequency signals, and the low-frequency port 21L is used for transceiving low-frequency radio frequency signals.

It should be noted that the high frequency rf signal, the intermediate frequency rf signal, and the low frequency rf signal are only relative concepts, and are not absolute frequency range differentiation. For example, the low frequency signal is 700-.

For example, the radio frequency transceiver 21 includes 9 radio frequency transmission ports a1, a2, a3, a4, a5, a6, a7, a8, a9, and 9 radio frequency reception ports b1, b2, b3, b4, b5, b6, b7, b8, b 9.

Wherein, a1, a2 and a3 are intermediate frequency transmitting ports for transmitting intermediate frequency radio frequency signals (for example, radio frequency signals in bands 1, bands 3, bands 34 or bands 39). b1, b2 and b3 are intermediate frequency receiving ports for receiving intermediate frequency radio frequency signals. a4, a5 and a6 are high-frequency transmitting ports for transmitting high-frequency radio-frequency signals (for example, radio-frequency signals in bands 7, bands 40, bands 41 and other frequency bands). b4, b5 and b6 are high frequency receiving ports for receiving high frequency radio frequency signals. a7, a8 and a9 are low-frequency transmitting ports for transmitting low-frequency radio frequency signals (for example, radio frequency signals in bands 8, bands 12, bands 20 or bands 26). b7, b8, b9 are low frequency receiving ports for receiving low frequency radio frequency signals.

It should be noted that, in the above embodiment, only the high-frequency port 21H, the intermediate-frequency port 21M, and the low-frequency port 21L of the radio frequency transceiver 21 respectively include 3 radio frequency transmitting ports and3 radio frequency receiving ports are taken as an example for description. In other embodiments, the high frequency port 21H, the intermediate frequency port 21M, and the low frequency port 21L may further include other numbers of rf transmitting ports and rf receiving ports, respectively. It is only necessary to satisfy that the number of the radio frequency transmitting ports and the number of the radio frequency receiving ports included in the high frequency port 21H, the intermediate frequency port 21M, and the low frequency port 21L are the same and greater than 1.

The power amplification unit 22 includes 9

amplifiers

221, 222, 223, 224, 225, 226, 227, 228, 229. The

amplifiers

221, 222, 223, 224, 225, 226, 227, 228, 229 are respectively connected to the rf transmitting ports a1, a2, a3, a4, a5, a6, a7, a8, a9 of the rf transceiver 21.

The filtering unit 23 includes 9

duplexers

231, 232, 233, 234, 235, 236, 237, 238, 239. The

duplexers

231, 232, 233, 234, 235, 236, 237, 238, and 239 are respectively connected to the

amplifiers

221, 222, 223, 224, 225, 226, 227, 228, and 229. The

duplexers

231, 232, 233, 234, 235, 236, 237, 238, and 239 are respectively connected to rf receiving ports b1, b2, b3, b4, b5, b6, b7, b8, and b9 of the rf transceiver 21.

When the antenna 25 is a main set antenna that can be used to transmit or receive signals, the side connected to the antenna is defined as the output and the side connected to the filter is defined as the input. The input end of the radio frequency circuit switch chip 24 comprises 9 sub-input ports c1, c2, c3, c4, c5, c6, c7, c8 and c 9. The sub-input ports c1, c2, c3, c4, c5, c6, c7, c8 and c9 are respectively connected to the

duplexers

231, 232, 233, 234, 235, 236, 237, 238 and 239.

In some embodiments, as shown in fig. 9, the filtering unit 23 includes a filter 235, a filter 236, and7 duplexers 231, 232, 233, 234, 237, 238, 239. The

filters

235 and 236 are connected to the

amplifiers

225 and 226, respectively, and the 7

duplexers

231, 232, 233, 234, 237, 238, and 239 are connected to the

amplifiers

221, 222, 223, 224, 227, 228, and 229, respectively. The

filters

235 and 236 are connected to rf receiving ports b5 and b6 of the rf transceiver 21, respectively, and the 7

duplexers

231, 232, 233, 234, 237, 238, and 239 are connected to rf receiving ports b1, b2, b3, b4, b7, b8, and b9 of the rf transceiver 21, respectively.

When the antenna 25 is a main set antenna that can be used to transmit or receive signals, the side connected to the antenna is defined as the output and the side connected to the filter is defined as the input. The input end of the radio frequency circuit switch chip 24 comprises 9 sub-input ports c1, c2, c3, c4, c5, c6, c7, c8 and c 9. The sub-input ports c5 and c6 are connected to the

filters

235 and 236, respectively, and the sub-input ports c1, c2, c3, c4, c7, c8, and c9 are connected to the 7

duplexers

231, 232, 233, 234, 237, 238, and 239, respectively.

It should be noted that the above embodiment only exemplifies that the filtering unit 23 includes 2 filters and7 duplexers. In other embodiments, the filtering unit 23 may further include other numbers of filters and duplexers.

In some embodiments, as shown in fig. 10-14, the antenna 25 may be a diversity antenna for receiving signals, and the antenna 25 is used for receiving radio frequency signals from the outside and transmitting the received downlink signals to the radio frequency transceiver 21.

As shown in fig. 10, for example, the filtering unit 23 includes 9

filters

231, 232, 233, 234, 235, 236, 237, 238, 239. The

filters

When the antenna 25 is a diversity antenna for receiving signals, the side connected to the antenna is defined as an input terminal, and the side connected to the filter is defined as an output terminal. The output end of the radio frequency circuit switch chip 24 comprises 9 sub-output ports c1, c2, c3, c4, c5, c6, c7, c8 and c 9. The sub-output ports c1, c2, c3, c4, c5, c6, c7, c8 and c9 are respectively connected to the

filters

231, 232, 233, 234, 235, 236, 237, 238 and 239.

The antenna 25 receives radio frequency signals from the outside, and the received downlink signals enter the filtering unit 23 through the radio frequency switch chip 24, are filtered by the filtering unit 23, and are then transmitted to the radio frequency transceiver 21.

As shown in fig. 11, the radio frequency circuit 200 further includes a phase shifting unit 28. For example, the phase shifting unit 28 comprises 9

phase shifters

281, 282, 283, 284, 285, 286, 287, 288, 289.

One end of each

phase shifter

281, 282, 283, 284, 285, 286, 287, 288, 289 is connected with each

filter

231, 232, 233, 234, 235, 236, 237, 238, 239; the other ends of the

phase shifters

281, 282, 283, 284, 285, 286, 287, 288, 289 are respectively connected to the 9 sub-output ports c1, c2, c3, c4, c5, c6, c7, c8, c9 of the rf circuit switch chip 24.

As shown in fig. 12 and 13, for example, the filtering unit 23 includes a two-in-one filter 231, a two-in-one filter 233, and filters 232, 234, 235, 236, 237, 238, and 239.

The two ports on the same side of the two-in-one filter 231 are simultaneously connected to the rf receiving ports b1 and b2 of the rf transceiver 21, and the port on the other side of the two-in-one filter 231 is connected to the sub-output port c1 of the rf circuit switch chip 24. For example, the output end of the two-in-one filter 231 is connected to the sub receiving ports b1 and b2 with the frequency bands of Band1 and Band3, the input end of the two-in-one filter 231 is connected to the output end of the rf circuit switch chip 24, and the two-in-one filter 231 is configured to filter the downlink signals of the intermediate frequency bands of Band1 and Band 3. In some embodiments, when the antenna 25 is an antenna for transmitting signals, the two-in-one filter 231 may be connected to a radio frequency transmitting port of the radio frequency transceiver 21, for example, configured to carry uplink signals of the intermediate frequency bands Band1 and Band 3.

The two ports on the same side of the two-in-one filter 233 are connected to the rf receiving ports b4 and b5 of the rf transceiver 21, and the port on the other side of the two-in-one filter 233 is connected to the sub-output port c3 of the rf circuit switch chip 24. As shown in fig. 12, for example, the output terminal of the two-in-one filter 233 is connected to the sub receiving ports b4 and b5 of the bands of Band34 and Band39, the input terminal of the two-in-one filter 233 is connected to the output terminal of the rf circuit switch chip 24, and the two-in-one filter 233 is configured to filter the downlink signals of the intermediate frequency bands of Band34 and Band 39. In some embodiments, when the antenna 25 is an antenna for transmitting signals, the two-in-one filter 233 may be connected to a radio frequency transmission port of the radio frequency transceiver 21, for example, configured to carry uplink signals of the intermediate frequency bands Band34 and Band 39. As shown in fig. 13, for example, the output terminal of the two-in-one filter 233 is connected to the sub receiving ports b4 and b5 of the bands of Band41 and Band39, the input terminal of the two-in-one filter 233 is connected to the output terminal of the rf circuit switch chip 24, and the two-in-one filter 233 is configured to filter the downlink signals of the high frequency Band41 and the intermediate frequency Band 39. In some embodiments, when the antenna 25 is an antenna for transmitting signals, the two-in-one filter 233 may be connected to a radio frequency transmitting port of the radio frequency transceiver 21, for example, configured to perform carrier aggregation on uplink signals in the high frequency Band of Band41 and the intermediate frequency Band of Band 39.

One ends of the

filters

232, 234, 235, 236, 237, 238 and 239 are respectively connected to the rf receiving ports b3, b6, b7, b8, b9, b10 and b11 of the rf transceiver 21, and the other ends of the

filters

232, 234, 235, 236, 237, 238 and 239 are respectively connected to the sub-output ports c2, c4, c5, c6, c7, c8 and c9 of the rf circuit switch chip 24. As shown in fig. 12, for example, the

filters

232, 234, 235, 236, 237, 238, 239 are respectively configured to carry uplink signals of Band25, Band41, Band40, Band7, Band26, Band8, and Band 20. As shown in fig. 13, for example, the

filters

232, 234, 235, 236, 237, 238, 239 are respectively configured to carry uplink signals of Band25, Band34, Band40, Band7, Band26, Band8, and Band 20.

As shown in fig. 14, for example, the filtering unit 23 includes a two-in-one filter 231, a three-in-one filter 233, and filters 232, 235, 236, 237, 238, and 239.

The three ports on the same side of the triple-in-one filter 233 are simultaneously connected with the rf receiving ports b4, b5, b6 of the rf transceiver 21, and the port on the other side of the triple-in-one filter 233 is connected with the sub-output port c3 of the rf circuit switch chip 24. As shown in fig. 14, for example, the output terminal of the triple-filter 233 is connected to the sub-receiving ports b4, b5, b6 of the bands of Band41, Band34, Band39, the input terminal of the two-in-one filter 233 is connected to the output terminal of the rf circuit switch chip 24, and the triple-filter 233 is configured to filter the downlink signals of the high-frequency Band41, the intermediate-frequency Band34, and the intermediate-frequency Band 39. In some embodiments, when the antenna 25 is an antenna for transmitting signals, the triple-play filter 233 may be connected to a radio frequency transmission port of the radio frequency transceiver 21, for example, configured to perform carrier aggregation on uplink signals in the high frequency Band41, the intermediate frequency Band34, and the intermediate frequency Band 39.

One end of each of the

filters

232, 235, 236, 237, 238 and 239 is connected to the rf receiving ports b3, b7, b8, b9, b10 and b11 of the rf transceiver 21, and the other end of each of the

filters

232, 235, 236, 237, 238 and 239 is connected to the sub-output ports c2, c5, c6, c7, c8 and c9 of the rf circuit switch chip 24. As shown in fig. 14, for example, the

filters

232, 235, 236, 237, 238, and 239 are respectively configured to carry the uplink signals of Band25, Band40, Band7, Band26, Band8, and Band 20.

The number and connection relationship of the filters, duplexers, phase shifters, and ports in the above embodiments are not intended to limit the present invention.

In a Long Term Evolution (LTE) communication network, according to different Duplex modes, the LTE communication Frequency band is divided into two types, Frequency Division Duplex (FDD) and Time Division Duplex (TDD). In the communication frequency band in the FDD mode, the uplink and downlink communication links use different frequencies, and at this time, the rf circuit needs a duplexer to filter the uplink and downlink communication signals. In the communication frequency band in the TDD mode, the uplink and downlink communication links use the same frequency and transmit radio frequency signals in different time slots, and at this time, a filter is required in the radio frequency circuit to filter the uplink and downlink communication signals.

Therefore, in practical applications, the number of filters and the number of duplexers included in the filtering unit 23 depend on the duplex mode of the radio frequency signals of each frequency band transmitted by the radio frequency transceiver 21. In the frequency band of the FDD mode, a duplexer is connected with a radio frequency transmitting port and a radio frequency receiving port; in the frequency band of the TDD mode, a radio frequency transmitting port and a radio frequency receiving port are connected with a filter. For example, the Band1 and the Band2 frequency bands operate in an FDD mode, and the transmitting ports and the receiving ports of the Band1 and the Band2 radio frequency signals are connected with duplexers; and the Band40 and the Band41 frequency bands work in a TDD mode, and the transmitting ports and the receiving ports of the Band40 and the Band41 radio frequency signals are connected with filters.

Referring to fig. 15, in some embodiments, the rf circuit switch chip 24 includes a first switch 241, a second switch 242, and a frequency divider 243.

The first switch 241 is a double-pole multi-throw switch, and the second switch 242 is a single-pole multi-throw switch. For example, the antenna 25 is a diversity antenna for receiving signals, the first switch 241 includes 3 first signal type sub-output ports c1, c2, c3 and3 second signal type sub-output ports c4, c5, c6, and the first switch 241 includes a first input port 2411 and a second input port 2412; the second switch 242 includes 3 third signal type sub-output ports c7, c8, c 9. The inputs of the first switch 241 and the second switch 242 are connected to the output of the frequency divider 243.

Frequency divider 243 may be a three-frequency divider. The input of the frequency divider 243 is connected to the antenna 25.

The above connection relation merely represents direct connection between the components, and does not represent that the components connected to each other are electrically connected to each other.

In some embodiments, the sub-output ports c1, c2, c3 may be respectively connected to an intermediate frequency port in the radio frequency transceiver 21, the sub-output ports c4, c5, c6 may be respectively connected to a high frequency port in the radio frequency transceiver 21, and the sub-output ports c7, c8, c9 may be respectively connected to a low frequency port in the radio frequency transceiver 21.

When the first input port 2411 of the switch 241 is turned on any one of c1, c2 and c3, the second input port 2412 of the switch 241 is turned on any one of c4, c5 and c6, and the switch 242 is turned off, the frequency divider 243 may divide the carrier aggregation signal into a high frequency signal and an intermediate frequency signal.

When the first input port 2411 of the switch 241 is turned on any one of c1, c2 and c3, the second input port 2412 of the switch 241 is turned off, and the switch 242 is turned on any one of c7, c8 and c9, the frequency divider 243 may divide the carrier aggregation signal into an intermediate frequency signal and a low frequency signal. Or when the first input port 2411 of the switch 241 is turned off, the second input port 2412 of the switch 241 is turned on any one of c1, c2 and c3, and the switch 242 is turned on any one of c7, c8 and c9, the frequency divider 243 may divide the carrier aggregation signal into the intermediate frequency signal and the low frequency signal.

When the first input port 2411 of the switch 241 is turned off, the second input port 2412 of the switch 241 is turned on any one of c4, c5 and c6, and the switch 242 is turned on any one of c7, c8 and c9, the frequency divider 243 may divide the carrier aggregation signal into a high frequency signal and a low frequency signal. Or when the first input port 2412 of the switch 241 is turned on any one of c4, c5 and c6, the second input port 2412 of the switch 241 is turned off, and the switch 242 is turned on any one of c7, c8 and c9, the frequency divider 243 may divide the carrier aggregation signal into a high frequency signal and a low frequency signal.

When the first input port 2411 of the switch 241 turns on any one of c1, c2 and c3, the second input port 2412 of the switch 241 turns on any one of c4, c5 and c6, and the switch 242 turns on any one of c7, c8 and c9, the frequency divider 243 may divide the carrier aggregation signal into a high frequency signal, an intermediate frequency signal and a low frequency signal. Or when the second input port 2412 of the switch 241 is turned on any one of c1, c2 and c3, the first input port 2411 of the switch 241 is turned on any one of c4, c5 and c6, and the switch 242 is turned on any one of c7, c8 and c9, the frequency divider 243 may divide the carrier aggregation signal into a high frequency signal, an intermediate frequency signal and a low frequency signal.

In some embodiments, the device location of the frequency divider 243 may also be replaced by a combiner 2453, and the combiner 243 is used to realize carrier aggregation of multi-band signals when the antenna 25 is a main set antenna for transmitting signals or receiving signals.

Referring to fig. 16-18, in some embodiments, the rf circuit switch chip 24 includes a first switch 241, a second switch 242, a switch component 246, and first and

second frequency dividers

244, 245.

The first switch 241 is a double-pole multi-throw switch, and the second switch 242 is a single-pole multi-throw switch. For example, the first switch 241 includes 3 first signal type sub-output ports c1, c2, c3 and3 second signal type sub-output ports c4, c5, c6, and the first switch 241 includes a first input port 2411 and a second input port 2412; the second switch 242 includes 3 third signal type sub-output ports c7, c8, c 9. The first and

second input ports

2411 and 2412 of the first switch 241 are connected to the switch assembly 246. An input of the second switch 242 is connected to a second output port of the second frequency divider 245. The switch assembly 246 has 3 output ports P1, P2, P3 and3 input ports Q1, Q2, Q3. The output port P1 is connected to the first input port 2411 of the switch 241. The output port P2 is connected to the second input port 2411 of the switch 241. The output port P3 is connected to an input of the first frequency divider 244. Input port Q1 is connected to a first output port of divider 244. Input port Q2 is connected to a second output port of divider 244. The input Q3 is connected to a first output of the second frequency divider 245.

The first frequency divider 244 and the second frequency divider 245 are dual-frequency dividers. The input of the second frequency divider 245 is connected to the antenna 25.

In some embodiments, as shown in fig. 16, the switch assembly 246 includes switches K1, K2. Wherein, the switch K1 is a single-pole double-throw switch, and the switch K2 is a single-pole single-throw switch.

The fixed end of the single-pole double-throw switch K1 is connected with the second output port P2 of the switch assembly 246, and the gating end of the single-pole double-throw switch K1 is respectively connected with the second input port Q2 and the second input port Q3 of the switch assembly 246; the single-pole double-throw switch K1 can selectively connect the second output port P2 with the second input port Q2 or the second input port Q3.

The output end and the input end of the single-pole single-throw switch K2 are respectively connected with the third output port P3 and the third input port Q3 of the switch assembly 246; the single-pole single-throw switch K2 can selectively connect the third output port P3 and the third input port Q3.

When the first input port 2411 of the switch 241 turns on any one of c1, c2 and c3, the second input port 2412 of the switch 241 turns on any one of c4, c5 and c6, and the switch K1 turns on P2 and Q2, the frequency divider 244 may divide the carrier aggregation signal into a high frequency signal and an intermediate frequency signal.

Further, when the switch K2 turns on the P3 and the Q3, and the switch 242 turns on any one of the c7, c8 and c9, the frequency divider 244 and the frequency divider 245 can divide the carrier aggregation signal into a high frequency signal, an intermediate frequency signal and a low frequency signal.

When the first input port 2411 of the switch 241 is turned off, the second input port 2412 of the switch 241 is turned on any one of c1, c2 and c3, the switch K1 is turned on P2 and Q3, and the switch 242 is turned on any one of c7, c8 and c9, the frequency divider 245 can divide the carrier aggregation signal into an intermediate frequency signal and a low frequency signal.

When the second input port 2412 of the switch 241 turns on any one of c4, c5 and c6, the switch K1 turns on P2 and Q3, and the switch 242 turns on any one of c7, c8 and c9, the frequency divider 245 can divide the carrier aggregation signal into a high frequency signal and a low frequency signal.

For example, the sub-output port c2 may be connected to a mid-Band 3 transmission port in the radio frequency transceiver 21, the sub-output port c5 may be connected to a high-Band 40 transmission port in the radio frequency transceiver 21, and the sub-output port c8 may be connected to a low-Band 8 transmission port in the radio frequency transceiver 21.

When the first input port 2411 of the switch 241 turns on c2, the second input port 2412 of the switch 241 turns on c5, and the switch K1 turns on P2 and Q2, the frequency divider 244 may divide the carrier aggregation signal into Band3 and Band 40.

Further, when the switch K2 turns on P3 and Q3 and the switch 242 turns on c8, the frequency divider 244 and the frequency divider 245 can divide the carrier aggregation signal into Band3, Band40, and Band 8.

When the first input port 2411 of the switch 241 is turned off, the second input port 2412 of the switch 241 is turned on c2, the switch K1 is turned on P2 and Q3, and the switch 242 is turned on c8, the frequency divider 245 may divide the carrier aggregation signal into Band3 and Band 8.

When the first input port 2411 of the switch 241 is turned off, the second input port 2412 of the switch 241 is turned on c5, the switch K1 is turned on P2 and Q3, and the switch 242 is turned on c8, the frequency divider 245 may divide the carrier aggregation signal into Band40 and Band 8.

In some embodiments, as shown in fig. 17, the switch assembly 246 includes switches K1, K2. Wherein, the switch K1 is a single-pole single-throw switch, and the switch K2 is a single-pole double-throw switch.

The output end and the input end of the single-pole single-throw switch K1 are respectively connected with the second output port P2 and the second input port Q2 of the switch assembly 246; the single-pole single-throw switch K1 can selectively communicate the second output port P2 with the second input port Q2.

The fixed end of the single-pole double-throw switch K2 is connected with the third input port Q3 of the switch component 246, and the gating end of the single-pole double-throw switch K2 is respectively connected with the second output port P2 and the third output port P3 of the switch component 246; the single-pole double-throw switch K2 can selectively communicate the third input port Q3 with the second output port P2 or the third output port P3.

Further, when the switch K2 turns on the P3 and the Q3, and the switch 242 turns on any one of the c7, c8 and c9, the frequency divider 244 and the frequency divider 245 can realize a high frequency signal, an intermediate frequency signal and a low frequency signal.

When the first input port 2411 of the switch 241 is turned off, the second input port 2412 of the switch 241 is turned on any one of c1, c2 and c3, the switch K2 is turned on P2 and Q3, and the switch 242 is turned on any one of c7, c8 and c9, the frequency divider 245 can divide the carrier aggregation signal into an intermediate frequency signal and a low frequency signal.

When the first input port 2411 of the switch 241 is turned off, the second input port 2412 of the switch 241 is turned on any one of c4, c5 and c6, the switch K2 is turned on P2 and Q3, and the switch 242 is turned on any one of c7, c8 and c9, the frequency divider 245 can divide the carrier aggregation signal into a high frequency signal and a low frequency signal.

When the first input port 2411 of the switch 241 is turned off, the second input port 2412 of the switch 241 is turned on c2, the switch K2 is turned on P2 and Q3, and the switch 242 is turned on c8, the frequency divider 245 may divide the carrier aggregation signal into Band3 and Band 8.

When the first input port 2411 of the switch 241 is turned off, the second input port 2412 of the switch 241 is turned on c5, the switch K2 is turned on P2 and Q3, and the switch 242 is turned on c8, the frequency divider 245 may divide the carrier aggregation signal into Band40 and Band 8.

In some embodiments, the first switch 241 and the second switch 242 may be packaged to form a first chip 247.

In some embodiments, as shown in fig. 18, the switch assembly 246 includes switches K1, K2, K3. Wherein, the switches K1, K2 and K3 are single-pole single-throw switches.

The output end and the input end of the single-pole single-throw switch K2 are respectively connected with the second output port P2 and the third input port Q3 of the switch assembly 246; the single-pole single-throw switch K2 can selectively communicate the second output port P2 with the second input port Q3.

The output end and the input end of the single-pole single-throw switch K3 are respectively connected with the third output port P3 and the third input port Q3 of the switch assembly 246; the single-pole single-throw switch K3 can selectively communicate the third output port P3 with the third input port Q3.

Further, when the switch K2 is turned off, the switch K3 turns on the P3 and the Q3, and the switch 242 turns on any one of c7, c8, and c9, the frequency divider 244 and the frequency divider 245 can divide the carrier aggregation signal into a high frequency signal, an intermediate frequency signal, and a low frequency signal.

When the first input port 2411 of the switch 241 is turned off, the second input port 2412 of the switch 241 is turned on any one of c1, c2 and c3, the switch K2 is turned on P2 and Q3, the switch K3 is turned off, and the switch 242 is turned on any one of c7, c8 and c9, the frequency divider 245 can divide the carrier aggregation signal into an intermediate frequency signal and a low frequency signal.

When the first input port 2411 of the switch 241 is turned off, the second input port 2412 of the switch 241 is turned on any one of c4, c5 and c6, the switch K2 is turned on P2 and Q3, the switch K3 is turned off, and the switch 242 is turned on any one of c7, c8 and c9, the frequency divider 245 can divide the carrier aggregation signal into a high frequency signal and a low frequency signal.

Further, when the switch K2 is turned off, the switch K3 is turned on P3 and Q3, and the switch 242 is turned on c8, the frequency divider 244 and the frequency divider 245 can realize Band3, Band40 and Band 8.

When the first input port 2411 of the switch 241 is turned off, the second input port 2412 of the switch 241 is turned on c2, the switch K2 is turned on P2 and Q3, the switch K3 is turned off, and the switch 242 is turned on c8, the frequency divider 245 may divide the carrier aggregation signal into Band3 and Band 8.

When the first input port 2411 of the switch 241 is turned off, the second input port 2412 of the switch 241 is turned on c5, the switch K2 is turned on P2 and Q3, the switch K3 is turned off, and the switch 242 is turned on c8, the frequency divider 245 may divide the carrier aggregation signal into Band40 and Band 8.

In some embodiments, the first switch 241, the second switch 242, and the switch assembly 246 may be packaged to form a second chip 248.

In some embodiments, the positions of the frequency divider 244 and the frequency divider 245 may be replaced by a combiner 244 and a combiner 245, and when the antenna 25 is a main antenna for transmitting or receiving signals, the combiner 244 and the combiner 245 are used for carrier aggregation of multi-band signals.

Referring to fig. 19, fig. 19 is a schematic structural diagram of the rf circuit 200. Wherein, the radio frequency transceiver 21 includes 9 radio frequency transmitting ports a1, a2, a3, a4, a5, a6, a7, a8, a9, and 9 radio frequency receiving ports b1, b2, b3, b4, b5, b6, b7, b8, b 9.

The power amplification unit 22 includes 9

amplifiers

221, 222, 223, 224, 225, 226, 227, 228, 229. The

amplifiers

The filtering unit 23 includes 9

duplexers

231, 232, 233, 234, 235, 236, 237, 238, 239. The

duplexers

amplifiers

221, 222, 223, 224, 225, 226, 227, 228, and 229. The

duplexers

The rf circuit switch chip 24 includes a first switch 241, a second switch 242, a switch component 246, and a first frequency divider 244 and a second frequency divider 245.

second input ports

The sub-output ports c1, c2, c3, c4, c5, c6, c7, c8 and c9 of the rf circuit switch chip 24 are respectively connected to the

duplexers

231, 232, 233, 234, 235, 236, 237, 238 and 239.

In the embodiment of the present invention, the rf circuit switch chip 24 may control the high frequency port and the intermediate frequency port of the rf transceiver 21 to connect to the first frequency divider 244, so as to divide the carrier aggregation signal into a high frequency signal and an intermediate frequency signal; the high frequency port and the intermediate frequency port of the radio frequency transceiver 21 may be controlled to be connected to the first frequency divider 244, and the low frequency port of the radio frequency transceiver 21 is connected to the second frequency divider 245, so as to divide the carrier aggregation signal into a high frequency signal, an intermediate frequency signal, and a low frequency signal; the high frequency port and the low frequency port of the radio frequency transceiver 21 may also be controlled to connect the second frequency divider 245, so as to divide the carrier aggregation signal into a high frequency signal and a low frequency signal; the if port and the lf port of the rf transceiver 21 may be controlled to switch on the second frequency divider 245 to divide the carrier aggregation signal into an if signal and an lf signal. The rf circuit switch chip 24 can divide the frequency of the carrier aggregation signal, so that the diversity of frequency division of the carrier aggregation signal by the electronic device 100 can be improved.

Continuing with reference to fig. 1 and 2. Wherein the battery 104 is mounted inside the housing 105. The battery 104 is used to provide power to the electronic device 100.

The housing 105 is used to form the outer contour of the electronic device 100. The material of the housing 105 may be plastic or metal. The housing 105 may be integrally formed.

Referring to fig. 20, fig. 20 is a schematic view of another structure of the electronic device 100 according to the embodiment of the present invention. The electronic device 100 includes an antenna apparatus 10, a memory 20, a display unit 30, a power supply 40, and a processor 50. Those skilled in the art will appreciate that the configuration of the electronic device 100 shown in fig. 20 does not constitute a limitation of the electronic device 100. Electronic device 100 may include more or fewer components than shown, or some components may be combined, or a different arrangement of components.

The antenna device 10 includes the rf circuit 200 described in any of the above embodiments. The antenna device 10 can communicate with a network device (e.g., a server) or other electronic devices (e.g., a smart phone) through a wireless network, and complete information transceiving with the network device or other electronic devices.

The memory 20 may be used to store applications and data. The memory 20 stores applications containing executable program code. The application programs may constitute various functional modules. The processor 50 executes various functional applications and data processing by running the application programs stored in the memory 20.

The display unit 30 may be used to display information input to the electronic apparatus 100 by a user or information provided to the user and various graphic user interfaces of the electronic apparatus 100. These graphical user interfaces may be made up of graphics, text, icons, video, and any combination thereof. The display unit 30 may include a display panel.

The power supply 40 is used to power the various components of the electronic device 100. In some embodiments, power supply 40 may be logically coupled to processor 50 through a power management system, such that functions to manage charging, discharging, and power consumption management are performed through the power management system.

The processor 50 is the control center of the electronic device 100. The processor 50 connects various parts of the entire electronic device 100 using various interfaces and lines, performs various functions of the electronic device 100 and processes data by running or executing an application program stored in the memory 20 and calling data stored in the memory 20, thereby monitoring the electronic device 100 as a whole.

In addition, the electronic device 100 may further include a camera module, a bluetooth module, and the like, which are not described herein again.

The radio frequency circuit switch chip, the radio frequency circuit, the antenna device and the electronic device provided by the embodiments of the present invention are described in detail above, and the principle and the implementation manner of the present invention are explained in this document by applying specific examples, and the description of the above embodiments is only used to help understanding of the present invention. Meanwhile, for those skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.

Claims

1. A radio frequency circuit switch chip comprises a first switch, a second switch, a switch assembly, a first frequency divider and a second frequency divider, wherein a first input port and a second input port of the first switch are used for receiving high-frequency signals or intermediate-frequency signals, and the second switch is used for receiving low-frequency signals;

a first output port, a second output port and a third output port of the switch assembly are respectively connected with a first input port of the first switch, a second input port of the first switch and an input end of the first frequency divider, and a first input port, a second input port and a third input port of the switch assembly are respectively connected with a first output port of the first frequency divider, a second output port of the first frequency divider and a first output port of the second frequency divider;

when the first input port and the second input port of the first switch are respectively used for receiving different signals, the switch component enables the first input port and the second input port of the first switch to selectively switch on the first frequency divider, and the first frequency divider divides the received signals into high-frequency signals and intermediate-frequency signals; when the switch component enables the first frequency divider and the second switch to selectively switch on the second frequency divider, the first frequency divider and the second frequency divider divide the frequency of the received signal into a high-frequency signal, an intermediate-frequency signal and a low-frequency signal;

when the switch component enables the second input port of the first switch and the second switch to selectively switch on the second frequency divider, the second frequency divider divides a received signal into an intermediate frequency signal and a low frequency signal or a high frequency signal and a low frequency signal.

2. The radio frequency circuit switch chip of claim 1, wherein:

a first input port of the first switch is connected with a first output port of the first frequency divider;

a second input port of the first switch is connected with a second output port of the first frequency divider and a first output port of the second frequency divider;

the input end of the second switch is connected with the second output port of the second frequency divider; and

the input end of the first frequency divider is connected with the first output port of the second frequency divider.

3. The radio frequency circuit switch chip of claim 2, wherein the first switch and the second switch package form a first chip.

4. The radio frequency circuit switch chip of claim 1, wherein:

a first output port of the switch assembly is connected with a first input port of the switch assembly;

a second output port of the switch assembly selectively connects a second input port or a third input port of the switch assembly;

the third output port of the switch assembly selectively turns on the third input port of the switch assembly.

5. The radio frequency circuit switch chip of claim 4, wherein the switch assembly comprises a single pole double throw switch and a single pole single throw switch;

the fixed end of the single-pole double-throw switch is connected with the second output port of the switch assembly, and the gating end of the single-pole double-throw switch is respectively connected with the second input port and the third input port of the switch assembly; the output end and the input end of the single-pole single-throw switch are respectively connected with a third output port and a third input port of the switch assembly; or

The output end and the input end of the single-pole single-throw switch are respectively connected with a second output port and a second input port of the switch assembly; the fixed end of the single-pole double-throw switch is connected with a third input port of the switch assembly, and the gating end of the single-pole double-throw switch is respectively connected with a second output port and a third output port of the switch assembly.

6. The radio frequency circuit switch chip of claim 4, wherein the switch assembly comprises three single pole, single throw switches, wherein:

the output end and the input end of the first single-pole single-throw switch are respectively connected with the second output port and the second input port of the switch assembly;

the output end and the input end of the second single-pole single-throw switch are respectively connected with the second output port and the third input port of the switch assembly;

and the output end and the input end of the third single-pole single-throw switch are respectively connected with the third output port and the third input port of the switch assembly.

7. The radio frequency circuit switch chip of claim 1, wherein the first switch, the second switch, and the switch component package form a second chip.

8. The radio frequency circuit switch chip of claim 1, wherein the first frequency divider and the second frequency divider are dual frequency dividers.

9. A radio frequency circuit comprises a radio frequency transceiver, a radio frequency circuit switch chip and an antenna, wherein the radio frequency transceiver, the radio frequency circuit switch chip and the antenna are connected in sequence;

the radio frequency circuit switch chip comprises a first switch, a second switch, a switch component, a first frequency divider and a second frequency divider, wherein a first input port and a second input port of the first switch are used for receiving high-frequency signals or intermediate-frequency signals, and the second switch is used for receiving low-frequency signals;

10. The radio frequency circuit of claim 9, wherein:

the input end of the first frequency divider is connected with the first output port of the second frequency divider;

the input end of the second frequency divider is connected with the antenna.

11. The radio frequency circuit of claim 10, wherein the radio frequency transceiver includes a high frequency port, an intermediate frequency port, and a low frequency port, the high frequency port and the intermediate frequency port are respectively connected to corresponding output ports of the first switch, and the low frequency port is connected to an output of the second switch.

12. The radio frequency circuit of claim 11, wherein:

the intermediate frequency port comprises N1 sub transmitting ports of different frequency bands and N1 sub receiving ports of different frequency bands, the high frequency port comprises N2 sub transmitting ports of different frequency bands and N2 sub receiving ports of different frequency bands, the output end of the first switch comprises N1 first signal type sub output ports and N2 second signal type sub output ports, and the N1 sub transmitting ports and the N1 sub receiving ports are respectively connected with the N1 first signal type sub output ports one by one; the N2 sub transmitting ports and the N2 sub receiving ports are respectively connected with the N2 second signal type sub output ports in a one-to-one mode;

the low-frequency port comprises N3 sub transmitting ports with different frequency bands and N3 sub receiving ports with different frequency bands, the output end of the second switch comprises N3 sub output ports, and the N3 sub transmitting ports and the N3 sub receiving ports are respectively connected with the N3 sub output ports one by one;

wherein N1, N2 and N3 are all natural numbers larger than 1.

13. The radio frequency circuit of claim 12, wherein a power amplification unit is further connected between the radio frequency transceiver and the radio frequency circuit switch chip, the power amplification unit including a plurality of power amplifiers, the power amplifiers being connected between each of the sub-transmit ports and each of the sub-output ports.

14. The radio frequency circuit according to claim 12, wherein a low noise amplification unit is further connected between the radio frequency transceiver and the radio frequency circuit switch chip, and the low noise amplifier is connected between each of the sub-receiving ports and each of the sub-output ports.

15. The radio frequency circuit of claim 12, wherein a filtering unit is further connected between the radio frequency transceiver and the radio frequency circuit switch chip, the filtering unit includes a plurality of duplexers or filters, and the duplexers or filters are connected between each of the sub transmitting ports and each of the sub output ports.

16. The radio frequency circuit according to claim 15, wherein a phase shifter unit is further connected between the filtering unit and the radio frequency circuit switch chip, the phase shifter unit includes a plurality of phase shifters, and the phase shifter is connected between each of the duplexers or filters and each of the sub-output ports.

17. An antenna arrangement, wherein the antenna arrangement comprises the radio frequency circuit of claim 9.

18. An electronic device, wherein the electronic device comprises a housing and a circuit board, the circuit board is mounted inside the housing, and the circuit board is provided with a radio frequency circuit, and the radio frequency circuit is the radio frequency circuit of claim 9.