WO2018204169A1 - Dynamic correction of gain error in current-feedback instrumentation amplifiers - Google Patents

Dynamic correction of gain error in current-feedback instrumentation amplifiers Download PDF

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Publication number
WO2018204169A1
WO2018204169A1 PCT/US2018/029708 US2018029708W WO2018204169A1 WO 2018204169 A1 WO2018204169 A1 WO 2018204169A1 US 2018029708 W US2018029708 W US 2018029708W WO 2018204169 A1 WO2018204169 A1 WO 2018204169A1
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Prior art keywords
tail current
feedback
transistors
current source
modulator circuit
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PCT/US2018/029708
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French (fr)
Inventor
Serban MOTOROIU
Jim Nolan
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Microchip Technology Inc
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Microchip Technology Inc
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Priority to DE112018002322.2T priority Critical patent/DE112018002322T5/en
Priority to CN201880023639.8A priority patent/CN110521116B/en
Publication of WO2018204169A1 publication Critical patent/WO2018204169A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03G—CONTROL OF AMPLIFICATION
    • H03G3/00—Gain control in amplifiers or frequency changers
    • H03G3/20—Automatic control
    • H03G3/30—Automatic control in amplifiers having semiconductor devices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/26—Modifications of amplifiers to reduce influence of noise generated by amplifying elements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45—Differential amplifiers
    • H03F3/45071—Differential amplifiers with semiconductor devices only
    • H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
    • H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45—Differential amplifiers
    • H03F3/45071—Differential amplifiers with semiconductor devices only
    • H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
    • H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
    • H03F3/45183—Long tailed pairs
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45—Differential amplifiers
    • H03F3/45071—Differential amplifiers with semiconductor devices only
    • H03F3/45479—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection
    • H03F3/45632—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection in differential amplifiers with FET transistors as the active amplifying circuit
    • H03F3/45636—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection in differential amplifiers with FET transistors as the active amplifying circuit by using feedback means
    • H03F3/45641—Measuring at the loading circuit of the differential amplifier
    • H03F3/45659—Controlling the loading circuit of the differential amplifier
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03G—CONTROL OF AMPLIFICATION
    • H03G1/00—Details of arrangements for controlling amplification
    • H03G1/0005—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal
    • H03G1/0017—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal the device being at least one of the amplifying solid-state elements
    • H03G1/0023—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal the device being at least one of the amplifying solid-state elements in emitter-coupled or cascode amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03G—CONTROL OF AMPLIFICATION
    • H03G1/00—Details of arrangements for controlling amplification
    • H03G1/0005—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal
    • H03G1/0017—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal the device being at least one of the amplifying solid-state elements
    • H03G1/0029—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal the device being at least one of the amplifying solid-state elements using field-effect transistors [FET]
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/129—Indexing scheme relating to amplifiers there being a feedback over the complete amplifier
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/261—Amplifier which being suitable for instrumentation applications
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45048—Calibrating and standardising a dif amp
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45392—Indexing scheme relating to differential amplifiers the AAC comprising resistors in the source circuit of the AAC before the common source coupling
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45466—Indexing scheme relating to differential amplifiers the CSC being controlled, e.g. by a signal derived from a non specified place in the dif amp circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45468—Indexing scheme relating to differential amplifiers the CSC comprising a cross coupling circuit, e.g. comprising two cross-coupled transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45504—Indexing scheme relating to differential amplifiers the CSC comprising more than one switch
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45511—Indexing scheme relating to differential amplifiers the feedback circuit [FBC] comprising one or more transistor stages, e.g. cascaded stages of the dif amp, and being coupled between the loading circuit [LC] and the input circuit [IC]
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45521—Indexing scheme relating to differential amplifiers the FBC comprising op amp stages, e.g. cascaded stages of the dif amp and being coupled between the LC and the IC
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45528—Indexing scheme relating to differential amplifiers the FBC comprising one or more passive resistors and being coupled between the LC and the IC
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45534—Indexing scheme relating to differential amplifiers the FBC comprising multiple switches and being coupled between the LC and the IC

Definitions

  • the present disclosure relates to instrumentation amplifiers, and, more particularly, to dynamically correcting the gain error of an instrumentation amplifier that uses a current- feedback circuit architecture.
  • the gain error e.g., the difference between the actual transfer function and an ideal transfer function of a current feed-back instrumentation amplifier (CFIA) depends on the accuracy of matching between the CFIA's input transconductor and feedback trans conductor.
  • CFIA current feed-back instrumentation amplifier
  • Some existing CFIAs try to address the gain error using an architecture in which each transconductor includes pre-amplifiers to create a transfer function proportional to the ratio between the degeneration resistors of the input and feedback transconductors, see Figure 1.
  • the advantage of this circuit architecture is that it provides a gain error that depends almost exclusively on matching of resistors which is superior to the matching of transistors. While the preamplifiers provide an overall low gain error, their noise adds to the total noise of the instrumentation amplifier, making this architecture less suitable for low noise designs.
  • Another disadvantage is the presence of feedback loops around each pre-amplifier, which makes frequency compensation rather complex and difficult.
  • the CFIA's transconductors are each based on a differential pair of transistors with degeneration.
  • the noise is significantly lower than the CFIA implementation that uses preamplifiers, and there are no extra feedback loops.
  • the gain error will also change: it will now be affected not only by the mismatch between the degeneration resistors of the input and feedback degeneration transconductors, but also by any mismatch between the degenerated differential paired transistors of each transconductor and by any mismatch between the respective tail currents being fed into each transconductor.
  • resistors match much better than transistors do, so the transistor mismatch will have a dominant effect on the gain error.
  • a method for gain error correction in a current-feedback instrumentation amplifier may comprise the steps of: providing an input transconductor may comprise a first differential pair of transistors, first degeneration resistors coupled to the first differential pair of transistors, and a first tail current source; providing a feedback transconductor may comprise a second differential pair of transistors, second degeneration resistors coupled to the second differential pair of transistors, and a second tail current source; and providing a modulator circuit coupled between the first and second tail current sources, and the first and second degeneration resistors; controlling the modulator circuit by alternating first and second phase signals; wherein during the first phase signal may comprise the steps of coupling the first tail current source to the first degeneration resistors and the second tail current source to the second degeneration resistors with the modulator circuit; and wherein during the second phase signal may comprise the steps of coupling the first tail current source to the second degeneration resistors, and the second tail current source to the first degeneration resistors with the modulator circuit.
  • gain error caused by a difference between the first and second tail current sources may be averaged out during the first and second phases.
  • the method may comprise the step of coupling the input and feedback trans conductors to an amplifier.
  • the method may comprise the step of coupling a feedback network between an output of the amplifier and inputs of the feedback transconductor.
  • the feedback network may determine gain of the current-feedback instrumentation amplifier.
  • a method for gain error correction in a current- feedback instrumentation amplifier may comprise the steps of: providing an input transconductor may comprise a first differential pair may comprise first and second transistors, first and second tail current sources, and a first degeneration resistor coupled between the first and the second transistors; providing a feedback transconductor may comprise a second differential pair may comprise third and fourth transistors, third and fourth tail current sources, and a first degeneration resistor coupled between the third and the fourth transistors; and providing a first modulator circuit coupled between the first and third tail current sources, and the first and third transistors; providing a second modulator circuit coupled between the second and fourth tail current sources, and the second and fourth transistors; controlling the first and second modulator circuits by alternating first and second phase signals; wherein during the first phase signal may comprise the steps of: coupling the first tail current source to the first transistor and the third tail current source to the third transistor with the first modulator circuit, and coupling the second tail current source to the second transistor and the fourth tail current to the fourth transistor with the
  • a method for gain error correction in a current- feedback instrumentation amplifier may comprise the steps of: providing an input transconductor may comprise a first differential pair of transistors, and a first tail current source; providing a feedback transconductor may comprise a second differential pair of transistors, and a second tail current source; and providing a modulator circuit coupled between the first and second tail current sources, and the first and second differential pairs of transistors; controlling the modulator circuit by alternating first and second phase signals; wherein during the first phase signal may comprise the steps of coupling the first tail current source to the first differential pair of transistors and the second tail current source to the second differential pair of transistors with the modulator circuit; and wherein during the second phase signal may comprise the steps of coupling the first tail current source to the second differential pair of transistors, and the second tail current source to the first differential pair of transistors with the modulator circuit.
  • a current-feedback instrumentation amplifier having gain error correction may comprise: an input trans conductor that may comprise a first differential pair of transistors, first degeneration resistors coupled to the first differential pair of transistors, and a first tail current source; a feedback trans conductor may comprise a second differential pair of transistors, second degeneration resistors coupled to the second differential pair of transistors, and a second tail current source; and a modulator circuit coupled between the first and second tail current sources, and the first and second degeneration resistors; wherein during a first phase state the modulator circuit couples the first tail current source to the first degeneration resistors and the second tail current source to the second degeneration resistors, and wherein during a second phase state the modulator circuit couples the first tail current source to the second degeneration resistors, and the second tail current source to the first degeneration resistors.
  • gain error caused by a difference between the first and second tail current sources may be averaged out during the first and second phases.
  • an amplifier may have inputs coupled to outputs from the input and feedback trans conductors.
  • a feedback network may be coupled between an output of the amplifier and inputs of the feedback transconductor.
  • the feedback network may comprise: a first feedback resistor; a second feedback resistor; and a voltage reference; the first and second feedback resistors and the voltage reference may be connected in series; a first input of the feedback transconductor may be coupled to a node between the second feedback resistor and the voltage reference; a second input of the feedback transconductor may be coupled to a node between the first feedback resistor and the second feedback resistor; and the output of the amplifier may be coupled to the first feedback resistor; wherein gain may be determined by a ratio of resistance values of the first and second feedback resistors.
  • the input transconductor may have a positive input and a negative input.
  • the modulator circuit may comprise: a first switch coupled between the first tail current source and the first degeneration resistors; a second switch coupled between the first tail current source and the second degeneration resistors; a third switch coupled between the second tail current source and the first degeneration resistors; and a fourth switch coupled between the second tail current source and the second degeneration resistors; wherein the first and fourth switches may be closed and the second and third switches may be open on a first phase state control signal; and the second and third switches may be closed and the first and fourth switches may be open on a second phase state control signal.
  • the first and second phase state control signals may be from a clock generator, wherein the first control signal may be at a first logic level and the second control signal may be at a second logic level.
  • the first, second, third and fourth switches may be metal oxide semiconductor field effect transistors (MOSFETs).
  • MOSFETs may be P-channel MOSFETs.
  • the MOSFETs may be N-channel MOSFETs.
  • transistors may be coupled at inputs and outputs of the modulator circuit for providing low impedance nodes to maintain substantially equal electrical potentials thereon regardless of input voltages to the input and feedback transconductors.
  • the input and feedback transconductors may be fabricated on an integrated circuit die.
  • a current-feedback instrumentation amplifier having gain error correction may comprise: input trans conductor may comprise a differential pair may comprise first and second transistors, first and second tail current sources, and a first degeneration resistor coupled between the first and the second transistors; a feedback transconductor may comprise a differential pair may comprise third and fourth transistors, third and fourth tail current sources, and a first degeneration resistor coupled between the third and the third transistors; and a first modulator circuit coupled between the first and third tail current sources, and the first and third transistors; a second modulator circuit coupled between the second and fourth tail current sources, and the second and fourth transistors; wherein during the first phase signal the first modulator circuit couples the first tail current source to the first transistor and the third tail current source to the third transistor, and the second modulator circuit couples the second tail current source to the second transistor and the fourth tail current to the fourth transistor; wherein during the second phase signal the first modulator circuit couples the first tail current source to the third transistor and the third tail current source to the first transistor, and the second modul
  • a current-feedback instrumentation amplifier having gain error correction may comprise: an input transconductor may comprise a first differential pair of transistors, and a first tail current source; a feedback transconductor may comprise a second differential pair of transistors, and a second tail current source; and a modulator circuit coupled between the first and second tail current sources, and the first and second differential pairs of transistors; wherein during a first phase state the modulator circuit couples the first tail current source to the first differential pair of transistors and the second tail current source to the second differential pair of transistors, and wherein during a second phase state the modulator circuit couples the first tail current source to the second differential pair of transistors, and the second tail current source to the first differential pair of transistors.
  • Figure 1 illustrates a schematic diagram of a prior art current-feedback instrumentation amplifier that uses preamplifiers
  • Figure 2 illustrates a schematic diagram of a prior art current-feedback instrumentation amplifier with degenerated differential pairs
  • Figure 3 illustrates a schematic diagram of a current-feedback instrumentation amplifier comprising a tail current source modulator circuit, according to a specific example embodiment of this disclosure
  • Figure 4A illustrates a schematic diagram of the current-feedback instrumentation amplifier shown in Figure 3 in a first phase state
  • Figure 4B illustrates a schematic diagram of the current-feedback instrumentation amplifier shown in Figure 3 in a second phase state
  • Figure 5A illustrates a schematic diagram of a current-feedback instrumentation amplifier comprising a tail current source modulator circuit placed between low-impedance nodes, according to another specific example embodiment of this disclosure
  • Figure 5B illustrates a schematic diagram of an example modulator circuit for use in the current-feedback instrumentation amplifiers of Figures 3 and 5 A;
  • Figure 6 illustrates a schematic diagram of a current-feedback instrumentation amplifier comprising modulator circuits and split tail current sources, according to yet another specific example embodiment of this disclosure
  • Figure 7 illustrates a schematic diagram of a current-feedback instrumentation amplifier without degeneration resistors and comprising a tail current source modulator circuit, according to still another specific example embodiment of this disclosure
  • Figure 8 illustrates a schematic diagram of a current-feedback instrumentation amplifier comprising a tail current source modulator circuit, according to another specific example embodiment of this disclosure.
  • Figure 9 illustrates a schematic diagram of a current-feedback instrumentation amplifier comprising a tail current source modulator circuit placed between low-impedance nodes, according to still yet another specific example embodiment of this disclosure.
  • the present disclosure provides a current feed-back instrumentation amplifier (CFIA) fabricated on an integrated circuit die and comprising a circuit architecture that is based on a differential pair with degeneration.
  • the present CFIA includes a modulator circuit that reduces the contribution to the CFIA's gain error of random mismatch between the tail currents of the input and feedback transconductors.
  • the modulator circuit operates on a clock cycle to periodically swap the tail currents of each transconductor with each other. As a result, even if the tail currents are mismatched, on average the tail currents (related to the transconductor gain) will be approximately equal, and the contribution of the tail current difference to the gain error is canceled out.
  • the present disclosure is directed toward an architecture for a CFIA comprising differential pair transistors with degeneration for amplifying small differential voltages in the presence of large common-mode voltages.
  • the present architecture employs "chopping" (e.g., dynamic correction) of the tail current sources for each transconductor to average out the tail current values in each transconductor, reducing mismatch and improving overall gain error and linearity.
  • chopping e.g., dynamic correction
  • the device includes a modulator circuit electrically coupled between the tail currents to input and feedback transconductors.
  • the modulator circuit may include a circuit comprising four switches that operate in two phases controlled by a clock signal: in phase 1, the switches allow the corresponding tail current to flow into each transconductor; in phase 2, the switches operate to swap the tail currents, so that the previous input tail current flows into the feedback trans conductor and the previous feedback tail current flows into the input transconductor.
  • FIG. 200 depicted is a schematic diagram of a prior art current-feedback instrumentation amplifier.
  • An example current-feedback instrumentation amplifier (CFIA) may use a differential pair with degeneration architecture.
  • the CFIA 200 includes an input transconductor G m ,iN that operates on differential input voltages VINP and VINN, and a feedback transconductor Gm,FB that operates on feedback voltages VFBN and VFBP.
  • Each transconductor (G m ,iN and G M ,FB) has a tail current source ITAIL.IN and ITAIL,FB, respectively.
  • Each transconductor (G m ,iN and G M ,FB) includes degeneration resistors RD.IN, and RD,FB, respectively.
  • Both transconductors (Gm,iN and G M ,FB) are coupled together and output a signal to an amplifier AR as shown in Figure 2.
  • gmicd is the transconductance of transistors Mib and Mid, and RD,IN and RD,FB have already been defined above.
  • gmiab gmicd
  • n a b and n C d are the sub-threshold constants of transistors Mi a and Mib, and Mi c and Mid, respectively; and VT.ab and VT.cd the thermal voltages of Mia and Mib, and Mic and Mid, respectively.
  • the gain error will therefore depend on the matching between RD.IN and RD,FB, ITAILJN and ITAIL,FB, nab and n C d, and Vi,ab and Vi.cd.
  • a CFIA may use the circuit architecture shown in Figure 3 to minimize or substantially eliminate the contribution of mismatch between ITAILJN and ITAIL,FB to the CFIA gain error.
  • the CFIA 300 may comprise the CFIA 200 architecture shown in Figure 2 and a modulator circuit 302 disposed between the tail current sources ITAILJN and ITAIL,FB and the degeneration resistors RD,IN and RD,FB.
  • the modulator circuit 302 implements dynamic correction of the tail current mismatch by periodically swapping tail current sources ITAILJN and ITAIL,FB.
  • the modulator circuit 302 may operate based on input received as one or more regulated signals phil and phi2, e.g., provided by a clock or another regulating circuit.
  • the regulated signals phil and phi2 alternately switch between low and high logic levels every half clock cycle, swapping the tail current sources between transconductors G m ,iN and G M ,FB twice every clock cycle. This approach allows the portion of the gain error contributed by mismatched tail currents to be continuously corrected during operation of the CFIA 300.
  • the modulator circuit 302 of Figure 3 may include four switches 302A-302D that may be adapted to alternately connect each tail current, ITAILJN and ITAIL,FB, in the transconductors GmjN and G M ,FB.
  • the regulated signals phil and phi2 may be provided from a clock signal and are shown to be in opposite phase, such that phil is low when phi2 is high, and vice-versa.
  • the modulator circuit 302 switches the tail current sources, and the baseline current ITAIL flows into the feedback transconductor G M ,FB and the mismatched tail current (1+ 5)*ITAIL flows into the input transconductor G m ,iN.
  • Gm,iN will be G m (l+ ⁇ )
  • G M ,FB will be equal to G m
  • the gain error will be approximately + ⁇ . If during one half clock cycle, the gain error is - ⁇ , and during the other half clock cycle + ⁇ , over a complete clock cycle the gain error will be on average zero.
  • the modulator circuit 302 provides a continuous correction of the gain error during CFIA 300 operation.
  • the implemented architecture provides other operative advantages, including without limitation: low noise-to-power ratio, substantially no effect of temperature or process variation on functionality; no post-production trimming of components required; reduced test time and cost; area-efficient architecture, requiring as new components only four switches comprising the modulator circuit, using existing infrastructure such as oscillators and ripple filters for offset voltage (caused by swapping tail currents) correction, and not needing additional memory (e.g., non-volatile memory to store trimming values).
  • FIG. 5A depicted is a schematic diagram of a current-feedback instrumentation amplifier comprising a tail current source modulator circuit placed between low-impedance nodes, according to another specific example embodiment of this disclosure.
  • a modulator circuit 502 swaps tail current sources between trans conductors G m ,iN and G M ,FB in accordance with the description of the circuit architecture shown in Figure 3.
  • FIG. 5B depicted is a schematic diagram of an example modulator circuit for use in the current-feedback instrumentation amplifiers of Figures 3 and 5A.
  • the modulator circuit 502 may be placed between low-impedance nodes (e.g., between transistors IVUa and IVUca, and IVUb and IVUcb) that carry the tail currents of the respective transconductors.
  • low-impedance nodes e.g., between transistors IVUa and IVUca, and IVUb and IVUcb
  • switch 502A may be disposed between transistors M4a and IVUca
  • switch 502B may be disposed between transistors IVUa and IVUcb
  • switch 502C may be disposed between transistors IVUb and IVUca
  • switch 502D may be disposed between transistors IVUb and M 4c t>; to control the flow of the tail currents as described above with respect to the modulator circuit 302 of Figures 3 A and 3B.
  • the low-impedances between the transistors M4a and IVUca, and M4b and IVUcb may be maintained at substantially equal electrical potentials regardless of the common mode voltages of nodes VINP and VINN, and VFBP and VFBN on the respective transconductors.
  • substantially equal potentials may be maintained through the operation of cascode transistors IVUca and IVUcb on both the input and output sides of the modulator circuit 502.
  • the switches 502 may be transistors 502A-502D, and these transistors may be metal oxide semiconductor field effect transistors (MOSFETs).
  • MOSFETs metal oxide semiconductor field effect transistors
  • transistors IVUa, IVUca, IVUb and IVUcb may be MOSFETs.
  • a CFIA may use the circuit architecture shown to minimize or substantially eliminate the CFIA gain error from the mismatches between the tail currents to the transconductor G m ,iN, and the transconductor G M ,FB.
  • the circuit architecture shown to minimize or substantially eliminate the CFIA gain error from the mismatches between the tail currents to the transconductor G m ,iN, and the transconductor G M ,FB.
  • two tail current sources for each transconductor one for each of the differential pair transistors of a transconductor may be provided.
  • the modulator circuits 602 and 604 implement dynamic correction, as more fully described in Figures 3, 4 A and 4B above, of the tail current mismatch by periodically swapping each of tail current sources of the input trans conductor and the feedback transconductor; thus, during one period the "baseline" tail currents ITAIL,IN/2 flow into each of the transistors comprising the input transconductor G m ,iN and the mismatched tail currents ITAIL,FB flow into each of the transistors comprising the feedback transconductor G M ,FB, then the modulator circuits 602 and 604 switch the tail current sources, and during the next period the baseline currents ITAIL,IN/2 flow into each of the transistors comprising the feedback transconductor Gm,FB and the mismatched tail currents ITAIL,FB flow into each of the transistors comprising the input transconductor Gm,iN.
  • the modulator circuits 602 and 604 may operate based on inputs received as one or more regulated signals phil and phi2, e.g., provided by a clock or another regulating circuit.
  • the regulated signals phil and phi2 alternately switch between low and high logic levels every half clock cycle, swapping the tail current sources between transconductors G m ,iN and G M ,FB twice every clock cycle; during one half clock cycle, the gain error will be roughly equal to - ⁇ , and during the other half clock cycle, the gain error will be roughly equal to + ⁇ , so that the gain error over a complete clock cycle averages out to zero.
  • This approach allows the portion of the gain error contributed by mismatched tail currents to be continuously corrected during operation of the CFIA 600.
  • FIG 7 depicted is a schematic diagram of a current-feedback instrumentation amplifier without degeneration resistors and comprising a tail current source modulator circuit, according to still another specific example embodiment of this disclosure.
  • Tail current swapping can be effective for reducing gain error even without the degeneration resistors used in the CFIAs 300, 500 and 600.
  • Operation of the CFIA 700 shown in Figure 7 operates in substantially the same fashion as the CFIA 300 described hereinabove, but is configured without degeneration resistors RD ( Figure 3).
  • FIG 8 depicted is a schematic diagram of a current-feedback instrumentation amplifier comprising a tail current source modulator circuit, according to another specific example embodiment of this disclosure.
  • the CFIA 800 shown in Figure 8 is configured and operates in substantially the same fashion as the CFIA 300 described hereinabove, but its architecture comprises N-channel MOSFETS instead of P-channel MOSFETS ( Figure 3).
  • depicted is a schematic diagram of a current-feedback instrumentation amplifier comprising a tail current source modulator circuit placed between low-impedance nodes, according to still yet another specific example embodiment of this disclosure.
  • the CFIA 900 shown in Figure 9 is configured and operates in substantially the same fashion as the CFIA 500 described hereinabove, but its architecture comprises N-channel MOSFETS instead of P-channel MOSFETS (Figure 5).

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Abstract

A current feed-back instrumentation amplifier (CFIA) comprises a differential pair (M1a, M1b) with degeneration for amplifying small differential voltages in the presence of large common-mode voltages. The CFIA includes input and feedback transconductors and a chopping modulator circuit (302) that continuously swaps tail current sources between the transconductors. This tail current swapping reduces the contribution to the CFIA's gain error caused by random mismatch between the tail currents of the input and feedback transconductors. The modulator circuit (302) operates on a clock cycle to periodically swap the tail current sources. As a result, even if the tail currents are mismatched, on average the tail currents (transconductor gains) will approximately equal out, and the contribution of the tail current difference to the gain error is canceled out.

Description

DYNAMIC CORRECTION OF GAIN ERROR IN CURRENT-FEEDBACK
INSTRUMENTATION AMPLIFIERS
RELATED PATENT APPLICATION
This application claims priority to commonly owned United States Provisional Patent
Application Serial Number 62/500,393; filed May 2, 2017; entitled "Dynamic Correction of Gain Error in Current-Feedback Instrumentation Amplifiers," by Serban Motoroiu and Jim Nolan; and is hereby incorporated by reference herein for all purposes.
TECHNICAL FIELD
The present disclosure relates to instrumentation amplifiers, and, more particularly, to dynamically correcting the gain error of an instrumentation amplifier that uses a current- feedback circuit architecture.
BACKGROUND
The gain error, e.g., the difference between the actual transfer function and an ideal transfer function of a current feed-back instrumentation amplifier (CFIA) depends on the accuracy of matching between the CFIA's input transconductor and feedback trans conductor. Some existing CFIAs try to address the gain error using an architecture in which each transconductor includes pre-amplifiers to create a transfer function proportional to the ratio between the degeneration resistors of the input and feedback transconductors, see Figure 1. The advantage of this circuit architecture is that it provides a gain error that depends almost exclusively on matching of resistors which is superior to the matching of transistors. While the preamplifiers provide an overall low gain error, their noise adds to the total noise of the instrumentation amplifier, making this architecture less suitable for low noise designs. Another disadvantage is the presence of feedback loops around each pre-amplifier, which makes frequency compensation rather complex and difficult.
In another approach, the CFIA's transconductors are each based on a differential pair of transistors with degeneration. The noise is significantly lower than the CFIA implementation that uses preamplifiers, and there are no extra feedback loops. However, the gain error will also change: it will now be affected not only by the mismatch between the degeneration resistors of the input and feedback degeneration transconductors, but also by any mismatch between the degenerated differential paired transistors of each transconductor and by any mismatch between the respective tail currents being fed into each transconductor. As noted above, resistors match much better than transistors do, so the transistor mismatch will have a dominant effect on the gain error.
SUMMARY
Therefore, what is needed is a CFIA having a circuit architecture that minimizes the mismatch between other elements, such as the transistors and/or the tail currents.
According to an embodiment, a method for gain error correction in a current-feedback instrumentation amplifier may comprise the steps of: providing an input transconductor may comprise a first differential pair of transistors, first degeneration resistors coupled to the first differential pair of transistors, and a first tail current source; providing a feedback transconductor may comprise a second differential pair of transistors, second degeneration resistors coupled to the second differential pair of transistors, and a second tail current source; and providing a modulator circuit coupled between the first and second tail current sources, and the first and second degeneration resistors; controlling the modulator circuit by alternating first and second phase signals; wherein during the first phase signal may comprise the steps of coupling the first tail current source to the first degeneration resistors and the second tail current source to the second degeneration resistors with the modulator circuit; and wherein during the second phase signal may comprise the steps of coupling the first tail current source to the second degeneration resistors, and the second tail current source to the first degeneration resistors with the modulator circuit.
According to a further embodiment of the method, gain error caused by a difference between the first and second tail current sources may be averaged out during the first and second phases. According to a further embodiment of the method, may comprise the step of coupling the input and feedback trans conductors to an amplifier. According to a further embodiment of the method, may comprise the step of coupling a feedback network between an output of the amplifier and inputs of the feedback transconductor. According to a further embodiment of the method, the feedback network may determine gain of the current-feedback instrumentation amplifier.
According to another embodiment, a method for gain error correction in a current- feedback instrumentation amplifier may comprise the steps of: providing an input transconductor may comprise a first differential pair may comprise first and second transistors, first and second tail current sources, and a first degeneration resistor coupled between the first and the second transistors; providing a feedback transconductor may comprise a second differential pair may comprise third and fourth transistors, third and fourth tail current sources, and a first degeneration resistor coupled between the third and the fourth transistors; and providing a first modulator circuit coupled between the first and third tail current sources, and the first and third transistors; providing a second modulator circuit coupled between the second and fourth tail current sources, and the second and fourth transistors; controlling the first and second modulator circuits by alternating first and second phase signals; wherein during the first phase signal may comprise the steps of: coupling the first tail current source to the first transistor and the third tail current source to the third transistor with the first modulator circuit, and coupling the second tail current source to the second transistor and the fourth tail current to the fourth transistor with the second modulator circuit; wherein during the second phase signal may comprise the steps of: coupling the first tail current source to the third transistor and the third tail current source to the first transistor with the first modulator circuit, and coupling the second tail current source to the fourth transistor and the fourth tail current to the second transistor with the second modulator circuit. According to a further embodiment of the method, gain error caused by a difference between the first and second tail current sources may be averaged out during the first and second phases.
According to yet another embodiment, a method for gain error correction in a current- feedback instrumentation amplifier may comprise the steps of: providing an input transconductor may comprise a first differential pair of transistors, and a first tail current source; providing a feedback transconductor may comprise a second differential pair of transistors, and a second tail current source; and providing a modulator circuit coupled between the first and second tail current sources, and the first and second differential pairs of transistors; controlling the modulator circuit by alternating first and second phase signals; wherein during the first phase signal may comprise the steps of coupling the first tail current source to the first differential pair of transistors and the second tail current source to the second differential pair of transistors with the modulator circuit; and wherein during the second phase signal may comprise the steps of coupling the first tail current source to the second differential pair of transistors, and the second tail current source to the first differential pair of transistors with the modulator circuit. According to a further embodiment of the method, gain error caused by a difference between the first and second tail current sources may be averaged out during the first and second phases. According to still another embodiment, a current-feedback instrumentation amplifier having gain error correction may comprise: an input trans conductor that may comprise a first differential pair of transistors, first degeneration resistors coupled to the first differential pair of transistors, and a first tail current source; a feedback trans conductor may comprise a second differential pair of transistors, second degeneration resistors coupled to the second differential pair of transistors, and a second tail current source; and a modulator circuit coupled between the first and second tail current sources, and the first and second degeneration resistors; wherein during a first phase state the modulator circuit couples the first tail current source to the first degeneration resistors and the second tail current source to the second degeneration resistors, and wherein during a second phase state the modulator circuit couples the first tail current source to the second degeneration resistors, and the second tail current source to the first degeneration resistors.
According to a further embodiment, gain error caused by a difference between the first and second tail current sources may be averaged out during the first and second phases. According to a further embodiment, an amplifier may have inputs coupled to outputs from the input and feedback trans conductors. According to a further embodiment, a feedback network may be coupled between an output of the amplifier and inputs of the feedback transconductor.
According to a further embodiment, the feedback network may comprise: a first feedback resistor; a second feedback resistor; and a voltage reference; the first and second feedback resistors and the voltage reference may be connected in series; a first input of the feedback transconductor may be coupled to a node between the second feedback resistor and the voltage reference; a second input of the feedback transconductor may be coupled to a node between the first feedback resistor and the second feedback resistor; and the output of the amplifier may be coupled to the first feedback resistor; wherein gain may be determined by a ratio of resistance values of the first and second feedback resistors. According to a further embodiment, the input transconductor may have a positive input and a negative input.
According to a further embodiment, the modulator circuit may comprise: a first switch coupled between the first tail current source and the first degeneration resistors; a second switch coupled between the first tail current source and the second degeneration resistors; a third switch coupled between the second tail current source and the first degeneration resistors; and a fourth switch coupled between the second tail current source and the second degeneration resistors; wherein the first and fourth switches may be closed and the second and third switches may be open on a first phase state control signal; and the second and third switches may be closed and the first and fourth switches may be open on a second phase state control signal.
According to a further embodiment, the first and second phase state control signals may be from a clock generator, wherein the first control signal may be at a first logic level and the second control signal may be at a second logic level. According to a further embodiment, the first, second, third and fourth switches may be metal oxide semiconductor field effect transistors (MOSFETs). According to a further embodiment, the MOSFETs may be P-channel MOSFETs. According to a further embodiment, the MOSFETs may be N-channel MOSFETs.
According to a further embodiment, transistors may be coupled at inputs and outputs of the modulator circuit for providing low impedance nodes to maintain substantially equal electrical potentials thereon regardless of input voltages to the input and feedback transconductors. According to a further embodiment, the input and feedback transconductors may be fabricated on an integrated circuit die.
According to another embodiment, a current-feedback instrumentation amplifier having gain error correction may comprise: input trans conductor may comprise a differential pair may comprise first and second transistors, first and second tail current sources, and a first degeneration resistor coupled between the first and the second transistors; a feedback transconductor may comprise a differential pair may comprise third and fourth transistors, third and fourth tail current sources, and a first degeneration resistor coupled between the third and the third transistors; and a first modulator circuit coupled between the first and third tail current sources, and the first and third transistors; a second modulator circuit coupled between the second and fourth tail current sources, and the second and fourth transistors; wherein during the first phase signal the first modulator circuit couples the first tail current source to the first transistor and the third tail current source to the third transistor, and the second modulator circuit couples the second tail current source to the second transistor and the fourth tail current to the fourth transistor; wherein during the second phase signal the first modulator circuit couples the first tail current source to the third transistor and the third tail current source to the first transistor, and the second modulator circuit couples the second tail current source to the fourth transistor and the fourth tail current to the second transistor.
According to yet another embodiment, a current-feedback instrumentation amplifier having gain error correction may comprise: an input transconductor may comprise a first differential pair of transistors, and a first tail current source; a feedback transconductor may comprise a second differential pair of transistors, and a second tail current source; and a modulator circuit coupled between the first and second tail current sources, and the first and second differential pairs of transistors; wherein during a first phase state the modulator circuit couples the first tail current source to the first differential pair of transistors and the second tail current source to the second differential pair of transistors, and wherein during a second phase state the modulator circuit couples the first tail current source to the second differential pair of transistors, and the second tail current source to the first differential pair of transistors.
BRIEF DESCRIPTION OF THE DRAWINGS
A more complete understanding of the present disclosure may be acquired by referring to the following description taken in conjunction with the accompanying drawings wherein:
Figure 1 illustrates a schematic diagram of a prior art current-feedback instrumentation amplifier that uses preamplifiers;
Figure 2 illustrates a schematic diagram of a prior art current-feedback instrumentation amplifier with degenerated differential pairs;
Figure 3 illustrates a schematic diagram of a current-feedback instrumentation amplifier comprising a tail current source modulator circuit, according to a specific example embodiment of this disclosure;
Figure 4A illustrates a schematic diagram of the current-feedback instrumentation amplifier shown in Figure 3 in a first phase state;
Figure 4B illustrates a schematic diagram of the current-feedback instrumentation amplifier shown in Figure 3 in a second phase state;
Figure 5A illustrates a schematic diagram of a current-feedback instrumentation amplifier comprising a tail current source modulator circuit placed between low-impedance nodes, according to another specific example embodiment of this disclosure;
Figure 5B illustrates a schematic diagram of an example modulator circuit for use in the current-feedback instrumentation amplifiers of Figures 3 and 5 A;
Figure 6 illustrates a schematic diagram of a current-feedback instrumentation amplifier comprising modulator circuits and split tail current sources, according to yet another specific example embodiment of this disclosure;
Figure 7 illustrates a schematic diagram of a current-feedback instrumentation amplifier without degeneration resistors and comprising a tail current source modulator circuit, according to still another specific example embodiment of this disclosure; Figure 8 illustrates a schematic diagram of a current-feedback instrumentation amplifier comprising a tail current source modulator circuit, according to another specific example embodiment of this disclosure; and
Figure 9 illustrates a schematic diagram of a current-feedback instrumentation amplifier comprising a tail current source modulator circuit placed between low-impedance nodes, according to still yet another specific example embodiment of this disclosure.
While the present disclosure is susceptible to various modifications and alternative forms, specific example embodiments thereof have been shown in the drawings and are herein described in detail. It should be understood, however, that the description herein of specific example embodiments is not intended to limit the disclosure to the forms disclosed herein.
DETAILED DESCRIPTION
In accordance with some embodiments of the disclosed subject matter, the present disclosure provides a current feed-back instrumentation amplifier (CFIA) fabricated on an integrated circuit die and comprising a circuit architecture that is based on a differential pair with degeneration. The present CFIA includes a modulator circuit that reduces the contribution to the CFIA's gain error of random mismatch between the tail currents of the input and feedback transconductors. The modulator circuit operates on a clock cycle to periodically swap the tail currents of each transconductor with each other. As a result, even if the tail currents are mismatched, on average the tail currents (related to the transconductor gain) will be approximately equal, and the contribution of the tail current difference to the gain error is canceled out.
The present disclosure is directed toward an architecture for a CFIA comprising differential pair transistors with degeneration for amplifying small differential voltages in the presence of large common-mode voltages. The present architecture employs "chopping" (e.g., dynamic correction) of the tail current sources for each transconductor to average out the tail current values in each transconductor, reducing mismatch and improving overall gain error and linearity. To dynamically correct the tail currents, the device includes a modulator circuit electrically coupled between the tail currents to input and feedback transconductors. The modulator circuit may include a circuit comprising four switches that operate in two phases controlled by a clock signal: in phase 1, the switches allow the corresponding tail current to flow into each transconductor; in phase 2, the switches operate to swap the tail currents, so that the previous input tail current flows into the feedback trans conductor and the previous feedback tail current flows into the input transconductor.
Referring now to the drawings, the details of example embodiments are schematically illustrated. Like elements in the drawings will be represented by like numbers, and similar elements will be represented by like numbers with a different lower-case letter suffix.
Referring now to Figure 2, depicted is a schematic diagram of a prior art current- feedback instrumentation amplifier. An example current-feedback instrumentation amplifier (CFIA), generally represented by the numeral 200, may use a differential pair with degeneration architecture. The CFIA 200 includes an input transconductor Gm,iN that operates on differential input voltages VINP and VINN, and a feedback transconductor Gm,FB that operates on feedback voltages VFBN and VFBP. Each transconductor (Gm,iN and GM,FB) has a tail current source ITAIL.IN and ITAIL,FB, respectively. Each transconductor (Gm,iN and GM,FB) includes degeneration resistors RD.IN, and RD,FB, respectively. A first pair of transistors Mia and Mib (for Gm,iN), and a second pair of transistors Mic and Mid (for GM,FB). Both transconductors (Gm,iN and GM,FB) are coupled together and output a signal to an amplifier AR as shown in Figure 2.
The gain of the CFIA may be defined as Gain = Gm,iN / Gm,FB * (I+R1/R2) and the Gain error = Gm,iN / GM,FB -1 , where it is assumed the matching between the external resistors Ri and R2 is much better than the match between Gm,iN and GM,FB. For the CFIA 200, Gm N = -— 3mlab— and Gm FB = -— 9mx d ; where gmiab is the trans conductance of transistors Mia
2+9mlabRD,lN ' 2+9mlcdRD,FB
and Mib, and gmicd is the transconductance of transistors Mib and Mid, and RD,IN and RD,FB have already been defined above. For simplicity, it is assumed there is no mismatch between Mia and Mib and they have the same transconductance, gmiab. Likewise, it is assumed there is no mismatch between Mic and Mid and they have the same transconductance gmicd. For convenience, one usually choses gmiab = gmicd, and RD,IN=RD,FB, such that the ratio Gm,iN/GM,FB may be unity. For transistors operating in the sub-threshold region gmlab = 'TA1L,1N and
2nab vT,ab
9miab = 'TA1L,FB , where ITAILJN and ITAIL,FB are the tail currents of Gm,iN and GM,FB,
2ncdVT cd
respectively; nab and nCd are the sub-threshold constants of transistors Mia and Mib, and Mic and Mid, respectively; and VT.ab and VT.cd the thermal voltages of Mia and Mib, and Mic and Mid, respectively. The gain error will therefore depend on the matching between RD.IN and RD,FB, ITAILJN and ITAIL,FB, nab and nCd, and Vi,ab and Vi.cd. In the ideal case, RDJN = RD,FB, ITAILJN = ITAIL,FB, nab = nCd, Vi.ab = VT.cd, and the gain error is zero This disclosure addresses the contribution of the mismatch between the two ITAIL currents to the overall gain error.
Although the above description was based on the assumption that the transistors Mia, Mib, Mic and Mid operate in the sub-threshold (or weak inversion) region, this invention is not limited to this particular region, e.g., it is equally valid for transistors operating in the saturation region.
Referring now to Figure 3, depicted is a schematic diagram of a current-feedback instrumentation amplifier comprising a tail current source modulator circuit, according to a specific example embodiment of this disclosure. A CFIA, generally represented by the numeral 300, may use the circuit architecture shown in Figure 3 to minimize or substantially eliminate the contribution of mismatch between ITAILJN and ITAIL,FB to the CFIA gain error. In some embodiments, the CFIA 300 may comprise the CFIA 200 architecture shown in Figure 2 and a modulator circuit 302 disposed between the tail current sources ITAILJN and ITAIL,FB and the degeneration resistors RD,IN and RD,FB. The modulator circuit 302 implements dynamic correction of the tail current mismatch by periodically swapping tail current sources ITAILJN and ITAIL,FB. In some embodiments, the modulator circuit 302 may operate based on input received as one or more regulated signals phil and phi2, e.g., provided by a clock or another regulating circuit. In an example implementation, the regulated signals phil and phi2 alternately switch between low and high logic levels every half clock cycle, swapping the tail current sources between transconductors Gm,iN and GM,FB twice every clock cycle. This approach allows the portion of the gain error contributed by mismatched tail currents to be continuously corrected during operation of the CFIA 300.
Referring to Figures 4A and 4B, depicted are schematic diagrams of the current- feedback instrumentation amplifier shown in Figure 3 in first and second phase states, respectively. The modulator circuit 302 of Figure 3, may include four switches 302A-302D that may be adapted to alternately connect each tail current, ITAILJN and ITAIL,FB, in the transconductors GmjN and GM,FB. The regulated signals phil and phi2 may be provided from a clock signal and are shown to be in opposite phase, such that phil is low when phi2 is high, and vice-versa. As shown in Figure 4A, when phil is low and phi2 is high, the "outer" switches 302A and 302D are closed, and the "inner" switches 302B and 302C are open. As shown in Figure 4B, when the desired period (e.g., a clock cycle, clock half-cycle, etc.) elapses the values of the regulated signals phil, phi2 flip; whereby phil is high and phi2 is low, the "outer" switches 302A and 302D are open, and the "inner" switches 302B and 302C are closed.
To illustrate how the current invention corrects the effect of tail current mismatch to gain error, it may be assumed that the tail current of Gm,iN, ITAIL.IN has a nominal value of ITAIL, while the tail current of trans conductor GM,FB suffers from a random mismatch denoted by δ such that its value is ITAIL,FB = ITAIL + 5*ITAIL. During a first phase (phil low and phi2 high - see Figure 4A) the "baseline" current ITAIL flows into the input trans conductor Gm,iN and the mismatched tail current (1+ 5)*ITAIL flows into the feedback transconductor GM,FB. The transconductance of transistors Mia and Mib, gmiab will have a nominal value equal to gm, while the transconductance of Mic and Mid will suffer from an equal mismatch, δ, gmicd = gm + 5*gm; GmjNwill be equal to a nominal value Gm, while GM,FB will be approximately equal to Gm(l+5). Therefore, during this phase, the gain error will be approximately -δ. Then in the second phase (phil high and phi2 low - see Figure 4B) the modulator circuit 302 switches the tail current sources, and the baseline current ITAIL flows into the feedback transconductor GM,FB and the mismatched tail current (1+ 5)*ITAIL flows into the input transconductor Gm,iN. During this cycle, Gm,iN will be Gm(l+ δ), GM,FB will be equal to Gm, and the gain error will be approximately +δ. If during one half clock cycle, the gain error is -δ, and during the other half clock cycle +δ, over a complete clock cycle the gain error will be on average zero. Thus, the modulator circuit 302 provides a continuous correction of the gain error during CFIA 300 operation.
Additionally, the implemented architecture provides other operative advantages, including without limitation: low noise-to-power ratio, substantially no effect of temperature or process variation on functionality; no post-production trimming of components required; reduced test time and cost; area-efficient architecture, requiring as new components only four switches comprising the modulator circuit, using existing infrastructure such as oscillators and ripple filters for offset voltage (caused by swapping tail currents) correction, and not needing additional memory (e.g., non-volatile memory to store trimming values).
Additionally, various embodiments of the present CFIA architecture are suitable for high-voltage designs, even when the difference between the common-mode voltage on the input pins VINP and VINN, and the common-mode voltage on the feedback pins VFBP and VFBN is large (e.g., over five (5) volts). Referring to Figure 5A, depicted is a schematic diagram of a current-feedback instrumentation amplifier comprising a tail current source modulator circuit placed between low-impedance nodes, according to another specific example embodiment of this disclosure. In the CFIA architecture, generally represented by the numeral 500, a modulator circuit 502 swaps tail current sources between trans conductors Gm,iN and GM,FB in accordance with the description of the circuit architecture shown in Figure 3.
Referring to Figure 5B, depicted is a schematic diagram of an example modulator circuit for use in the current-feedback instrumentation amplifiers of Figures 3 and 5A. As shown in Figures 5A and 5B, the modulator circuit 502 may be placed between low-impedance nodes (e.g., between transistors IVUa and IVUca, and IVUb and IVUcb) that carry the tail currents of the respective transconductors. For example, switch 502A may be disposed between transistors M4a and IVUca, switch 502B may be disposed between transistors IVUa and IVUcb, switch 502C may be disposed between transistors IVUb and IVUca, and switch 502D may be disposed between transistors IVUb and M4ct>; to control the flow of the tail currents as described above with respect to the modulator circuit 302 of Figures 3 A and 3B. The low-impedances between the transistors M4a and IVUca, and M4b and IVUcb may be maintained at substantially equal electrical potentials regardless of the common mode voltages of nodes VINP and VINN, and VFBP and VFBN on the respective transconductors. In one embodiment, substantially equal potentials may be maintained through the operation of cascode transistors IVUca and IVUcb on both the input and output sides of the modulator circuit 502. The switches 502 may be transistors 502A-502D, and these transistors may be metal oxide semiconductor field effect transistors (MOSFETs). Likewise, transistors IVUa, IVUca, IVUb and IVUcb may be MOSFETs.
Referring to Figure 6, depicted is a schematic diagram of a current-feedback instrumentation amplifier comprising modulator circuits and split tail current sources, according to yet another specific example embodiment of this disclosure. A CFIA, generally represented by the numeral 600, may use the circuit architecture shown to minimize or substantially eliminate the CFIA gain error from the mismatches between the tail currents to the transconductor Gm,iN, and the transconductor GM,FB. Instead of using one tail current source for each of the transconductors, and splitting (dividing by two through resistors RD/2) the current from each tail current source to the differential transistor pairs, two tail current sources for each transconductor, one for each of the differential pair transistors of a transconductor may be provided. The modulator circuits 602 and 604 implement dynamic correction, as more fully described in Figures 3, 4 A and 4B above, of the tail current mismatch by periodically swapping each of tail current sources of the input trans conductor and the feedback transconductor; thus, during one period the "baseline" tail currents ITAIL,IN/2 flow into each of the transistors comprising the input transconductor Gm,iN and the mismatched tail currents ITAIL,FB flow into each of the transistors comprising the feedback transconductor GM,FB, then the modulator circuits 602 and 604 switch the tail current sources, and during the next period the baseline currents ITAIL,IN/2 flow into each of the transistors comprising the feedback transconductor Gm,FB and the mismatched tail currents ITAIL,FB flow into each of the transistors comprising the input transconductor Gm,iN. In some embodiments, the modulator circuits 602 and 604 may operate based on inputs received as one or more regulated signals phil and phi2, e.g., provided by a clock or another regulating circuit. In an example implementation, the regulated signals phil and phi2 alternately switch between low and high logic levels every half clock cycle, swapping the tail current sources between transconductors Gm,iN and GM,FB twice every clock cycle; during one half clock cycle, the gain error will be roughly equal to -δ, and during the other half clock cycle, the gain error will be roughly equal to +δ, so that the gain error over a complete clock cycle averages out to zero. This approach allows the portion of the gain error contributed by mismatched tail currents to be continuously corrected during operation of the CFIA 600.
Referring to Figure 7, depicted is a schematic diagram of a current-feedback instrumentation amplifier without degeneration resistors and comprising a tail current source modulator circuit, according to still another specific example embodiment of this disclosure. Tail current swapping can be effective for reducing gain error even without the degeneration resistors used in the CFIAs 300, 500 and 600. Operation of the CFIA 700 shown in Figure 7 operates in substantially the same fashion as the CFIA 300 described hereinabove, but is configured without degeneration resistors RD (Figure 3).
Referring to Figure 8, depicted is a schematic diagram of a current-feedback instrumentation amplifier comprising a tail current source modulator circuit, according to another specific example embodiment of this disclosure. The CFIA 800 shown in Figure 8 is configured and operates in substantially the same fashion as the CFIA 300 described hereinabove, but its architecture comprises N-channel MOSFETS instead of P-channel MOSFETS (Figure 3). Referring to Figure 9, depicted is a schematic diagram of a current-feedback instrumentation amplifier comprising a tail current source modulator circuit placed between low-impedance nodes, according to still yet another specific example embodiment of this disclosure. The CFIA 900 shown in Figure 9 is configured and operates in substantially the same fashion as the CFIA 500 described hereinabove, but its architecture comprises N-channel MOSFETS instead of P-channel MOSFETS (Figure 5).
The present invention has been described in terms of one or more preferred embodiments, and it should be appreciated that many equivalents, altematives, variations, and modifications, aside from those expressly stated (e.g., methods of manufacturing, product by process, and so forth), are possible and within the scope of the invention.

Claims

CLAIMS What is claimed is:
1. A method for gain error correction in a current-feedback instrumentation amplifier, said method comprising the steps of:
providing an input transconductor, the input transconductor comprising:
a first differential pair of transistors;
first degeneration resistors coupled to the first differential pair of transistors; and
a first tail current source;
providing a feedback transconductor, the feedback transconductor comprising:
a second differential pair of transistors;
second degeneration resistors coupled to the second differential pair of transistors; and
a second tail current source;
providing a modulator circuit coupled between the first and second tail current sources, and the first and second degeneration resistors; and
controlling the modulator circuit by alternating first and second phase signals;
wherein:
controlling the modulator circuit during the first phase signal comprises the steps of coupling the first tail current source to the first degeneration resistors and the second tail current source to the second degeneration resistors with the modulator circuit; and
controlling the modulator circuit during the second phase signal comprises the steps of coupling the first tail current source to the second degeneration resistors, and the second tail current source to the first degeneration resistors with the modulator circuit.
2. The method according to Claim 1, wherein gain error caused by a difference between the first and second tail current sources is averaged out during the first and second phases.
3. The method according to any of Claims 1-2, further comprising the steps of: coupling the input and feedback transconductors to an amplifier; and coupling a feedback network between an output of the amplifier and inputs of the feedback transconductor.
4. The method according to Claim 3, wherein the feedback network determines gain of the current-feedback instrumentation amplifier.
5. A method for gain error correction in a current-feedback instrumentation amplifier, said method comprising the steps of:
providing an input transconductor, the input transconductor comprising:
a first differential pair comprising first and second transistors; first and second tail current sources; and
a first degeneration resistor coupled between the first and the second transistors; providing a feedback transconductor, the feedback transconductor comprising:
a second differential pair comprising third and fourth transistors; third and fourth tail current sources; and
a second degeneration resistor coupled between the third and the fourth transistors;
providing a first modulator circuit coupled between the first and third tail current sources, and the first and third transistors;
providing a second modulator circuit coupled between the second and fourth tail current sources, and the second and fourth transistors;
controlling the first and second modulator circuits by alternating first and second phase signals;
wherein controlling first and second modulator circuits with the first phase signal comprises:
coupling the first tail current source to the first transistor and the third tail current source to the third transistor with the first modulator circuit; and
coupling the second tail current source to the second transistor and the fourth tail current to the fourth transistor with the second modulator circuit; wherein controlling first and second modulator circuits with the first phase signal comprises:
coupling the first tail current source to the third transistor and the third tail current source to the first transistor with the first modulator circuit; and
coupling the second tail current source to the fourth transistor and the fourth tail current to the second transistor with the second modulator circuit;
wherein gain error caused by a difference between the tail current sources is averaged out.
6. A method for gain error correction in a current-feedback instrumentation amplifier, said method comprising the steps of:
providing an input transconductor, the input transconductor comprising
a first differential pair of transistors, and
a first tail current source;
providing a feedback transconductor, the feedback transconductor comprising: a second differential pair of transistors, and
a second tail current source; and
providing a modulator circuit coupled between the first and second tail current sources, and the first and second differential pairs of transistors; and
controlling the modulator circuit by alternating first and second phase signals; wherein controlling the modulator circuit with the first phase signal comprises coupling the first tail current source to the first differential pair of transistors and the second tail current source to the second differential pair of transistors with the modulator circuit; and
wherein controlling the modulator circuit with the second phase signal comprises coupling the first tail current source to the second differential pair of transistors, and the second tail current source to the first differential pair of transistors with the modulator circuit.
7. A current-feedback instrumentation amplifier having gain error correction, comprising:
an input transconductor comprising a first differential pair of transistors,
first degeneration resistors coupled to the first differential pair of transistors, and
a first tail current source;
a feedback transconductor comprising
a second differential pair of transistors,
second degeneration resistors coupled to the second differential pair of transistors, and
a second tail current source; and
a modulator circuit coupled between the first and second tail current sources, and the first and second degeneration resistors;
wherein during a first phase state the modulator circuit is configured to couple the first tail current source to the first degeneration resistors and the second tail current source to the second degeneration resistors; and
wherein during a second phase state the modulator circuit is configured to couple the first tail current source to the second degeneration resistors, and the second tail current source to the first degeneration resistors.
8. The current-feedback instrumentation amplifier according to Claim 7, wherein gain error caused by a difference between the first and second tail current sources is averaged out during the first and second phases.
9. The current-feedback instrumentation amplifier according to any of Claims 7- 8, further comprising:
an amplifier having inputs coupled to outputs from the input and feedback transconductors; and
a feedback network coupled between an output of the amplifier and inputs of the feedback transconductor.
10. The current-feedback instrumentation amplifier according to Claim 9, wherein the feedback network comprises:
a first feedback resistor; a second feedback resistor; and
a voltage reference;
wherein:
the first and second feedback resistors and the voltage reference are connected in series;
a first input of the feedback transconductor is coupled to a node between the second feedback resistor and the voltage reference;
a second input of the feedback transconductor is coupled to a node between the first feedback resistor and the second feedback resistor;
the output of the amplifier is coupled to the first feedback resistor; and gain is determined by a ratio of resistance values of the first and second feedback resistors.
11. The current-feedback instrumentation amplifier according to any of Claims 7- 10, wherein the input transconductor has a positive input and a negative input.
12. The current-feedback instrumentation amplifier according to any of Claims 7- 10, wherein the modulator circuit comprises:
a first switch coupled between the first tail current source and the first degeneration resistors;
a second switch coupled between the first tail current source and the second degeneration resistors;
a third switch coupled between the second tail current source and the first degeneration resistors; and
a fourth switch coupled between the second tail current source and the second degeneration resistors;
wherein:
the first and fourth switches are closed and the second and third switches are open on a first phase state control signal; and
the second and third switches are closed and the first and fourth switches are open on a second phase state control signal.
13. The current-feedback instrumentation amplifier according to Claim 12, wherein:
the first and second phase state control signals are from a clock generator; and the first control signal is at a first logic level and the second control signal is at a second logic level.
14. The current-feedback instrumentation amplifier according to any of Claims 12- 13, wherein the first, second, third and fourth switches are metal oxide semiconductor field effect transistors (MOSFETs).
15. The current-feedback instrumentation amplifier according to Claim 14, wherein the MOSFETs are P-channel MOSFETs.
16. The current-feedback instrumentation amplifier according to Claim 14, wherein the MOSFETs are N-channel MOSFETs.
17. The current-feedback instrumentation amplifier according to any of Claims 7-
16, further comprising transistors at inputs and outputs of the modulator circuit for providing low impedance nodes to maintain substantially equal electrical potentials thereon regardless of input voltages to the input and feedback transconductors.
18. The current-feedback instrumentation amplifier according to any of Claims 7-
17, wherein the input and feedback transconductors are fabricated on an integrated circuit die.
19. A current-feedback instrumentation amplifier having gain error correction, comprising:
input transconductor, comprising:
a differential pair comprising first and second transistors;
first and second tail current sources; and
a first degeneration resistor coupled between the first and the second transistors; a feedback transconductor, comprising:
a differential pair comprising third and fourth transistors; third and fourth tail current sources; and
a first degeneration resistor coupled between the third and the third transistors; a first modulator circuit coupled between the first and third tail current sources, and the first and third transistors; and
a second modulator circuit coupled between the second and fourth tail current sources, and the second and fourth transistors;
wherein:
during the first phase signal:
the first modulator circuit is configured to couple the first tail current source to the first transistor and the third tail current source to the third transistor; and
the second modulator circuit is configured to couple the second tail current source to the second transistor and the fourth tail current to the fourth transistor;
during the second phase signal:
the first modulator circuit is configured to couple the first tail current source to the third transistor and the third tail current source to the first transistor; and
the second modulator circuit is configured to couple the second tail current source to the fourth transistor and the fourth tail current to the second transistor.
20. A current-feedback instrumentation amplifier having gain error correction, comprising:
an input transconductor, comprising:
a first differential pair of transistors, and
a first tail current source;
a feedback transconductor, comprising:
a second differential pair of transistors; and
a second tail current source; and
a modulator circuit coupled between the first and second tail current sources, and the first and second differential pairs of transistors; wherein during a first phase state the modulator circuit is configured to couple the first tail current source to the first differential pair of transistors and the second tail current source to the second differential pair of transistors; and
wherein during a second phase state the modulator circuit is configured to couple the first tail current source to the second differential pair of transistors, and the second tail current source to the first differential pair of transistors.
PCT/US2018/029708 2017-05-02 2018-04-27 Dynamic correction of gain error in current-feedback instrumentation amplifiers Ceased WO2018204169A1 (en)

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DE112018002322.2T DE112018002322T5 (en) 2017-05-02 2018-04-27 DYNAMIC CORRECTION OF AMPLIFICATION ERRORS IN CURRENT FEEDBACK INSTRUMENT AMPLIFIERS
CN201880023639.8A CN110521116B (en) 2017-05-02 2018-04-27 Dynamic correction of gain error in current feedback instrumentation amplifiers

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US11835554B2 (en) * 2020-04-23 2023-12-05 Cirrus Logic Inc. Current sensing circuitry
GB2595546B (en) 2020-04-23 2022-04-20 Cirrus Logic Int Semiconductor Ltd Current sensing circuitry
CN115525089B (en) * 2022-11-01 2025-09-02 中国科学院高能物理研究所 Threshold-crossing time discrimination circuit for low power supply voltage
EP4369599A1 (en) * 2022-11-09 2024-05-15 Commissariat à l'Energie Atomique et aux Energies Alternatives Monolithically-integrated current-feedback instrumentation amplifier and sensing system comprising said amplifier

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CN110521116A (en) 2019-11-29
DE112018002322T5 (en) 2020-01-16

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