WO2018203175A1

WO2018203175A1 - Semiconductor device

Info

Publication number: WO2018203175A1
Application number: PCT/IB2018/052790
Authority: WO
Inventors: 加藤清; 熱海知昭; 山崎舜平
Original assignee: 株式会社半導体エネルギー研究所
Priority date: 2017-05-03
Filing date: 2018-04-23
Publication date: 2018-11-08
Also published as: JPWO2018203175A1; JP7106529B2

Abstract

Provided is a semiconductor device having low power consumption and formed using unipolar transistors. The semiconductor device comprises first to third transistors connected in series and a capacitive element connected to the source of the first transistor. The first to third transistors each comprise a first gate and a second gate that are connected to one another. A first signal is input to the first gate of the first transistor, and an inverted signal of the first signal is input to the first gate of the second transistor. When the first signal is high voltage, the capacitive element is charged, when the first signal is low voltage, the source of the first transistor outputs an inverted signal of the signal inputted to the first gate of the third transistor.

Description

Semiconductor device

One embodiment of the present invention relates to a semiconductor device.

Note that in this specification and the like, a semiconductor device refers to any device that can function by utilizing semiconductor characteristics. A display device, a light-emitting device, a memory device, an electro-optical device, a power storage device, a semiconductor circuit, and an electronic device may include a semiconductor device.

Note that one embodiment of the present invention is not limited to the above technical field. The technical field of the invention disclosed in this specification and the like relates to an object, a method, or a manufacturing method. Alternatively, one embodiment of the present invention relates to a process, a machine, a manufacture, or a composition (composition of matter).

In recent years, a transistor (an oxide semiconductor transistor, hereinafter referred to as an OS transistor) in which an oxide semiconductor or a metal oxide is used for a region where a channel is formed (hereinafter also referred to as a channel formation region) has attracted attention. For example, an OS transistor containing indium (In), gallium (Ga), and zinc (Zn) is known.

In addition, a technique for designing a circuit using only a single conductivity type transistor without using a CMOS circuit, such as a driving circuit of a display device, is known. For example, Patent Documents 1 and 2 disclose a shift register including only an n-channel OS transistor.

The logic circuit can be classified into a static logic circuit, a dynamic logic circuit, a pseudo logic circuit, and the like. Since a dynamic logic circuit is a circuit that operates by temporarily holding data, a leakage current of a transistor becomes a problem as compared with a static logic circuit. For example, Patent Documents 3 to 5 disclose techniques for reducing a leakage current of a dynamic logic circuit using an OS transistor.

JP 2011-090761 A JP 2011-209714 A JP2013-931A JP 2013-9313 A Japanese Patent Application Laid-Open No. 2006-72982

An object of one embodiment of the present invention is to provide an inverter circuit including low-power consumption and unipolar transistors. Another object of one embodiment of the present invention is to provide an inverter circuit including a single transistor with a high operating frequency. Another object of one embodiment of the present invention is to provide a novel semiconductor device.

Note that the description of a plurality of tasks does not disturb each other's existence. Note that one embodiment of the present invention does not have to solve all of these problems. Problems other than those listed will be apparent from descriptions of the specification, drawings, claims, and the like, and these problems may also be a problem of one embodiment of the present invention.

One embodiment of the present invention is a semiconductor device including first to third transistors and a capacitor. The first transistor has a first gate and a second gate. The second transistor has a third gate and a fourth gate. The third transistor has a fifth gate and a sixth gate. A first potential is applied to the drain of the first transistor. The source of the first transistor is electrically connected to the drain of the second transistor. The source of the second transistor is electrically connected to the drain of the third transistor. A second potential is applied to the source of the third transistor. The first terminal of the capacitor is electrically connected to the source of the first transistor. The first clock signal is input to the first gate and the second gate. The second clock signal is input to the third gate and the fourth gate. The second clock signal is an inverted signal of the first clock signal. The first signal is input to the fifth gate and the sixth gate. The source of the first transistor outputs a second signal. The first to third transistors preferably include an oxide semiconductor in a channel formation region.

One embodiment of the present invention is a semiconductor device including first to third transistors and a capacitor. The first transistor has a first gate and a second gate. The second transistor has a third gate and a fourth gate. The third transistor has a fifth gate and a sixth gate. A first potential is applied to the drain of the first transistor. The source of the first transistor is electrically connected to the drain of the second transistor. The source of the second transistor is electrically connected to the drain of the third transistor. A second potential is applied to the source of the third transistor. The first terminal of the capacitor is electrically connected to the source of the first transistor. The first clock signal is input to the first gate and the second gate. The second clock signal is input to the fifth gate and the sixth gate. The second clock signal is an inverted signal of the first clock signal. The first signal is input to the third gate and the fourth gate. The source of the first transistor outputs a second signal. The first to third transistors preferably include an oxide semiconductor in a channel formation region.

In the above embodiment, when the first clock signal is at a high potential, the capacitor element is charged, and when the first clock signal is at a low potential, the second signal outputs an inverted signal of the first signal.

In the above embodiment, the first gate is provided with the first insulator on the side wall, and the third gate is provided with the second insulator on the side wall. The capacitor element has an electrode electrically connected to the second terminal. The first gate and the electrode are provided with a first insulator interposed therebetween, and the third gate and the electrode are provided with a second insulator interposed therebetween.

According to one embodiment of the present invention, an inverter circuit including low-power consumption and unipolar transistors can be provided. According to one embodiment of the present invention, an inverter circuit having a high operating frequency and including a unipolar transistor can be provided. According to one embodiment of the present invention, a novel semiconductor device can be provided.

Note that the description of these effects does not disturb the existence of other effects. Note that one embodiment of the present invention need not have all of these effects. It should be noted that the effects other than these are naturally obvious from the description of the specification, drawings, claims, etc., and it is possible to extract the other effects from the descriptions of the specification, drawings, claims, etc. It is.

FIG. 10 is a circuit diagram illustrating an example of a structure of a semiconductor device. A, B: Circuit symbols of transistors. A and B: timing charts showing an example of the operation of the semiconductor device. FIG. 10 is a circuit diagram illustrating an example of a structure of a semiconductor device. A and B are circuit diagrams illustrating an example of a structure of a semiconductor device. A and B are circuit diagrams illustrating an example of a structure of a semiconductor device. A and B are circuit diagrams illustrating an example of a structure of a semiconductor device. The circuit diagram which shows an example of a structure of an inverter circuit. AD: Top view and cross-sectional view of a semiconductor device. FIG. 14 is a cross-sectional view of a semiconductor device. A: Top view of the semiconductor device. B and C are cross-sectional views of the semiconductor device. A: Top view of the semiconductor device. B and C are cross-sectional views of the semiconductor device. A and B: Cross-sectional views of a semiconductor device. A: Top view of the semiconductor device. B and C are cross-sectional views of the semiconductor device. A and B: Schematic diagrams showing examples of electronic components. AE: A schematic diagram illustrating an example of an electronic device. AD: Schematic diagram illustrating an example of an electronic device. A and B: Schematic diagrams illustrating examples of electronic devices. FIG. 11 is a schematic diagram illustrating an example of an electronic device.

Hereinafter, embodiments will be described with reference to the drawings. However, the embodiments can be implemented in many different forms, and it is easily understood by those skilled in the art that the forms and details can be variously changed without departing from the spirit and the scope thereof. . Therefore, the present invention should not be construed as being limited to the description of the following embodiments.

In the drawings, the size, the thickness of layers, or regions are exaggerated for clarity in some cases. Therefore, it is not necessarily limited to the scale. The drawings schematically show an ideal example, and are not limited to the shapes or values shown in the drawings.

Further, in this specification, the following embodiments can be combined as appropriate. In the case where a plurality of structure examples are given in one embodiment, any of the structure examples can be combined as appropriate.

In this specification, a high power supply voltage may be referred to as an H level (or VDD), and a low power supply voltage may be referred to as an L level (or GND).

(Embodiment 1)
In this embodiment, an inverter circuit including a unipolar transistor will be described.

Note that in this specification, circuit symbols of transistors may be expressed as in FIGS. 2A and 2B both illustrate a transistor having a first gate and a second gate. In this specification, the first gate may be referred to as a front gate (FG), and the second gate may be referred to as a back gate (BG).

The circuit symbol in FIG. 2B is used to emphasize that the front gate of the transistor applies an electric field to the top and side surfaces of the semiconductor layer. In the transistor in FIG. 2A, the front gate is provided so as to have a region facing the top surface and the side surface of the semiconductor layer with the first gate insulator interposed therebetween. The back gate is provided so as to have a region facing the lower surface of the semiconductor layer with the second gate insulator interposed therebetween. At this time, the thickness of the semiconductor layer is preferably larger than the channel width of the transistor. Note that the specific structure of the transistor in FIGS. 2A and 2B will be described in Embodiments 2 and 4 described later.

In the transistor in FIG. 2B, a channel is formed not only on the top and bottom of the semiconductor layer but also on the side surface. Therefore, the on-current is large. Note that the circuit gates in FIGS. 2A and 2B may each omit the back gate.

<Configuration example of inverter circuit>
A semiconductor device 10 illustrated in FIG. 1 includes a capacitor C1, and a transistor M1, a transistor M2, and a transistor M3 connected in series. The semiconductor device 10 has a function as an inverter circuit.

In FIG. 1, transistors M1 to M3 are n-channel transistors. Since the semiconductor device 10 is composed only of n-channel transistors, the manufacturing cost can be reduced compared to an inverter circuit composed of CMOS transistors.

The transistor M1 has a first gate and a second gate that are electrically connected to each other. The first gate and the second gate have regions overlapping each other with a semiconductor layer interposed therebetween. The same applies to the transistors M2 and M3.

The semiconductor device 10 has a terminal IN, a terminal OUT, a terminal CLK, and a terminal CLKB. The terminal IN functions as an input terminal, and the terminal OUT functions as an output terminal. A clock signal is input to the terminal CLK, and an inverted signal of the clock signal input to the terminal CLK is input to the terminal CLKB.

The semiconductor device 10 is supplied with VDD and VSS as power supply voltages. VDD is a high power supply voltage and is input to the drain of the transistor M1. VSS is a low power supply voltage and is input to the source of the transistor M3.

In the transistor M1, the front gate and the back gate are electrically connected to the terminal CLK, and the source is electrically connected to the drain of the transistor M2.

In the transistor M2, the front gate and the back gate are electrically connected to the terminal CLKB, and the source is electrically connected to the drain of the transistor M3.

In the transistor M3, the front gate and the back gate are electrically connected to the terminal IN.

The first terminal of the capacitor C1 is electrically connected to the source of the transistor M1. VSS is input to the second terminal of the capacitive element C1.

The terminal OUT is electrically connected to the source of the transistor M1, the drain of the transistor M2, and the first terminal of the capacitor C1.

Next, the operation of the semiconductor device 10 will be described with reference to FIG.

FIG. 3A is a timing chart for explaining the operation of the semiconductor device 10 and represents potential changes of the terminals IN, CLK, CLKB, and OUT, respectively. In FIG. 3A, the operation is classified into three periods P1, P2, and P3.

The terminal IN is given an H (high) level during the periods P1 to P3. That is, in the periods P1 to P3, the transistor M3 is on.

In the period P1, the potential VH is input to the terminal CLK, and the potential VL is input to the terminal CLKB. Transistor M1 is turned on and transistor M2 is turned off. At this time, VDD is supplied to the capacitor C1, and the capacitor C1 starts to be charged (precharge).

Note that the potential VH is preferably higher than or equal to a voltage (VDD + V _th ) obtained by adding VDD and the threshold voltage (V _th ) of the transistor M1. By doing so, VDD can be accurately transmitted to the terminal OUT. The potential VL may be a low power supply voltage (or GND). Note that the potential VH may be referred to as a high potential and the potential VL may be referred to as a low potential.

In the period P2, the potential VL is input to the terminal CLK, and the potential VH is input to the terminal CLKB. Transistor M1 is turned off and transistor M2 is turned on. At this time, since the transistor M3 is on, the first terminal of the capacitor C1 and the source of the transistor M3 are brought into conduction, and the capacitor C1 starts discharging. Finally, the terminal OUT outputs the L level. That is, the terminal OUT outputs an inverted signal of the signal input to the terminal IN.

In the period P3, the potential VH is input to the terminal CLK, and the potential VL is input to the terminal CLKB. Transistor M1 is turned on and transistor M2 is turned off. Similar to the period P1, the capacitive element C1 starts precharging again.

FIG. 3B is a timing chart in the case where the input of the terminal IN in the periods P1 to P3 is set to the L (low) level. In this case, in the period P2, the transistor M3 is off, and the capacitor C1 holds the potential precharged in the period P1. As a result, the terminal OUT outputs an H level. That is, the terminal OUT outputs an inverted signal of the signal input to the terminal IN.

3A and 3B, the semiconductor device 10 precharges the capacitor C1 when the terminal CLK is at the potential VH, and operates as an inverter circuit when the terminal CLK is at the potential VL. Recognize.

3A and 3B that the semiconductor device 10 functions as a dynamic logic circuit that operates by repeatedly charging and discharging the capacitor C1. The transistor M1 functions as a precharging transistor that charges the capacitor C1, and the transistor M2 functions as a discharging transistor that discharges the charge accumulated in the capacitor C1.

As the transistors M1 to M3, transistors with low off-state current are preferably used. As a transistor with a small off-state current, an OS transistor can be given. Note that the small off-state current here means that the off-state current of the transistor per channel width is preferably 10 ⁻¹⁸ A / μm or less, more preferably 10 ⁻²¹ A / μm or less, and further preferably 10 ^−24. A / μm or less.

By using OS transistors for the transistors M1 to M3, the semiconductor device 10 can reduce the through current. As a result, the semiconductor device 10 can reduce power consumption.

In addition, by using OS transistors as the transistors M1 to M3, the charge precharged in the capacitor C1 can be prevented from being lost due to the leakage current. As a result, the semiconductor device 10 can transmit data more accurately.

In the transistor M1, by electrically connecting the front gate and the back gate, a gate voltage can be applied to the semiconductor layer from the front gate and the back gate at the same time, and an on-current can be increased. The same applies to the transistor M2 and the transistor M3. As a result, the semiconductor device 10 can realize an inverter circuit with a high operating frequency.

Patent Document 5 discloses an inverter circuit composed of two n-channel transistors. The circuit diagram is shown in FIG. A semiconductor device 90 shown in FIG. 8 includes two n-channel transistors, a transistor Tr1 and a transistor Tr2.

In the semiconductor device 90, since the transistor Tr1 is always on, a through current flows when the transistor Tr2 is on. For this reason, the semiconductor device 90 consumes a large amount of power.

The transistors Tr1 and Tr2 are single gate drive transistors that are driven by only one gate, so that the on-current is small.

The semiconductor device 10 shown in FIG. 1 consumes much less power than the semiconductor device 90 because the through current is small even in an inverter circuit made of the same n-channel transistor. In addition, the transistors M1 to M3 included in the semiconductor device 10 have a large on-state current because of dual gate driving. Therefore, the semiconductor device 10 has a higher operating frequency than the semiconductor device 90.

Hereinafter, another configuration example of the semiconductor device will be described.

A semiconductor device 11 shown in FIG. 4 is a modification of the semiconductor device 10, and the terminal IN is electrically connected to the front gate and the back gate of the transistor M 2, and the terminal CLKB is electrically connected to the front gate and the back gate of the transistor M 3. Connected.

A semiconductor device 12 illustrated in FIG. 5A is a circuit diagram in the case where all back gates of the transistors M1 to M3 are electrically connected in the semiconductor device 10 and a common potential VG0 is applied to the back gates. It is. By doing so, the semiconductor device 11 can control the threshold voltages of the transistors M1 to M3.

5B, in the semiconductor device 10, the potential VG1 is applied to the back gate included in the transistor M1, the potential VG2 is applied to the back gate included in the transistor M2, and the potential VG3 is applied to the back gate included in the transistor M3. FIG. In this manner, the threshold voltages of the transistors M1 to M3 can be individually controlled by applying individual potentials to the back gates of the transistors.

Hereinafter, a structural example of a semiconductor device in which the transistor illustrated in FIG.

A semiconductor device 20 illustrated in FIG. 6A includes a capacitor C21 and a transistor M21, a transistor M22, and a transistor M23 connected in series. The semiconductor device 20 is a modified example of the semiconductor device 12 and has a function as an inverter circuit like the semiconductor device 12.

Since the transistors M21 to M23 can cause an on-current to flow also to the side surface of the semiconductor layer, the on-current can be increased by increasing the thickness of the semiconductor layer. As a result, the semiconductor device 20 can realize an inverter circuit with a high operating frequency.

A semiconductor device 21 illustrated in FIG. 6B is a modification example of the semiconductor device 20, and the terminal IN is electrically connected to the front gate of the transistor M2, and the terminal CLKB is electrically connected to the front gate of the transistor M3. ing.

A semiconductor device 22 illustrated in FIG. 7A is a modified example of the semiconductor device 20, and the transistors M21 to M22 each electrically connect the front gate and the back gate. By doing so, the transistors M21 to M23 can apply a gate electric field from the top, bottom, left, and right of the semiconductor layer, and can further increase the on-state current. As a result, the operating frequency of the semiconductor device 22 can be further increased.

A semiconductor device 23 illustrated in FIG. 7B is a modification of the semiconductor device 20. A potential VG1 is applied to the back gate included in the transistor M21, a potential VG2 is applied to the back gate included in the transistor M22, and a potential VG3 is applied to the back gate included in the transistor M3. In this manner, the threshold voltages of the transistors M21 to M23 can be individually controlled by applying individual potentials to the back gates of the transistors.

In some cases, the semiconductor devices 10 to 13 may omit all the back gates of the transistors M1 to M3. In that case, the manufacturing process can be simplified. The same applies to the semiconductor devices 20 to 23.

In the semiconductor devices 10 to 13, the capacitor C1 may be replaced with a parasitic capacitance of a wiring or a gate capacitance of a transistor. In that case, the area occupied by these semiconductor devices can be reduced. The same applies to the capacitive element C21 of the semiconductor devices 20 to 23.

As described above, by using the semiconductor device of this embodiment, an inverter circuit including a unipolar transistor with low power consumption can be provided. In addition, an inverter circuit having a high operating frequency and including a unipolar transistor can be provided.

The structure described in this embodiment can be combined as appropriate with any of the structures described in the other embodiments.

(Embodiment 2)
In this embodiment, an example of a specific structure of the semiconductor device 10 described in Embodiment 1 will be described with reference to FIGS. 9A to 9D and FIG. A semiconductor device 10 of one embodiment of the present invention includes a transistor including an oxide in a channel formation region. The semiconductor device 10 includes a transistor M1, a transistor M2, a transistor M3, a capacitor C1, and a wiring. . Note that in FIG. 9B, there is a case where a sign is mainly given to the structure of the transistor M1 and a sign of the structure of the transistor M2 or the transistor M3 is omitted. At that time, in the transistor M2 or the transistor M3, a structure having the same function as the structure to which the sign of the transistor M1 is given may be described using the same sign.

In this embodiment, a semiconductor device which can be miniaturized or highly integrated can be provided by using a structure in which a plurality of transistors and a capacitor have a common structure.

<Configuration Example of Semiconductor Device 10>
Hereinafter, an example of the semiconductor device 10 including the transistor M1, the transistor M2, the transistor M3, and the capacitor C1 according to one embodiment of the present invention will be described.

FIG. 9A is a top view of the semiconductor device 10. FIG. 9B is a cross-sectional view taken along dashed-dotted line A1-A2 in FIG. 9A, and is also a cross-sectional view in the channel length direction of the transistors M1, M2, and M3. FIG. 9C is a cross-sectional view taken along dashed-dotted line A3-A4 in FIG. 9A and also a cross-sectional view in the channel width direction of the transistor M1. FIG. 9D is a cross-sectional view taken along dashed-dotted line A5-A6 in FIG. 9A and also a cross-sectional view of the capacitor C1. Note that in the top view of FIG. 9A, some elements are omitted for clarity.

The semiconductor device 10 is provided over a substrate 201 and includes a transistor M1, a transistor M2, a transistor M3, and a capacitor C1, and an insulator 210, an insulator 212, and an insulator 280 that function as interlayer films. Further, the semiconductor device 10 is electrically connected to the transistor M1, the transistor M2, or the transistor M3 and is electrically connected to the

conductors

203 and 240 that function as wirings, and the capacitor C1 and is a conductor that functions as wiring. 204, 206.

In the semiconductor device 10 illustrated in FIG. 9, by providing a plurality of transistors and a capacitor in the same layer, part of the structure forming the transistor is used in combination with part of the structure forming the capacitor. Can do. In other words, part of the structure of the transistor may function as part of the structure of the capacitor.

In addition, when a part or the whole of the capacitor overlaps the plurality of transistors, the total area of the projected area of the transistor and the projected area of the capacitor can be reduced.

With the above structure, miniaturization or high integration is possible. In addition, the degree of freedom in design can be increased. In addition, the plurality of transistors and the capacitor can be formed in the same process. Therefore, since the process can be shortened, productivity can be improved.

Note that the conductor 203 and the conductor 204 are formed to be embedded in the insulator 212. Here, the heights of the upper surfaces of the conductor 203 and the conductor 204 and the height of the upper surface of the insulator 212 can be approximately the same. Note that although the conductor 203 and the conductor 204 are illustrated as single layers, the present invention is not limited to this. For example, the conductor 203 and the conductor 204 may have a multilayer structure of two or more layers.

[Transistor M1, Transistor M2, and Transistor M3]
The transistor M1, the transistor M2, and the transistor M3 each include a metal oxide that functions as an oxide semiconductor over the oxide 230 (oxide 230a, oxide 230b, oxide 230c, and oxide 230d) including a region where a channel is formed. It is preferable to use a material (hereinafter also referred to as an oxide semiconductor). As illustrated in FIG. 9B, the transistor M1, the transistor M2, and the transistor M3 can include the oxide 230a, the oxide 230b, and the oxide 230c in common. With this structure, the distance between the transistors can be reduced; thus, miniaturization or high integration can be achieved. Further, with this structure, it is not necessary to separately provide a wiring and the like for connecting the transistors, so that the process can be simplified.

In addition, the transistor M1, the transistor M2, and the transistor M3 include an insulator 214 and an insulator 216 which are disposed over the substrate 201, a conductor 205 which is disposed so as to be embedded in the insulator 214 and the insulator 216, and a conductive layer. An insulator 220 disposed on the body 205 and on the insulator 216; an insulator 222 disposed on the insulator 220; an insulator 224 disposed on the insulator 222; and an insulator 224. The oxide 230d disposed on the top, the insulator 250 disposed on the oxide 230d, the metal oxide 252 disposed on the insulator 250, and the metal oxide 252 disposed A conductor 260; an insulator 270 disposed on the conductor 260; an insulator 271 disposed on the insulator 270; and at least an upper surface of the oxide 230d. An insulator 272 disposed in contact with a side surface of the body 250, a side surface of the metal oxide 252; a side surface of the conductor 260; and a side surface of the insulator 270; an insulator 275 disposed in contact with at least the insulator 272; And an insulator 274 provided in contact with the upper surface of the oxide 230 and the side surface of the insulator 275.

Note that in the transistor M1, the transistor M2, and the transistor M3, the oxide 230a, the oxide 230b, the oxide 230c, and the oxide 230d may be collectively referred to as the oxide 230. In the transistors M1, M2, and M3, the oxide 230a, the oxide 230b, the oxide 230c, and the oxide 230d are stacked; however, the present invention is not limited to this. For example, only the oxide 230b may be provided. In addition, for example, a single layer, two layers, three layers, or a stacked structure of five layers or more may be used. Further, although a structure in which the conductor 260 and the conductor 205 are provided as stacked layers is shown, the present invention is not limited to this. For example, the conductor 260 and the conductor 205 may be provided as a single layer or a stack of three or more layers.

Here, an enlarged view of a region near the channel of the transistor M1 in FIG. 9B is shown in FIG. Note that the transistor M1 can be referred to for the structures of the transistor M2 and the transistor M3.

As illustrated in FIG. 10, the oxide 230 includes a region 234 that functions as a channel formation region of a transistor, a region 231 that functions as a source region or a drain region (a region 231 a and a region 231 b), a region 234, and a region 231. A bonding region 232 (a bonding region 232a and a bonding region 232b) provided between the two.

The region 231 functioning as a source region or a drain region is a region with low carrier resistance and high carrier density. The region 234 functioning as a channel formation region is a region having a lower carrier density than the region 231 functioning as a source region or a drain region. The junction region 232 has a lower carrier density than the region 231 that functions as a source region or a drain region and a higher carrier density than the region 234 that functions as a channel formation region. In other words, the junction region 232 functions as a junction region between the channel formation region and the source region or the drain region.

Note that the region 231 preferably has a concentration of at least one of a metal element and an impurity element such as hydrogen and nitrogen higher than that of the junction region 232 and the region 234.

For example, the region 231 preferably includes a metal element such as ruthenium, titanium, tantalum, or tungsten in addition to the oxide 230. By adding a metal element to the oxide 230, the resistance of the region 231 can be reduced. In order to add a metal element, for example, a metal film, an oxide film containing a metal element, or a nitride film containing a metal element is formed on and in contact with the region 231 of the oxide 230, and then the film is removed. Good. Further, it is preferable to perform heat treatment after the metal film, the oxide film containing a metal element, or the nitride film containing a metal element is formed and then removed. Note that the heat treatment can be performed at 200 ° C. or more and 500 ° C. or less, typically 400 ° C. or the vicinity thereof. In addition, when the heat treatment is performed, a metal element such as ruthenium, titanium, tantalum, or tungsten may enter the constituent elements of the oxide 230. In this case, a constituent element included in the oxide 230 and a metal element such as ruthenium, titanium, tantalum, or tungsten may be alloyed in part of the region 231, typically over the region 231. In the case where the region 231 is alloyed, the alloyed region, that is, the region with reduced resistance can be formed relatively stably, so that a highly reliable semiconductor device can be provided.

The bonding region 232 has a region overlapping with the insulator 272. The junction region 232 preferably has a concentration of at least one of a metal element such as indium and an impurity element such as hydrogen and nitrogen higher than that of the region 234. One or both of the bonding region 232a and the bonding region 232b may have a region overlapping with the conductor 260.

The region 234 has a region overlapping with the conductor 260. The region 234 is disposed between the junction region 232 a and the junction region 232 b, and the region 231 has a concentration of at least one of a metal element such as indium and an impurity element such as hydrogen and nitrogen, and the junction region 232. More preferably, it is smaller.

Note that in the oxide 230, the boundary between the region 231, the junction region 232, and the region 234 may not be clearly detected in some cases. Concentrations of metal elements such as indium and impurity elements such as hydrogen and nitrogen detected in each region are not limited to stepwise changes in each region, but also continuously change in each region (also referred to as gradation). You may do it. That is, the closer to the region 234 from the region 231 to the junction region 232, the lower the concentration of the metal element such as indium and the impurity element such as hydrogen and nitrogen.

In FIG. 10, the region 234, the region 231 and the junction region 232 are formed in the oxide 230c. However, the present invention is not limited to this. For example, these regions may be formed in the oxide 230a. . Further, in the figure, the boundary of each region is displayed substantially perpendicular to the upper surface of the oxide 230, but this embodiment is not limited to this.

The detailed structure of the semiconductor device including the transistor M1, the transistor M2, and the transistor M3 according to one embodiment of the present invention is described below. Note that the transistor M1 may be used as a representative for explanation. At that time, the transistor M1 can be referred to for the configurations of the transistor M2 and the transistor M3.

Note that in the transistor, the oxide 230 is preferably formed using a metal oxide functioning as an oxide semiconductor (hereinafter also referred to as an oxide semiconductor). As the metal oxide, it is preferable to use one having an energy gap of 2 eV or more, preferably 2.5 eV or more. By using a metal oxide with a wide energy gap, off-state current of the transistor can be reduced.

Since a transistor including an oxide semiconductor has extremely low leakage current in a non-conduction state, a semiconductor device with low power consumption can be provided. An oxide semiconductor can be formed by a sputtering method or the like, and thus can be used for a transistor included in a highly integrated semiconductor device.

The oxide semiconductor preferably contains at least indium or zinc. In particular, it is preferable to contain indium and zinc. In addition to these, it is preferable that aluminum, gallium, yttrium, tin, or the like is contained. Further, one or more selected from boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, or the like may be included.

Here, a case where the oxide semiconductor is an In-M-Zn oxide containing indium, the element M, and zinc is considered. The element M is aluminum, gallium, yttrium, tin, or the like. Other elements applicable to the element M include boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, and magnesium. However, the element M may be a combination of a plurality of the aforementioned elements.

Note that in this specification and the like, metal oxides containing nitrogen may be collectively referred to as metal oxides. In addition, a metal oxide containing nitrogen may be referred to as a metal oxynitride.

Here, in the metal oxide used for the oxide 230a and the oxide 230b, the atomic ratio of the element M in the constituent element is the atomic ratio of the element M in the constituent element in the metal oxide used for the oxide 230c. Larger is preferred. In the metal oxide used for the oxide 230a and the oxide 230b, the atomic ratio of the element M to In is preferably larger than the atomic ratio of the element M to In in the metal oxide used for the oxide 230c. . In the metal oxide used for the oxide 230c, the atomic ratio of In to the element M is preferably larger than the atomic ratio of In to the element M in the metal oxide used for the oxide 230a and the oxide 230b. .

In the metal oxide used for the oxide 230a, the atomic ratio of the element M in the constituent element is preferably larger than the atomic ratio of the element M in the constituent element in the metal oxide used for the oxide 230b. In the metal oxide used for the oxide 230a, the atomic ratio of the element M to In is preferably larger than the atomic ratio of the element M to In in the metal oxide used for the oxide 230b. In the metal oxide used for the oxide 230b, the atomic ratio of In to the element M is preferably larger than the atomic ratio of In to the element M in the metal oxide used for the oxide 230a.

Therefore, the energy at the lower end of the conduction band of the oxide 230a is preferably higher than the energy at the lower end of the conduction band in a region where the energy at the lower end of the conduction band of the oxide 230b is low. In other words, the electron affinity of the oxide 230a is preferably smaller than the electron affinity in a region where the energy at the lower end of the conduction band of the oxide 230b is low.

In addition, the energy at the lower end of the conduction band of the oxide 230b is preferably higher than the energy at the lower end of the conduction band in a region where the energy at the lower end of the conduction band of the oxide 230c is low. In other words, the electron affinity of the oxide 230b is preferably smaller than the electron affinity in a region where the energy at the lower end of the conduction band of the oxide 230c is low.

Here, in the oxide 230a, the oxide 230b, and the oxide 230c, the energy level at the lower end of the conduction band changes gently. In other words, it can be said that it is continuously changed or continuously joined. In order to achieve this, the defect state density of the mixed layer formed at the interface between the oxide 230a and the oxide 230b or the interface between the oxide 230b and the oxide 230c is preferably low.

Specifically, when the oxide 230a, the oxide 230b, and the oxide 230c have a common element (main component) in addition to oxygen, a mixed layer with a low density of defect states can be formed. . For example, in the case where the oxide 230c is an In—Ga—Zn oxide, an In—Ga—Zn oxide, a Ga—Zn oxide, a gallium oxide, or the like may be used as the oxide 230b or the oxide 230a.

At this time, the main path of carriers is a narrow gap portion formed in the oxide 230c. Since the defect level density at the interface between the oxide 230c and the oxide 230b and the interface between the oxide 230b and the oxide 230c can be reduced, the influence on carrier conduction due to interface scattering is small, and a large on-current is obtained. It is done.

On the other hand, in a transistor including an oxide semiconductor, its electrical characteristics are likely to vary due to impurities and oxygen vacancies in the oxide semiconductor, and reliability may deteriorate. In addition, hydrogen contained in the oxide semiconductor reacts with oxygen bonded to a metal atom to become water, so that an oxygen vacancy may be formed in some cases. When hydrogen enters the oxygen vacancies, electrons serving as carriers may be generated. A transistor including an oxide semiconductor in which oxygen vacancies are included in a channel formation region is likely to be normally on. For this reason, it is preferable that oxygen vacancies in the channel formation region be reduced as much as possible.

In particular, the presence of oxygen vacancies at the interface between the region 234 where the channel is formed in the oxide 230 and the insulator 250 functioning as the first gate insulator of the transistors M1, M2, and M3 has electrical characteristics. Fluctuations are likely to occur, and reliability may deteriorate.

Thus, it is preferable that the insulator 250 located above the region 234 of the oxide 230 contain more oxygen (also referred to as excess oxygen) than oxygen that satisfies the stoichiometric composition. That is, excess oxygen in the insulator 250 diffuses into the region 234, so that oxygen vacancies in the region 234 can be reduced.

Further, a metal oxide 252 may be provided in order to efficiently supply excess oxygen included in the insulator 250 to the oxide 230. Therefore, the metal oxide 252 preferably suppresses oxygen diffusion. By providing the metal oxide 252 that suppresses diffusion of oxygen, diffusion of excess oxygen into the conductor 260 is suppressed. That is, a decrease in the amount of excess oxygen supplied to the oxide 230 can be suppressed. In addition, oxidation of the conductor 260 due to excess oxygen can be suppressed.

Note that the metal oxide 252 may function as part of the gate insulator. Therefore, when silicon oxide, silicon oxynitride, or the like is used for the insulator 250, the metal oxide 252 is preferably a metal oxide that is a high-k material with a high relative dielectric constant. By setting it as the said laminated structure, it can be set as the laminated structure stable with respect to a heat | fever, and a large dielectric constant. Therefore, it is possible to reduce the gate potential applied during transistor operation while maintaining the physical film thickness. In addition, it is possible to reduce the equivalent oxide thickness (EOT) of an insulator that functions as a gate insulator.

Further, the metal oxide 252 may function as part of the first gate electrode. For example, an oxide semiconductor that can be used as the oxide 230 can be used as the metal oxide 252. In that case, by forming the conductor 260 by a sputtering method, the electric resistance value of the metal oxide 252 can be reduced, whereby the conductor can be obtained. This can be called an OC (Oxide Conductor) electrode.

By including the metal oxide 252, the on-current can be improved without weakening the influence of the electric field from the conductor 260. In addition, leakage current can be suppressed by maintaining the distance between the conductor 260 and the oxide 230 depending on the physical thickness of the insulator 250 and the metal oxide 252. In addition, by providing a stacked structure of the insulator 250 and the metal oxide 252, the physical distance between the conductor 260 and the oxide 230 and the electric field strength applied from the conductor 260 to the oxide 230 can be reduced. It can be easily adjusted as appropriate.

Specifically, as the metal oxide 252, a metal containing one or more selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, magnesium, or the like. An oxide can be used. Further, by reducing the resistance of an oxide semiconductor that can be used for the oxide 230, the metal oxide 252 can be used.

The insulator 220, the insulator 222, and the insulator 224 function as second gate insulators of the transistor M1, the transistor M2, and the transistor M3. In the drawing, the structure in which the insulator 220, the insulator 222, and the insulator 224 are stacked is shown; however, the present invention is not limited to this. For example, any two layers of the insulator 220, the insulator 222, and the insulator 224 may be stacked, or any one of the layers may be used.

Further, the insulator 222 and the insulator 214 functioning as an interlayer film can function as a barrier insulator that prevents impurities such as water or hydrogen from entering the transistor from below. The insulator 214 and the insulator 222 are preferably formed using an insulating material having a function of suppressing permeation of impurities such as water or hydrogen. For example, silicon nitride or the like is used as the insulator 214, and aluminum oxide, hafnium oxide, an oxide containing silicon and hafnium (hafnium silicate), an oxide containing aluminum and hafnium (hafnium aluminate), or the like is used as the insulator 222. Is preferred. Thus, impurities such as hydrogen and water can be prevented from diffusing into layers above the insulator 214 and the insulator 222. Note that the insulator 214 and the insulator 222 include at least one of impurities such as a hydrogen atom, a hydrogen molecule, a water molecule, a nitrogen atom, a nitrogen molecule, a nitric oxide molecule (N ₂ O, NO, NO _{2, and the} like) and a copper atom. It preferably has a function of suppressing transmission. The same applies to the case where an insulating material having a function of suppressing the permeation of impurities is described below.

The insulator 214 and the insulator 222 are preferably formed using an insulating material having a function of suppressing transmission of oxygen (for example, oxygen atoms or oxygen molecules). Thus, downward diffusion of oxygen contained in the insulator 224 and the like can be suppressed.

In addition, the concentration of impurities such as water, hydrogen, or nitrogen oxide in the insulator 222 is preferably reduced. For example, the amount of hydrogen desorbed from the insulator 222 is converted to hydrogen molecules when the surface temperature of the insulator 222 is in the range of 50 ° C. to 500 ° C. in the temperature programmed desorption gas analysis method (TDS (Thermal Desorption Spectroscopy)). 2 × 10 ¹⁵ molecules / cm ² or less, preferably 1 × 10 ¹⁵ molecules / cm ² or less, more preferably 5 × 10 ¹⁴ molecules / cm ² in terms of the amount of the desorbed in terms of the area of the insulator 222. The following is sufficient. The insulator 222 is preferably formed using an insulator from which oxygen is released by heating.

The conductor 260 functions as a first gate electrode of the transistor M1, the transistor M2, and the transistor M3. The conductor 205 functions as a second gate electrode of the transistor M1, the transistor M2, and the transistor M3. The conductor 205 functioning as the second gate electrode of the transistor M1, the transistor M2, or the transistor M3 is provided so as to overlap with the oxide 230 and the conductor 260.

Here, the conductor 205 is preferably provided so that its length in the channel width direction is larger than that of the region 234 in the oxide 230. In particular, the conductor 205 is preferably extended also in a region outside the end portion intersecting with the one-dot chain line (channel width direction) of A3-A4 of the region 234 of the oxide 230. That is, it is preferable that the conductor 205 and the conductor 260 overlap with each other through the insulator on the side surface of the oxide 230 in the channel width direction.

The potential applied to the conductor 205 is preferably the same as the potential applied to the conductor 260. Further, it may be a ground potential or an arbitrary potential. In addition, the threshold voltage of the transistor M1, the transistor M2, and the transistor M3 is controlled by independently changing the potential applied to the conductor 205 without being interlocked with the potential applied to the conductor 260. Can do. In particular, by applying a negative potential to the conductor 205, the threshold voltage of the transistor M1, the transistor M2, and the transistor M3 can be made higher than 0 V and the off-state current can be reduced. Therefore, the drain current when the voltage applied to the conductor 260 is 0 V can be reduced.

The conductor 205 is provided so as to overlap with the oxide 230 and the conductor 260. Here, the conductor 205 may be disposed so as to overlap with the conductor 260 also in a region outside the end portion of the region 234 of the oxide 230 that intersects with the one-dot chain line (channel width direction) of A3-A4. preferable. That is, it is preferable that the conductor 205 and the conductor 260 overlap with each other with an insulator outside the side surface of the oxide 230.

With the above structure, when a potential is applied to the conductor 260 and the conductor 205, the electric field generated from the conductor 260 and the electric field generated from the conductor 205 are connected to form a closed circuit, and the oxide The channel formation region formed in 230 can be covered.

That is, the channel formation region in the region 234 can be electrically surrounded by the electric field of the conductor 260 functioning as the first gate electrode and the electric field of the conductor 205 functioning as the second gate electrode. . In this specification, a transistor structure that electrically surrounds a channel formation region by an electric field of the first gate electrode and the second gate electrode is referred to as a surrounded channel (S-channel) structure.

Note that the conductor 203 is extended in the channel width direction similarly to the conductor 260 and functions as a wiring for applying a potential to the conductor 205. Here, by stacking over the conductor 203 functioning as a wiring and providing the conductor 205 embedded in the insulator 214 and the insulator 216, the insulator 214 and the conductor 260 are interposed between the conductor 203 and the conductor 260. An insulator 216 and the like are provided, so that the parasitic capacitance between the conductor 203 and the conductor 260 can be reduced and the withstand voltage can be increased. By reducing the parasitic capacitance between the conductor 203 and the conductor 260, the switching speed of the transistor can be improved and a transistor having high frequency characteristics can be obtained. Further, by increasing the withstand voltage between the conductor 203 and the conductor 260, the reliability of the transistor can be improved. Therefore, it is preferable to increase the thickness of the insulator 214 and the insulator 216. Note that the extending direction of the conductor 203 is not limited to this, and may be extended in the channel length direction of the transistor M1, the transistor M2, and the transistor M3, for example.

The conductor 205 includes a first conductor provided in contact with the inner walls of the openings of the insulator 214 and the insulator 216, and a second conductor provided further inside. In addition, the height of the upper surface of the conductor 205 and the height of the upper surface of the insulator 216 can be approximately the same. In addition, although the figure has shown about the structure which laminates | stacks the conductor 205, this invention is not limited to this. For example, a single layer or a stacked structure of three or more layers may be used.

Here, it is preferable to use a conductive material having a function of suppressing transmission of impurities such as water or hydrogen (difficult to transmit) as the first conductor. For example, tantalum, tantalum nitride, ruthenium, ruthenium oxide, or the like is preferably used, and a single layer or a stacked layer may be used. Thus, impurities such as hydrogen and water from the lower layer than the insulator 214 can be prevented from diffusing into the upper layer through the conductor 205. Note that the first conductor is an impurity such as a hydrogen atom, a hydrogen molecule, a water molecule, an oxygen atom, an oxygen molecule, a nitrogen atom, a nitrogen molecule, a nitrogen oxide molecule (N ₂ O, NO, NO ₂ ), a copper atom, or the like. Alternatively, it preferably has a function of suppressing transmission of at least one of oxygen (for example, oxygen atoms and oxygen molecules). The same applies to the case where a conductive material having a function of suppressing the permeation of impurities is described below. When the first conductor has a function of suppressing the permeation of oxygen, it is possible to prevent the second conductor from being oxidized and the conductivity from being lowered.

As the second conductor, a conductive material containing tungsten, copper, or aluminum as a main component is preferably used. Although not illustrated, the second conductor 205 may have a stacked structure, for example, a stack of titanium, titanium nitride, and the above conductive material.

The conductor 260 includes a first conductor and a second conductor. For the first conductor, for example, a metal such as tungsten can be used. In the case where an oxide semiconductor is used as the metal oxide 252, a conductor that can improve the conductivity of the metal oxide 252 by adding an impurity such as nitrogen to the metal oxide 252 is used as the first conductor. Good. For example, titanium nitride or the like is preferably used for the first conductor. The second conductor is preferably formed using a metal such as aluminum or tungsten with low resistance.

Further, the insulator 270 may be provided over the conductor 260. As the insulator 270, an insulating material having a function of suppressing permeation of impurities such as water or hydrogen and oxygen is preferably used. By including the insulator 270, oxidation of the conductor 260 can be prevented. In addition, impurities such as water or hydrogen can be prevented from entering the oxide 230 through the conductor 260 and the insulator 250.

Here, as illustrated in FIG. 9B, the structure including the insulator 250, the metal oxide 252, the conductor 260, and the insulator 270 has a side surface that is substantially perpendicular to the insulator 222. Is preferred. Note that the semiconductor device described in this embodiment is not limited to this. For example, the side surface of the structure including the insulator 250, the metal oxide 252, the conductor 260, and the insulator 270 may have a tapered structure with respect to the upper surface of the insulator 222. In that case, the angle formed between the side surface of the structure and the top surface of the insulator 222 is preferably as large as possible (close to the vertical).

Therefore, the insulator 271 functioning as a hard mask may be provided over the insulator 270. By providing the insulator 271, when a structure body including the insulator 250, the metal oxide 252, the conductor 260, and the insulator 270 is formed, the side surface of the structure body is substantially vertical, specifically, the structure body The angle formed between the side surface and the substrate surface can be set to 75 ° to 100 °, preferably 80 ° to 95 °.

The insulator 272 is provided in contact with at least the side surfaces of the insulator 250, the metal oxide 252, the conductor 260, and the insulator 270.

The insulator 272 preferably has a function of suppressing diffusion of oxygen (for example, at least one of an oxygen atom and an oxygen molecule) (the above-described oxygen is difficult to transmit). Since the insulator 272 has a function of suppressing diffusion of oxygen, oxygen in a region where oxygen is present in excess of the stoichiometric composition (hereinafter also referred to as excess oxygen region) diffuses toward the insulator 275 side. Without being supplied to the region 234 efficiently. That is, oxygen in the insulator 250 can be prevented from diffusing outside.

The insulator 272 is preferably an insulator in which impurities such as water or hydrogen are reduced. In addition, an insulator having a barrier property which prevents entry of impurities such as water or hydrogen is preferable. That is, entry of impurities such as hydrogen and water into the oxide 230 from the end portion of the insulator 250 or the like can be suppressed. Accordingly, formation of oxygen vacancies at the interface between the oxide 230 and the insulator 250 is suppressed, and the reliability of the transistor can be improved.

For example, the insulator 270 and the insulator 272 each include an oxide of one or both of aluminum and hafnium, which is an insulating material having a function of suppressing transmission of impurities such as water or hydrogen, and oxygen. Can be used. As the insulator containing one or both of aluminum and hafnium, aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), or the like is preferably used.

By providing the insulator 270 and the insulator 272, the top surface and the side surface of the conductor 260 and the side surface of the insulator 250 can be covered with an insulator having a function of suppressing permeation of impurities such as water or hydrogen and oxygen. . Thus, the oxidation of the conductor 260 and the entry of impurities such as water or hydrogen into the oxide 230 through the conductor 260 and the insulator 250 can be suppressed. Therefore, the insulator 270 and the insulator 272 function as a barrier for protecting the gate electrode and the gate insulator.

The insulator 272 is preferably formed using an ALD (Atomic Layer Deposition) method. By using the ALD method, an insulator with excellent coverage and few defects such as pinholes can be formed. Accordingly, the insulator 272 can be formed with a thickness of about 0.5 nm to 10 nm, preferably 0.5 nm to 3 nm.

The insulator 272 may be formed by a sputtering method. By using a sputtering method, an insulator with few impurities such as water or hydrogen can be formed. In the case of using a sputtering method, for example, it is preferable to form a film using a facing target type sputtering apparatus. Since the facing target type sputtering apparatus can form a film without exposing the film formation surface to a high electric field region between the facing targets, the film formation surface can be formed without being easily damaged by plasma. It is preferable because film formation damage to the oxide 230 can be reduced when the insulator to be the insulator 272 is formed. A film forming method using a facing target type sputtering apparatus can be referred to as VDSP (Vapor Deposition SP) (registered trademark).

In addition, during film formation by sputtering, ions and sputtered particles exist between the target and the substrate. For example, the target is connected to a power source and is supplied with the potential E0. The substrate is given a potential E1 such as a ground potential. However, the substrate may be electrically floating. In addition, there is a region having the potential E2 between the target and the substrate. The magnitude relationship between the potentials is E2> E1> E0.

Ions in the plasma are accelerated by the potential difference E2-E0 and collide with the target, whereby particles sputtered from the target are ejected. The sputtered particles adhere to and deposit on the film formation surface to form a film. Some ions recoil by the target, pass through a film formed as recoil ions, and may be taken into the insulator 250 in contact with the deposition surface. Further, ions in the plasma are accelerated by the potential difference E2-E1, and impact the film formation surface. At this time, some ions reach the inside of the insulator 250. When the ions are taken into the insulator 250, a region into which the ions are taken is formed in the insulator 250. That is, when the ions are oxygen-containing ions, an excess oxygen region is formed in the insulator 250.

By introducing excess oxygen into the insulator 250, an excess oxygen region can be formed. Excess oxygen in the insulator 250 is supplied to the oxide 230, so that oxygen vacancies in the oxide 230 can be compensated.

Note that the insulator 272 may be formed by stacking a film formed using an ALD method and a film formed using a sputtering method. When the film formed using the ALD method is sufficiently thin, an excess oxygen region is formed in the insulator 250 through the film formed using the ALD method when the film is formed using the sputtering method. Can do. Therefore, the film formed by using the ALD method is preferably 0.5 nm to 1.5 nm.

Note that some precursors used in the ALD method include impurities such as carbon. For this reason, the insulator 272 may contain an impurity such as carbon. For example, even if the insulator formed by the sputtering method and the insulator formed by the ALD method are the same film type, impurities such as carbon contained in the insulator formed by the ALD method are formed by the sputtering method. May be more than the insulation made. The quantification of impurities can be performed using X-ray photoelectron spectroscopy (XPS: X-ray Photoelectron Spectroscopy).

The insulator 275 is provided on the side surfaces of the conductor 260, the metal oxide 252, and the insulator 250 with the insulator 272 interposed therebetween. As illustrated in FIG. 9B, the transistor M <b> 1 and the transistor M <b> 3 have a high probability that parasitic capacitance is formed between the conductor 260 and the conductor 240. In addition, the transistor M1 and the transistor M2 have a high probability that parasitic capacitance is formed between the conductor 260 and the conductor 120 that is a part of the capacitor C1. In particular, with the miniaturization of a transistor, for example, when the designed channel length is 10 nm or more and 30 nm or less, the parasitic capacitance may affect the electrical characteristics of the transistor.

Therefore, by providing the insulator 275 for the transistor M1, the transistor M2, and the transistor M3, each parasitic capacitance can be reduced. By reducing the parasitic capacitance, the semiconductor device 10 can be operated at high speed.

The insulator 275 preferably includes an insulator having a small relative dielectric constant. For example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide to which fluorine is added, silicon oxide to which carbon is added, silicon oxide to which carbon and nitrogen are added, silicon oxide or resin having holes, or the like is included. It is preferable. In particular, silicon oxide and silicon oxynitride are preferable because they are thermally stable.

In addition, an insulator 274 is provided on a side surface of the insulator 275. An insulator 280 that functions as an interlayer film is provided so as to cover the transistor M1, the transistor M2, and the transistor M3. Note that the insulator 280 preferably has reduced concentration of impurities such as water or hydrogen in the film.

The opening of the insulator 280 is formed so that at least a part of the side surface of the insulator 274 is exposed. The processing can be performed by setting an opening condition in the insulator 280 such that the etching rate of the insulator 274 is significantly lower than the etching rate of the insulator 280. For example, when the etching rate of the insulator 274 is 1, the etching rate of the insulator 280 is preferably 5 or more, and more preferably 10 or more. By opening in this manner, the opening can be formed in a self-aligned manner, and the distance between the opening and the gate electrode can be designed to be small, so that the semiconductor device can be highly integrated.

Therefore, the conductor 240 is provided in contact with the insulator 274. In addition, the conductor 240 is in contact with the region 231 of the oxide 230. With this structure, the semiconductor devices 10 can be arranged with high density, and the semiconductor device 10 can be highly integrated.

For the conductor 240, a material similar to that of the conductor 205 can be used. Alternatively, the conductor 240 may be formed after aluminum oxide is formed on the side wall of the opening. By forming aluminum oxide on the side wall portion of the opening, it is possible to suppress the permeation of oxygen from the outside and to prevent the conductor 240 from being oxidized. In addition, impurities such as water and hydrogen can be prevented from diffusing from the conductor 240 to the outside. The aluminum oxide can be formed by forming an aluminum oxide film in the opening using an ALD method or the like and performing anisotropic etching.

[Capacitance element C1]
As illustrated in FIG. 9B, the capacitor C1 has a structure in common with the transistor M1, the transistor M2, and the transistor M3. In this embodiment, an example in which part of the region 231 provided in the oxide M230 of the transistor M1 and the transistor M2 functions as one of the electrodes of the capacitor C1 is described. Therefore, the capacitor C1 is provided between the transistor M1 and the transistor M2.

The capacitor C <b> 1 includes a part of the region 231 of the oxide 230, the insulator 130, and the conductor 120 over the insulator 130. That is, at least part of the conductor 120 is disposed so as to overlap with part of the region 231 with the insulator 130 interposed therebetween.

Part of the region 231 functions as one of the electrodes of the capacitor C1, and the conductor 120 functions as the other of the electrodes of the capacitor C1. That is, the region 231 has a function as the source of the transistor M1, a function as the drain of the transistor M2, and a function as one of the electrodes of the capacitor C1. A part of the insulator 130 functions as a dielectric of the capacitor C1.

The insulator 130 is preferably an insulator having a large relative dielectric constant. For example, an insulator including one or both of aluminum and hafnium can be used. As the insulator containing one or both of aluminum and hafnium, aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), or the like is preferably used. The insulator 130 may have a stacked structure, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, hafnium oxide, oxide containing hafnium, aluminum (hafnium aluminate), or the like. Therefore, two or more layers may be selected to form a laminated structure. For example, it is preferable that hafnium oxide, aluminum oxide, and hafnium oxide are sequentially formed by an ALD method to form a stacked structure. The film thicknesses of hafnium oxide and aluminum oxide are 0.5 nm to 5 nm, respectively. With such a stacked structure, the capacitor C1 having a large capacitance value and a small leakage current can be obtained.

Here, an insulator 272 and an insulator 275 are provided on the side surfaces of the conductors 260 of the transistors M1 and M2. By providing the insulator 272 and the insulator 275 between the conductor 260 and the conductor 120, parasitic capacitance between the conductor 260 and the conductor 120 can be reduced.

Note that the conductor 120 may have a stacked structure. For example, the conductor 120 may have a stacked structure of a conductive material mainly containing titanium, titanium nitride, tantalum, or tantalum nitride and a conductive material mainly containing tungsten, copper, or aluminum. The conductor 120 may have a single-layer structure or a stacked structure including three or more layers.

The insulator 220, the insulator 222, the insulator 224, and the oxide 230a have openings. The oxide 230b and the oxide 230c are electrically connected to the conductor 206 through the opening.

Therefore, the series resistance and the contact resistance can be reduced by connecting the

oxides

230b and 230c with high electron affinity to the conductor 206 without using the oxide 230a with low electron affinity. Is possible. With such a configuration, a semiconductor device with good electrical characteristics can be obtained. More specifically, a transistor with improved on-state current and a semiconductor device using the transistor can be obtained.

As described above, the semiconductor device of one embodiment of the present invention has a structure in which the transistor M1, the transistor M2, the transistor M3, and the capacitor C can be arranged in the same layer. With such a structure, the semiconductor device can be highly integrated because transistors and capacitors can be arranged at high density.

<Board>
As a substrate over which the transistor is formed, for example, an insulator substrate, a semiconductor substrate, or a conductor substrate may be used. Examples of the insulator substrate include a glass substrate, a quartz substrate, a sapphire substrate, a stabilized zirconia substrate (such as a yttria stabilized zirconia substrate), and a resin substrate. Examples of the semiconductor substrate include a semiconductor substrate made of silicon or germanium, or a compound semiconductor substrate made of silicon carbide, silicon germanium, gallium arsenide, indium phosphide, zinc oxide, or gallium oxide. Furthermore, there is a semiconductor substrate having an insulator region inside the semiconductor substrate, for example, an SOI (Silicon On Insulator) substrate. Examples of the conductor substrate include a graphite substrate, a metal substrate, an alloy substrate, and a conductive resin substrate. Alternatively, there are a substrate having a metal nitride, a substrate having a metal oxide, and the like. Further, there are a substrate in which a conductor or a semiconductor is provided on an insulator substrate, a substrate in which a conductor or an insulator is provided on a semiconductor substrate, a substrate in which a semiconductor or an insulator is provided on a conductor substrate, and the like. Alternatively, a substrate in which an element is provided may be used. Examples of the element provided on the substrate include a capacitor element, a resistor element, a switch element, a light emitting element, and a memory element.

A flexible substrate may be used as the substrate. Note that as a method for providing a transistor over a flexible substrate, there is a method in which after a transistor is formed over a non-flexible substrate, the transistor is peeled off and transferred to a substrate which is a flexible substrate. In that case, a separation layer is preferably provided between the non-flexible substrate and the transistor. Note that a sheet, a film, a foil, or the like in which fibers are knitted may be used as the substrate. Further, the substrate may have elasticity. Further, the substrate may have a property of returning to the original shape when bending or pulling is stopped. Or you may have a property which does not return to an original shape. The substrate has a region having a thickness of, for example, 5 μm to 700 μm, preferably 10 μm to 500 μm, more preferably 15 μm to 300 μm. When the substrate is thinned, a semiconductor device including a transistor can be reduced in weight. Further, by making the substrate thin, it may have elasticity even when glass or the like is used, or may have a property of returning to its original shape when bending or pulling is stopped. Therefore, an impact applied to the semiconductor device on the substrate due to dropping or the like can be reduced. That is, a durable semiconductor device can be provided.

As the substrate which is a flexible substrate, for example, metal, alloy, resin or glass, or fiber thereof can be used. A substrate that is a flexible substrate is preferably as the linear expansion coefficient is lower because deformation due to the environment is suppressed. As the substrate which is a flexible substrate, for example, a material having a linear expansion coefficient of 1 × 10 ⁻³ / K or less, 5 × 10 ⁻⁵ / K or less, or 1 × 10 ⁻⁵ / K or less may be used. . Examples of the resin include polyester, polyolefin, polyamide (such as nylon and aramid), polyimide, polycarbonate, and acrylic. In particular, since aramid has a low coefficient of linear expansion, it is suitable as a substrate that is a flexible substrate.

<Insulator>
Examples of the insulator include an insulating oxide, nitride, oxynitride, nitride oxide, metal oxide, metal oxynitride, and metal nitride oxide.

By surrounding the transistor with an insulator having a function of suppressing permeation of impurities such as hydrogen and oxygen, electrical characteristics of the transistor can be stabilized. For example, as the insulator 210, the insulator 214, the insulator 222, the insulator 270, and the insulator 272, an insulator having a function of suppressing transmission of impurities such as hydrogen and oxygen can be used.

Examples of the insulator having a function of suppressing permeation of impurities such as hydrogen and oxygen include boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, and zirconium. An insulator containing lanthanum, neodymium, hafnium, or tantalum may be used as a single layer or a stacked layer.

For example, the insulator 210, the insulator 214, the insulator 222, the insulator 270, and the insulator 272 include aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, and neodymium oxide. Alternatively, hafnium oxide, an oxide containing silicon and hafnium, an oxide containing aluminum and hafnium, a metal oxide such as tantalum oxide, silicon nitride oxide, silicon nitride, or the like may be used. Note that for example, the insulator 210, the insulator 214, the insulator 222, the insulator 270, and the insulator 272 preferably include aluminum oxide, hafnium oxide, or the like.

As the insulator 274, for example, an insulator containing boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, zirconium, lanthanum, neodymium, hafnium, or tantalum is used. Or a single layer or a stacked layer. For example, the insulator 274 preferably includes silicon oxide, silicon oxynitride, or silicon nitride.

The insulator 222, the insulator 224, the insulator 250, and the insulator 130 preferably include an insulator with a high relative dielectric constant. For example, the insulator 222, the insulator 224, the insulator 250, and the insulator 130 include gallium oxide, hafnium oxide, zirconium oxide, an oxide including aluminum and hafnium, an oxynitride including aluminum and hafnium, silicon, and hafnium. It is preferable to have an oxide, an oxynitride including silicon and hafnium, a nitride including silicon and hafnium, or the like. Alternatively, the insulator 222, the insulator 224, the insulator 250, and the insulator 130 preferably have a stacked structure of silicon oxide or silicon oxynitride and an insulator with a high relative dielectric constant. Since silicon oxide and silicon oxynitride are thermally stable, they can be combined with an insulator having a large relative dielectric constant to form a stacked structure that is thermally stable and has a large relative dielectric constant. For example, the insulator 250 has a structure in which aluminum oxide, gallium oxide, or hafnium oxide is in contact with the oxide 230, so that silicon contained in silicon oxide or silicon oxynitride is prevented from entering the oxide 230. Can do. For example, in the insulator 250, when silicon oxide or silicon oxynitride is in contact with the oxide 230, a trap center can be formed at the interface between aluminum oxide, gallium oxide, or hafnium, and silicon oxide or silicon oxynitride. May be formed. In some cases, the trap center can change the threshold voltage of the transistor in the positive direction by capturing electrons.

The insulator 212, the insulator 216, the insulator 280, and the insulator 275 preferably include an insulator with a low relative dielectric constant. For example, the insulator 212, the insulator 216, the insulator 280, and the insulator 275 include silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide to which fluorine is added, silicon oxide to which carbon is added, carbon, and nitrogen It is preferable to have silicon oxide to which is added, silicon oxide having holes, resin, or the like. Alternatively, the insulator 212, the insulator 216, the insulator 280, and the insulator 275 include silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide to which fluorine is added, silicon oxide to which carbon is added, carbon, and It is preferable to have a laminated structure of silicon oxide to which nitrogen is added or silicon oxide having pores and a resin. Since silicon oxide and silicon oxynitride are thermally stable, they can be combined with a resin to form a stacked structure that is thermally stable and has a low relative dielectric constant. Examples of the resin include polyester, polyolefin, polyamide (such as nylon and aramid), polyimide, polycarbonate, and acrylic.

<Conductor>
As the conductor 203, the conductor 205, the conductor 260, the conductor 240, and the conductor 120, aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, A material containing one or more metal elements selected from manganese, magnesium, zirconium, beryllium, indium, ruthenium, and the like can be used. Alternatively, a semiconductor with high electrical conductivity typified by polycrystalline silicon containing an impurity element such as phosphorus, or silicide such as nickel silicide may be used.

In particular, as the conductor 260, a conductive material containing oxygen and a metal element contained in a metal oxide applicable to the oxide 230 may be used. Alternatively, the above-described conductive material containing a metal element and nitrogen may be used. For example, a conductive material containing nitrogen such as titanium nitride or tantalum nitride may be used. In addition, indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, silicon were added Indium tin oxide may be used. Alternatively, indium gallium zinc oxide containing nitrogen may be used. In some cases, hydrogen contained in the oxide 230 can be captured by using such a material. Alternatively, hydrogen mixed from an external insulator or the like may be captured.

A plurality of conductive layers formed using the above materials may be stacked. For example, a stacked structure in which the above-described material containing a metal element and a conductive material containing oxygen may be combined. Alternatively, a stacked structure in which the above-described material containing a metal element and a conductive material containing nitrogen are combined may be employed. Alternatively, a stacked structure of the above-described material containing a metal element, a conductive material containing oxygen, and a conductive material containing nitrogen may be employed.

Note that in the case where an oxide is used for a channel formation region of the transistor, a stacked structure in which the above-described material containing a metal element and a conductive material containing oxygen are combined as the gate electrode is preferably used. In this case, a conductive material containing oxygen is preferably provided on the channel formation region side. By providing a conductive material containing oxygen on the channel formation region side, oxygen released from the conductive material can be easily supplied to the channel formation region.

<Metal oxide>
As the oxide 230, a metal oxide functioning as an oxide semiconductor (hereinafter also referred to as an oxide semiconductor) is preferably used. Hereinafter, metal oxides applicable to the semiconductor layer and the oxide 230 according to the present invention will be described.

Here, a case where the oxide semiconductor is an In-M-Zn oxide containing indium, an element M, and zinc is considered. The element M is aluminum, gallium, yttrium, tin, or the like. Other elements applicable to the element M include boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, and magnesium. However, the element M may be a combination of a plurality of the aforementioned elements.

[Composition of metal oxide]
A structure of a CAC (Cloud-Aligned Composite) -OS that can be used for the transistor disclosed in one embodiment of the present invention is described below.

In addition, in this specification etc., it may describe as CAAC (c-axis aligned crystal) and CAC (Cloud-aligned Composite). Note that CAAC represents an example of a crystal structure, and CAC represents an example of a function or a material structure.

CAC-OS or CAC-metal oxide has a conductive function in part of a material and an insulating function in part of the material, and the whole material has a function as a semiconductor. Note that in the case where CAC-OS or CAC-metal oxide is used for an active layer of a transistor, the conductive function is a function of flowing electrons (or holes) serving as carriers, and the insulating function is an electron serving as carriers. It is a function that does not flow. A function of switching (a function of turning on / off) can be imparted to CAC-OS or CAC-metal oxide by causing the conductive function and the insulating function to act complementarily. In CAC-OS or CAC-metal oxide, by separating each function, both functions can be maximized.

In addition, the CAC-OS or the CAC-metal oxide has a conductive region and an insulating region. The conductive region has the above-described conductive function, and the insulating region has the above-described insulating function. In the material, the conductive region and the insulating region may be separated at the nanoparticle level. In addition, the conductive region and the insulating region may be unevenly distributed in the material, respectively. In addition, the conductive region may be observed with the periphery blurred and connected in a cloud shape.

In CAC-OS or CAC-metal oxide, the conductive region and the insulating region are dispersed in the material with a size of 0.5 nm to 10 nm, preferably 0.5 nm to 3 nm, respectively. There is.

Further, CAC-OS or CAC-metal oxide is composed of components having different band gaps. For example, CAC-OS or CAC-metal oxide includes a component having a wide gap caused by an insulating region and a component having a narrow gap caused by a conductive region. In the case of the configuration, when the carrier flows, the carrier mainly flows in the component having the narrow gap. In addition, the component having a narrow gap acts in a complementary manner to the component having a wide gap, and the carrier flows through the component having the wide gap in conjunction with the component having the narrow gap. Therefore, when the CAC-OS or the CAC-metal oxide is used for a channel formation region of a transistor, high current driving force, that is, high on-state current and high field-effect mobility can be obtained in the on-state of the transistor.

That is, CAC-OS or CAC-metal oxide can also be called a matrix composite material (metal matrix composite) or a metal matrix composite material (metal matrix composite).

[Structure of metal oxide]
An oxide semiconductor is classified into a single crystal oxide semiconductor and a non-single-crystal oxide semiconductor. Examples of the non-single-crystal oxide semiconductor include a CAAC-OS (c-axis aligned crystal oxide semiconductor), a polycrystalline oxide semiconductor, an nc-OS (nanocrystalline oxide semiconductor), and a pseudo-amorphous oxide semiconductor (a-like oxide semiconductor). OS: amorphous-like oxide semiconductor) and amorphous oxide semiconductor.

The CAAC-OS has a c-axis orientation and a crystal structure in which a plurality of nanocrystals are connected in the ab plane direction and have a strain. Note that the strain refers to a portion where the orientation of the lattice arrangement is changed between a region where the lattice arrangement is aligned and a region where another lattice arrangement is aligned in a region where a plurality of nanocrystals are connected.

Nanocrystals are based on hexagons, but are not limited to regular hexagons and may be non-regular hexagons. In addition, there may be a lattice arrangement such as a pentagon and a heptagon in the distortion. Note that in the CAAC-OS, a clear crystal grain boundary (also referred to as a grain boundary) cannot be confirmed even in the vicinity of strain. That is, it can be seen that the formation of crystal grain boundaries is suppressed by the distortion of the lattice arrangement. This is because the CAAC-OS can tolerate distortion due to the fact that the arrangement of oxygen atoms is not dense in the ab plane direction and the bond distance between atoms changes due to substitution of metal elements. This is probably because of this.

The CAAC-OS includes a layered crystal in which a layer containing indium and oxygen (hereinafter referred to as In layer) and a layer including elements M, zinc, and oxygen (hereinafter referred to as (M, Zn) layers) are stacked. There is a tendency to have a structure (also called a layered structure). Note that indium and the element M can be replaced with each other, and when the element M in the (M, Zn) layer is replaced with indium, it can also be expressed as an (In, M, Zn) layer. Further, when indium in the In layer is replaced with the element M, it can also be expressed as an (In, M) layer.

The CAAC-OS is an oxide semiconductor with high crystallinity. On the other hand, since CAAC-OS cannot confirm a clear crystal grain boundary, it can be said that a decrease in electron mobility due to the crystal grain boundary hardly occurs. In addition, since the crystallinity of an oxide semiconductor may be deteriorated due to entry of impurities, generation of defects, or the like, the CAAC-OS can be said to be an oxide semiconductor with few impurities and defects (such as oxygen vacancies). Therefore, the physical properties of the oxide semiconductor including a CAAC-OS are stable. Therefore, an oxide semiconductor including a CAAC-OS is resistant to heat and has high reliability.

The nc-OS has periodicity in atomic arrangement in a minute region (for example, a region of 1 nm to 10 nm, particularly a region of 1 nm to 3 nm). In addition, the nc-OS has no regularity in crystal orientation between different nanocrystals. Therefore, orientation is not seen in the whole film. Therefore, the nc-OS may not be distinguished from an a-like OS or an amorphous oxide semiconductor depending on an analysis method.

The a-like OS is an oxide semiconductor having a structure between the nc-OS and the amorphous oxide semiconductor. The a-like OS has a void or a low density region. That is, the a-like OS has lower crystallinity than the nc-OS and the CAAC-OS.

Oxide semiconductors have various structures and different properties. The oxide semiconductor of one embodiment of the present invention may include two or more of an amorphous oxide semiconductor, a polycrystalline oxide semiconductor, an a-like OS, an nc-OS, and a CAAC-OS.

[Transistor having oxide semiconductor]
Next, the case where the above oxide semiconductor is used for a transistor is described.

Note that by using the oxide semiconductor for a transistor, a transistor with high field-effect mobility can be realized. In addition, a highly reliable transistor can be realized.

For the transistor, an oxide semiconductor with low carrier density is preferably used. In the case where the carrier density of the oxide semiconductor film is decreased, the impurity concentration in the oxide semiconductor film may be decreased and the defect level density may be decreased. In this specification and the like, a low impurity concentration and a low density of defect states are referred to as high purity intrinsic or substantially high purity intrinsic. For example, the oxide semiconductor has a carrier density of less than 8 × 10 ¹¹ / cm ³ , preferably less than 1 × 10 ¹¹ / cm ³ , more preferably less than 1 × 10 ¹⁰ / cm ³ , and 1 × 10 ⁻⁹ / What is necessary is just to be cm ³ or more.

In addition, a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film has a low density of defect states, and thus may have a low density of trap states.

In addition, the charge trapped in the trap level of the oxide semiconductor takes a long time to disappear, and may behave as if it were a fixed charge. Therefore, a transistor in which a channel region is formed in an oxide semiconductor with a high trap state density may have unstable electrical characteristics.

Therefore, in order to stabilize the electrical characteristics of the transistor, it is effective to reduce the impurity concentration in the oxide semiconductor. In order to reduce the impurity concentration in the oxide semiconductor, it is preferable to reduce the impurity concentration in an adjacent film. Impurities include hydrogen, nitrogen, alkali metal, alkaline earth metal, iron, nickel, silicon, and the like.

[impurities]
Here, the influence of each impurity in the oxide semiconductor is described.

In the oxide semiconductor, when silicon or carbon which is one of Group 14 elements is included, a defect level is formed in the oxide semiconductor. Therefore, the concentration of silicon or carbon in the oxide semiconductor and the concentration of silicon or carbon in the vicinity of the interface with the oxide semiconductor (concentration obtained by secondary ion mass spectrometry (SIMS)) are 2 × 10 ¹⁸ atoms / cm ³ or less, preferably 2 × 10 ¹⁷ atoms / cm ³ or less.

In addition, when the oxide semiconductor contains an alkali metal or an alkaline earth metal, a defect level is formed and carriers may be generated in some cases. Therefore, a transistor including an oxide semiconductor containing an alkali metal or an alkaline earth metal is likely to be normally on. Therefore, it is preferable to reduce the concentration of alkali metal or alkaline earth metal in the oxide semiconductor. Specifically, the concentration of alkali metal or alkaline earth metal in the oxide semiconductor obtained by SIMS is set to 1 × 10 ¹⁸ atoms / cm ³ or less, preferably 2 × 10 ¹⁶ atoms / cm ³ or less.

In addition, when nitrogen is contained in an oxide semiconductor, electrons serving as carriers are generated, the carrier density is increased, and the oxide semiconductor is likely to be n-type. As a result, a transistor using an oxide semiconductor containing nitrogen as a semiconductor is likely to be normally on. Accordingly, nitrogen in the oxide semiconductor is preferably reduced as much as possible. For example, the nitrogen concentration in the oxide semiconductor is less than 5 × 10 ¹⁹ atoms / cm ^{3 in} SIMS, preferably 5 × 10 ^18. atoms / cm ³ or less, more preferably 1 × 10 ¹⁸ atoms / cm ³ or less, and even more preferably 5 × 10 ¹⁷ atoms / cm ³ or less.

In addition, hydrogen contained in the oxide semiconductor reacts with oxygen bonded to a metal atom to become water, so that an oxygen vacancy may be formed in some cases. When hydrogen enters the oxygen vacancies, electrons serving as carriers may be generated. In addition, a part of hydrogen may be combined with oxygen bonded to a metal atom to generate electrons as carriers. Therefore, a transistor including an oxide semiconductor containing hydrogen is likely to be normally on. For this reason, it is preferable that hydrogen in the oxide semiconductor be reduced as much as possible. Specifically, in an oxide semiconductor, the hydrogen concentration obtained by SIMS is less than 1 × 10 ²⁰ atoms / cm ³ , preferably less than 1 × 10 ¹⁹ atoms / cm ³ , more preferably 5 × 10 ¹⁸ atoms / cm 3. Less than ³ , more preferably less than 1 × 10 ¹⁸ atoms / cm ³ .

By using an oxide semiconductor in which impurities are sufficiently reduced for a channel formation region of a transistor, stable electrical characteristics can be imparted.

As described above, the structure described in this embodiment can be combined as appropriate with any of the structures described in the other embodiments.

(Embodiment 3)
In this embodiment, a semiconductor device that can be used in the above embodiment will be described. Note that in the case where the same function as the reference numeral used in the previous embodiment is used, the same reference numeral is used, and detailed description thereof may be omitted.

<Modification of semiconductor device>
FIG. 11A is a top view of a semiconductor device including a transistor 300. FIG. FIG. 11B is a cross-sectional view taken along dashed-dotted line A1-A2 in FIG. 11A and is a cross-sectional view in the channel length direction of the transistor 300. 11C is a cross-sectional view taken along dashed-dotted line A3-A4 in FIG. 11A and is a cross-sectional view in the channel width direction of the transistor 300. FIG. In the top view of FIG. 11A, some elements are omitted for clarity of illustration.

The semiconductor device of one embodiment of the present invention includes the transistor 300, the insulator 280 that functions as an interlayer film, the insulator 282, and the insulator 286, and the barrier that covers the side surfaces of the openings included in the insulator 280 and the insulator 282. The conductor 240 (the conductor 240a and the conductive layer) embedded in the opening of the layer 276 (the barrier layer 276a and the barrier layer 276b) and the insulator 280, the insulator 282, and the insulator 286 with the barrier layer 276 interposed therebetween. Body 240b).

Note that in the semiconductor device, the conductor 240 functions as a plug or a wiring. Note that in this specification and the like, the wiring and the plug electrically connected to the wiring may be integrated. That is, a part of the conductor may function as a wiring, and a part of the conductor may function as a plug.

The transistor 300 includes a conductor 260 functioning as a first gate electrode, a conductor 205 functioning as a second gate electrode, an insulator 270 in contact with the conductor 260, an insulator 220 functioning as a gate insulator, The insulator 222, the insulator 224, and the insulator 250, and the oxide 230 (the oxide 230a, the oxide 230c, and the oxide 230d) each including a region where a channel is formed are included.

In the transistor 300, the oxide 230 is preferably formed using an oxide semiconductor. Since a transistor including an oxide semiconductor has extremely low leakage current in a non-conduction state, a semiconductor device with low power consumption can be provided. An oxide semiconductor can be formed by a sputtering method or the like, and thus can be used for a transistor included in a highly integrated semiconductor device.

<Components>
Hereinafter, an example of components of the transistor 300 will be described.

The conductor 205 is a metal film containing an element selected from molybdenum, titanium, tantalum, tungsten, aluminum, copper, chromium, neodymium, and scandium, or a metal nitride film containing any of the above-described elements (a tantalum nitride film or a nitride film). Titanium film, molybdenum nitride film, tungsten nitride film). In particular, a metal nitride film such as tantalum nitride is preferable because it has a barrier property against hydrogen or oxygen and is difficult to oxidize (high oxidation resistance). Or indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, silicon oxide added It is also possible to apply a conductive material such as indium tin oxide.

The insulator 224 is preferably an insulator containing oxygen, such as a silicon oxide film or a silicon oxynitride film. In particular, the insulator 224 preferably has an excess oxygen region. In the case where an oxide semiconductor is used for the transistor 300, an insulator having an excess oxygen region is provided in a peripheral material of the transistor 300, whereby oxygen vacancies in the oxide 230 included in the transistor 300 are reduced, so that reliability is improved. be able to.

In the case where the insulator 224 has an excess oxygen region, the insulator 222 preferably has a barrier property against oxygen, hydrogen, and water.

The insulator 222 is made of, for example, silicon oxynitride, silicon nitride oxide, aluminum oxide, hafnium oxide, tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTiO ₃ ), or (Ba, Sr) TiO. _{3 An} insulator including a so-called high-k material such as (BST) is preferably used in a single layer or a stacked layer. In particular, it is preferable to use an insulator having a barrier property against oxygen and hydrogen, such as aluminum oxide and hafnium oxide. In the case of using such a material, it functions as a layer which prevents release of oxygen from the oxide 230 and entry of impurities such as hydrogen from the outside.

Alternatively, for example, aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, or zirconium oxide may be added to these insulators. Alternatively, these insulators may be nitrided. Silicon insulator, silicon oxynitride, or silicon nitride may be stacked over the above insulator.

Note that the insulator 220, the insulator 222, and the insulator 224 may have a stacked structure of two or more layers. In that case, it is not limited to the laminated structure which consists of the same material, The laminated structure which consists of a different material may be sufficient.

In addition, by including the insulator 222 including a high-k material between the insulator 220 and the insulator 224, the insulator 222 can capture electrons under a specific condition and increase the threshold voltage. . That is, the insulator 222 may be negatively charged.

For example, in the case where silicon oxide is used for the insulator 220 and the insulator 224 and a material with many electron capture levels such as hafnium oxide, aluminum oxide, or tantalum oxide is used for the insulator 222, the operating temperature of the semiconductor device Alternatively, under a temperature higher than the storage temperature (eg, 125 ° C. or higher and 450 ° C. or lower, typically 150 ° C. or higher and 300 ° C. or lower), the potential of the conductor 205 is higher than the potential of the source electrode or the drain electrode. By maintaining for 10 milliseconds or longer, typically 1 minute or longer, electrons move from the oxide included in the transistor 300 toward the conductor 205. At this time, some of the moving electrons are captured by the electron capture level of the insulator 222.

The threshold voltage of the transistor that captures an amount of electrons necessary for the electron trap level of the insulator 222 is shifted to the positive side. Note that the amount of electrons captured can be controlled by controlling the voltage of the conductor 205, and the threshold voltage can be controlled accordingly. With this structure, the transistor 300 is a normally-off transistor that is non-conductive (also referred to as an off state) even when the gate voltage is 0 V.

Further, the process for capturing electrons may be performed in the manufacturing process of the transistor. For example, after the formation of the conductor connected to the source region or drain region of the transistor, after the completion of the previous process (wafer processing), after the wafer dicing process, after packaging, etc. It is good to do.

In addition, the threshold voltage can be controlled by appropriately adjusting the film thicknesses of the insulator 220, the insulator 222, and the insulator 224. For example, by reducing the total thickness of the insulator 220, the insulator 222, and the insulator 220, a voltage from the conductor 205 is efficiently applied, so that a transistor with low power consumption can be provided. The total film thickness of the insulator 220, the insulator 222, and the insulator 224 is 65 nm or less, preferably 20 nm or less.

Accordingly, it is possible to provide a transistor with small leakage current when non-conducting. In addition, a transistor having stable electrical characteristics can be provided. Alternatively, a transistor with high on-state current can be provided. Alternatively, a transistor with a small subthreshold swing value can be provided. Alternatively, a highly reliable transistor can be provided.

The oxide 230 includes an oxide 230a, an oxide 230c over the oxide 230a, and an oxide 230d over the oxide 230c. When the transistor 300 is turned on, a current flows mainly in the oxide 230c (a channel is formed). On the other hand, in the oxide 230a and the oxide 230d, a current may flow in the vicinity of the interface with the oxide 230c (which may be a mixed region), but the other region may function as an insulator. .

Further, the transistor 300 described in this embodiment includes the region 231 in the oxide 230. Note that the region 231 preferably has a concentration of at least one of a metal element and an impurity element such as hydrogen and nitrogen higher than that of a channel formation region (not illustrated).

Note that the region 231 functions as a source or a drain in the transistor 300.

In addition, as illustrated in FIGS. 11B and 11C, the oxide 230d is preferably provided so as to cover the side surfaces of the oxide 230a and the oxide 230c. When the oxide 230d is interposed between the insulator 280 and the oxide 230c having a region where a channel is formed, impurities such as hydrogen, water, and halogen are transferred from the insulator 280 to the oxide 230c. Diffusion can be suppressed.

<Insulator that functions as an interlayer film>
The insulator 280 functioning as an interlayer film is preferably an insulator containing oxygen, such as a silicon oxide film or a silicon oxynitride film. In particular, the insulator 280 provided in the vicinity of the transistor 300 is preferably an insulator containing oxygen, such as a silicon oxide film or a silicon oxynitride film. In particular, the insulator 280 is preferably formed using an oxide containing more oxygen than that in the stoichiometric composition. That is, it is preferable that an excess oxygen region be formed in the insulator 280. In particular, by providing an insulator having an excess oxygen region in the interlayer film in the vicinity of the transistor 300, oxygen vacancies in the oxide 230 included in the transistor 300 can be reduced, so that reliability can be improved.

In the case where the insulator 280 has an excess oxygen region, the insulator 282 preferably has a barrier property against oxygen, hydrogen, and water. Since the insulator 282 has a barrier property against oxygen, oxygen in the excess oxygen region can be efficiently supplied to the oxide 230 without diffusing to the insulator 286 side.

Note that although details will be described later, the insulator 222 included in the transistor 300 also preferably has a barrier property against oxygen, hydrogen, and water, like the insulator 282. Since the insulator 222 has a barrier property against oxygen, oxygen in the excess oxygen region can be efficiently supplied to the oxide 230 without diffusing to the insulator 220 side.

The insulator 282 includes, for example, silicon oxynitride, silicon nitride oxide, aluminum oxide, hafnium oxide, tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTiO ₃ ), or (Ba, Sr) TiO. _{3 An} insulator including a so-called high-k material such as (BST) is preferably used in a single layer or a stacked layer. In particular, it is preferable to use an insulator having a barrier property against oxygen and hydrogen, such as aluminum oxide and hafnium oxide. In the case of using such a material, it functions as a layer which prevents release of oxygen from the oxide 230 and entry of impurities such as hydrogen from the outside.

Note that the insulator 280, the insulator 282, and the insulator 286 may have a stacked structure of two or more layers. In that case, it is not limited to the laminated structure which consists of the same material, The laminated structure which consists of a different material may be sufficient. Note that the insulator 280 that covers the transistor 300 may function as a planarization film that covers the uneven shape below the transistor 280.

The transistor 300 may be electrically connected to another structure through a plug or a wiring such as the insulator 280, the insulator 282, and the conductor 240 embedded in the insulator 286. Further, hydrogen which is an impurity contained in another structure formed around the transistor 300 may diffuse into a structure in contact with the conductor through a conductor used for a plug or a wiring.

Therefore, a barrier layer 276 is preferably provided between the conductor 240, the insulator 280 having an excess oxygen region, and the insulator 282 having a barrier property. In particular, the barrier layer 276 is preferably provided in contact with the insulator 282 having a barrier property and the insulator 222. By providing the barrier layer 276 in contact with the insulator 282 and the insulator 222, the insulator 280 and the transistor 300 can be sealed with the insulator having a barrier property and the barrier layer. be able to. Further, the barrier layer 276 is preferably in contact with part of the insulator 286. When the barrier layer 276 extends to the insulator 286, diffusion of oxygen and impurities can be further suppressed.

As the material of the conductor 240, a conductive material such as a metal material, an alloy material, a metal nitride material, or a metal oxide material can be used as a single layer or a stacked layer. For example, it is preferable to use a high melting point material such as tungsten or molybdenum that has both heat resistance and conductivity. Alternatively, it is preferably formed using a low-resistance conductive material such as aluminum or copper. Wiring resistance can be lowered by using a low-resistance conductive material.

For the barrier layer 276, for example, a metal oxide can be used. In particular, it is preferable to use an insulator having a barrier property against oxygen and hydrogen, such as aluminum oxide, hafnium oxide, and gallium oxide. Alternatively, silicon nitride formed by a chemical vapor deposition (CVD) method may be used.

As described above, a semiconductor device having stable electrical characteristics can be provided. In addition, a highly reliable semiconductor device can be provided. In addition, a semiconductor device with low power consumption can be provided. Furthermore, the degree of freedom in designing the semiconductor device can be increased.

(Embodiment 4)
In this embodiment, a semiconductor device including an oxide semiconductor that can be used in one embodiment of the present invention with reference to FIGS. 12A to 12C, 13A, and 13B. An example will be described.

<Configuration example of semiconductor device>
12A to 12C are a top view and a cross-sectional view of the transistor 302 and the periphery of the transistor 302. FIG. The transistor 302 illustrated in FIGS. 12A to 12C can be used as the transistors M21 to M23 in Embodiment 1.

FIG. 12A is a top view of a semiconductor device including a transistor 302. FIG. 12B and 12C are cross-sectional views of the semiconductor device. Here, FIG. 12B is a cross-sectional view taken along dashed-dotted line A1-A2 in FIG. 12A and also a cross-sectional view in the channel length direction of the transistor 302. 12C is a cross-sectional view taken along dashed-dotted line A3-A4 in FIG. 12A and is a cross-sectional view in the channel width direction of the transistor 302. FIG. In the top view of FIG. 12A, some elements are omitted for clarity.

The semiconductor device of one embodiment of the present invention includes the transistor 302, the insulator 510 functioning as an interlayer film, the insulator 512, and the insulator 580. In addition, a conductor 503 which functions as a wiring and is electrically connected to the transistor 302, and a conductor 540 which functions as a plug (a conductor 540a and a conductor 540b) are provided.

Note that the conductor 503 has a first conductor formed in contact with the inner wall of the opening of the insulator 512, and a second conductor formed further inside. Here, the height of the upper surface of the conductor 503 and the height of the upper surface of the insulator 512 can be approximately the same. Note that although the transistor 302 shows the case where the conductor 503 has a two-layer structure, the present invention is not limited to this. For example, the conductor 503 may have a single layer or a stacked structure including three or more layers.

The conductor 540 is formed in contact with the inner wall of the opening of the insulator 580. Here, the height of the upper surface of the conductor 540 and the height of the upper surface of the insulator 580 can be approximately the same. Note that although the transistor 302 shows the case where the conductor 540 has a two-layer structure, the present invention is not limited to this. For example, the conductor 540 may have a single layer or a stacked structure including three or more layers.

[Transistor 302]
The transistor 302 includes an insulator 514 and an insulator 516 disposed on a substrate (not shown), a conductor 505 disposed to be embedded in the insulator 514 and the insulator 516, the conductor 505, and An insulator 520 disposed on the insulator 516, an insulator 522 disposed on the insulator 520, an insulator 524 disposed on the insulator 522, and the insulator 524 Oxide 530 (oxide 530a, oxide 530c, and oxide 530d), insulator 550 disposed on oxide 530, metal oxide 552 disposed on insulator 550, and metal A conductor 560 disposed over the oxide 552, an insulator 570 disposed over the conductor 560, an insulator 571 disposed over the insulator 570, and at least the oxide 530; , An insulator 572 disposed in contact with the insulator 572, an insulator 572 disposed in contact with the insulator 572, and an insulator disposed in contact with at least the insulator 572. 575.

In the transistor 302, the oxide 530 including the channel formation region (the oxide 530a, the oxide 530c, and the oxide 530d) has a structure similar to that of the oxide 230 described above.

The oxide 530 includes a channel formation region, a source region, a drain region, a junction region provided between the channel formation region and the source region, and a junction region provided between the channel formation region and the drain region. Have.

The bonding region has a region overlapping with the insulator 572.

Note that in the oxide 530, a boundary between regions may not be clearly detected in some cases. Concentrations of metal elements such as indium and impurity elements such as hydrogen and nitrogen detected in each region are not limited to stepwise changes in each region, but also continuously change in each region (also referred to as gradation). You may do it. In other words, the closer to the channel formation region, the lower the concentration of metal elements such as indium and impurity elements such as hydrogen and nitrogen.

As shown in FIG. 12B, each region is formed in the oxide 530c. However, the present invention is not limited to this, and for example, these regions may be formed in the oxide 530a. Further, in the figure, the boundary of each region is displayed substantially perpendicular to the upper surface of the oxide 530, but this embodiment is not limited to this. For example, the bonding region may have a shape that protrudes toward the conductor 560 near the surface of the oxide 530c and recedes toward the conductor 540 near the lower surface of the oxide 530c.

12B and 12C, a structure in which the oxide 530a, the oxide 530c, and the oxide 530d are stacked is described; however, the present invention is not limited to this. Alternatively, a single layer of the oxide 530c, a two-layer structure of the oxide 530c and the oxide 530a, a two-layer structure of the oxide 530c and the oxide 530d, or a stacked structure of four or more layers may be provided.

When the oxide 530c is provided over the oxide 530a, diffusion of impurities into the oxide 530c can be suppressed from a structure formed below the oxide 530a. Further, by including the oxide 530c below the oxide 530d, diffusion of impurities into the oxide 530c can be suppressed from the structure formed above the oxide 530d.

Here, the thickness (t) of the oxide 530 c is preferably larger than the channel length (L) of the transistor 302. That is, as illustrated in FIG. 12B, the thickness (t) of the oxide 530c is larger than the channel length (L) of the transistor 302 (t> L). In addition, the thickness (t) of the oxide 530 c is preferably larger than the channel width (W) of the transistor 302. That is, as illustrated in FIG. 12C, the thickness (t) of the oxide 530c is larger than the channel width (W) of the transistor 302 (t> W).

In addition, at least a side surface of the oxide 530c preferably has a tapered structure with respect to a plane parallel to the substrate. Note that as illustrated in FIG. 12C, the taper angle of the side surface of the oxide 530c is preferably 45 ° to 80 °. When the side surface of the oxide 530c has a tapered structure, the film property of the structure formed in an upper layer than the oxide 530c can be improved.

12B and 12C, a conductor 560 functioning as a first gate electrode is attached to a side surface of the oxide 530 with an insulator 550 functioning as a gate insulator interposed therebetween. Provide to cover. With this structure, when the transistor 302 is driven, a gate voltage is applied from the upper surface and both sides of the oxide 530c, and the entire region overlapping with the conductor 560 of the oxide 530c is a channel formation region. It becomes. In this specification, a transistor structure in which a channel formation region is electrically surrounded by a first gate electrode is referred to as a surrounded channel (S-channel) structure.

That is, the conductor 560 functioning as the first gate electrode covers the side surface of the oxide 530 with the insulator 550 functioning as the gate insulator interposed therebetween, whereby the projected area (L × The on-current per W) can be improved. Accordingly, the transistor 302 can be miniaturized.

The conductor 505 functions as the second gate electrode of the transistor 302. Since the side surface of the oxide 530c has a taper angle, when a potential is applied to the second gate electrode, a gate electric field can be applied to the entire region overlapping with the second gate electrode of the oxide 530c. it can.

In particular, when oxygen vacancies exist in the interface between the region where a channel is formed in the oxide 530 and the insulator 550 functioning as the first gate insulator of the transistor 302, electric characteristics are likely to change and the reliability is improved. May be worse.

Therefore, it is preferable that the insulator 550 positioned above a region where a channel is formed in the oxide 530 include excess oxygen. That is, excess oxygen in the insulator 550 diffuses into a region where a channel in the oxide 530 is formed, so that oxygen vacancies in the region where the channel in the oxide 530 is formed can be reduced.

The metal oxide 552 may be provided in order to efficiently supply the excess oxygen included in the insulator 550 to the oxide 530. Therefore, the metal oxide 552 preferably suppresses oxygen diffusion. By providing the metal oxide 552 that suppresses diffusion of oxygen, diffusion of excess oxygen into the conductor 560 is suppressed. That is, a decrease in the amount of excess oxygen supplied to the oxide 530 can be suppressed. Further, oxidation of the conductor 560 due to excess oxygen can be suppressed.

Note that the metal oxide 552 may function as part of the gate insulator. Therefore, when silicon oxide, silicon oxynitride, or the like is used for the insulator 550, the metal oxide 552 is preferably a metal oxide that is a high-k material with a high relative dielectric constant. By setting it as the said laminated structure, it can be set as the laminated structure stable with respect to a heat | fever, and a large dielectric constant. Therefore, it is possible to reduce the gate potential applied during transistor operation while maintaining the physical film thickness. In addition, it is possible to reduce the equivalent oxide thickness (EOT) of an insulator that functions as a gate insulator.

The metal oxide 552 may function as a part of the first gate electrode. For example, an oxide semiconductor that can be used as the oxide 530 can be used as the metal oxide 552. In that case, by forming a film of the conductor 560 by a sputtering method, the electric resistance value of the metal oxide 552 can be reduced to obtain a conductor. This can be called an OC (Oxide Conductor) electrode.

With the metal oxide 552, the on-state current can be improved without weakening the influence of the electric field from the conductor 560. In addition, leakage current can be suppressed by maintaining the distance between the conductor 560 and the oxide 530 depending on the physical thickness of the insulator 550 and the metal oxide 552. Further, by providing a stacked structure of the insulator 550 and the metal oxide 552, the physical distance between the conductor 560 and the oxide 530 and the electric field strength applied from the conductor 560 to the oxide 530 can be reduced. It can be easily adjusted as appropriate.

Specifically, as the metal oxide 552, a metal containing one or more selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, magnesium, and the like. An oxide can be used. Further, by reducing the resistance of an oxide semiconductor that can be used for the oxide 530, the oxide semiconductor can be used as the metal oxide 552.

The insulator 520, the insulator 522, and the insulator 524 function as a second gate insulator of the transistor 302. In the drawing, the structure in which the insulator 520, the insulator 522, and the insulator 524 are stacked is shown; however, the present invention is not limited to this. For example, any two layers of the insulator 520, the insulator 522, and the insulator 524 may be stacked, or any one of the layers may be used.

The insulator 522 and the insulator 514 functioning as an interlayer film can function as a barrier insulator that prevents impurities such as water or hydrogen from entering the transistor from below. For the insulator 514 and the insulator 522, an insulating material having a function of suppressing permeation of impurities such as water or hydrogen is preferably used. For example, silicon nitride or the like is used as the insulator 514, and aluminum oxide, hafnium oxide, an oxide containing silicon and hafnium (hafnium silicate), an oxide containing aluminum and hafnium (hafnium aluminate), or the like is used as the insulator 522. Is preferred. Accordingly, impurities such as hydrogen and water can be prevented from diffusing into layers above the insulator 514 and the insulator 522. Note that the insulator 514 and the insulator 522 include at least one of impurities such as a hydrogen atom, a hydrogen molecule, a water molecule, a nitrogen atom, a nitrogen molecule, a nitrogen oxide molecule (N ₂ O, NO, NO _{2, and the} like) and a copper atom. It preferably has a function of suppressing transmission. The same applies to the case where an insulating material having a function of suppressing the permeation of impurities is described below.

The insulator 514 and the insulator 522 are preferably formed using an insulating material having a function of suppressing permeation of oxygen (eg, an oxygen atom or an oxygen molecule). Thus, downward diffusion of oxygen contained in the insulator 524 and the like can be suppressed.

In addition, the concentration of impurities such as water, hydrogen, or nitrogen oxide in the insulator 522 is preferably reduced. For example, the amount of hydrogen desorbed from the insulator 522 is converted into hydrogen molecules when the surface temperature of the insulator 522 is in the range of 50 ° C. to 500 ° C. in the temperature programmed desorption gas analysis method (TDS (Thermal Desorption Spectroscopy)). 2 × 10 ¹⁵ molecules / cm ² or less, preferably 1 × 10 ¹⁵ molecules / cm ² or less, more preferably 5 × 10 ¹⁴ molecules / cm ² in terms of the amount of the desorbed in terms of the area of the insulator 522. The following is sufficient. The insulator 522 is preferably formed using an insulator from which oxygen is released by heating.

The conductor 560 functions as the first gate electrode of the transistor 302. The conductor 505 functions as a second gate electrode of the transistor 302. The conductor 505 functioning as the second gate electrode of the transistor 302 is provided so as to overlap with the oxide 530 and the conductor 560.

Here, the conductor 505 is preferably provided so that the length in the channel width direction is larger than the channel formation region in the oxide 530. In particular, the conductor 505 preferably extends even in a region outside the end portion where the channel formation region of the oxide 530 intersects with the one-dot chain line (channel width direction) of A3-A4 in the region 234. That is, it is preferable that the conductor 505 and the conductor 560 overlap with each other through the insulator on the side surface of the oxide 530 in the channel width direction.

The potential applied to the conductor 505 is preferably the same as the potential applied to the conductor 560. Further, it may be a ground potential or an arbitrary potential. In addition, the threshold voltage of the transistor 302 can be controlled by changing the potential applied to the conductor 505 independently of the potential applied to the conductor 560 without being linked. In particular, by applying a negative potential to the conductor 505, the threshold voltage of the transistor 302 can be higher than 0 V and the off-state current can be reduced. Therefore, the drain current when the voltage applied to the conductor 560 is 0 V can be reduced.

In addition, as illustrated in FIG. 12A, the conductor 505 is provided so as to overlap with the oxide 530 and the conductor 560. Here, the conductor 505 is also arranged so as to overlap with the conductor 560 in a region outside the end portion of the region 234 of the oxide 530 that intersects with the one-dot chain line (channel width direction) of A3-A4. Is preferred. That is, it is preferable that the conductor 505 and the conductor 560 overlap with each other with an insulator outside the side surface of the oxide 530.

With the above structure, when a potential is applied to the conductor 560 and the conductor 505, the electric field generated from the conductor 560 and the electric field generated from the conductor 505 are connected to form a closed circuit, and oxidation A channel formation region formed in the object 530 can be covered.

In other words, the channel formation region can be electrically surrounded by the electric field of the conductor 560 functioning as the first gate electrode and the electric field of the conductor 505 functioning as the second gate electrode.

Note that the conductor 503 is extended in the channel width direction like the conductor 560 and functions as a wiring for applying a potential to the conductor 505. Here, by stacking over the conductor 503 functioning as a wiring and providing the insulator 514 and the conductor 505 embedded in the insulator 516, the insulator 514 and the conductor 560 are provided between the conductor 503 and the conductor 560. An insulator 516 and the like are provided, so that the parasitic capacitance between the conductor 503 and the conductor 560 can be reduced and the withstand voltage can be increased. By reducing the parasitic capacitance between the conductor 503 and the conductor 560, the switching speed of the transistor can be improved and a transistor having high frequency characteristics can be obtained. Further, by increasing the withstand voltage between the conductor 503 and the conductor 560, the reliability of the transistor can be improved. Therefore, it is preferable to increase the thickness of the insulator 514 and the insulator 516. Note that the extending direction of the conductor 503 is not limited thereto, and the conductor 503 may be extended in the channel length direction of the transistor 302, for example.

The conductor 505 includes a first conductor that is in contact with the inner walls of the openings of the insulator 514 and the insulator 516, and a second conductor that is provided inside the first conductor. Further, the height of the upper surface of the conductor 505 and the height of the upper surface of the insulator 516 can be approximately the same. In addition, although the figure has shown about the structure which laminates | stacks the conductor 505, this invention is not limited to this. For example, a single layer or a stacked structure of three or more layers may be used.

Here, it is preferable to use a conductive material having a function of suppressing transmission of impurities such as water or hydrogen (difficult to transmit) as the first conductor. For example, tantalum, tantalum nitride, ruthenium, ruthenium oxide, or the like is preferably used, and a single layer or a stacked layer may be used. Accordingly, impurities such as hydrogen and water from the lower layer than the insulator 514 can be prevented from diffusing into the upper layer through the conductor 505. Note that the first conductor is an impurity such as a hydrogen atom, a hydrogen molecule, a water molecule, an oxygen atom, an oxygen molecule, a nitrogen atom, a nitrogen molecule, a nitrogen oxide molecule (N ₂ O, NO, NO ₂ ), a copper atom, or the like. Alternatively, it preferably has a function of suppressing transmission of at least one of oxygen (for example, oxygen atoms and oxygen molecules). The same applies to the case where a conductive material having a function of suppressing the permeation of impurities is described below. When the first conductor has a function of suppressing the permeation of oxygen, it is possible to prevent the second conductor from being oxidized and the conductivity from being lowered.

The second conductor is preferably formed using a conductive material containing tungsten, copper, or aluminum as a main component. Although not illustrated, the second conductor may have a stacked structure, for example, a stack of titanium, titanium nitride, and the above conductive material.

The conductor 560 includes a first conductor and a second conductor. For the first conductor, for example, a metal such as tungsten can be used. In the case where an oxide semiconductor is used as the metal oxide 552, a conductor that can improve conductivity of the metal oxide 552 by adding an impurity such as nitrogen to the metal oxide 552 is used as the first conductor. Good. For example, titanium nitride or the like is preferably used for the first conductor. The second conductor is preferably formed using a metal such as aluminum or tungsten with low resistance.

Further, the insulator 570 may be provided over the conductor 560. The insulator 570 may be formed using an insulating material having a function of suppressing permeation of impurities such as water or hydrogen and oxygen. By including the insulator 570, oxidation of the conductor 560 can be prevented. In addition, impurities such as water or hydrogen can be prevented from entering the oxide 530 through the conductor 560 and the insulator 550.

Here, as illustrated in FIG. 12B, a structure including the insulator 550, the metal oxide 552, the conductor 560, and the insulator 570 has a side surface that is substantially perpendicular to the insulator 522. Is preferred. Note that the semiconductor device described in this embodiment is not limited to this. For example, the side surface of the structure including the insulator 550, the metal oxide 552, the conductor 560, and the insulator 570 may have a tapered structure with respect to the upper surface of the insulator 522. In that case, the angle formed between the side surface of the structure and the top surface of the insulator 522 is preferably as large as possible (close to vertical).

Therefore, the insulator 571 functioning as a hard mask may be provided over the insulator 570. By providing the insulator 571, when a structure body including the insulator 550, the metal oxide 552, the conductor 560, and the insulator 570 is formed, the side surface of the structure body is substantially vertical. Specifically, the structure body The angle formed between the side surface and the substrate surface can be set to 75 ° to 100 °, preferably 80 ° to 95 °.

The insulator 572 is provided in contact with at least the side surfaces of the insulator 550, the metal oxide 552, the conductor 560, and the insulator 570. The

insulators

550, 571, and 572 are provided in the same manner as the

insulators

250, 270, and 272 described above.

An insulator 575 is provided on the side surfaces of the conductor 560, the metal oxide 552, and the insulator 550 with an insulator 572 interposed therebetween. As illustrated in FIG. 12B, the transistor 302 has a high probability that parasitic capacitance is formed between the conductor 560 and the conductor 540. In addition, the transistor 302 has a high probability that a parasitic capacitance is formed between the conductor 560 and the conductor 320. In particular, with the miniaturization of a transistor, for example, when the designed channel length is 10 nm or more and 30 nm or less, the parasitic capacitance may affect the electrical characteristics of the transistor.

Therefore, by providing the insulator 575 in the transistor 302, each parasitic capacitance can be reduced. By reducing the parasitic capacitance, the transistor 302 can be operated at high speed.

The insulator 575 preferably includes an insulator having a small relative dielectric constant. For example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide to which fluorine is added, silicon oxide to which carbon is added, silicon oxide to which carbon and nitrogen are added, silicon oxide or resin having holes, or the like is included. It is preferable. In particular, silicon oxide and silicon oxynitride are preferable because they are thermally stable.

An insulator 580 functioning as an interlayer film is provided so as to cover the transistor 302. Note that the insulator 580 preferably has reduced concentration of impurities such as water or hydrogen in the film. Subsequently, an opening is preferably provided in the insulator 580 so that the conductor 540 is embedded in the opening. Note that the conductor 540 is in contact with the source region or the drain region of the oxide 530.

For the conductor 540, a material similar to that of the conductor 505 can be used. Alternatively, the conductor 540 may be formed after aluminum oxide is formed on the side wall portion of the opening. By forming aluminum oxide on the side wall portion of the opening, permeation of oxygen from the outside can be suppressed and oxidation of the conductor 540 can be prevented. Further, impurities such as water and hydrogen can be prevented from diffusing from the conductor 540 to the outside. The aluminum oxide can be formed by forming an aluminum oxide film in the opening using an ALD method or the like and performing anisotropic etching.

As a substrate (not illustrated) for forming the transistor 302, a substrate similar to the above-described substrate 201 can be used. As the conductor, the insulator, the oxide semiconductor, and the like used for the semiconductor device of this embodiment, the same materials as those of the semiconductor device of the above embodiment can be used.

<Configuration Example of Semiconductor Device 20>
Hereinafter, a specific configuration of an example of the semiconductor device 20 described in Embodiment 1 will be described with reference to FIGS. 13A and 13B illustrates a semiconductor device that can be miniaturized or highly integrated by having a structure in which a plurality of transistors and a capacitor have a common structure. Can be provided.

13A is a diagram illustrating a cross-sectional structure of the semiconductor device 20, and FIG. 13B is a cross-sectional view of a portion indicated by a dashed-dotted line W1-W2 in FIG. 13A. The semiconductor device 20 is a semiconductor device including a transistor including an oxide in a channel formation region. Specifically, the semiconductor device 20 includes a transistor M21, a transistor M22, a transistor M23, a capacitor C21, and a wiring. Note that in FIGS. 13A and 13B, reference numerals may be given only to the structure of the transistor M21, and reference numerals of the structure of the transistor M22 or the transistor M23 may be omitted. At that time, in the transistor M22 or the transistor M23, a structure having the same function as the structure to which the reference numeral of the transistor M21 is given may be described using the same reference numeral.

The semiconductor device 20 is provided over a substrate 501, and includes a transistor M21, a transistor M22, a transistor M23, and a capacitor C21, an insulator 510 that functions as an interlayer film, an insulator 512, and an insulator 580. In addition, a conductor 503 which is electrically connected to the transistor M21, the transistor M22, or the transistor M23 and functions as a wiring is provided. In addition, a conductor 540 that is electrically connected to the transistor M21 or the transistor M23 and functions as a wiring is provided. Further, a conductor 504 and a conductor 506 which are electrically connected to the capacitor C21 and function as wirings are provided.

In the semiconductor device 20, by providing a plurality of transistors and a capacitor in the same layer, a part of the structure forming the transistor can be used together with a part of the structure forming the capacitor. In other words, part of the structure of the transistor may function as part of the structure of the capacitor.

With the above structure, miniaturization or high integration is possible. In addition, the degree of freedom in design can be increased. In addition, the plurality of transistors and the capacitor are formed in the same process. Therefore, since the process can be shortened, productivity can be improved.

Note that the conductor 503 and the conductor 504 are formed to be embedded in the insulator 512. Here, the heights of the upper surfaces of the conductor 503 and the conductor 504 and the height of the upper surface of the insulator 512 can be approximately the same. Note that although the conductor 503 and the conductor 504 are illustrated as single layers, the present invention is not limited to this. For example, the conductor 503 and the conductor 504 may have a multilayer structure including two or more layers.

[Transistor M21, Transistor M22, and Transistor M23]
In the transistors M21 to M23, the oxide 530a and the oxide 530c can be provided in common. With this structure, the distance between the transistors can be reduced; thus, miniaturization or high integration can be achieved. Further, with this structure, it is not necessary to separately provide a wiring and the like for connecting the transistors, so that the process can be simplified.

Here, in each of the structures of the transistor M21, the transistor M22, and the transistor M23, the description of the transistor 302 can be referred to for a structure to which the same sign as the transistor 302 is given.

Note that in the transistor M21, the transistor M22, and the transistor M23, the oxide 530a, the oxide 530c, and the oxide 530d may be collectively referred to as the oxide 530. In the transistors M21, M22, and M23, the oxide 530a, the oxide 530c, and the oxide 530d are stacked; however, the present invention is not limited to this. For example, only the oxide 530c may be provided. Further, for example, a single layer, two layers, or a stacked structure of four or more layers may be used. Moreover, although the structure which laminates | stacks the conductor 560 and the conductor 505 is shown, this invention is not limited to this. For example, the conductor 560 and the conductor 505 may be provided as a single layer or a stack of three or more layers.

[Capacitance element C21]
As illustrated in FIG. 13A, the capacitor C21 has a structure in common with the transistor M21, the transistor M22, and the transistor M23. In this embodiment, part of the transistor M21 and the oxide 530 of the transistor M22 functions as an electrode of the capacitor C21. Therefore, the capacitive element C21 is provided between the transistor M21 and the transistor M22.

The capacitor C <b> 21 includes a part of the oxide 530 in which the resistance is reduced, the insulator 330, and the conductor 320 over the insulator 330. That is, at least part of the conductor 320 is disposed so as to overlap with part of the region where the resistance of the oxide 530 is reduced, with the insulator 330 interposed therebetween.

A part of the region of the oxide 530 whose resistance is reduced functions as one of the electrodes of the capacitor C21, and the conductor 320 functions as the other of the electrodes of the capacitor C21. In other words, part of the region of the oxide 530 whose resistance is reduced serves as the source of the transistor M21, the drain of the transistor M22, and the function of one of the electrodes of the capacitor C21. . A part of the insulator 330 functions as a dielectric of the capacitor C21.

Further, part of the oxide 530 whose resistance is reduced is provided in contact with the conductor 506. With the structure in which part of the oxide 530 in which the resistance is reduced and the conductor 506 are connected to each other, the semiconductor device can be miniaturized.

The insulator 330 may be provided similarly to the insulator 130. By stacking an insulator having a large relative dielectric constant, the capacitor C21 having a large capacitance value and a small leakage current can be obtained.

Here, an insulator 572 and an insulator 575 are provided on side surfaces of the transistor M21 and the conductor 560 of the transistor M22. By providing the insulator 572 and the insulator 575 between the conductor 560 and the conductor 320, parasitic capacitance between the conductor 560 and the conductor 320 can be reduced.

Note that the conductor 320 is similar to the conductor 120 described above, and may have a stacked structure of two or more layers.

As described above, the semiconductor device of one embodiment of the present invention has a structure in which the transistors M21 to M23 and the capacitor C21 can be arranged in the same layer. With such a structure, the semiconductor device can be highly integrated because transistors and capacitors can be arranged at high density.

(Embodiment 5)
In this embodiment, a modification example of the semiconductor device that can be used for the transistors M21 to M23 described in the above embodiments will be described with reference to FIGS. Note that in the case where the same function as the reference numeral used in the previous embodiment is used, the same reference numeral is used, and detailed description thereof may be omitted.

<Modification of semiconductor device>
FIG. 14A is a top view of a semiconductor device including a transistor 303. FIG. 14B is a cross-sectional view taken along dashed-dotted line A1-A2 in FIG. 14A and also a cross-sectional view of the transistor 303 in the channel length direction. FIG. 14C is a cross-sectional view taken along dashed-dotted line A3-A4 in FIG. 14A and is a cross-sectional view in the channel width direction of the transistor 303. In the top view of FIG. 14A, some elements are omitted for clarity.

The semiconductor device of one embodiment of the present invention includes the transistor 303, the insulator 580 functioning as an interlayer film, the insulator 582, and the insulator 586, and the barrier that covers the side surfaces of the openings included in the insulator 580 and the insulator 582. The conductor 540 (the conductor 540a and the conductor 540) embedded in the opening of the layer 576 (the barrier layer 576a and the barrier layer 576b) and the insulator 580, the insulator 582, and the insulator 586 with the barrier layer 576 interposed therebetween. Body 540b).

Note that in the semiconductor device, the conductor 540 functions as a plug or a wiring. Note that in this specification and the like, the wiring and the plug electrically connected to the wiring may be integrated. That is, a part of the conductor may function as a wiring, and a part of the conductor may function as a plug.

The transistor 303 includes a conductor 560 functioning as a first gate electrode, a conductor 505 functioning as a second gate electrode, an insulator 570 in contact with the conductor 560, an insulator 520 functioning as a gate insulator, The insulator 522, the insulator 524, and the insulator 550, and the oxide 530 (the oxide 530a, the oxide 530c, and the oxide 530d) each include a region where a channel is formed.

Hereinafter, an example of components of the transistor 303 will be described. Note that the description of the transistor 302 can be referred to for the components of the transistor 303 which overlap with the transistor 302 (see FIGS. 12A to 12C).

As the oxide 530, an oxide semiconductor is preferably used. Since a transistor including an oxide semiconductor has extremely low leakage current in a non-conduction state, a semiconductor device with low power consumption can be provided. An oxide semiconductor can be formed by a sputtering method or the like, and thus can be used for a transistor included in a highly integrated semiconductor device.

The oxide 530 includes an oxide 530a, an oxide 530c over the oxide 530a, and an oxide 530d over the oxide 530c. When the transistor 303 is turned on, a current mainly flows through the oxide 530c (a channel is formed). On the other hand, in the oxide 530a and the oxide 530d, current may flow in the vicinity of the interface with the oxide 530c (which may be a mixed region), but other regions may function as an insulator. .

In addition, the transistor 303 described in this embodiment includes the region 531 in the oxide 530. Note that the region 531 preferably has a lower oxygen concentration than the channel formation region, and at least one concentration of a metal element and an impurity element such as hydrogen and nitrogen is higher than that of the channel formation region (not illustrated). Is preferred.

For example, the region 531 preferably includes any one or more metal elements selected from aluminum, ruthenium, titanium, tantalum, and tungsten in addition to the constituent elements included in the oxide 530. By adding a metal element to the oxide 530, the resistance of the region 531 can be reduced. In order to add a metal element, for example, a metal film, a metal compound film, an oxide film containing a metal element, a nitride film containing a metal element, or the like is formed in contact with the region 531 of the oxide 530, and then the film Should be removed. In addition, after a metal film, a metal compound film, an oxide film containing a metal element, or a nitride film containing a metal element is formed, heat treatment is preferably performed before removal. A metal film, a metal compound film, an oxide film containing a metal element, a nitride film containing a metal element, or the like is formed in contact with the region 531 of the oxide 530, and then heat treatment is performed, so that the vicinity of the metal film or the like is performed. In some cases, part of oxygen in the oxide 530 located in the region is absorbed by the metal film and the resistance of the region 531 is reduced. Note that the heat treatment can be performed at 200 ° C. or more and 500 ° C. or less, typically 400 ° C. or the vicinity thereof. In addition, by performing the heat treatment, a metal element such as aluminum, ruthenium, titanium, tantalum, or tungsten may enter the constituent element of the oxide 530. In this case, a constituent element included in the oxide 530 and a metal element such as aluminum, ruthenium, titanium, tantalum, or tungsten may be alloyed in part of the region 531, typically over the region 531. In the case where the region 531 is alloyed, the alloyed region, that is, the region having low resistance can be formed relatively stably, so that a highly reliable semiconductor device can be provided.

Note that the region 531 functions as a source or a drain in the transistor 303.

As shown in FIG. 14C, the oxide 530d is preferably provided so as to cover the side surfaces of the oxide 530a and the oxide 530c. When the oxide 530d is interposed between the insulator 580 and the oxide 530c having a region where a channel is formed, impurities such as hydrogen, water, and halogen are transferred from the insulator 580 to the oxide 530c. Diffusion can be suppressed.

The thickness (t) of the oxide 530 c is preferably larger than the channel length (L) of the transistor 303. That is, as illustrated in FIG. 14B, the thickness (t) of the oxide 530c is larger than the channel length (L) of the transistor 303 (t> L). In addition, the thickness (t) of the oxide 530 c is preferably larger than the channel width (W) of the transistor 303. That is, as illustrated in FIG. 14C, the thickness (t) of the oxide 530c is larger than the channel width (W) of the transistor 303 (t> W).

In addition, at least a side surface of the oxide 530c preferably has a tapered structure with respect to a plane parallel to the substrate. Note that as illustrated in FIG. 14C, the taper angle of the side surface of the oxide 530c is preferably 45 ° to 80 °. When the side surface of the oxide 530c has a tapered structure, the film property of the structure formed in an upper layer than the oxide 530c can be improved.

14B and 14C, a conductor 560 functioning as a first gate electrode is attached to a side surface of the oxide 530 with an insulator 550 functioning as a gate insulator interposed therebetween. Provide to cover. With this structure, when the transistor 303 is driven, a gate voltage is applied from the upper surface and both sides of the oxide 530c and the entire region overlapping with the conductor 560 of the oxide 530c is a channel formation region. It becomes.

In other words, with the above structure, the conductor 560 functioning as the first gate electrode covers the side surface of the oxide 530 with the insulator 550 functioning as the gate insulator interposed therebetween, whereby the channel of the transistor 303 is formed. The on-current per projected area (L × W) of the region can be improved. Accordingly, the transistor 303 can be miniaturized.

The conductor 505 functions as the second gate electrode of the transistor 303. Since the side surface of the oxide 530c has a taper angle, when a potential is applied to the second gate electrode, a gate electric field can be applied to the entire region overlapping with the second gate electrode of the oxide 530c. it can.

The insulator 582 includes, for example, silicon oxynitride, silicon nitride oxide, aluminum oxide, hafnium oxide, tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTiO ₃ ), or (Ba, Sr) TiO. _{3 An} insulator including a so-called high-k material such as (BST) is preferably used in a single layer or a stacked layer. In particular, it is preferable to use an insulator having a barrier property against oxygen and hydrogen, such as aluminum oxide and hafnium oxide. In the case of using such a material, it functions as a layer which prevents release of oxygen from the oxide 530 and entry of impurities such as hydrogen from the outside.

For the insulator 586, a material applicable to the insulator 580 can be used.

Note that the insulator 580, the insulator 582, and the insulator 586 may have a stacked structure of two or more layers. In that case, it is not limited to the laminated structure which consists of the same material, The laminated structure which consists of a different material may be sufficient. Note that the insulator 580 covering the transistor 303 may function as a planarization film covering the uneven shape below the transistor 303.

The transistor 303 may be electrically connected to another structure through a plug or a wiring such as the insulator 580, the insulator 582, and the conductor 540 embedded in the insulator 586. Further, hydrogen that is an impurity contained in another structure formed around the transistor 303 may diffuse into a structure in contact with the conductor through a conductor used for a plug or a wiring.

Therefore, a barrier layer 576 is preferably provided between the conductor 540, the insulator 580 having an excess oxygen region, and the insulator 582 having a barrier property. In particular, the barrier layer 576 is preferably provided in contact with the insulator 582 having a barrier property. The barrier layer 576 is preferably provided in contact with the insulator 522 (not shown). By providing the barrier layer 576 in contact with the insulator 582 and the insulator 522, the insulator 580 and the transistor 303 are sealed with the insulator having a barrier property and the barrier layer. be able to. Further, the barrier layer 576 is preferably in contact with part of the insulator 586. When the barrier layer 576 extends to the insulator 586, diffusion of oxygen and impurities can be further suppressed.

As a material for the conductor 540, a conductive material such as a metal material, an alloy material, a metal nitride material, or a metal oxide material can be used as a single layer or a stacked layer. For example, it is preferable to use a high melting point material such as tungsten or molybdenum that has both heat resistance and conductivity. Alternatively, it is preferably formed using a low-resistance conductive material such as aluminum or copper. Wiring resistance can be lowered by using a low-resistance conductive material.

For the barrier layer 576, for example, a metal oxide can be used. In particular, it is preferable to use an insulator having a barrier property against oxygen and hydrogen, such as aluminum oxide, hafnium oxide, and gallium oxide. Alternatively, silicon nitride formed by a chemical vapor deposition (CVD) method may be used.

(Embodiment 6)
This embodiment shows an example of an electronic component and an electronic device in which the semiconductor device described in any of the above embodiments is incorporated.

<Electronic parts>
First, an example of an electronic component in which the semiconductor device 10 is incorporated will be described with reference to FIGS. 15A and 15B.

An electronic component 7000 illustrated in FIG. 15A is an IC chip and includes a lead and a circuit portion. The electronic component 7000 is mounted on a printed circuit board 7002, for example. A plurality of such IC chips are combined and each is electrically connected on the printed circuit board 7002 to complete a substrate on which electronic components are mounted (a mounting substrate 7004).

The circuit portion of the electronic component 7000 is formed by stacking a substrate 7031, a layer 7032, and a layer 7033.

As the substrate 7031, a substrate that can be used for the substrate 201 described in Embodiment 2 may be used. In the case where a semiconductor substrate such as silicon is used as the substrate 7031, an integrated circuit may be formed over the substrate 7031 and the layer 7032 including an OS transistor may be formed thereover.

The layer 7032 includes the OS transistor described in the above embodiment. The semiconductor device 10 described in the above embodiment can be provided in the layer 7032.

The layer 7033 includes a memory. As the memory, for example, a memory using an OS transistor such as NOSRAM (registered trademark) or DOSRAM (registered trademark) (hereinafter referred to as an OS memory) can be used. Since the OS memory can be provided by being stacked over another semiconductor element, the electronic component 7000 can be downsized. Further, the OS memory consumes less power when data is rewritten, and the power consumption of the electronic component 7000 can be reduced.

Note that NOSRAM is an abbreviation for “Nonvolatile Oxide Semiconductor Random Access Memory” and refers to a RAM having a gain cell type (2T (transistor) type, 3T type) memory cell. DOSRAM is an abbreviation for “Dynamic Oxide Semiconductor RAM”, and refers to a RAM having 1T (transistor) 1C (capacitance) type memory cells. NOSRAM and DOSRAM are each a type of OS memory that utilizes the small off-state current of the OS transistor.

The OS memory may be provided in the layer 7032 instead of the layer 7033. By doing so, the IC chip manufacturing process can be shortened.

In addition to the OS memory, the layer 7033 may include a memory such as a ReRAM (Resistive RAM), an MRAM (Magnetic Resistive RAM), a PRAM (Phase change RAM), or a FeRAM (Ferroelectric RAM).

In FIG. 15A, QFP (Quad Flat Package) is applied to the package of the electronic component 7000, but the form of the package is not limited to this.

FIG. 15B is a schematic view of the electronic component 7400. An electronic component 7400 is a camera module and includes an image sensor chip 7451. The electronic component 7400 includes a package substrate 7411 for fixing the image sensor chip 7451, a lens cover 7421, a lens 7435, and the like. In addition, an IC chip 7490 having functions such as a drive circuit and a signal conversion circuit of the imaging device is also provided between the package substrate 7411 and the image sensor chip 7451, and has a configuration as a SiP (System in package). Yes. The land 7441 is electrically connected to the electrode pad 7461, and the electrode pad 7461 is electrically connected to the image sensor chip 7451 or the IC chip 7490 through a wire 7471. FIG. 15B illustrates a part of the lens cover 7421 and the lens 7435 which are not shown in order to show the inside of the electronic component 7400.

The circuit portion of the image sensor chip 7451 is formed by stacking a substrate 7031, a layer 7032, a layer 7033, and a layer 7034.

The details of the substrate 7031, the layer 7032, and the layer 7033 may be referred to the description of the electronic component 7000 described above.

The layer 7034 includes a light receiving element. As the light receiving element, for example, a pn junction photodiode using a selenium-based material as a photoelectric conversion layer can be used. A photoelectric conversion element using a selenium-based material has high external quantum efficiency with respect to visible light, and can realize a highly sensitive photosensor.

Selenium-based materials can be used as p-type semiconductors. Examples of the selenium-based material include crystalline selenium such as single crystal selenium and polycrystalline selenium, amorphous selenium, copper, indium, selenium compound (CIS), or copper, indium, gallium, selenium compound (CIGS), etc. Can be used.

The n-type semiconductor of the pn junction photodiode is preferably formed using a material having a wide band gap and a light-transmitting property with respect to visible light. For example, zinc oxide, gallium oxide, indium oxide, tin oxide, or an oxide in which they are mixed can be used.

Alternatively, a pn junction photodiode using a p-type silicon semiconductor and an n-type silicon semiconductor may be used as the light-receiving element included in the layer 7034. Further, it may be a pin junction photodiode in which an i-type silicon semiconductor layer is provided between a p-type silicon semiconductor and an n-type silicon semiconductor.

The photodiode using silicon can be formed using single crystal silicon. At this time, it is preferable that the layer 7033 and the layer 7034 be electrically bonded by using a bonding process. The photodiode using silicon can also be formed using a thin film such as amorphous silicon, microcrystalline silicon, or polycrystalline silicon.

(Embodiment 7)
<Electronic equipment>
The semiconductor device described in any of the above embodiments can be used for various electronic devices. A specific example is shown in FIG.

An information terminal 2910 illustrated in FIG. 16A includes a housing 2911, a display portion 2912, a microphone 2917, a speaker portion 2914, a camera 2913, an external connection portion 2916, an operation switch 2915, and the like. The display portion 2912 includes a display panel using a flexible substrate and a touch screen. In addition, the information terminal 2910 includes an antenna, a battery, and the like inside the housing 2911. The information terminal 2910 can be used as, for example, a smartphone, a mobile phone, a tablet information terminal, a tablet personal computer, an electronic book terminal, or the like.

A laptop personal computer 2920 illustrated in FIG. 16B includes a housing 2921, a display portion 2922, a keyboard 2923, a pointing device 2924, and the like. The laptop personal computer 2920 includes an antenna, a battery, and the like inside the housing 2921.

A video camera 2940 illustrated in FIG. 16C includes a housing 2941, a housing 2942, a display portion 2944, operation switches 2944, a lens 2945, a connection portion 2946, and the like. The operation switch 2944 and the lens 2945 are provided on the housing 2941, and the display portion 2944 is provided on the housing 2942. In addition, the video camera 2940 includes an antenna, a battery, and the like inside the housing 2941. The housing 2941 and the housing 2942 are connected to each other by a connection portion 2946. The angle between the housing 2941 and the housing 2942 can be changed by the connection portion 2946. Depending on the angle of the housing 2942 with respect to the housing 2941, the orientation of the image displayed on the display portion 2943 can be changed, and display / non-display of the image can be switched.

FIG. 16D illustrates an example of a bangle information terminal. The information terminal 2950 includes a housing 2951, a display portion 2952, and the like. In addition, the information terminal 2950 includes an antenna, a battery, and the like inside the housing 2951. The display portion 2952 is supported by a housing 2951 having a curved surface. Since the display portion 2952 includes a display panel using a flexible substrate, an information terminal 2950 that is flexible, light, and easy to use can be provided.

FIG. 16E illustrates an example of a wristwatch type information terminal. The information terminal 2960 includes a housing 2961, a display portion 2962, a band 2963, a buckle 2964, an operation switch 2965, an input / output terminal 2966, and the like. The information terminal 2960 includes an antenna, a battery, and the like inside the housing 2961. The information terminal 2960 can execute various applications such as mobile phone, e-mail, text browsing and creation, music playback, Internet communication, and computer games.

The display surface of the display portion 2962 is curved, and display can be performed along the curved display surface. The display portion 2962 includes a touch sensor and can be operated by touching the screen with a finger, a stylus, or the like. For example, an application can be started by touching an icon 2967 displayed on the display unit 2962. The operation switch 2965 can have various functions such as time setting, power on / off operation, wireless communication on / off operation, manner mode execution and release, and power saving mode execution and release. . For example, the function of the operation switch 2965 can be set by an operating system incorporated in the information terminal 2960.

In addition, the information terminal 2960 can execute short-range wireless communication that is a communication standard. For example, it is possible to talk hands-free by communicating with a headset capable of wireless communication. Further, the information terminal 2960 includes an input / output terminal 2966, and can directly exchange data with other information terminals via a connector. Charging can also be performed via the input / output terminal 2966. Note that the charging operation may be performed by wireless power feeding without using the input / output terminal 2966.

A robot 2100 illustrated in FIG. 17A includes an arithmetic device 2110, an illuminance sensor 2101, a microphone 2102, an upper camera 2103, a speaker unit 2104, a display unit 2105, a lower camera 2106, an obstacle sensor 2107, and a moving mechanism 2108.

In the robot 2100, the electronic components can be used for the arithmetic device 2110, the illuminance sensor 2101, the upper camera 2103, the display unit 2105, the lower camera 2106, the obstacle sensor 2107, and the like.

The microphone 2102 has a function of detecting a user's speaking voice, environmental sound, and the like. The speaker unit 2104 has a function of emitting sound. The robot 2100 can communicate with the user using the microphone 2102 and the speaker unit 2104.

The display unit 2105 has a function of displaying various information. The robot 2100 can display information desired by the user on the display unit 2105. The display unit 2105 may be equipped with a touch panel.

The upper camera 2103 and the lower camera 2106 have a function of imaging the surroundings of the robot 2100. The obstacle sensor 2107 can detect the presence or absence of an obstacle in the traveling direction when the robot 2100 moves forward using the moving mechanism 2108. The robot 2100 can recognize the surrounding environment using the upper camera 2103, the lower camera 2106, and the obstacle sensor 2107, and can move safely.

A flying object 2120 illustrated in FIG. 17B includes a calculation device 2121, a propeller 2123, and a camera 2122, and has a function of flying independently.

In the flying object 2120, the electronic components can be used for the arithmetic device 2121 and the camera 2122.

FIG. 17C is an external view illustrating an example of an automobile. The automobile 2980 has a camera 2981 and the like. The automobile 2980 includes various sensors such as an infrared radar, a millimeter wave radar, and a laser radar. The automobile 2980 can analyze an image taken by the camera 2981, determine surrounding traffic conditions such as the presence or absence of a pedestrian, and perform automatic driving.

In the automobile 2980, the electronic component can be used for the camera 2981.

FIG. 17D illustrates a situation in which the portable electronic device 2130 performs simultaneous interpretation in communication between a plurality of people who speak in different languages.

The portable electronic device 2130 includes a microphone, a speaker, and the like, and has a function of recognizing a user's speaking voice and translating it into a language spoken by the speaking partner. The electronic component can be used for the arithmetic device of the portable electronic device 2130.

In FIG. 17D, the user has a portable microphone 2131. The portable microphone 2131 has a wireless communication function and a function of transmitting detected sound to the portable electronic device 2130.

FIG. 18A is a schematic cross-sectional view showing an example of a pacemaker.

The pacemaker body 5300 includes at

least batteries

5301a and 5301b, a regulator, a control circuit, an antenna 5304, a wire 5302 to the right atrium, and a wire 5303 to the right ventricle.

The electronic component can be used for the pacemaker main body 5300.

The pacemaker body 5300 is placed in the body by surgery, and two wires pass through the human subclavian vein 5305 and superior vena cava 5306, one wire tip is placed in the right ventricle and the other wire tip is placed in the right atrium. To be.

In addition, power can be received by the antenna 5304, and the power is charged in the plurality of

batteries

5301a and 5301b, so that the replacement frequency of the pacemaker can be reduced. Since the pacemaker body 5300 has a plurality of batteries, it is highly safe, and even if one of the pacemakers breaks down, the other can function, and thus functions as an auxiliary power source.

In addition to an antenna 5304 that can receive power, an antenna that can transmit physiological signals may be provided. For example, physiological signals such as a pulse, a respiratory rate, a heart rate, and a body temperature can be confirmed by an external monitor device. A system for monitoring cardiac activity may be configured.

A sensor 5900 illustrated in FIG. 18B is attached to a human body using an adhesive pad or the like. The sensor 5900 gives a signal to the electrode 5931 or the like attached to the human body via the wiring 5932 and acquires biological information such as a heart rate and an electrocardiogram. The acquired information is transmitted as a wireless signal to a terminal such as a reader.

For the sensor 5900, the above electronic components can be used.

FIG. 19 is a schematic diagram illustrating an example of a cleaning robot.

The cleaning robot 5100 includes a display unit 5101 arranged on the upper surface, a plurality of cameras 5102 arranged on the side surface, a brush 5103, and a plurality of operation buttons 5104. Although not shown, the lower surface of the cleaning robot 5100 is provided with a tire, a suction port, and the like. In addition, the cleaning robot 5100 includes various sensors such as an infrared sensor, an ultrasonic sensor, an acceleration sensor, a piezo sensor, an optical sensor, and a gyro sensor. Moreover, the cleaning robot 5100 includes a wireless communication unit.

The electronic component can be used for the camera 5102.

The cleaning robot 5100 is self-propelled, can detect the dust 5120, and can suck the dust 5120 from the suction port provided on the lower surface.

In addition, the cleaning robot 5100 can analyze an image captured by the camera 5102 and determine whether there is an obstacle such as a wall, furniture, or a step. In addition, when an object that is likely to be entangled with the brush 5103 such as wiring is detected by image analysis, the rotation of the brush 5103 can be stopped.

The display portion 5101 can display the remaining amount of battery, the amount of sucked dust, and the like. Further, the route traveled by the cleaning robot 5100 may be displayed on the display unit 5101. Alternatively, the display portion 5101 may be a touch panel and the operation buttons 5104 may be provided on the display portion 5101.

The cleaning robot 5100 can communicate with a portable electronic device 5140 such as a smartphone. An image captured by the camera 5102 can be displayed on the portable electronic device 5140. Therefore, the owner of the cleaning robot 5100 can know the state of the room even when away from home.

In this specification, unless otherwise specified, on-state current refers to drain current when a transistor is in an on state. The ON state (sometimes abbreviated as ON) is a state where the voltage between the gate and the source (V _G ) is equal to or higher than the threshold voltage (V _th ) in an n-channel transistor, unless otherwise specified, p In a channel type transistor, V _G is a state of V _th or less. For example, the on-current of the n-channel transistor, V _G refers to a drain current when the above V _th. In addition, the on-state current of the transistor may depend on a voltage (V _D ) between the drain and the source.

In this specification, unless otherwise specified, off-state current refers to drain current when a transistor is off. The OFF state (sometimes referred to as OFF), unless otherwise specified, the n-channel type transistor, V _G is lower than V _th state, the p-channel type transistor, V _G is higher than V _th state Say. For example, the off-current of the n-channel transistor, refers to the drain current when V _G is lower than V _th. Off-state current of the transistor may be dependent on the V _G. Accordingly, the off current of the transistor is less than ^{10 -21} A, and may refer to the value of _{V G} to off-current of the transistor is less than ^{10 -21} A are present.

In addition, the off-state current of the transistor may depend on V _D. In this specification, unless otherwise specified, the off-state current is such that the absolute value of V _D is 0.1 V, 0.8 V, 1 V, 1.2 V, 1.8 V, 2.5 V, 3 V, 3.3 V, 10 V , 12V, 16V, or 20V may be represented. Alternatively, the off-state current in V _D used in a semiconductor device or the like including the transistor may be represented.

In this specification and the like, voltage and potential can be described as appropriate. The voltage is a potential difference from a reference potential. For example, when the reference potential is a ground potential (ground potential), the voltage can be rephrased as a potential. The ground potential does not necessarily mean 0V. Note that the potential is relative, and the potential applied to the wiring or the like may be changed depending on the reference potential.

In this specification and the like, when X and Y are explicitly described as being connected, X and Y are electrically connected and X and Y are directly connected. It is assumed that this is disclosed in this specification and the like.

Here, X and Y are assumed to be objects (for example, devices, elements, circuits, wirings, electrodes, terminals, conductive films, layers, etc.).

As an example of the case where X and Y are directly connected, an element that enables electrical connection between X and Y (for example, a switch, a transistor, a capacitor, an inductor, a resistor, a diode, a display, etc.) This is a case where X and Y are connected without passing through an element, a light emitting element, a load, or the like.

As an example of the case where X and Y are electrically connected, an element (for example, a switch, a transistor, a capacitive element, an inductor, a resistance element, a diode, a display, etc.) that enables electrical connection between X and Y is shown. More than one element, light emitting element, load, etc.) can be connected between X and Y. Note that the switch is in a conductive state (on state) or a non-conductive state (off state), and has a function of controlling whether or not to pass a current. Alternatively, the switch has a function of selecting and switching a path through which a current flows. Note that the case where X and Y are electrically connected includes the case where X and Y are directly connected.

C1, C21: Capacitance elements, M1, M2, M3, M21, M22, M23, Tr1, Tr2: Transistors 10, 11, 12, 13, 20, 21, 22, 23, 90: Semiconductor devices, 120, 203, 204, 205, 206, 240, 240a, 240b, 260, 320, 503, 504, 505, 506, 540, 540a, 540b, 560: conductor, 130, 210, 212, 214, 216, 220, 222, 224 250, 270, 271, 272, 274, 275, 280, 282, 286, 330, 510, 512, 514, 516, 520, 522, 524, 550, 570, 571, 572, 575, 580, 582, 586 : Insulator, 201, 501: Substrate, 230, 230a, 230b, 230c, 230d, 5 0, 530a, 530c, 530d: oxide, 232, 232a, 232b: junction region, 231, 231a, 231b, 234, 531: region, 252, 552: metal oxide, 276, 276a, 276b, 576, 576a, 576b: barrier layer, 300, 302, 303: transistor, 2100: robot, 2101: illuminance sensor, 2102, 2917: microphone, 2103: upper camera, 2104, 2914: speaker unit, 2105, 2912, 2922, 2943, 2952, 2962, 5101: Display unit, 2106: Lower camera, 2107: Obstacle sensor, 2108: Moving mechanism, 2110, 2121: Computing device, 2120: Aircraft, 2122, 2913, 2981, 5102: Camera, 2123: Propeller, 2130 , 140: Portable electronic device, 2131: Portable microphone, 2910, 2950, 2960: Information terminal, 2911, 2921, 2941, 2942, 2951, 2961: Case, 2915, 2944, 2965: Operation switch, 2916: External connection unit 2920: Notebook personal computer 2923: Keyboard 2924: Pointing device 2940: Video camera 2945: Lens 2946: Connection unit 2963: Band 2964: Buckle 2966: Input / output terminal 2967: Icon 2980 : Automobile, 5100: Cleaning robot, 5103: Brush, 5104: Operation button, 5120: Garbage, 5301a, 5301b: Battery, 5300: Pacemaker body, 5302, 5303: Wire, 5304: Ann Tena, 5305: Subclavian vein, 5306: Superior vena cava, 5900: Sensor, 5931: Electrode, 5932: Wiring, 7000, 7400: Electronic component, 7002: Printed circuit board, 7004: Mounting board, 7031: Board, 7032, 7033 , 7034: layer, 7411: package substrate, 7421: lens cover, 7435: lens, 7441: land, 7451: image sensor chip, 7461: electrode pad, 7471: wire, 7490: IC chip

Claims

Having first to third transistors and a capacitor;
The first transistor includes a first semiconductor layer including an oxide semiconductor, a first insulator, a second insulator, a first gate, and a second gate,
The first gate has a region facing an upper surface and a side surface of the first semiconductor layer with the first insulator interposed therebetween,
The second gate has a region facing the lower surface of the first semiconductor layer with the second insulator interposed therebetween,
The thickness of the first semiconductor layer is larger than the channel width of the first transistor,
The second transistor has a second semiconductor layer including an oxide semiconductor, a third insulator, a fourth insulator, a third gate, and a fourth gate,
The third gate has a region facing an upper surface and a side surface of the second semiconductor layer with the third insulator interposed therebetween;
The fourth gate has a region facing the lower surface of the second semiconductor layer with the fourth insulator interposed therebetween,
The thickness of the second semiconductor layer is larger than the channel width of the second transistor,
The third transistor includes a third semiconductor layer including an oxide semiconductor, a fifth insulator, a sixth insulator, a fifth gate, and a sixth gate.
The fifth gate has a region facing an upper surface and a side surface of the third semiconductor layer with the fifth insulator interposed therebetween;
The sixth gate has a region facing the lower surface of the third semiconductor layer with the sixth insulator interposed therebetween,
A thickness of the third semiconductor layer is larger than a channel width of the third transistor;
The drain of the first transistor is given a first potential,
A source of the first transistor is electrically connected to a drain of the second transistor and a first terminal of the capacitor;
A source of the second transistor is electrically connected to a drain of the third transistor;
The source of the third transistor is given a second potential,
The first gate receives a first clock signal,
The third gate receives a second clock signal that is an inverted signal of the first clock signal,
The fifth gate receives the first signal,
A semiconductor device, wherein the source of the first transistor outputs a second signal.
Having first to third transistors and a capacitor;
The first transistor includes a first semiconductor layer including an oxide semiconductor, a first insulator, a second insulator, a first gate, and a second gate,
The first gate has a region facing an upper surface and a side surface of the first semiconductor layer with the first insulator interposed therebetween,
The second gate has a region facing the lower surface of the first semiconductor layer with the second insulator interposed therebetween,
The thickness of the first semiconductor layer is larger than the channel width of the first transistor,
The second transistor has a second semiconductor layer including an oxide semiconductor, a third insulator, a fourth insulator, a third gate, and a fourth gate,
The third gate has a region facing an upper surface and a side surface of the second semiconductor layer with the third insulator interposed therebetween;
The fourth gate has a region facing the lower surface of the second semiconductor layer with the fourth insulator interposed therebetween,
The thickness of the second semiconductor layer is larger than the channel width of the second transistor,
The third transistor includes a third semiconductor layer including an oxide semiconductor, a fifth insulator, a sixth insulator, a fifth gate, and a sixth gate.
The fifth gate has a region facing an upper surface and a side surface of the third semiconductor layer with the fifth insulator interposed therebetween;
The sixth gate has a region facing the lower surface of the third semiconductor layer with the sixth insulator interposed therebetween,
A thickness of the third semiconductor layer is larger than a channel width of the third transistor;
The drain of the first transistor is given a first potential,
A source of the first transistor is electrically connected to a drain of the second transistor and a first terminal of the capacitor;
A source of the second transistor is electrically connected to a drain of the third transistor;
The source of the third transistor is given a second potential,
The first gate receives a first clock signal,
The fifth gate receives a second clock signal that is an inverted signal of the first clock signal,
The third gate receives a first signal,
A semiconductor device, wherein the source of the first transistor outputs a second signal.
In claim 1 or claim 2,
A semiconductor device, wherein a third potential is applied to the second gate, the fourth gate, and the sixth gate.
In claim 1 or claim 2,
3. The semiconductor device according to claim 1, wherein a third potential is applied to the second gate, a fourth potential is applied to the fourth gate, and a fifth potential is applied to the sixth gate.
In claim 1 or claim 2,
The second gate is electrically connected to the first gate, the fourth gate is electrically connected to the third gate, and the sixth gate is electrically connected to the fifth gate. A featured semiconductor device.
In claim 1 or claim 2,
The first gate is provided with a seventh insulator on a side wall;
The third gate is provided with an eighth insulator on the side wall;
The capacitive element has an electrode electrically connected to the second terminal,
The first gate and the electrode are provided with the seventh insulator interposed therebetween,
The semiconductor device, wherein the third gate and the electrode are provided with the eighth insulator interposed therebetween.
Having first to third transistors and a capacitor;
The first transistor has a first semiconductor layer including an oxide semiconductor, a first gate, and a second gate,
The second transistor has a second semiconductor layer including an oxide semiconductor, a third gate, and a fourth gate,
The third transistor has a third semiconductor layer including an oxide semiconductor, a fifth gate, and a sixth gate,
The drain of the first transistor is given a first potential,
A source of the first transistor is electrically connected to a drain of the second transistor and a first terminal of the capacitor;
A source of the second transistor is electrically connected to a drain of the third transistor;
The source of the third transistor is given a second potential,
A first clock signal is input to the first gate and the second gate,
The third gate and the fourth gate receive a second clock signal that is an inverted signal of the first clock signal,
A first signal is input to the fifth gate and the sixth gate,
A semiconductor device, wherein the source of the first transistor outputs a second signal.
Having first to third transistors and a capacitor;
The first transistor has a first semiconductor layer including an oxide semiconductor, a first gate, and a second gate,
The second transistor has a second semiconductor layer including an oxide semiconductor, a third gate, and a fourth gate,
The third transistor has a third semiconductor layer including an oxide semiconductor, a fifth gate, and a sixth gate,
The drain of the first transistor is given a first potential,
A source of the first transistor is electrically connected to a drain of the second transistor and a first terminal of the capacitor;
A source of the second transistor is electrically connected to a drain of the third transistor;
The source of the third transistor is given a second potential,
A first clock signal is input to the first gate and the second gate,
The fifth gate and the sixth gate receive a second clock signal that is an inverted signal of the first clock signal,
A first signal is input to the third gate and the fourth gate,
A semiconductor device, wherein the source of the first transistor outputs a second signal.
In claim 7 or claim 8,
The first gate is provided with a first insulator on a sidewall,
The third gate is provided with a second insulator on a side wall;
The capacitive element has an electrode electrically connected to the second terminal,
The first gate and the electrode are provided with the first insulator interposed therebetween,
The semiconductor device, wherein the third gate and the electrode are provided with the second insulator interposed therebetween.
In any one of Claim 1, Claim 2, Claim 7, and Claim 8,
When the first clock signal is at a high potential, the capacitor element is charged,
When the first clock signal is at a low potential, the second signal is an inverted signal of the first signal.