WO2018192253A1 - 视频信号的传输方法及装置 - Google Patents

视频信号的传输方法及装置 Download PDF

Info

Publication number
WO2018192253A1
WO2018192253A1 PCT/CN2017/118005 CN2017118005W WO2018192253A1 WO 2018192253 A1 WO2018192253 A1 WO 2018192253A1 CN 2017118005 W CN2017118005 W CN 2017118005W WO 2018192253 A1 WO2018192253 A1 WO 2018192253A1
Authority
WO
WIPO (PCT)
Prior art keywords
video signal
preset
group
display
format
Prior art date
Application number
PCT/CN2017/118005
Other languages
English (en)
French (fr)
Inventor
万乔
余明火
杨键
吴肇滨
Original Assignee
深圳创维－Rgb电子有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 深圳创维－Rgb电子有限公司 filed Critical 深圳创维－Rgb电子有限公司
Priority to US16/331,533 priority Critical patent/US10511803B2/en
Priority to EP17906555.2A priority patent/EP3471405A4/en
Publication of WO2018192253A1 publication Critical patent/WO2018192253A1/zh

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/12—Systems in which the television signal is transmitted via one channel or a plurality of parallel channels, the bandwidth of each channel being less than the bandwidth of the television signal
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/01—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
    • H04N7/0125—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level one of the standards being a high definition standard
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2092—Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G09G3/2096—Details of the interface to the display terminal specific for a flat panel
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/003—Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G09G5/006—Details of the interface to the display terminal
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
    • H04N21/44—Processing of video elementary streams, e.g. splicing a video clip retrieved from local storage with an incoming video stream or rendering scenes according to encoded video stream scene graphs
    • H04N21/4402—Processing of video elementary streams, e.g. splicing a video clip retrieved from local storage with an incoming video stream or rendering scenes according to encoded video stream scene graphs involving reformatting operations of video signals for household redistribution, storage or real-time display
    • H04N21/440245—Processing of video elementary streams, e.g. splicing a video clip retrieved from local storage with an incoming video stream or rendering scenes according to encoded video stream scene graphs involving reformatting operations of video signals for household redistribution, storage or real-time display the reformatting operation being performed only on part of the stream, e.g. a region of the image or a time segment
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/14—Picture signal circuitry for video frequency region
    • H04N5/144—Movement detection
    • H04N5/145—Movement estimation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/76—Television signal recording
    • H04N5/765—Interface circuits between an apparatus for recording and another apparatus
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/01—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/01—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
    • H04N7/0102—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level involving the resampling of the incoming video signal
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/015—High-definition television systems
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/10—Adaptations for transmission by electrical cable
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2340/00—Aspects of display data processing
    • G09G2340/04—Changes in size, position or resolution of an image
    • G09G2340/0407—Resolution change, inclusive of the use of different resolutions for different screen areas
    • G09G2340/0435—Change or adaptation of the frame rate of the video stream
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2370/00—Aspects of data communication
    • G09G2370/12—Use of DVI or HDMI protocol in interfaces along the display data pipeline

Definitions

  • the present invention relates to the field of video signal transmission, and in particular, to a method and an apparatus for transmitting a video signal.
  • the main object of the present invention is to solve the technical problem that the high-bandwidth video signal data cannot be transmitted through the low-bandwidth signal line in the prior art.
  • a video signal transmission method provided by the present invention includes:
  • the acquiring a target video signal, decoding the target video signal, and dividing the decoded target video signal into a preset number of video signal groups according to a preset policy includes:
  • the decoded target video signal is divided into a video signal group of a format of YCbCr422 according to a preset processing strategy according to a preset processing strategy.
  • the transmitting the video signal group to a signal processor, and controlling the signal processor to process the video signal group comprises:
  • the preset transmission format conversion chip is enabled to convert the current transmission format of the video signal group into a preset transmission format.
  • the enabling the preset transmission format conversion chip after converting the current transmission format of the video signal group into the preset transmission format, comprises:
  • the determining the type of the display and determining whether the motion compensation process needs to be performed on the video signal group according to the display type comprises:
  • the preset MEMC motion compensation chip is enabled to perform motion compensation processing on the video signal group.
  • the present invention further provides a video signal transmission apparatus, including:
  • a branching module configured to acquire a target video signal, decode the target video signal, and divide the decoded target video signal into a preset number of video signal groups according to a preset strategy
  • a processing module configured to transmit the video signal group to a signal processor, and control the signal processor to process the video signal group
  • a display module configured to transmit the processed video signal group to the display terminal, to display each group of video signals in the processed video signal group in a corresponding area of the display terminal.
  • the branching module comprises:
  • An acquiring unit configured to acquire a target video signal, and decode the target video signal
  • the splitting unit is configured to divide the decoded target video signal into a video signal group of the preset number of channels in the format of YCbCr422 according to a preset processing strategy.
  • the processing module comprises:
  • a transmission unit configured to transmit the video signal group to a signal processor
  • a conversion unit configured to enable the preset transmission format conversion chip, and convert the current transmission format of the video signal group into a preset transmission format.
  • the processing module further includes:
  • the determining unit is configured to determine a type of the display, and determine, according to the type of the display, whether the motion compensation process needs to be performed on the video signal group.
  • the processing module further includes:
  • a compensation processing unit configured to: when a motion compensation process is performed on the video signal group, enable a preset MEMC motion compensation chip to perform motion compensation processing on the video signal group.
  • the target video signal data is divided into a preset number of video signal groups, so that each group of video signals can be transmitted through the existing video signal transmission mode.
  • the high-bandwidth video signal is transmitted through the low-bandwidth signal transmission line, which ensures the integrity of the video signal during transmission, so that the display picture is clear and smooth, and the detailed display is perfect, which can bring an excellent viewing experience to the viewer.
  • FIG. 1 is a schematic flow chart of an embodiment of a method for transmitting a video signal according to the present invention
  • FIG. 2 is a schematic diagram of an embodiment of a video signal splitting according to the present invention.
  • FIG. 3 is a schematic structural diagram of an embodiment of a signal processor
  • step S10 in FIG. 1 is a schematic diagram of a refinement process of step S10 in FIG. 1;
  • FIG. 5 is a schematic diagram of a refinement process of the first embodiment of step S20 of FIG. 1;
  • FIG. 6 is a schematic flow chart of the second embodiment of step S20 of FIG. 1;
  • FIG. 7 is a schematic diagram showing the refinement of the third embodiment of step S20 of Figure 1;
  • FIG. 8 is a schematic diagram of functional modules of an embodiment of a video signal transmission apparatus according to the present invention.
  • FIG. 9 is a schematic diagram of a refinement function module of the shunt module 10 of FIG. 8;
  • FIG. 10 is a schematic diagram of a refinement function module of the first embodiment of the processing module 20 of FIG. 8;
  • FIG. 11 is a schematic diagram of a refinement function module of the second embodiment of the processing module 20 of FIG. 8;
  • FIG. 12 is a schematic diagram of a refinement function module of the third embodiment of the processing module 20 of FIG.
  • the invention provides a video signal transmission method.
  • FIG. 1 is a schematic flowchart diagram of an embodiment of a method for transmitting a video signal according to the present invention.
  • the video signal transmission method includes:
  • Step S10 acquiring a target video signal, decoding the target video signal, and dividing the decoded target video signal into a preset number of video signal groups according to a preset strategy;
  • the target video signal refers to an ultra high definition film source corresponding to an ultra high definition television UHDTV, for example, a standard 8K. HEVC video compression format source.
  • Ultra HD TV refers to the "Ultra HDTV UHDTV" standard issued by the International Telecommunication Union (ITU) in May 2012. The TV with a physical resolution of 3840 ⁇ 2160 (4K ⁇ 2K) and above is called Ultra HD. TV.
  • the decoded target video signal is divided into a preset number of video signal groups, which can be divided into any number of channels, which is not limited herein, for example, divided into 4 channels, so that the code stream rate of each channel is low.
  • the maximum code stream transmission rate specified by the existing transport protocol (for example, the maximum code stream transmission rate of the HDMI 2.0 and V-BY-ONE interface specifications). Since the sensitivity of the human eye to the luminance signal Y is greater than the sensitivity to the chrominance signal (Cb, Cr), the video signal of the original RGB 444 format can be followed by Y:Cb in the decoder while preserving the video details to the utmost.
  • a flag bit may be added to the head and the tail of each image block, and the signal is transmitted to the display after the segmentation, and the transmission flag of the image block is monitored in real time.
  • the presence of the head and tail flags of the block image indicates that no data is lost during signal transmission. If there is data loss, it is determined whether the number of lost picture frames exceeds a certain value. The value can be judged according to actual needs. For example, when the display is 8K120fps, if the number of lost picture frames is less than 120 frames, it can be ignored. At this time, the loss of the frame picture has an effect on the playback of the video signal.
  • the number of lost picture frames is greater than 120, it is judged that the playback picture will be affected at this time, and the user can be notified in a certain form to check for possible problems in the transmission line or other transmission.
  • the screen after the lost frame picture is displayed on the screen ie, no video signal picture
  • the user is reminded to repair the line.
  • FIG. 2 is a schematic diagram of an embodiment of a video signal splitting according to the present invention.
  • the 8k60fps ultra-high definition video is decoded by the 8k decoding module and then divided into 4 channels of RGB444 format video signal and synchronous clock signal for transmission separately.
  • the first way is the 1st column to the 3840th column and the 1st row to the 2160th row in one frame image.
  • the rectangular area and the line and field synchronization signals are formed;
  • the second way is a rectangular area composed of the 3841th column to the 7680th column and the 1st row to the 2160th row in one frame image, and the line and field synchronization signals;
  • the third way is a rectangular area composed of the first column to the 3840th column and the 2161th row to the 4320th row in one frame image and the row and field synchronization signals;
  • the fourth channel is the 3841th column to the 7680th column and the 2161th in one frame image Go to the rectangular area consisting of line 4320 and the line and field sync signals.
  • Step S20 transmitting the video signal group to a signal processor, and controlling the signal processor to process the video signal group;
  • Step S30 the processed video signal group is transmitted to the display terminal, so that each group of video signals in the processed video signal group is displayed in a corresponding area of the display terminal.
  • the structure of the signal processor is as shown in FIG.
  • the signal processor includes power management circuit, HDMI to V-BY-ONE circuit unit, MEMC digital image motion compensation unit, HDMI, USB, and other digital input interfaces and V-BY-ONE digital output interface.
  • the signal processor is connected to the decoder through the HDMI interface, and the signal processor is connected to the display through the V-BY-ONE interface.
  • the original RGB444 format 8K chip source obtained by the decoder is first decoded, and then the decoded 8K film source is divided into 4 video signals and re-encoded into 4 YCbCr422 format video signals (also It can be split only without re-encoding and compressing, retaining the original format of the video signal, ie RGB444), and transmitting it to the signal processor through 4 HDMI lines, and the HDMI to V-BY-ONE circuit unit in the signal processor (for example, The MN869121 chip is used to process 4 channels of video signals, and 4 channels of video signals are converted into 4 channels of video signals conforming to the V-BY-ONE transmission standard.
  • the video signal of YCbCr422 format is restored to 4 channels of RGB444 format and transmitted directly to the four blocks of the liquid crystal display through the 4-way V-BY-ONE signal line, and the image of 4 blocks is played under the action of the synchronous clock. Splicing into a complete 8K image; if motion compensation processing is required for the video signal at this time, the 4-channel YCbCr422 format video signal is transmitted to the MEMC digital image motion through the 4-channel V-BY-ONE signal line.
  • the compensation unit converts the video signal of the four-way YCbCr422 format after the motion compensation processing into four RGB444 format video signals, and transmits the four-channel V-BY-ONE signal line to the four blocks of the liquid crystal display.
  • our synchronization module can count the counter clock with the synchronization signal, assuming that the synchronous clock is 1200HZ. Then, counting 10 is 1/120S, that is, the duration of the image refreshing one frame.
  • counting 10 is 1/120S, that is, the duration of the image refreshing one frame.
  • 8K is obtained.
  • the source of HEVC video compression format is decoded by the decoder and divided into 4 channels of 8k60fps RGB444 format video stream signal.
  • the video can be further encoded and compressed to obtain 4 channels of 8k60fps YCbCr422 format video code while preserving the video details.
  • the stream signal) and the image synchronization signal are then sent to the HDMI to V-BY-ONE conversion chip in the processor through the 4-channel HDMI cable, and converted into a 4-channel 8k60fps video signal conforming to the V-BY-ONE transmission format.
  • the display is an 8k60fps LCD panel
  • the 4-channel V-BY-ONE transmission line is transmitted to the corresponding four blocks on the 8k60fps LCD display; if the LCD display is an 8k120fps LCD panel, the MEMC (motion compensation) chip is enabled to conform the 4-channel 8k60fps to the V-BY-ONE transmission format.
  • the video signal is multiplied into 4 channels of 8k120fps video signals and transmitted to the corresponding four blocks on the 8k120fps LCD panel through the 4-way V-BY-ONE transmission line.
  • video synchronization signal integrity clear, smooth displayed.
  • the target video signal is decoded and divided to obtain a preset number of video signal groups, and the video signal group of the preset number of channels is separately transmitted to the signal processor.
  • the processed signal group is separately transmitted to the corresponding area on the display, so that the high-bandwidth video signal can be transmitted through the low-bandwidth signal transmission line, thereby ensuring the integrity of the video signal during transmission, thereby making the display picture clear and smooth.
  • the details are perfect and can give the audience an excellent viewing experience.
  • FIG. 4 is a schematic diagram of the refinement process of step S10 in FIG.
  • step S10 includes:
  • Step S101 Acquire a target video signal, and decode the target video signal.
  • the target video signal refers to an ultra high definition film source corresponding to an ultra high definition television UHDTV, for example, a standard 8K.
  • HEVC video compression format source The decoding of the target video signal is done by the decoder, and the selection of the decoder is not limited, depending on actual needs.
  • the standard 8k The HEVC video compression format source is decoded to obtain an 8k60fps RGB444 format video stream signal and an image synchronization signal.
  • Step S102 The decoded target video signal is divided into a preset video signal group of the format YCbCr422 according to a preset processing strategy.
  • performing preset processing on the decoded target video signal specifically includes converting the video signal format and dividing the video signal.
  • the video signal is converted from the RGB444 format to the YCbCr422 format by a format converter (not limited herein, specifically selecting the type of the format converter according to actual needs).
  • a format converter not limited herein, specifically selecting the type of the format converter according to actual needs.
  • it can also be converted to other formats, but since the human eye is more sensitive to the luminance signal Y than to the chrominance signal (Cb, Cr), it can be in the decoder while preserving the video details to the utmost.
  • the video format may not be converted, that is, the original video format RGB444 is retained, and only the video signal is segmented.
  • the video signal is not limited, for example, divided into four channels, so that the code stream rate of each channel is lower than the maximum code stream transmission rate specified by the existing transmission protocol (for example, HDMI2.0 and V-).
  • the BY-ONE interface specifies the maximum code stream transfer rate).
  • the decoded video is further format converted to make the transmission process smoother, and the segmentation is such that the code stream rate of the video signal conforms to the specifications of the existing transmission protocol.
  • FIG. 5 is a schematic diagram of the refinement process of the first embodiment of step S20 of FIG.
  • step S20 includes:
  • Step S201 transmitting the video signal group to a signal processor
  • Step S202 the preset transmission format conversion chip is enabled, and the current transmission format of the video signal group is converted into a preset transmission format.
  • the signal processor when the signal processor inputs a signal, the HDMI cable passes through the HDMI cable.
  • the video signal transmission format is HDMI.
  • the general 8K TV input interface is V-BY-ONE
  • the output interface of the signal processor is V-BY. -ONE
  • the transmission format of the signal needs to be converted to a V-BY-ONE compatible transmission format.
  • the selection of the transport format conversion chip is not limited, and is specifically selected according to actual needs. For example, MN869121 can be used, and the chip can convert the HDMI video signal into a video signal conforming to the V-BY-ONE transmission standard.
  • transmission through the V-BY-ONE transmission protocol can reduce the number of transmission lines and reduce overall consumables and costs.
  • the video signal is converted into a video signal conforming to the V-BY-ONE transmission standard by enabling the preset transmission format conversion chip, and the signal can pass the V-BY-ONE on the other hand.
  • the line is transferred to the display, which reduces overall consumables and saves costs.
  • FIG. 6 is a schematic diagram of a refinement process of the second embodiment of step S20 of FIG.
  • step S202 the method includes:
  • Step S203 determining the type of the display, and determining whether it is necessary to perform motion compensation processing on the video signal group according to the display type.
  • the type of the display mainly refers to the type of the 8k TV liquid crystal display panel, for example, some are 8k60fps liquid crystal panels, and some are 8k120fps liquid crystal panels.
  • the motion compensation processing for the video signal group is completed by the MEMC motion compensation processing chip, and the selection of the MEMC motion compensation processing chip is not limited, and is specifically selected according to actual needs, for example, NT72334TBG is selected for processing.
  • the original video signal is 8k60fps
  • the display screen is 8k60fps liquid crystal panel. At this time, there is no need to perform MEMC motion compensation processing on the video signal. If the display screen is 8k120fps liquid crystal panel, the video signal needs to be MEMC.
  • the motion compensation process yields a video signal of 8k120fps.
  • the video signal group is better displayed on the liquid crystal panel with superior performance, and the user's viewing experience is further improved.
  • FIG. 7 is a schematic diagram of a refinement process of the third embodiment of step S20 of FIG.
  • step S203 the method includes:
  • Step S204 When motion compensation processing is required on the video signal group, the preset MEMC motion compensation chip is enabled to perform motion compensation processing on the video signal group.
  • the preset MEMC motion compensation chip when it is required to perform motion compensation processing on the video signal group, the preset MEMC motion compensation chip is enabled to perform motion compensation processing on the video signal group.
  • the video signal group is 8k60fps video signal
  • the video signal needs to be output to the 8k120fps liquid crystal panel.
  • the 8k60fps video signal is converted into 8k120fps video signal by the selected NT72334TBG motion compensation processing chip, and then V-BY is used.
  • the -ONE interface outputs the corresponding four blocks on the 8k120fps TV LCD panel, and the images of the four blocks are stitched into a complete 8k image under the action of the synchronous clock.
  • the MEMC motion compensation chip is added to the LCD screen with higher refresh rate to increase the fps value of the video signal, so that the picture is clearer and smoother, better than the normal response effect, and the dynamic picture clarity is improved.
  • the invention further provides a transmission device for a video signal.
  • FIG. 8 is a schematic diagram of functional modules of an embodiment of a video signal transmission apparatus according to the present invention.
  • the transmission device of the video signal includes:
  • the branching module 10 is configured to acquire a target video signal, decode the target video signal, and divide the decoded target video signal into a preset number of video signal groups according to a preset policy;
  • the target video signal refers to an ultra high definition film source corresponding to an ultra high definition television UHDTV, for example, a standard 8K. HEVC video compression format source.
  • Ultra HD TV refers to the "Ultra HDTV UHDTV" standard issued by the International Telecommunication Union (ITU) in May 2012. The TV with a physical resolution of 3840 ⁇ 2160 (4K ⁇ 2K) and above is called Ultra HD. TV.
  • the decoded target video signal is divided into a preset number of video signal groups, which can be divided into any number of channels, which is not limited herein, for example, divided into 4 channels, so that the code stream rate of each channel is low.
  • the maximum code stream transmission rate specified by the existing transport protocol (for example, the maximum code stream transmission rate of the HDMI 2.0 and V-BY-ONE interface specifications). Since the sensitivity of the human eye to the luminance signal Y is greater than the sensitivity to the chrominance signal (Cb, Cr), the video signal of the original RGB 444 format can be followed by Y:Cb in the decoder while preserving the video details to the utmost.
  • a flag bit may be added to the head and the tail of each image block, and the signal is transmitted to the display after the segmentation, and the transmission flag of the image block is monitored in real time.
  • the presence of the head and tail flags of the block image indicates that no data is lost during signal transmission. If there is data loss, it is determined whether the number of lost picture frames exceeds a certain value. The value can be judged according to actual needs. For example, when the display is 8K120fps, if the number of lost picture frames is less than 120 frames, it can be ignored. At this time, the loss of the frame picture has an effect on the playback of the video signal.
  • the number of lost picture frames is greater than 120, it is judged that the playback picture will be affected at this time, and the user can be notified in a certain form to check for possible problems in the transmission line or other transmission.
  • the screen after the lost frame picture is displayed on the screen ie, no video signal picture
  • the user is reminded to repair the line.
  • FIG. 2 is a schematic diagram of an embodiment of a video signal splitting according to the present invention.
  • the 8k60fps ultra-high definition video is decoded by the 8k decoding module and then divided into 4 channels of RGB444 format video signal and synchronous clock signal for transmission separately.
  • the first way is the 1st column to the 3840th column and the 1st row to the 2160th row in one frame image.
  • the rectangular area and the line and field synchronization signals are formed;
  • the second way is a rectangular area composed of the 3841th column to the 7680th column and the 1st row to the 2160th row in one frame image, and the line and field synchronization signals;
  • the third way is a rectangular area composed of the first column to the 3840th column and the 2161th row to the 4320th row in one frame image and the row and field synchronization signals;
  • the fourth channel is the 3841th column to the 7680th column and the 2161th in one frame image Go to the rectangular area consisting of line 4320 and the line and field sync signals.
  • the processing module 20 is configured to transmit the video signal group to a signal processor, and control the signal processor to process the video signal group;
  • the display module 30 is configured to transmit the processed video signal group to the display terminal to display each group of video signals in the processed video signal group in a corresponding area of the display terminal.
  • the structure of the signal processor is as shown in FIG.
  • the signal processor includes power management circuit, HDMI to V-BY-ONE circuit unit, MEMC digital image motion compensation unit, HDMI, USB, and other digital input interfaces and V-BY-ONE digital output interface.
  • the signal processor is connected to the decoder through the HDMI interface, and the signal processor is connected to the display through the V-BY-ONE interface.
  • the original RGB444 format 8K chip source obtained by the decoder is first decoded, and then the decoded 8K film source is divided into 4 video signals and re-encoded into 4 YCbCr422 format video signals (also It can be split only without re-encoding and compressing, retaining the original format of the video signal, ie RGB444), and transmitting it to the signal processor through 4 HDMI lines, and the HDMI to V-BY-ONE circuit unit in the signal processor (for example, The MN869121 chip is used to process 4 channels of video signals, and 4 channels of video signals are converted into 4 channels of video signals conforming to the V-BY-ONE transmission standard.
  • the video signal of YCbCr422 format is restored to 4 channels of RGB444 format and transmitted directly to the four blocks of the liquid crystal display through the 4-way V-BY-ONE signal line, and the image of 4 blocks is played under the action of the synchronous clock. Splicing into a complete 8K image; if motion compensation processing is required for the video signal at this time, the 4-channel YCbCr422 format video signal is transmitted to the MEMC digital image motion through the 4-channel V-BY-ONE signal line.
  • the compensation unit converts the video signal of the four-way YCbCr422 format after the motion compensation processing into four RGB444 format video signals, and transmits the four-channel V-BY-ONE signal line to the four blocks of the liquid crystal display.
  • our synchronization module can count the counter clock with the synchronization signal, assuming that the synchronous clock is 1200HZ. Then, counting 10 is 1/120S, that is, the duration of the image refreshing one frame.
  • counting 10 is 1/120S, that is, the duration of the image refreshing one frame.
  • 8K is obtained.
  • the source of HEVC video compression format is decoded by the decoder and divided into 4 channels of 8k60fps RGB444 format video stream signal.
  • the video can be further encoded and compressed to obtain 4 channels of 8k60fps YCbCr422 format video code while preserving the video details.
  • the stream signal) and the image synchronization signal are then sent to the HDMI to V-BY-ONE conversion chip in the processor through the 4-channel HDMI cable, and converted into a 4-channel 8k60fps video signal conforming to the V-BY-ONE transmission format.
  • the display is an 8k60fps LCD panel
  • the 4-channel V-BY-ONE transmission line is transmitted to the corresponding four blocks on the 8k60fps LCD display; if the LCD display is an 8k120fps LCD panel, the MEMC (motion compensation) chip is enabled to conform the 4-channel 8k60fps to the V-BY-ONE transmission format.
  • the video signal is multiplied into 4 channels of 8k120fps video signals and transmitted to the corresponding four blocks on the 8k120fps LCD panel through the 4-way V-BY-ONE transmission line.
  • video synchronization signal integrity clear, smooth displayed.
  • the target video signal is decoded and divided to obtain a preset number of video signal groups, and the video signal group of the preset number of channels is separately transmitted to the signal processor.
  • the processed signal group is separately transmitted to the corresponding area on the display, so that the high-bandwidth video signal can be transmitted through the low-bandwidth signal transmission line, thereby ensuring the integrity of the video signal during transmission, thereby making the display picture clear and smooth.
  • the details are perfect and can give the audience an excellent viewing experience.
  • FIG. 9 is a schematic diagram of a refinement function module of the shunt module 10 of FIG.
  • the shunt module 10 includes:
  • the acquiring unit 101 is configured to acquire a target video signal, and decode the target video signal.
  • the target video signal refers to an ultra high definition film source corresponding to an ultra high definition television UHDTV, for example, a standard 8K.
  • HEVC video compression format source The decoding of the target video signal is done by the decoder, and the selection of the decoder is not limited, depending on actual needs.
  • the standard 8k The HEVC video compression format source is decoded to obtain an 8k60fps RGB444 format video stream signal and an image synchronization signal.
  • the branching unit 102 is configured to divide the decoded target video signal into a video signal group of a preset number of channels in the format of YCbCr422 according to a preset processing strategy.
  • performing preset processing on the decoded target video signal specifically includes converting the video signal format and dividing the video signal.
  • the video signal is converted from the RGB444 format to the YCbCr422 format by a format converter (not limited herein, specifically selecting the type of the format converter according to actual needs).
  • a format converter not limited herein, specifically selecting the type of the format converter according to actual needs.
  • it can also be converted to other formats, but since the human eye is more sensitive to the luminance signal Y than to the chrominance signal (Cb, Cr), it can be in the decoder while preserving the video details to the utmost.
  • the video format may not be converted, that is, the original video format RGB444 is retained, and only the video signal is segmented.
  • the video signal is not limited, for example, divided into four channels, so that the code stream rate of each channel is lower than the maximum code stream transmission rate specified by the existing transmission protocol (for example, HDMI2.0 and V-).
  • the BY-ONE interface specifies the maximum code stream transfer rate).
  • the decoded video is further format converted to make the transmission process smoother, and the segmentation is such that the code stream rate of the video signal conforms to the specifications of the existing transmission protocol.
  • FIG. 10 is a schematic diagram of a refinement function module of the first embodiment of the processing module 20 of FIG.
  • the processing module 20 includes:
  • a transmitting unit 201 configured to transmit the video signal group to a signal processor
  • the converting unit 202 is configured to enable the preset transmission format conversion chip to convert the current transmission format of the video signal group into a preset transmission format.
  • the signal processor when the signal processor inputs a signal, the HDMI cable passes through the HDMI cable.
  • the video signal transmission format is HDMI.
  • the general 8K TV input interface is V-BY-ONE
  • the output interface of the signal processor is V-BY. -ONE
  • the transmission format of the signal needs to be converted to a V-BY-ONE compatible transmission format.
  • the selection of the transport format conversion chip is not limited, and is specifically selected according to actual needs. For example, MN869121 can be used, and the chip can convert the HDMI video signal into a video signal conforming to the V-BY-ONE transmission standard.
  • transmission through the V-BY-ONE transmission protocol can reduce the number of transmission lines and reduce overall consumables and costs.
  • the video signal is converted into a video signal conforming to the V-BY-ONE transmission standard by enabling the preset transmission format conversion chip, and the signal can pass the V-BY-ONE on the other hand.
  • the line is transferred to the display, which reduces overall consumables and saves costs.
  • FIG. 11 is a schematic diagram of a refinement function module of the second embodiment of the processing module 20 of FIG.
  • processing module 20 further includes:
  • the determining unit 203 is configured to determine a type of the display, and determine, according to the display type, whether the motion compensation process needs to be performed on the video signal group.
  • the type of the display mainly refers to the type of the 8k TV liquid crystal display panel, for example, some are 8k60fps liquid crystal panels, and some are 8k120fps liquid crystal panels.
  • the motion compensation processing for the video signal group is completed by the MEMC motion compensation processing chip, and the selection of the MEMC motion compensation processing chip is not limited, and is specifically selected according to actual needs, for example, NT72334TBG is selected for processing.
  • the original video signal is 8k60fps
  • the display screen is 8k60fps liquid crystal panel. At this time, there is no need to perform MEMC motion compensation processing on the video signal. If the display screen is 8k120fps liquid crystal panel, the video signal needs to be MEMC.
  • the motion compensation process yields a video signal of 8k120fps.
  • the video signal group is better displayed on the liquid crystal panel with superior performance, and the user's viewing experience is further improved.
  • FIG. 12 is a schematic diagram of a refinement function module of the third embodiment of the processing module 20 of FIG.
  • processing module 20 further includes:
  • the compensation processing unit 204 is configured to enable the preset MEMC motion compensation chip to perform motion compensation processing on the video signal group when the motion compensation process needs to be performed on the video signal group.
  • the preset MEMC motion compensation chip when it is required to perform motion compensation processing on the video signal group, the preset MEMC motion compensation chip is enabled to perform motion compensation processing on the video signal group.
  • the video signal group is 8k60fps video signal
  • the video signal needs to be output to the 8k120fps liquid crystal panel.
  • the 8k60fps video signal is converted into 8k120fps video signal by the selected NT72334TBG motion compensation processing chip, and then V-BY is used.
  • the -ONE interface outputs the corresponding four blocks on the 8k120fps TV LCD panel, and the images of the four blocks are stitched into a complete 8k image under the action of the synchronous clock.
  • the MEMC motion compensation chip is added to the LCD screen with higher refresh rate to increase the fps value of the video signal, so that the picture is clearer and smoother, better than the normal response effect, and the dynamic picture clarity is improved.

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Two-Way Televisions, Distribution Of Moving Picture Or The Like (AREA)

Abstract

本发明公开了一种视频信号传输的方法，包括：获取目标视频信号，对所述目标视频信号进行解码，并根据预设策略将解码后的目标视频信号分为预设路数的视频信号组；将所述视频信号组传输至信号处理器，控制所述信号处理器对所述视频信号组进行处理；将处理后的视频信号组传输至显示终端，以将所述处理后的视频信号组中各组视频信号在显示终端对应区域显示。本发明还公开了一种视频信号传输的装置。通过本发明，在获取到目标视频信号数据后，将该目标视频信号数据分为预设路数的视频信号组，使得每一组视频信号都能够通过现有的视频信号传输方式进行传输，实现了通过低带宽信号传输线传输高带宽视频信号。

Description

视频信号的传输方法及装置
技术领域
本发明涉及视频信号传输领域，尤其涉及一种视频信号的传输方法及装置。
背景技术
随着智能电视的发展和人们对影音体验要求的不断提升，大尺寸和高清分辨率的电视产品随之出现。大尺寸电视由于超高清的分辨率，在观看影像的时候会带给观众身临其境的感观享受，但在另一方面也存在着一些问题，例如，在通过8K超高清电视观看8K影片时，由于显示输入输出信号传输线带宽的限制，无法传输8K片源的视频信号，从而导致视频画面细节的遗失、无法真实还原画面成了超高清电视的缺点。
发明内容
本发明的主要目的在于解决现有技术中，通过低带宽的信号线无法传输高带宽的视频信号数据的技术问题。
为实现上述目的，本发明提供的一种视频信号传输方法，包括：
获取目标视频信号，对所述目标视频信号进行解码，并根据预设策略将解码后的目标视频信号分为预设路数的视频信号组；
将所述视频信号组传输至信号处理器，控制所述信号处理器对所述视频信号组进行处理；
将处理后的视频信号组传输至显示终端，以将所述处理后的视频信号组中各组视频信号在显示终端对应区域显示。
优选地，所述获取目标视频信号，对所述目标视频信号进行解码，并根据预设策略将解码后的目标视频信号分为预设路数的视频信号组包括:
获取目标视频信号，对所述目标视频信号进行解码；
将解码后的目标视频信号，根据预设处理策略，分为预设路数的格式为YCbCr422的视频信号组。
优选地，所述将所述视频信号组传输至信号处理器，控制所述信号处理器对所述视频信号组进行处理包括：
将所述视频信号组传输至信号处理器；
启用预置传输格式转化芯片，将所述视频信号组的当前传输格式转化为预设传输格式。
优选地，所述启用预置传输格式转化芯片，将所述视频信号组的当前传输格式转化为预设传输格式之后包括：
确定显示器的类型，并根据显示器类型判断是否需要对所述视频信号组进行运动补偿处理。
优选地，所述确定显示器的类型，并根据显示器类型判断是否需要对所述视频信号组进行运动补偿处理之后包括：
当需要对所述视频信号组进行运动补偿处理时，则启用预置MEMC运动补偿芯片对所述视频信号组进行运动补偿处理。
此外，为实现上述目的，本发明还提供一种视频信号传输装置，包括：
分路模块，用于获取目标视频信号，对所述目标视频信号进行解码，并根据预设策略将解码后的目标视频信号分为预设路数的视频信号组；
处理模块，用于将所述视频信号组传输至信号处理器，控制所述信号处理器对所述视频信号组进行处理；
显示模块，用于将处理后的视频信号组传输至显示终端，以将所述处理后的视频信号组中各组视频信号在显示终端对应区域显示。
优选地，所述分路模块包括：
获取单元，用于获取目标视频信号，对所述目标视频信号进行解码；
分路单元，用于将解码后的目标视频信号，根据预设处理策略，分为预设路数的格式为YCbCr422的视频信号组。
优选地，所述处理模块包括：
传输单元，用于将所述视频信号组传输至信号处理器；
转化单元，用于启用预置传输格式转化芯片，将所述视频信号组的当前传输格式转化为预设传输格式。
优选地，所述处理模块还包括：
判断单元，用于确定显示器的类型，并根据显示器类型判断是否需要对所述视频信号组进行运动补偿处理。
优选地，所述处理模块还包括：
补偿处理单元，用于当需要对所述视频信号组进行运动补偿处理时，则启用预置MEMC运动补偿芯片对所述视频信号组进行运动补偿处理。
通过本发明，在获取到目标视频信号数据后，将该目标视频信号数据分为预设路数的视频信号组，使得每一组视频信号都能够通过现有的视频信号传输方式进行传输，实现了通过低带宽信号传输线传输高带宽视频信号，保证了视频信号在传输过程中的完整性，从而使得显示画面清晰流畅，细节显示完美，能带给观众极佳的观看体验。
附图说明
图1为本发明视频信号的传输方法一实施例的流程示意图；
图2为本发明视频信号分路一实施例的示意图；
图3为信号处理器一实施例的结构示意图；
图4为图1中步骤S10的细化流程示意图；
图5为图1中步骤S20第一实施例的细化流程示意图；
图6为图1中步骤S20第二实施例的细化流程示意图；
图7为图1中步骤S20第三实施例的细化流程示意图；
图8为本发明视频信号的传输装置一实施例的功能模块示意图；
图9为图8中分路模块10的细化功能模块示意图；
图10为图8中处理模块20第一实施例的细化功能模块示意图；
图11为图8中处理模块20第二实施例的细化功能模块示意图；
图12为图8中处理模块20第三实施例的细化功能模块示意图。
本发明目的的实现、功能特点及优点将结合实施例，参照附图做进一步说明。
具体实施方式
应当理解，此处所描述的具体实施例仅用以解释本发明，并不用于限定本发明。
本发明提供一种视频信号传输方法。
参照图1，图1为本发明视频信号的传输方法一实施例的流程示意图。
在本实施例中，视频信号传输方法包括：
步骤S10，获取目标视频信号，对所述目标视频信号进行解码，并根据预设策略将解码后的目标视频信号分为预设路数的视频信号组；
在本实施例中，目标视频信号指的是超高清电视UHDTV对应的超高清片源，例如，标准8K HEVC视频压缩格式片源。超高清电视指2012年5月国际电信联盟（ITU）发出的“超高清电视UHDTV”标准的建议，将屏幕的物理分辨率达到3840×2160（4K×2K）及以上的电视称之为超高清电视。根据预设策略，将解码后的目标视频信号分为预设路数的视频信号组，可以分为任意路数，在此不做限定，例如分为4路，使得每一路的码流速率低于现有的传输协议规定的最大码流传输速率（例如，HDMI2.0和V-BY-ONE接口规范最大的码流传输速率）。由于人眼对于亮度信号Y的敏感度大于对色度信号（Cb、Cr）的敏感度，因此可以在最大限度保留视频细节的前提下在解码器中将原始RGB444格式的视频信号按照Y：Cb：Cr=4:2:2的采样比重新采样转化为YCbCr422格式视频信号。即原始RGB444格式的8K视频信号，经过处理得到4路YCbCr422格式的视频信号（也可以不对视频格式进行转换，保留原始格式即RGB444）。
在本实施例中，在图像信号分割时，还可以在每个图像块的头部和尾部添加标志位，信号在分割后传输至显示器的过程中，实时监测图像块的传输标志位，若每块图像的头尾标志位存在则表明信号传输过程中无数据丢失。若存在数据丢失的情况，则判断丢失的图片帧数是否超过一定值，该值可以根据实际需要进行判断，例如，当显示器为8K120fps时，若丢失的图片帧数少于120帧，则可以忽略此时帧图片丢失对视频信号播放的影响，若丢失的图片帧数大于120，则判断此时会对播放画面产生影响，可以通过一定形式通知用户，检查传输线路或其他传输中可能存在的问题，例如，在屏幕上显示丢失帧图片后的画面（即无视频信号画面），用以提示用户，当前视频信号传输存在问题，提醒用户检修线路。
本实施例中，对于片源信号分路的选择不作限制，分路后每条线路的码流速率低于现有接口规范（例如，HDMI2.0、V-BY-ONE）规定的最大码流速率均可。一可选实施例中，如图2所示，图2为本发明视频信号分路一实施例的示意图。将8k60fps超高清视频经8k解码模块解码后分割成4路RGB444格式视频信号和同步时钟信号单独传输，第一路为一帧图像中的第1列到第3840列和第1行到第2160行组成的矩形区域以及行、场同步信号；第二路为一帧图像中的第3841列到第7680列和第1行到第2160行组成的矩形区域以及行、场同步信号；第三路为一帧图像中的第1列到第3840列和第2161行到第4320行组成的矩形区域以及行、场同步信号；第四路为一帧图像中的第3841列到第7680列和第2161行到第4320行组成的矩形区域以及行、场同步信号。
步骤S20，将所述视频信号组传输至信号处理器，控制所述信号处理器对所述视频信号组进行处理；
步骤S30，将处理后的视频信号组传输至显示终端，以将所述处理后的视频信号组中各组视频信号在显示终端对应区域显示。
在本实施例中，信号处理器的结构如图3所示。信号处理器包括有电源管理电路，HDMI转V-BY-ONE电路单元，MEMC数字图像运动补偿单元，HDMI、USB、等数字输入接口和V-BY-ONE数字输出接口。信号处理器通过HDMI接口同解码器连接，信号处理器通过V-BY-ONE接口同显示器连接。例如，首先通过解码器对获取到的原始RGB444格式8K片源进行解码处理，然后将解码后的8K片源，分为4路视频信号，并重新编码压缩为4路YCbCr422格式的视频信号（也可以只进行分路不进行重新编码压缩，保留视频信号的原始格式即RGB444），分别通过4路HDMI线传输至信号处理器，信号处理器中的HDMI转V-BY-ONE电路单元（例如，采用MN869121芯片）对4路视频信号进行处理，将4路视频信号转成4路符合V-BY-ONE传输标准的视频信号，若此时不需对视频信号做运动补偿处理，则将4路YCbCr422格式的视频信号还原成4路RGB444格式视频信号后直接通过4路V-BY-ONE信号线传输至液晶显示屏的四个区块，并在同步时钟的作用下将4个区块的图像拼接成一个完整的8K图像；若此时需要对视频信号进行运动补偿处理，则将4路YCbCr422格式的视频信号通过4路V-BY-ONE信号线传输至MEMC数字图像运动补偿单元，后将经过运动补偿处理后的4路YCbCr422格式的视频信号还原成4路RGB444格式视频信号，通过4路V-BY-ONE信号线传输至液晶显示屏的四个区块。在视频信号在显示器上显示之前，通过同步显示模块，由于同步信号时是在解码模块中由同一个同步时钟发出，因而我们的同步模块可以以同步信号为计数器时钟进行计数，假设同步时钟为1200HZ,那么计数10个则为1/120S,即图像刷新一帧的时长。系统工作时四个计数器同时工作，每计满10个刷新一帧图像则能保证四块图像的同步显示。从而将4个区块的图像拼接成一个完整8K图像并清晰，完整的显示出来。
在本发明一可选实施例中，获取到8K HEVC视频压缩格式片源，通过解码器解码并分割成4路8k60fps的RGB444格式视频码流信号（当然，也可以在保留视频细节的前提下将视频进一步编码压缩得到4路8k60fps的YCbCr422格式视频码流信号）和图像同步信号，再通过4路HDMI线将视频信号送给处理器中的HDMI转V-BY-ONE转换芯片，转换成4路8k60fps的符合V-BY-ONE传输格式的视频信号，如果显示器是8k60fps液晶面板，则直接将4路8k60fps的符合V-BY-ONE传输格式的视频信号（若视频信号之前经过重新编码压缩为YCbCr422格式则在此将视频信号还原成RGB444格式）通过4路V-BY-ONE传输线传输至8k60fps液晶显示器上对应的四个区块；如果液晶显示器是8k120fps的液晶面板，则启用MEMC（运动补偿）芯片将4路8k60fps符合V-BY-ONE传输格式的视频信号倍频成4路8k120fps的视频信号并通过4路V-BY-ONE传输线传输至8k120fps液晶面板上对应的四个区块，最后视频图像在同步信号下完整、清晰、流畅的显示出来。
在本实施例中，在获取到目标视频信号后，对目标视频信号进行解码、分割，得到预设路数的视频信号组，将预设路数的视频信号组同步单独传输至信号处理器，将处理后的信号组，同步单独传输至显示器上的对应区域，使得通过低带宽信号传输线便能传输高带宽的视频信号，保证了视频信号在传输过程中的完整性，从而使得显示画面清晰流畅，细节显示完美，能带给观众极佳的观看体验。
参照图4，图4为图1中步骤S10的细化流程示意图。
在本实施例中，步骤S10包括：
步骤S101，获取目标视频信号，对所述目标视频信号进行解码；
在本实施例中，目标视频信号指的是超高清电视UHDTV对应的超高清片源，例如，标准8K HEVC视频压缩格式片源。将目标视频信号解码的工作通过解码器来完成，对于解码器的选择不做限制，具体根据实际需要而定。例如，将标准8k HEVC视频压缩格式片源解码后得到8k60fps的RGB444格式视频码流信号和图像同步信号。
步骤S102，将解码后的目标视频信号，根据预设处理策略，分为预设路数的格式为YCbCr422的视频信号组。
在本实施例中，对解码后的目标视频信号进行预设处理，具体包括对视频信号格式进行转换以及对视频信号进行分割。
在本实施例中，通过格式转换器（在此不做限定，具体根据实际需要选择格式转换器的类型），将视频信号由RGB444格式转换为YCbCr422格式。当然，也可以转换为其他格式，但是，由于人眼对于亮度信号Y的敏感度大于对色度信号（Cb、Cr）的敏感度，因此可以在最大限度保留视频细节的前提下在解码器中将原始RGB444格式的视频信号按照Y：Cb：Cr=4:2:2的采样比重新采样转化为YCbCr422格式视频信号。
在本发明另一可选实施例中，可以不对视频格式进行转换，即保留原始视频格式RGB444，只对视频信号进行分割。
在本实施例中，对视频信号进行分割不作限制，例如分为4路，使得每一路的码流速率低于现有的传输协议规定的最大码流传输速率（例如，HDMI2.0和V-BY-ONE接口规范最大的码流传输速率）即可。
在本实施例中，在对原始视频信号进行解码后，进一步对解码后的视频进行进行格式转换使得传输过程更为流畅，分割使得视频信号的码流速率符合现有的传输协议的规范，实现了通过低带宽信号线传输高带宽视频信号的目的。
参照图5，图5为图1中步骤S20第一实施例的细化流程示意图。
本实施例中，步骤S20包括：
步骤S201，将所述视频信号组传输至信号处理器；
步骤S202，启用预置传输格式转化芯片，将所述视频信号组的当前传输格式转化为预设传输格式。
在本实施例中，信号处理器输入信号时，通过HDMI线，此时视频信号传输格式为HDMI，由于一般8K电视输入接口为V-BY-ONE，故信号处理器的输出接口为V-BY-ONE，需要将信号的传输格式转换为符合V-BY-ONE的传输格式。本实施例中，传输格式转换芯片的选择不做限制，具体根据实际需要选择，例如，可以采用MN869121，该芯片能将HDMI视频信号转成符合V-BY-ONE传输标准的视频信号。且，通过V-BY-ONE传输协议进行传输，能减少传输线的数量，减少整体的耗材与成本。
在本实施例中，视频信号输入信号管理器后，通过启用预置传输格式转化芯片将视频信号转成符合V-BY-ONE传输标准的视频信号，一方面使得信号能通过V-BY-ONE线传输至显示屏，另一方面减少了整体耗材，节省了成本。
参照图6，图6为图1中步骤S20第二实施例的细化流程示意图。
在本实施例中，步骤S202之后包括：
步骤S203，确定显示器的类型，并根据显示器类型判断是否需要对所述视频信号组进行运动补偿处理。
在本实施例中，显示器的类型主要指8k电视液晶显示板的类型，例如，有些为8k60fps液晶面板，有些为8k120fps液晶面板。对视频信号组进行运动补偿处理通过MEMC运动补偿处理芯片完成，对于MEMC运动补偿处理芯片的选择不做限制，具体根据实际需要进行选择，例如，选用NT72334TBG进行处理。例如，原始的视频信号为8k60fps，此时的显示屏为8k60fps液晶面板，此时便不需要对视频信号进行MEMC运动补偿处理，若此时显示屏为8k120fps液晶面板，则需要对视频信号进行MEMC运动补偿处理得到8k120fps的视频信号。
在本实施例中，通过对视频信号组进行运动补偿处理，使得视频信号组在性能更优越的液晶板上显示效果更好，进一步提升用户的观看体验。
参照图7，图7为图1中步骤S20第三实施例的细化流程示意图。
本实施例中，步骤S203之后包括：
步骤S204，当需要对所述视频信号组进行运动补偿处理时，则启用预置MEMC运动补偿芯片对所述视频信号组进行运动补偿处理。
在本实施例中，当需要对视频信号组进行运动补偿处理时，则启用预置MEMC运动补偿芯片对所述视频信号组进行运动补偿处理。例如，当视频信号组为8k60fps视频信号时，需要将视频信号输出给8k120fps的液晶面板，此时，通过选用的NT72334TBG运动补偿处理芯片，将8k60fps视频信号转化为8k120fps视频信号，后以V-BY-ONE接口输出给8k120fps电视液晶面板上对应的四个区块，在同步时钟的作用下将四个区块的图像拼接成一个完整8k图像。
本实施例中，对于刷新率更高的液晶屏加入MEMC运动补偿芯片提高视频信号的fps值，使得画面更加清晰流畅，优于常态响应效果、提高动态画面清晰度。
本发明进一步提供一种视频信号的传输装置。
参照图8，图8为本发明视频信号的传输装置一实施例的功能模块示意图。
在本实施例中，视频信号的传输装置包括：
分路模块10，用于获取目标视频信号，对所述目标视频信号进行解码，并根据预设策略将解码后的目标视频信号分为预设路数的视频信号组；
在本实施例中，目标视频信号指的是超高清电视UHDTV对应的超高清片源，例如，标准8K HEVC视频压缩格式片源。超高清电视指2012年5月国际电信联盟（ITU）发出的“超高清电视UHDTV”标准的建议，将屏幕的物理分辨率达到3840×2160（4K×2K）及以上的电视称之为超高清电视。根据预设策略，将解码后的目标视频信号分为预设路数的视频信号组，可以分为任意路数，在此不做限定，例如分为4路，使得每一路的码流速率低于现有的传输协议规定的最大码流传输速率（例如，HDMI2.0和V-BY-ONE接口规范最大的码流传输速率）。由于人眼对于亮度信号Y的敏感度大于对色度信号（Cb、Cr）的敏感度，因此可以在最大限度保留视频细节的前提下在解码器中将原始RGB444格式的视频信号按照Y：Cb：Cr=4:2:2的采样比重新采样转化为YCbCr422格式视频信号。即原始RGB444格式的8K视频信号，经过处理得到4路YCbCr422格式的视频信号（也可以不对视频格式进行转换，保留原始格式即RGB444）。
在本实施例中，在图像信号分割时，还可以在每个图像块的头部和尾部添加标志位，信号在分割后传输至显示器的过程中，实时监测图像块的传输标志位，若每块图像的头尾标志位存在则表明信号传输过程中无数据丢失。若存在数据丢失的情况，则判断丢失的图片帧数是否超过一定值，该值可以根据实际需要进行判断，例如，当显示器为8K120fps时，若丢失的图片帧数少于120帧，则可以忽略此时帧图片丢失对视频信号播放的影响，若丢失的图片帧数大于120，则判断此时会对播放画面产生影响，可以通过一定形式通知用户，检查传输线路或其他传输中可能存在的问题，例如，在屏幕上显示丢失帧图片后的画面（即无视频信号画面），用以提示用户，当前视频信号传输存在问题，提醒用户检修线路。
本实施例中，对于片源信号分路的选择不作限制，分路后每条线路的码流速率低于现有接口规范（例如，HDMI2.0、V-BY-ONE）规定的最大码流速率均可。一可选实施例中，如图2所示，图2为本发明视频信号分路一实施例的示意图。将8k60fps超高清视频经8k解码模块解码后分割成4路RGB444格式视频信号和同步时钟信号单独传输，第一路为一帧图像中的第1列到第3840列和第1行到第2160行组成的矩形区域以及行、场同步信号；第二路为一帧图像中的第3841列到第7680列和第1行到第2160行组成的矩形区域以及行、场同步信号；第三路为一帧图像中的第1列到第3840列和第2161行到第4320行组成的矩形区域以及行、场同步信号；第四路为一帧图像中的第3841列到第7680列和第2161行到第4320行组成的矩形区域以及行、场同步信号。
处理模块20，用于将所述视频信号组传输至信号处理器，控制所述信号处理器对所述视频信号组进行处理；
显示模块30，用于将处理后的视频信号组传输至显示终端，以将所述处理后的视频信号组中各组视频信号在显示终端对应区域显示。
在本实施例中，信号处理器的结构如图3所示。信号处理器包括有电源管理电路，HDMI转V-BY-ONE电路单元，MEMC数字图像运动补偿单元，HDMI、USB、等数字输入接口和V-BY-ONE数字输出接口。信号处理器通过HDMI接口同解码器连接，信号处理器通过V-BY-ONE接口同显示器连接。例如，首先通过解码器对获取到的原始RGB444格式8K片源进行解码处理，然后将解码后的8K片源，分为4路视频信号，并重新编码压缩为4路YCbCr422格式的视频信号（也可以只进行分路不进行重新编码压缩，保留视频信号的原始格式即RGB444），分别通过4路HDMI线传输至信号处理器，信号处理器中的HDMI转V-BY-ONE电路单元（例如，采用MN869121芯片）对4路视频信号进行处理，将4路视频信号转成4路符合V-BY-ONE传输标准的视频信号，若此时不需对视频信号做运动补偿处理，则将4路YCbCr422格式的视频信号还原成4路RGB444格式视频信号后直接通过4路V-BY-ONE信号线传输至液晶显示屏的四个区块，并在同步时钟的作用下将4个区块的图像拼接成一个完整的8K图像；若此时需要对视频信号进行运动补偿处理，则将4路YCbCr422格式的视频信号通过4路V-BY-ONE信号线传输至MEMC数字图像运动补偿单元，后将经过运动补偿处理后的4路YCbCr422格式的视频信号还原成4路RGB444格式视频信号，通过4路V-BY-ONE信号线传输至液晶显示屏的四个区块。在视频信号在显示器上显示之前，通过同步显示模块，由于同步信号时是在解码模块中由同一个同步时钟发出，因而我们的同步模块可以以同步信号为计数器时钟进行计数，假设同步时钟为1200HZ,那么计数10个则为1/120S,即图像刷新一帧的时长。系统工作时四个计数器同时工作，每计满10个刷新一帧图像则能保证四块图像的同步显示。从而将4个区块的图像拼接成一个完整8K图像并清晰，完整的显示出来。
在本发明一可选实施例中，获取到8K HEVC视频压缩格式片源，通过解码器解码并分割成4路8k60fps的RGB444格式视频码流信号（当然，也可以在保留视频细节的前提下将视频进一步编码压缩得到4路8k60fps的YCbCr422格式视频码流信号）和图像同步信号，再通过4路HDMI线将视频信号送给处理器中的HDMI转V-BY-ONE转换芯片，转换成4路8k60fps的符合V-BY-ONE传输格式的视频信号，如果显示器是8k60fps液晶面板，则直接将4路8k60fps的符合V-BY-ONE传输格式的视频信号（若视频信号之前经过重新编码压缩为YCbCr422格式则在此将视频信号还原成RGB444格式）通过4路V-BY-ONE传输线传输至8k60fps液晶显示器上对应的四个区块；如果液晶显示器是8k120fps的液晶面板，则启用MEMC（运动补偿）芯片将4路8k60fps符合V-BY-ONE传输格式的视频信号倍频成4路8k120fps的视频信号并通过4路V-BY-ONE传输线传输至8k120fps液晶面板上对应的四个区块，最后视频图像在同步信号下完整、清晰、流畅的显示出来。
在本实施例中，在获取到目标视频信号后，对目标视频信号进行解码、分割，得到预设路数的视频信号组，将预设路数的视频信号组同步单独传输至信号处理器，将处理后的信号组，同步单独传输至显示器上的对应区域，使得通过低带宽信号传输线便能传输高带宽的视频信号，保证了视频信号在传输过程中的完整性，从而使得显示画面清晰流畅，细节显示完美，能带给观众极佳的观看体验。
参照图9，图9为图8中分路模块10的细化功能模块示意图。
本实施例中，分路模块10包括：
获取单元101，用于获取目标视频信号，对所述目标视频信号进行解码；
在本实施例中，目标视频信号指的是超高清电视UHDTV对应的超高清片源，例如，标准8K HEVC视频压缩格式片源。将目标视频信号解码的工作通过解码器来完成，对于解码器的选择不做限制，具体根据实际需要而定。例如，将标准8k HEVC视频压缩格式片源解码后得到8k60fps的RGB444格式视频码流信号和图像同步信号。
分路单元102，用于将解码后的目标视频信号，根据预设处理策略，分为预设路数的格式为YCbCr422的视频信号组。
在本实施例中，对解码后的目标视频信号进行预设处理，具体包括对视频信号格式进行转换以及对视频信号进行分割。
在本实施例中，通过格式转换器（在此不做限定，具体根据实际需要选择格式转换器的类型），将视频信号由RGB444格式转换为YCbCr422格式。当然，也可以转换为其他格式，但是，由于人眼对于亮度信号Y的敏感度大于对色度信号（Cb、Cr）的敏感度，因此可以在最大限度保留视频细节的前提下在解码器中将原始RGB444格式的视频信号按照Y：Cb：Cr=4:2:2的采样比重新采样转化为YCbCr422格式视频信号。
在本发明另一可选实施例中，可以不对视频格式进行转换，即保留原始视频格式RGB444，只对视频信号进行分割。
在本实施例中，对视频信号进行分割不作限制，例如分为4路，使得每一路的码流速率低于现有的传输协议规定的最大码流传输速率（例如，HDMI2.0和V-BY-ONE接口规范最大的码流传输速率）即可。
在本实施例中，在对原始视频信号进行解码后，进一步对解码后的视频进行进行格式转换使得传输过程更为流畅，分割使得视频信号的码流速率符合现有的传输协议的规范，实现了通过低带宽信号线传输高带宽视频信号的目的。
参照图10，图10为图8中处理模块20第一实施例的细化功能模块示意图。
本实施例中，处理模块20包括：
传输单元201，用于将所述视频信号组传输至信号处理器；
转化单元202，用于启用预置传输格式转化芯片，将所述视频信号组的当前传输格式转化为预设传输格式。
在本实施例中，信号处理器输入信号时，通过HDMI线，此时视频信号传输格式为HDMI，由于一般8K电视输入接口为V-BY-ONE，故信号处理器的输出接口为V-BY-ONE，需要将信号的传输格式转换为符合V-BY-ONE的传输格式。本实施例中，传输格式转换芯片的选择不做限制，具体根据实际需要选择，例如，可以采用MN869121，该芯片能将HDMI视频信号转成符合V-BY-ONE传输标准的视频信号。且，通过V-BY-ONE传输协议进行传输，能减少传输线的数量，减少整体的耗材与成本。
在本实施例中，视频信号输入信号管理器后，通过启用预置传输格式转化芯片将视频信号转成符合V-BY-ONE传输标准的视频信号，一方面使得信号能通过V-BY-ONE线传输至显示屏，另一方面减少了整体耗材，节省了成本。
参照图11，图11为图8中处理模块20第二实施例的细化功能模块示意图。
本实施例中，处理模块20还包括：
判断单元203，用于确定显示器的类型，并根据显示器类型判断是否需要对所述视频信号组进行运动补偿处理。
在本实施例中，显示器的类型主要指8k电视液晶显示板的类型，例如，有些为8k60fps液晶面板，有些为8k120fps液晶面板。对视频信号组进行运动补偿处理通过MEMC运动补偿处理芯片完成，对于MEMC运动补偿处理芯片的选择不做限制，具体根据实际需要进行选择，例如，选用NT72334TBG进行处理。例如，原始的视频信号为8k60fps，此时的显示屏为8k60fps液晶面板，此时便不需要对视频信号进行MEMC运动补偿处理，若此时显示屏为8k120fps液晶面板，则需要对视频信号进行MEMC运动补偿处理得到8k120fps的视频信号。
在本实施例中，通过对视频信号组进行运动补偿处理，使得视频信号组在性能更优越的液晶板上显示效果更好，进一步提升用户的观看体验。
参照图12，图12为图8中处理模块20第三实施例的细化功能模块示意图。
本实施例中，处理模块20还包括：
补偿处理单元204，用于当需要对所述视频信号组进行运动补偿处理时，则启用预置MEMC运动补偿芯片对所述视频信号组进行运动补偿处理。
在本实施例中，当需要对视频信号组进行运动补偿处理时，则启用预置MEMC运动补偿芯片对所述视频信号组进行运动补偿处理。例如，当视频信号组为8k60fps视频信号时，需要将视频信号输出给8k120fps的液晶面板，此时，通过选用的NT72334TBG运动补偿处理芯片，将8k60fps视频信号转化为8k120fps视频信号，后以V-BY-ONE接口输出给8k120fps电视液晶面板上对应的四个区块，在同步时钟的作用下将四个区块的图像拼接成一个完整8k图像。
本实施例中，对于刷新率更高的液晶屏加入MEMC运动补偿芯片提高视频信号的fps值，使得画面更加清晰流畅，优于常态响应效果、提高动态画面清晰度。
以上仅为本发明的优选实施例，并非因此限制本发明的专利范围，凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其他相关的技术领域，均同理包括在本发明的专利保护范围内。

Claims (10)

  1. 一种视频信号的传输方法，其特征在于，所述视频信号的传输方法包括：
    获取目标视频信号，对所述目标视频信号进行解码，并根据预设策略将解码后的目标视频信号分为预设路数的视频信号组；
    将所述视频信号组传输至信号处理器，控制所述信号处理器对所述视频信号组进行处理；
    将处理后的视频信号组传输至显示终端，以将所述处理后的视频信号组中各组视频信号在显示终端对应区域显示。
  2. 如权利要求1所述的视频信号的传输方法，其特征在于，所述获取目标视频信号，对所述目标视频信号进行解码，并根据预设策略将解码后的目标视频信号分为预设路数的视频信号组包括:
    获取目标视频信号，对所述目标视频信号进行解码；
    将解码后的目标视频信号，根据预设处理策略，分为预设路数的格式为YCbCr422的视频信号组。
  3. 如权利要求1所述的视频信号的传输方法，其特征在于，所述将所述视频信号组传输至信号处理器，控制所述信号处理器对所述视频信号组进行处理包括：
    将所述视频信号组传输至信号处理器；
    启用预置传输格式转化芯片，将所述视频信号组的当前传输格式转化为预设传输格式。
  4. 如权利要求3所述的视频信号的传输方法，其特征在于，所述启用预置传输格式转化芯片，将所述视频信号组的当前传输格式转化为预设传输格式之后包括：
    确定显示器的类型，并根据显示器类型判断是否需要对所述视频信号组进行运动补偿处理。
  5. 如权利要求4所述的视频信号的传输方法，其特征在于，所述确定显示器的类型，并根据显示器类型判断是否需要对所述视频信号组进行运动补偿处理之后包括：
    当需要对所述视频信号组进行运动补偿处理时，则启用预置MEMC运动补偿芯片对所述视频信号组进行运动补偿处理。
  6. 一种视频信号的传输装置，其特征在于，所述视频信号的传输装置包括：
    分路模块，用于获取目标视频信号，对所述目标视频信号进行解码，并根据预设策略将解码后的目标视频信号分为预设路数的视频信号组；
    处理模块，用于将所述视频信号组传输至信号处理器，控制所述信号处理器对所述视频信号组进行处理；
    显示模块，用于将处理后的视频信号组传输至显示终端，以将所述处理后的视频信号组中各组视频信号在显示终端对应区域显示。
  7. 如权利要求6所述的视频信号的传输装置，其特征在于，所述分路模块包括：
    获取单元，用于获取目标视频信号，对所述目标视频信号进行解码；
    分路单元，用于将解码后的目标视频信号，根据预设处理策略，分为预设路数的格式为YCbCr422的视频信号组。
  8. 如权利要求6所述的视频信号传输装置，其特征在于，所述处理模块包括：
    传输单元，用于将所述视频信号组传输至信号处理器；
    转化单元，用于启用预置传输格式转化芯片，将所述视频信号组的当前传输格式转化为预设传输格式。
  9. 如权利要求8所述的视频信号传输装置，其特征在于，所述处理模块还包括：
    判断单元，用于确定显示器的类型，并根据显示器类型判断是否需要对所述视频信号组进行运动补偿处理。
  10. 如权利要求9所述的视频信号传输装置，其特征在于，所述处理模块还包括：
    补偿处理单元，用于当需要对所述视频信号组进行运动补偿处理时，则启用预置MEMC运动补偿芯片对所述视频信号组进行运动补偿处理。
PCT/CN2017/118005 2017-04-18 2017-12-22 视频信号的传输方法及装置 WO2018192253A1 (zh)

Priority Applications (2)

Application Number Priority Date Filing Date Title
US16/331,533 US10511803B2 (en) 2017-04-18 2017-12-22 Video signal transmission method and device
EP17906555.2A EP3471405A4 (en) 2017-04-18 2017-12-22 METHOD AND APPARATUS FOR TRANSMITTING VIDEO SIGNALS

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201710255606.3A CN107105185A (zh) 2017-04-18 2017-04-18 视频信号的传输方法及装置
CN201710255606.3 2017-04-18

Publications (1)

Publication Number Publication Date
WO2018192253A1 true WO2018192253A1 (zh) 2018-10-25

Family

ID=59658184

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2017/118005 WO2018192253A1 (zh) 2017-04-18 2017-12-22 视频信号的传输方法及装置

Country Status (4)

Country Link
US (1) US10511803B2 (zh)
EP (1) EP3471405A4 (zh)
CN (1) CN107105185A (zh)
WO (1) WO2018192253A1 (zh)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107105185A (zh) * 2017-04-18 2017-08-29 深圳创维－Rgb电子有限公司 视频信号的传输方法及装置
CN107610639A (zh) * 2017-08-30 2018-01-19 北京集创北方科技股份有限公司 视频数据的传输方法、传输装置和驱动装置
CN108924261B (zh) * 2018-08-16 2021-01-12 成都掩码科技有限公司 一种高速帧精确内容馈送显示系统
CN112422933A (zh) * 2019-08-21 2021-02-26 台达电子工业股份有限公司 投影装置、投影系统以及运行方法
CN112468878B (zh) * 2019-09-06 2022-02-25 海信视像科技股份有限公司 一种图像输出方法及显示装置
TWI768302B (zh) * 2020-03-10 2022-06-21 瑞昱半導體股份有限公司 非對稱性影像傳輸方法及其電子裝置
CN113411556B (zh) * 2020-03-17 2023-09-05 瑞昱半导体股份有限公司 非对称性影像传输方法及其电子装置
US11785068B2 (en) * 2020-12-31 2023-10-10 Synaptics Incorporated Artificial intelligence image frame processing systems and methods
CN112954408B (zh) * 2021-01-25 2023-05-12 中央广播电视总台 超高清视频信号的异常监测方法及相应装置
US11483577B2 (en) * 2021-03-18 2022-10-25 Avid Technology, Inc. Processing of chroma-subsampled video using convolutional neural networks
CN113573104B (zh) * 2021-07-15 2023-05-23 北京数字电视国家工程实验室有限公司 一种传输码流分路和合路方法、码流分路器、合路器及系统
CN115547264A (zh) * 2022-11-07 2022-12-30 北京显芯科技有限公司 一种基于人眼追踪的背光调光方法及系统

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101076123A (zh) * 2007-06-13 2007-11-21 北京华纬讯电信技术有限公司 基于hdmi接口的视频通信系统及方法
CN102802039A (zh) * 2012-08-14 2012-11-28 武汉微创光电股份有限公司 多路视频混合解码输出方法及装置
CN103347163A (zh) * 2013-06-28 2013-10-09 冠捷显示科技（厦门）有限公司 一种超高清视频图像处理和传送的系统及其方法
CN103561227A (zh) * 2013-11-15 2014-02-05 京东方科技集团股份有限公司 一种高分辨率视频播放系统
CN107105185A (zh) * 2017-04-18 2017-08-29 深圳创维－Rgb电子有限公司 视频信号的传输方法及装置

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR0155811B1 (ko) * 1995-03-28 1998-12-15 김광호 컴팩트 디스크 플레이어 일체형 텔레비젼 수상기
US6069663A (en) * 1997-10-06 2000-05-30 Sony Corporation Auto-configuring television and television encoder for computer-style display input
US6674479B2 (en) * 2000-01-07 2004-01-06 Intel Corporation Method and apparatus for implementing 4:2:0 to 4:2:2 and 4:2:2 to 4:2:0 color space conversion
US7298397B2 (en) * 2002-07-24 2007-11-20 Freestone Systems, Inc. Digital transmission system
JP2007525703A (ja) * 2004-01-27 2007-09-06 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ 画像の動きを補償する装置及び方法
US8179452B2 (en) * 2008-12-31 2012-05-15 Lg Electronics Inc. Method and apparatus for generating compressed file, and terminal comprising the apparatus
US8643698B2 (en) * 2009-08-27 2014-02-04 Broadcom Corporation Method and system for transmitting a 1080P60 video in 1080i format to a legacy 1080i capable video receiver without resolution loss
WO2011027440A1 (ja) * 2009-09-02 2011-03-10 株式会社 東芝 画像圧縮装置及び画像伸張装置
TW201246921A (en) * 2011-05-13 2012-11-16 Cmsc Inc System and method for automatically tuning video signal
AU2014309958B2 (en) * 2013-08-22 2016-12-01 Sony Corporation Signal processing device, signal processing method, program, and signal transmission system
CN103500564B (zh) * 2013-09-30 2015-12-09 京东方科技集团股份有限公司 图像显示控制装置、方法和图像显示系统
CN103595896B (zh) * 2013-11-19 2017-06-09 广东威创视讯科技股份有限公司 超高清分辨率图像同步显示方法和系统
JP2015106825A (ja) * 2013-11-29 2015-06-08 株式会社東芝 信号伝送方法及び電子機器
US20150326846A1 (en) * 2014-05-12 2015-11-12 DDD IP Ventures, Ltd. Systems and methods for processing video frames
US20160150275A1 (en) * 2014-11-25 2016-05-26 Joydeep Roychowdhury System and method for delivering 4k media contents or movies on display device(s)
CN105407252A (zh) * 2015-11-19 2016-03-16 青岛海信电器股份有限公司 一种画面同步显示的方法及装置
CN106454347B (zh) * 2016-09-09 2019-04-12 上海兆芯集成电路有限公司 帧分辨率决定方法以及使用该方法的装置

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101076123A (zh) * 2007-06-13 2007-11-21 北京华纬讯电信技术有限公司 基于hdmi接口的视频通信系统及方法
CN102802039A (zh) * 2012-08-14 2012-11-28 武汉微创光电股份有限公司 多路视频混合解码输出方法及装置
CN103347163A (zh) * 2013-06-28 2013-10-09 冠捷显示科技（厦门）有限公司 一种超高清视频图像处理和传送的系统及其方法
CN103561227A (zh) * 2013-11-15 2014-02-05 京东方科技集团股份有限公司 一种高分辨率视频播放系统
CN107105185A (zh) * 2017-04-18 2017-08-29 深圳创维－Rgb电子有限公司 视频信号的传输方法及装置

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP3471405A4 *

Also Published As

Publication number Publication date
EP3471405A1 (en) 2019-04-17
CN107105185A (zh) 2017-08-29
US20190208161A1 (en) 2019-07-04
US10511803B2 (en) 2019-12-17
EP3471405A4 (en) 2020-03-18

Similar Documents

Publication Publication Date Title
WO2018192253A1 (zh) 视频信号的传输方法及装置
WO2015009107A1 (en) Method and apparatus for generating 3k-resolution display image for mobile terminal screen
WO2020080665A1 (en) Methods and apparatuses for performing artificial intelligence encoding and artificial intelligence decoding on image
WO2016091011A1 (zh) 字幕切换方法及装置
WO2022071647A1 (en) Video quality assessment method and apparatus
WO2022025423A1 (en) Video quality assessing method and apparatus
WO2011149315A2 (ko) 컨텐츠 제어 방법 및 그를 이용한 컨텐츠 재생 장치
WO2016190691A1 (en) Display apparatus and control method thereof
WO2014081146A1 (en) Display apparatus, method for controlling the display appartus, glasses and method for controlling the glasses
WO2019098778A1 (en) Display apparatus, method for controlling the same and image providing apparatus
WO2017005066A1 (zh) 录制音视频同步时间戳的方法和装置
WO2017041537A1 (zh) 视频帧率的调节方法及装置
WO2019017579A1 (ko) 디스플레이 장치, 디스플레이 방법 및 디스플레이 시스템
WO2021133042A1 (en) Electronic device and method of operating the same
WO2018028124A1 (zh) 电视机及其信号源的切换方法
EP3844962A1 (en) Methods and apparatuses for performing artificial intelligence encoding and artificial intelligence decoding on image
WO2017020649A1 (zh) 音视频播放控制方法及装置
WO2017206368A1 (zh) 高动态范围画面切换方法及装置
WO2016101305A1 (zh) 视频文件处理方法及显示装置
WO2017113600A1 (zh) 视频播放方法及装置
WO2017024876A1 (zh) 电视节目播放方法及装置
WO2022030892A1 (ko) 디스플레이장치 및 그 제어방법
WO2020171657A1 (en) Display device and image display method of the same
WO2017107385A1 (zh) 视频播放控制方法及装置
WO2017124578A1 (zh) 频道切换方法及装置

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 17906555

Country of ref document: EP

Kind code of ref document: A1

ENP Entry into the national phase

Ref document number: 2017906555

Country of ref document: EP

Effective date: 20190111

NENP Non-entry into the national phase

Ref country code: DE