WO2018182681A1

WO2018182681A1 - Engineered porosity using pillar and air gap structures for resonator isolation from bulk

Info

Publication number: WO2018182681A1
Application number: PCT/US2017/025346
Authority: WO
Inventors: Kevin Lin; Edris M. Mohammed; Kimin JUN; Paul B. Fischer
Original assignee: Intel Corporation
Priority date: 2017-03-31
Filing date: 2017-03-31
Publication date: 2018-10-04

Abstract

An apparatus is provided which comprises: a substrate, a piezoelectric resonator separated from a surface of the substrate by a void region, a first electrode coupled to a first surface of the piezoelectric resonator parallel to the substrate surface, and a second electrode coupled to a second surface of the piezoelectric resonator parallel to the substrate surface, the second electrode adjacent to the void region, wherein the void region comprises a plurality of pillars orthogonal to the substrate surface and encapsulated air gaps between the plurality of low-modulus pillars. Other embodiments are also disclosed and claimed.

Description

ENGINEERED POROSITY USING PILLAR AND AIR GAP STRUCTURES FOR

RESONATOR ISOLATION FROM BULK

BACKGROUND

[0001] Resonators are components or systems that oscillate at certain frequencies, known as resonant frequencies, with greater amplitude than at other, often undesired, frequencies, known as spurious modes. One type of resonator, that consists of a piezoelectric material sandwiched between two electrodes and acoustically isolated from the surrounding medium, is a thin-film bulk acoustic resonator (FBAR). FBAR devices may use piezoelectric films with a thickness of as low as fractions of a micrometer and resonate at frequencies from about 100 MHz to 10 GHz. Conventionally, the manufacture of a FBAR involves depositing a sacrificial material layer on a substrate surface and forming the resonator body over the sacrificial. Then, the sacrificial material would need to be removed, perhaps through a wet etch to create a void region and thereby creating acoustical isolation of the resonator body from the bulk substrate. With relatively large cavities, or particularly thin and fragile resonators, the process of removing a sacrificial layer can be problematic. Therefore, there is a need for resonator that can achieve acoustic isolation from the surrounding medium without potentially damaging manufacturing processes.

BRIEF DESCRIPTION OF THE DRAWINGS

[0002] The embodiments of the disclosure will be understood more fully from the detailed description given below and from the accompanying drawings of various embodiments of the disclosure, which, however, should not be taken to limit the disclosure to the specific embodiments, but are for explanation and understanding only.

[0003] Figs. 1A&1B illustrate cross-sectional views of a resonator suitable for implementing pillar and air gap structures, according to some embodiments,

[0004] Figs. 2Α-2Η illustrate cross-sectional views of manufacturing steps of pillar and air gap structures for resonator spurious mode suppression, according to some embodiments,

[0005] Fig. 3 illustrates an overhead view of an example resonator circuit suitable for implementing pillar and air gap structures, according to some embodiments,

[0006] Fig. 4 illustrates a block diagram of an example integrated circuit device with resonator pillar and air gap structures, according to some embodiments, [0007] Fig. 5 illustrates a flowchart of a method of forming a resonator with pillar and air gap structures, according to some embodiments, and

[0008] Fig. 6 illustrates a smart device or a computer system or a SoC (System-on-Chip) which includes an integrated circuit device with resonator pillar and air gap structures, according to some embodiments.

DETAILED DESCRIPTION

[0009] Engineered porosity using pillar and air gap structures for resonator isolation from bulk is generally presented. In this regard, embodiments of the present invention enable resonators with acoustic isolation through additive processes involving low-modulus material. One skilled in the art would appreciate that these resonators may enable larger void regions and/or thinner resonators that might not be possible with conventional manufacturing processes.

[0010] In the following description, numerous details are discussed to provide a more thorough explanation of embodiments of the present disclosure. It will be apparent, however, to one skilled in the art, that embodiments of the present disclosure may be practiced without these specific details. In other instances, well-known structures and devices are shown in block diagram form, rather than in detail, in order to avoid obscuring embodiments of the present disclosure.

[0011] Note that in the corresponding drawings of the embodiments, signals are represented with lines. Some lines may be thicker, to indicate more constituent signal paths, and/or have arrows at one or more ends, to indicate primary information flow direction. Such indications are not intended to be limiting. Rather, the lines are used in connection with one or more exemplary embodiments to facilitate easier understanding of a circuit or a logical unit. Any represented signal, as dictated by design needs or preferences, may actually comprise one or more signals that may travel in either direction and may be implemented with any suitable type of signal scheme.

[0012] Throughout the specification, and in the claims, the term "connected" means a direct connection, such as electrical, mechanical, or magnetic connection between the things that are connected, without any intermediary devices. The term "coupled" means a direct or indirect connection, such as a direct electrical, mechanical, or magnetic connection between the things that are connected or an indirect connection, through one or more passive or active intermediary devices. The term "circuit" or "module" may refer to one or more passive and/or active components that are arranged to cooperate with one another to provide a desired function. The term "signal" may refer to at least one current signal, voltage signal, magnetic signal, or data/clock signal. The meaning of "a," "an," and "the" include plural references. The meaning of "in" includes "in" and "on."

[0013] Unless otherwise specified the use of the ordinal adjectives "first," "second," and

"third," etc., to describe a common object, merely indicate that different instances of like objects are being referred to, and are not intended to imply that the objects so described must be in a given sequence, either temporally, spatially, in ranking or in any other manner.

[0014] For the purposes of the present disclosure, phrases "A and/or B" and "A or B" mean (A), (B), or (A and B). For the purposes of the present disclosure, the phrase "A, B, and/or C" means (A), (B), (C), (A and B), (A and C), (B and C), or (A, B and C). The terms "left," "right," "front," "back," "top," "bottom," "over," "under," and the like in the description and in the claims, if any, are used for descriptive purposes and not necessarily for describing permanent relative positions.

[0015] Figs. 1A&1B illustrate cross-sectional views of a resonator suitable for implementing pillar and air gap structures, according to some embodiments. As shown, resonator 100 includes substrate 102, supports 104, void region 106, lower electrode 108, piezoelectric material 1 10, and upper electrode 1 12. While shown as an FBAR, resonator 100 may be some other type of resonator, such as a solidly mounted resonator (SMR) or another type of bulk acoustic wave (BAW) resonator for example, while still incorporating teachings of the present invention. Additionally, resonator 100 may be an FBAR with a different topology, such as without supports 104 or with piezoelectric material 1 10 completely suspended at opposite edges over void region 106, for example.

[0016] Substrate 102 may be a semiconductor substrate. In some embodiments, substrate

102 is silicon. In other embodiments, substrate 102 is gallium arsenide or another semiconductor material. Supports 104 may be included to provide mechanical support and hold the resonating components of resonator 100 over void region 106. In some embodiments, supports 104 comprise silicon dioxide, though other materials may be used. In some embodiments, supports 104 may include a thin diaphragm that extends over void region 106. Electrodes 108 and 1 12 may be conductive materials, for example metals such as Al, Au, W, Pt, Mo, etc. Electrodes 108 and 1 12 may be part of an electrical circuit to excite piezoelectric material 1 10 and communicate a resulting signal response.

[0017] Piezoelectric material 1 10 may include one or more materials with piezoelectric properties. In one embodiment, piezoelectric material 1 10 comprises aluminum nitride. In other embodiments, piezoelectric material 1 10 may comprise MN, ZnO, or other piezoelectric materials known to one skilled in the art.

[0018] As seen in Fig. IB, which represents a cross-sectional view of resonator 100 from the perspective of A- A, void region 106 may include pillar and air gap structures. Lower layer 1 14 may include pillars 1 16, air gaps 1 18 and encapsulant 120, while upper layer 122 may include pillars 124, air gaps 126 and encapsulant 128. While shown as having two layers of pillars and air gaps, resonator 100 may have one or three or more layers of pillars and air gaps. Pillars and air gaps may be formed using methods described hereinafter or may be formed by other methods that may occur to one skilled in the art.

[0019] In some embodiments, lower layer 1 14 may include different size (i.e. height, width, etc.) pillars 1 16 than pillars 124 in upper layer 122. While pillars 1 16 and 124 may comprise the same porous low-modulus material, such as a carbon doped oxide, in some embodiments, pillars 1 16 and 124 differ in modulus and/or composition. In some embodiments, encapsulants 120 and 128, which encapsulate air gaps 1 18 and 126, respectively, may be dielectric material that is deposited through chemical vapor deposition (CVD), while in other embodiments, other formation processes may be used.

[0020] Figs. 2A-2H illustrate cross-sectional views of manufacturing steps of pillar and air gap structures for resonator spurious mode suppression, according to some embodiments. As shown in Fig. 2A, assembly 200 includes substrate 202, substrate surface 204 and pillars 206, which may include pillar height 208 and pillar width 209. In some embodiments, substrate 202 may be silicon, while in other embodiments, substrate 202 may be gallium arsenide or some other semiconductor material. Pillar height 208 and pillar width 209, as well as the number and composition of pillars 206, may be chosen based on a resonator design, including a

predetermined resonant frequency of vibration.

[0021] Fig. 2B shows assembly 210, which may include dielectric helmets 212 formed on an upper portion of pillars 206. In some embodiments, formation of dielectric helmets 212 include CVD or other deposition, perhaps in the presence of a plasma and/or airflow designed to promote deposition of dielectric helmets 212 on pillars 206 and not substrate 202.

[0022] As shown in Fig. 2C, assembly 220 has had encapsulant 222 formed over pillars

206 to encapsulate air gaps 224. In some embodiments, encapsulant 222 is a continuation of the process, such as a CVD, that formed dielectric helmets 212, while in other embodiments a separate deposition is performed over dielectric helmets 212 to form encapsulant 222. In some embodiments, encapsulant 222 is a low-modulus oxide.

[0023] Turning now to Fig. 2D, assembly 230 may have had encapsulant 222 planarized to form encapsulant surface 232. In some embodiments, mechanical polishing or chemical etching may be utilized to form encapsulant surface 232. Encapsulant surface 232 may provide a foundation for formation of a resonator body or additional pillar/air gap layers.

[0024] Fig. 2E shows assembly 240, which may have had pillars 242, air gaps 244, and encapsulant 246 formed over encapsulant 222. In some embodiments, pillar height 247 and pillar width 248 differ from pillar height 208 and pillar width 209. Additionally, the density, or spacing, of pillars 242 may differ from the density of pillars 206. Pillars 206 and 242 may be arranged in substantially linear rows and columns or may be staggered in arrangement.

Additionally, pillars 206 and 242 may be evenly or irregularly spaced. Encapsulant surface 249 may provide a foundation for formation of a resonator body or additional pillar/air gap layers.

[0025] As shown in Fig. 2F, assembly 250 may have had lower electrode 252 formed on encapsulant 246. In some embodiments, lower electrode 252 is a plated or deposited metal using any technique known in the art, such as vapor deposition, for example.

[0026] Fig. 2G shows assembly 260, which may have had piezoelectric material 262 formed on lower electrode 252. Piezoelectric material 262 may be a nitride or other type of piezoelectric material. In some embodiments, the dimensions of piezoelectric material 262 may be chosen based on a desired predetermined resonant frequency.

[0027] As shown in Fig. 2H, assembly 270 may have had upper electrode 272 formed on piezoelectric material 262. In some embodiments, upper electrode 272 is a plated or deposited metal. In some embodiments, upper electrode 272 is a same width as piezoelectric material 262, while in other embodiments upper electrode 272 may have a narrower width.

[0028] Fig. 3 illustrates an overhead view of an example resonator circuit suitable for implementing pillar and air gap structures, according to some embodiments. As shown, resonator circuit 300 includes substrate 302, resonators 304, electrodes 306, piezoelectric material 308, encapsulant 310 and interconnects 3 12. While shown as being arranged in a half-ladder configuration, resonator circuit 300 may include any number of resonators 304 in a full-ladder configuration or any other configuration known to one skilled in the art.

[0029] Fig. 4 illustrates a block diagram of an example integrated circuit device with resonator pillar and air gap structures, according to some embodiments. As shown, device 400 includes resonator circuit 300, control circuit 402, signal generator 404, and signal processor 406. In some embodiments, resonator circuit 300 is coupled to control circuit 402 by electrodes 306 and interconnects 312. In some embodiments, signal generator 404 is configured to produce an excitation signal that is applied to electrodes 306. The excitation signal may have an alternating current (AC) component that causes piezoelectric material 308 to vibrate. Resonators 304 may have a characteristic frequency response, that manifests itself in variable electrical characteristics, based on their physical characteristics. In some embodiments, the electrical characteristics of resonators 304 are measured by signal processor 406. In some embodiments, device 400 may be a filter, a sensor, or some other device that may benefit from the use of resonators.

[0030] Fig. 5 illustrates a flowchart of a method of forming a resonator with pillar and air gap structures, in accordance with some embodiments. Although the blocks in the flowchart with reference to Fig. 5 are shown in a particular order, the order of the actions can be modified. Thus, the illustrated embodiments can be performed in a different order, and some actions/blocks may be performed in parallel. Some of the blocks and/or operations listed in Fig. 5 are optional in accordance with certain embodiments. The numbering of the blocks presented is for the sake of clarity and is not intended to prescribe an order of operations in which the various blocks must occur. Additionally, operations from the various flows may be utilized in a variety of combinations.

[0031] Method 500 begins with forming (502) pillars on a substrate surface, for example pillars 206 on substrate surface 204. In some embodiments, a layer of material may be deposited and then patterned to form pillars 206. In another embodiments, a mask material may be deposited and patterned, and then pillars 206 may be formed by depositing material in the mask pattern, before the mask is removed. Next, a dielectric may be deposited to encapsulate (504) air gaps between the pillars. For example, a CVD may be performed to initially form dielectric helmets 212 over pillars 206 and subsequently form encapsulant 222, which encapsulates air gaps 224 between pillars 206.

[0032] Then, the dielectric may be planarized (506) to form a flat surface on which on add additional structures. In some embodiments, mechanical polishing or chemical etching may be utilized to form a surface, such as encapsulant surface 232. Next, in some embodiments, additional layer(s) of pillars/air gaps are formed (508). In some embodiments, an upper layer 122 is formed over lower layer 114, for example. In some embodiments, three or more layers of pillars/air gaps may be formed.

[0033] The method continues with forming (510) the piezoelectric resonator. In some embodiments, the resonator body may include lower electrode 252, piezoelectric material 262 and upper electrode 272. Finally, interconnects may be formed (512), for example to couple multiple resonators. In some embodiments, interconnects 312 may couple a half-ladder configuration of resonators 304. Further processing steps may be taken to add additional interconnect layers and contacts, for example, to complete the resonator device.

[0034] Fig. 6 illustrates a smart device or a computer system or a SoC (System-on-Chip)

600 which includes an integrated circuit device with resonator pillar and air gap structures, according to some embodiments. In some embodiments, computing device 600 represents a mobile computing device, such as a computing tablet, a mobile phone or smart-phone, a wireless-enabled e-reader, or other wireless mobile device. It will be understood that certain components are shown generally, and not all components of such a device are shown in computing device 600. In some embodiments, one or more components of computing device 600, for example processor 610 and/or connectivity 670, include an integrated circuit device with resonator pillar and air gap structures as described above.

[0035] For purposes of the embodiments, the transistors in various circuits and logic blocks described here are metal oxide semiconductor (MOS) transistors or their derivatives, where the MOS transistors include drain, source, gate, and bulk terminals. The transistors and/or the MOS transistor derivatives also include Tri-Gate and FinFET transistors, Gate All Around Cylindrical Transistors, Tunneling FET (TFET), Square Wire, or Rectangular Ribbon

Transistors, ferroelectric FET (FeFETs), or other devices implementing transistor functionality like carbon nanotubes or spintronic devices. MOSFET symmetrical source and drain terminals i.e., are identical terminals and are interchangeably used here. A TFET device, on the other hand, has asymmetric Source and Drain terminals. Those skilled in the art will appreciate that other transistors, for example, Bi-polar junction transistors— BJT PNP/NPN, BiCMOS, CMOS, etc., may be used without departing from the scope of the disclosure.

[0036] In some embodiments, computing device 600 includes a first processor 610. The various embodiments of the present disclosure may also comprise a network interface within 670 such as a wireless interface so that a system embodiment may be incorporated into a wireless device, for example, cell phone or personal digital assistant.

[0037] In one embodiment, processor 610 can include one or more physical devices, such as microprocessors, application processors, microcontrollers, programmable logic devices, or other processing means. The processing operations performed by processor 610 include the execution of an operating platform or operating system on which applications and/or device functions are executed. The processing operations include operations related to I/O

(input/output) with a human user or with other devices, operations related to power management, and/or operations related to connecting the computing device 600 to another device. The processing operations may also include operations related to audio I/O and/or display I/O.

[0038] In one embodiment, computing device 600 includes audio subsystem 620, which represents hardware (e.g., audio hardware and audio circuits) and software (e.g., drivers, codecs) components associated with providing audio functions to the computing device. Audio functions can include speaker and/or headphone output, as well as microphone input. Devices for such functions can be integrated into computing device 600, or connected to the computing device 600. In one embodiment, a user interacts with the computing device 600 by providing audio commands that are received and processed by processor 610.

[0039] Display subsystem 630 represents hardware (e.g., display devices) and software

(e.g., drivers) components that provide a visual and/or tactile display for a user to interact with the computing device 600. Display subsystem 630 includes display interface 632, which includes the particular screen or hardware device used to provide a display to a user. In one embodiment, display interface 632 includes logic separate from processor 610 to perform at least some processing related to the display. In one embodiment, display subsystem 630 includes a touch screen (or touch pad) device that provides both output and input to a user.

[0040] I/O controller 640 represents hardware devices and software components related to interaction with a user. I/O controller 640 is operable to manage hardware that is part of audio subsystem 620 and/or display subsystem 630. Additionally, I/O controller 640 illustrates a connection point for additional devices that connect to computing device 600 through which a user might interact with the system. For example, devices that can be attached to the computing device 600 might include microphone devices, speaker or stereo systems, video systems or other display devices, keyboard or keypad devices, or other I/O devices for use with specific applications such as card readers or other devices.

[0041] As mentioned above, I/O controller 640 can interact with audio subsystem 620 and/or display subsystem 630. For example, input through a microphone or other audio device can provide input or commands for one or more applications or functions of the computing device 600. Additionally, audio output can be provided instead of, or in addition to display output. In another example, if display subsystem 630 includes a touch screen, the display device also acts as an input device, which can be at least partially managed by I/O controller 640. There can also be additional buttons or switches on the computing device 600 to provide I/O functions managed by I/O controller 640.

[0042] In one embodiment, I/O controller 640 manages devices such as accelerometers, cameras, light sensors or other environmental sensors, or other hardware that can be included in the computing device 600. The input can be part of direct user interaction, as well as providing environmental input to the system to influence its operations (such as filtering for noise, adjusting displays for brightness detection, applying a flash for a camera, or other features).

[0043] In one embodiment, computing device 600 includes power management 650 that manages battery power usage, charging of the battery, and features related to power saving operation. Memory subsystem 660 includes memory devices for storing information in computing device 600. Memory can include nonvolatile (state does not change if power to the memory device is interrupted) and/or volatile (state is indeterminate if power to the memory device is interrupted) memory devices. Memory subsystem 660 can store application data, user data, music, photos, documents, or other data, as well as system data (whether long-term or temporary) related to the execution of the applications and functions of the computing device 600.

[0044] Elements of embodiments are also provided as a machine-readable medium (e.g., memory 660) for storing the computer-executable instructions. The machine-readable medium (e.g., memory 660) may include, but is not limited to, flash memory, optical disks, CD-ROMs, DVD ROMs, RAMs, EPROMs, EEPROMs, magnetic or optical cards, phase change memory (PCM), or other types of machine-readable media suitable for storing electronic or computer- executable instructions. For example, embodiments of the disclosure may be downloaded as a computer program (e.g., BIOS) which may be transferred from a remote computer (e.g., a server) to a requesting computer (e.g., a client) by way of data signals via a communication link (e.g., a modem or network connection).

[0045] Connectivity 670 includes hardware devices (e.g., wireless and/or wired connectors and communication hardware) and software components (e.g., drivers, protocol stacks) to enable the computing device 600 to communicate with external devices. The computing device 600 could be separate devices, such as other computing devices, wireless access points or base stations, as well as peripherals such as headsets, printers, or other devices.

[0046] Connectivity 670 can include multiple different types of connectivity. To generalize, the computing device 600 is illustrated with cellular connectivity 672 and wireless connectivity 674. Cellular connectivity 672 refers generally to cellular network connectivity provided by wireless carriers, such as provided via GSM (global system for mobile

communications) or variations or derivatives, CDMA (code division multiple access) or variations or derivatives, TDM (time division multiplexing) or variations or derivatives, or other cellular service standards. Wireless connectivity (or wireless interface) 674 refers to wireless connectivity that is not cellular, and can include personal area networks (such as Bluetooth, Near Field, etc.), local area networks (such as Wi-Fi), and/or wide area networks (such as WiMax), or other wireless communication.

[0047] Peripheral connections 680 include hardware interfaces and connectors, as well as software components (e.g., drivers, protocol stacks) to make peripheral connections. It will be understood that the computing device 600 could both be a peripheral device ("to" 682) to other computing devices, as well as have peripheral devices ("from" 684) connected to it. The computing device 600 commonly has a "docking" connector to connect to other computing devices for purposes such as managing (e.g., downloading and/or uploading, changing, synchronizing) content on computing device 600. Additionally, a docking connector can allow computing device 600 to connect to certain peripherals that allow the computing device 600 to control content output, for example, to audiovisual or other systems. [0048] In addition to a proprietary docking connector or other proprietary connection hardware, the computing device 600 can make peripheral connections 680 via common or standards-based connectors. Common types can include a Universal Serial Bus (USB) connector (which can include any of a number of different hardware interfaces), DisplayPort including MiniDisplayPort (MDP), High Definition Multimedia Interface (HDMI), Firewire, or other types.

[0049] Reference in the specification to "an embodiment," "one embodiment," "some embodiments," or "other embodiments" means that a particular feature, structure, or

characteristic described in connection with the embodiments is included in at least some embodiments, but not necessarily all embodiments. The various appearances of "an

embodiment," "one embodiment," or "some embodiments" are not necessarily all referring to the same embodiments. If the specification states a component, feature, structure, or characteristic "may," "might," or "could" be included, that particular component, feature, structure, or characteristic is not required to be included. If the specification or claim refers to "a" or "an" element, that does not mean there is only one of the elements. If the specification or claims refer to "an additional" element, that does not preclude there being more than one of the additional element.

[0050] Furthermore, the particular features, structures, functions, or characteristics may be combined in any suitable manner in one or more embodiments. For example, a first embodiment may be combined with a second embodiment anywhere the particular features, structures, functions, or characteristics associated with the two embodiments are not mutually exclusive

[0051] While the disclosure has been described in conjunction with specific

embodiments thereof, many alternatives, modifications and variations of such embodiments will be apparent to those of ordinary skill in the art in light of the foregoing description. The embodiments of the disclosure are intended to embrace all such alternatives, modifications, and variations as to fall within the broad scope of the appended claims.

[0052] In addition, well known power/ground connections to integrated circuit (IC) chips and other components may or may not be shown within the presented figures, for simplicity of illustration and discussion, and so as not to obscure the disclosure. Further, arrangements may be shown in block diagram form in order to avoid obscuring the disclosure, and also in view of the fact that specifics with respect to implementation of such block diagram arrangements are highly dependent upon the platform within which the present disclosure is to be implemented (i.e., such specifics should be well within purview of one skilled in the art). Where specific details (e.g., circuits) are set forth in order to describe example embodiments of the disclosure, it should be apparent to one skilled in the art that the disclosure can be practiced without, or with variation of, these specific details. The description is thus to be regarded as illustrative instead of limiting.

[0053] The following examples pertain to further embodiments. Specifics in the examples may be used anywhere in one or more embodiments. All optional features of the apparatus described herein may also be implemented with respect to a method or process.

[0054] In one example, an apparatus is provided comprising: a substrate; a piezoelectric resonator separated from a surface of the substrate by a void region; a first electrode coupled to a first surface of the piezoelectric resonator parallel to the substrate surface; and a second electrode coupled to a second surface of the piezoelectric resonator parallel to the substrate surface, the second electrode adjacent to the void region, wherein the void region comprises a plurality of pillars orthogonal to the substrate surface and encapsulated air gaps between the plurality of low- modulus pillars.

[0055] In some embodiments, the void region further comprises a second plurality of pillars and air gaps stacked above the first plurality of pillars and air gaps. In some embodiments, the second plurality of pillars comprise a different pillar width than the first plurality of pillars. In some embodiments, the second plurality of pillars comprise a different pillar height than the first plurality of pillars. In some embodiments, the plurality of pillars comprise low-modulus carbon doped oxide. In some embodiments, the air gaps are encapsulated with a vapor deposited oxide.

[0056] In another example, a system is provided comprising: a display subsystem;

a wireless communication interface; and an integrated circuit device, the integrated circuit device comprising a film bulk acoustic resonator (FBAR) comprising: a substrate; a piezoelectric resonator separated from a surface of the substrate by a void region; a first electrode coupled to a first surface of the piezoelectric resonator parallel to the substrate surface; and a second electrode coupled to a second surface of the piezoelectric resonator parallel to the substrate surface, wherein the void region comprises a plurality of pillars orthogonal to the substrate surface and encapsulated air gaps between the plurality of pillars.

[0057] In some embodiments, the void region further comprises a second plurality of pillars and air gaps stacked above the first plurality of pillars and air gaps. In some embodiments, the second plurality of pillars comprise a different pillar width than the first plurality of pillars. In some embodiments, the second plurality of pillars comprise a different pillar height than the first plurality of pillars. In some embodiments, the plurality of pillars comprise low-modulus carbon doped oxide. Some embodiments also include a plurality of FBARs communicatively coupled with each other.

[0058] In another example, a resonator circuit is provided comprising: a signal processor interface; and a plurality of resonator devices, the resonator devices comprising: a substrate; a piezoelectric resonator separated from a surface of the substrate by a void region; a first electrode coupled to a first surface of the piezoelectric resonator parallel to the substrate surface; and a second electrode coupled to a second surface of the piezoelectric resonator parallel to the substrate surface, the second electrode adjacent to the void region, wherein the void region comprises a plurality of pillars orthogonal to the substrate surface and encapsulated air gaps between the plurality of pillars.

[0059] In some embodiments, the void region further comprises a second plurality of pillars and air gaps stacked above the first plurality of pillars and air gaps. In some embodiments, the second plurality of pillars comprise a different pillar width than the first plurality of pillars. In some embodiments, the second plurality of pillars comprise a different pillar height than the first plurality of pillars. In some embodiments, the plurality of pillars comprise low-modulus carbon doped oxide. In some embodiments, the air gaps are encapsulated with a vapor deposited oxide.

[0060] In another example, a method is provided comprising: forming a plurality of low- modulus pillars on a surface of a substrate; depositing a dielectric layer over the pillars to encapsulate air gaps between the pillars; and forming a piezoelectric resonator over the dielectric layer.

[0061] In some embodiments, forming a plurality of low-modulus pillars comprises patterning a carbon doped oxide layer. In some embodiments, depositing a dielectric layer comprises a chemical vapor deposition (CVD) process. Some embodiments also include planarizing the dielectric layer. In some embodiments, forming a piezoelectric resonator comprises: forming a lower electrode over the dielectric layer; forming piezoelectric material over the lower electrode; and forming an upper electrode over the piezoelectric material. Some embodiments also include forming a second plurality of low-modulus pillars and a second dielectric layer between the first dielectric layer and the piezoelectric resonator. Some embodiments also include forming conductive interconnects between the resonator and additional resonators.

[0062] In another example, a bulk acoustic wave (BAW) resonator is provided comprising: means for conducting electrical signals generated by a piezoelectric resonator body; means for supporting the piezoelectric resonator body over a substrate surface; and means for acoustically isolating the piezoelectric resonator from the substrate with structure between the piezoelectric resonator and the substrate.

[0063] In some embodiments, the means for acoustically isolating comprise a plurality of pillars orthogonal to the substrate surface and encapsulated air gaps between the plurality of pillars. In some embodiments, the means for acoustically isolating further comprise a second plurality of pillars and air gaps stacked above the first plurality of pillars and air gaps. In some embodiments, the second plurality of pillars comprise a different pillar width than the first plurality of pillars. In some embodiments, the second plurality of pillars comprise a different pillar height than the first plurality of pillars. In some embodiments, the plurality of pillars comprise low-modulus carbon doped oxide. In some embodiments, the air gaps are encapsulated with a vapor deposited oxide.

[0064] In another example, a wireless communication system is provided comprising: a processor; a display subsystem; and a wireless communication interface, the wireless

communication interface comprising an antenna and a film bulk acoustic resonator (FBAR) coupled with the antenna to provide bandpass filtering, the FBAR comprising: a substrate; a piezoelectric resonator separated from a surface of the substrate by a void region; a first electrode coupled to a first surface of the piezoelectric resonator parallel to the substrate surface; and a second electrode coupled to a second surface of the piezoelectric resonator parallel to the substrate surface, the second electrode adjacent to the void region, wherein the void region comprises a plurality of pillars orthogonal to the substrate surface and encapsulated air gaps between the plurality of low-modulus pillars. [0065] In some embodiments, the void region further comprises a second plurality of pillars and air gaps stacked above the first plurality of pillars and air gaps. In some embodiments, the second plurality of pillars comprise a different pillar width than the first plurality of pillars. In some embodiments, the second plurality of pillars comprise a different pillar height than the first plurality of pillars. In some embodiments, the plurality of pillars comprise low-modulus carbon doped oxide. In some embodiments, the air gaps are encapsulated with a vapor deposited oxide. Some embodiments also include a plurality of FBARs communicatively coupled with each other.

[0066] An abstract is provided that will allow the reader to ascertain the nature and gist of the technical disclosure. The abstract is submitted with the understanding that it will not be used to limit the scope or meaning of the claims. The following claims are hereby incorporated into the detailed description, with each claim standing on its own as a separate embodiment.

Claims

CLAIMS We claim:

1. An apparatus comprising:

a substrate;

a piezoelectric resonator separated from a surface of the substrate by a void region; a first electrode coupled to a first surface of the piezoelectric resonator parallel to the substrate surface; and

a second electrode coupled to a second surface of the piezoelectric resonator parallel to the substrate surface, the second electrode adjacent to the void region, wherein the void region comprises a plurality of pillars orthogonal to the substrate surface and encapsulated air gaps between the plurality of low-modulus pillars.

2. The apparatus of claim 1, wherein the void region further comprises a second plurality of pillars and air gaps stacked above the first plurality of pillars and air gaps.

3. The apparatus of claim 2, wherein the second plurality of pillars comprise a different pillar width than the first plurality of pillars.

4. The apparatus of claim 2, wherein the second plurality of pillars comprise a different pillar height than the first plurality of pillars.

5. The apparatus according to any one of claims 1 to 4, wherein the plurality of pillars comprise low-modulus carbon doped oxide.

6. The apparatus according to any one of claims 1 to 4, wherein the air gaps are encapsulated with a vapor deposited oxide.

7. A system comprising:

a display subsystem;

a wireless communication interface; and an integrated circuit device, the integrated circuit device comprising a film bulk acoustic resonator (FBAR) comprising:

a substrate;

a piezoelectric resonator separated from a surface of the substrate by a void region;

a first electrode coupled to a first surface of the piezoelectric resonator parallel to the substrate surface; and

a second electrode coupled to a second surface of the piezoelectric resonator parallel to the substrate surface, wherein the void region comprises a plurality of pillars orthogonal to the substrate surface and encapsulated air gaps between the plurality of pillars.

8. The system of claim 7, wherein the void region further comprises a second plurality of pillars and air gaps stacked above the first plurality of pillars and air gaps.

9. The system of claim 8, wherein the second plurality of pillars comprise a different pillar width than the first plurality of pillars.

10. The system of claim 8, wherein the second plurality of pillars comprise a different pillar height than the first plurality of pillars.

11. The system of any of claims 7 to 10, wherein the plurality of pillars comprise low-modulus carbon doped oxide.

12. The system of any of claims 7 to 10, further comprising a plurality of FBARs

communicatively coupled with each other.

13. A resonator circuit comprising:

a signal processor interface; and

a plurality of resonator devices, the resonator devices comprising:

a substrate; a piezoelectric resonator separated from a surface of the substrate by a void region; a first electrode coupled to a first surface of the piezoelectric resonator parallel to the substrate surface; and

a second electrode coupled to a second surface of the piezoelectric resonator parallel to the substrate surface, the second electrode adjacent to the void region, wherein the void region comprises a plurality of pillars orthogonal to the substrate surface and

encapsulated air gaps between the plurality of pillars.

14. The resonator circuit of claim 13, wherein the void region further comprises a second

plurality of pillars and air gaps stacked above the first plurality of pillars and air gaps.

15. The resonator circuit of claim 14, wherein the second plurality of pillars comprise a different pillar width than the first plurality of pillars.

16. The resonator circuit of claim 14, wherein the second plurality of pillars comprise a different pillar height than the first plurality of pillars.

17. The resonator circuit according to any one of claims 13 to 16, wherein the plurality of pillars comprise low-modulus carbon doped oxide.

18. The resonator circuit according to any one of claims 13 to 16, wherein the air gaps are

encapsulated with a vapor deposited oxide.

19. A method comprising:

forming a plurality of low-modulus pillars on a surface of a substrate;

depositing a dielectric layer over the pillars to encapsulate air gaps between the pillars; and

forming a piezoelectric resonator over the dielectric layer.

20. The method of claim 19, wherein forming a plurality of low-modulus pillars comprises

patterning a carbon doped oxide layer.

21. The method of claim 19, wherein depositing a dielectric layer comprises a chemical vapor deposition (CVD) process.

22. The method of claim 19, further comprising planarizing the dielectric layer.

23. The method of any of claims 19 to 22, wherein forming a piezoelectric resonator comprises: forming a lower electrode over the dielectric layer;

forming piezoelectric material over the lower electrode; and

forming an upper electrode over the piezoelectric material.

24. The method of any of claims 19 to 22, further comprising forming a second plurality of low- modulus pillars and a second dielectric layer between the first dielectric layer and the piezoelectric resonator.

25. The method of any of claims 19 to 22, further comprising forming conductive interconnects between the resonator and additional resonators.