WO2018177144A1 - 阵列基板、显示面板及显示装置 - Google Patents

阵列基板、显示面板及显示装置 Download PDF

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Publication number
WO2018177144A1
WO2018177144A1 PCT/CN2018/079308 CN2018079308W WO2018177144A1 WO 2018177144 A1 WO2018177144 A1 WO 2018177144A1 CN 2018079308 W CN2018079308 W CN 2018079308W WO 2018177144 A1 WO2018177144 A1 WO 2018177144A1
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WIPO (PCT)
Prior art keywords
array substrate
protective layer
region
substrate
display panel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2018/079308
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English (en)
French (fr)
Inventor
刘利萍
黄静
陈仁坦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BOE Technology Group Co Ltd
Hefei Xinsheng Optoelectronics Technology Co Ltd
Original Assignee
BOE Technology Group Co Ltd
Hefei Xinsheng Optoelectronics Technology Co Ltd
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Publication date
Application filed by BOE Technology Group Co Ltd, Hefei Xinsheng Optoelectronics Technology Co Ltd filed Critical BOE Technology Group Co Ltd
Priority to US16/315,863 priority Critical patent/US10790315B2/en
Publication of WO2018177144A1 publication Critical patent/WO2018177144A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B33/00Electroluminescent light sources
    • H05B33/02Details
    • H05B33/04Sealing arrangements, e.g. against humidity
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01Manufacture or treatment
    • H10D86/021Manufacture or treatment of multiple TFTs
    • H10D86/0231Manufacture or treatment of multiple TFTs using masks, e.g. half-tone masks
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/411Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs characterised by materials, geometry or structure of the substrates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/441Interconnections, e.g. scanning lines
    • H10D86/443Interconnections, e.g. scanning lines adapted for preventing breakage, peeling or short circuiting
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/1303Apparatus specially adapted to the manufacture of LCDs
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/133308Support structures for LCD panels, e.g. frames or bezels
    • G02F1/133331Cover glasses
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/133351Manufacturing of individual cells out of a plurality of cells, e.g. by dicing
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/133354Arrangements for aligning or assembling substrates
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/133388Constructional arrangements; Manufacturing methods with constructional differences between the display region and the peripheral region
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/50Protective arrangements

Definitions

  • the present invention relates to the field of display technologies, and in particular, to an array substrate, a display panel, and a display device.
  • the array substrate, the metal traces, etc. are generally larger than the color filter substrate in the longitudinal direction and the width direction, and the portion of the array substrate that does not correspond to the color filter substrate is Binding area.
  • the present disclosure provides an array substrate, a display panel, and a display device.
  • an array substrate including a wiring layer and an insulating layer sequentially formed on a base substrate, and an insulating layer of the array substrate is away from a side of the wiring layer And a binding region, wherein the array substrate further includes a first protective layer, the first protective layer being located in a binding region of the array substrate, and at least partially flush with an edge of the array substrate.
  • the binding area is located on a side of the array substrate that is adjacent to the counter substrate, not opposite to the pair of cassette substrates, and the first protective layer is located in the binding area. Not at the edge position opposite the counter substrate, and/or at the corner position of the bound region.
  • a width of the first protective layer at an edge position of the binding region is smaller than a width at a corner position of the binding region.
  • the array substrate further includes a sealant for interfacing the pair of cassette substrates, and a reinforcing region between the binding region and the sealant; the reinforcement A second protective layer is disposed on the area.
  • the second protective layer is located at a corner position of the reinforcing region, and/or an edge position of the array substrate in the reinforcing region.
  • a width of the second protective layer at an edge position of the array substrate of the reinforcement region is smaller than a width at a corner position of the reinforcement region.
  • the first protective layer and/or the second protective layer is a transparent protective layer.
  • the material of the transparent protective layer is a photoresist.
  • the photoresist may be a negative photoresist.
  • the first protective layer and the second protective layer are disposed in the same layer and have the same thickness.
  • the thickness may be less than the thickness of the sealant, for example
  • the present disclosure also provides a display panel including the array substrate as described above and a color filter substrate as the pair of cassette substrates.
  • the display panel may be an advanced super-dimensional field conversion display panel or a high aperture ratio advanced super-dimensional field conversion display panel for rubbing orientation along the length or width direction of the display panel.
  • the present disclosure also provides a display device including the display panel described above.
  • 1a is a schematic view of an array substrate according to an embodiment of the present invention.
  • Figure 1b is a cross-sectional view taken along line A-A' of Figure 1a;
  • FIG. 2a is a schematic diagram of an array substrate according to an embodiment of the present invention.
  • Figure 2b is a cross-sectional view taken along line B-B' of Figure 2a;
  • FIG 3 is a schematic view showing a process flow for preparing a first or second protective layer according to an embodiment of the present invention.
  • the base substrate at the corner position of the bonding region of the array substrate Shell-like damage often occurs.
  • the base substrate has burrs, it is also required to be polished, but since the strength of the base substrate is insufficient, breakage is likely to occur during grinding. If the corner position of the binding area of the array substrate is broken, the angle will be affected, which will affect the subsequent process and reduce the cutting yield, and the damage is not easy to detect; or the progressive damage during the process will affect the subsequent manufacturing process. , resulting in loss of products and materials. As shown in FIG. 1a, FIG. 1b, FIG. 2a and FIG.
  • an embodiment of the present invention provides an array substrate 1 including a wiring layer 12 and an insulating layer 13 which are sequentially formed on a substrate substrate 11.
  • the wiring layer 12 may include gate lines, data lines, test lines, and the like, and the insulating layer 13 covers the wiring layer 12 to provide insulation and protection.
  • the side of the insulating layer 13 of the array substrate 1 away from the wiring layer 12 includes a bonding region 14, that is, the bonding region 14 is located on a side of the array substrate 1 opposite to the color filter substrate 2, and Corresponding to the color filter substrate 2, that is, the bonding region 14 is a region on the array substrate 1 which is not opposed to the color filter substrate 2. As shown in FIG.
  • the area of the color filter substrate 2 is generally smaller than the area of the array substrate 1.
  • the bonding region 14 is located on the array substrate where it is not covered by the color filter substrate 2.
  • the bonding region 14 may include a first bonding sub-region 141 extending along the width direction of the array substrate 1 (ie, the short-side direction of the array substrate 1 in FIG.
  • the array substrate 1 further includes a first protective layer 15 which is located in the bonding region 14 of the array substrate 1 and which is at least partially flush with the edge of the array substrate 1 which is not opposite to the color filter substrate 2.
  • the first protective layer 15 can be used to some extent during the process of cutting the array substrate 1.
  • the base substrate 11 serves as a support to enhance the strength of the base substrate 11, to prevent breakage of the base substrate 11, and to improve the cutting yield.
  • the first protective layer 15 may be located at an edge position of the array substrate 1 opposite to the color filter substrate 2 (ie, the array substrate of the first bonding sub-region 141 and the second bonding sub-region 142).
  • the edge of 1) and the corner position of the binding region 14 i.e., the region of the first binding sub-region 141 and the second bonding sub-region 142 having a relatively large width of the first protective layer 15).
  • the width of the first protective layer 15 located at the corner position of the binding region 14 may be greater than The width of the first protective layer 15 at the edge position of the array substrate 1. In this way, it is possible to obtain more effective protection at the corner position of the array substrate 1 and to reduce the breakage rate.
  • the first protective layer 15 may be disposed only at an edge position of the array substrate 1 opposite to the color filter substrate 2.
  • the first protective layer 15 may also be disposed only at the corner position of the binding region 14 (ie, the widths of the first protective layer 15 in the first binding sub-region 141 and the second binding sub-region 142 shown in FIG. 1a are relatively relatively large. Large area).
  • the first protective layer 15 ie, as shown in FIG. 1a
  • the first protective layer 15 is disposed at the edge position of the array substrate 1 not opposite to the color filter substrate 2 and the corner position of the binding region 14 to the array.
  • the protective effect of the base substrate 11 of the substrate 1 is further improved.
  • the array substrate 1 and the color filter substrate 2 are sealed by a sealant 3 .
  • the array substrate 1 may further include a second protective layer 16 located between the bonding region 14 and the seal region 3 of the sealant 3 .
  • the reinforcing region 17 is a projection area of the region between the edge of the sealant 3 and the edge of the color filter substrate 2 on the array substrate 1. Similar to the bonding region 14, the reinforcing region 17 may also include a first reinforcing sub-region 171 extending in the width direction of the array substrate 1 (ie, corresponding to the short side of the array substrate 1 in FIG. 1a) and along the length direction of the array substrate 1.
  • the extended second reinforcing sub-region 172 i.e., corresponding to the long side of the array substrate 1 in Fig. 1a). 1a and 2a, the position of the dotted arrow in the figure is the position of the cutting line of the color filter substrate 2.
  • the color filter substrate 2 also includes a base substrate (not shown).
  • a base substrate not shown.
  • the edge of the base substrate of the color filter substrate 2 is forced by the opposite side of the color filter substrate 2 from the reinforcing region 17.
  • the region is suspended, so that the edge of the color filter substrate 2 opposite to the reinforcing region 17 is easily broken. Therefore, the second protective layer 16 is disposed in the reinforcing region 17, and the second protective layer 16 can be cut when the color filter substrate 2 is cut.
  • the color filter substrate 2 is supported and buffered to reduce the breakage rate of the base substrate of the color filter substrate 2.
  • the second protective layer 16 may be located at a corner position of the reinforcing region 17, and an edge position of the array substrate 1 in the reinforcing region 17.
  • the width of the second protective layer 16 located at the corner position of the reinforcing region 17 may be greater than the width of the second protective layer 16 at the edge position of the array substrate 1.
  • the second protective layer 16 located at the corner position of the reinforcing region 17 and the second protective layer located at the edge position of the array substrate 1 in the reinforcing region 17 in the width direction 16 ie, the second protective layer 16 at the rightmost end of the second reinforcing sub-region 172 in FIGS. 1a and 2a
  • the second protective layer 16 located at the corner position of the reinforcing region 17 and the second protective layer located at the edge position of the longitudinal direction of the array substrate 1 in the reinforcing region 17 16 i.e., the second protective layer 16 at the lowermost end of the first reinforcing sub-region 171 in FIGS. 1a and 2a
  • the second protective layer 16 may be disposed only at the corner position of the reinforcing region 17 or only at the edge position of the array substrate 1 of the reinforcing region 17.
  • the second protective layer 16 ie, as shown in FIG. 1a and FIG. 2a
  • the second protective layer 16 is disposed at the corner position of the reinforcing region 17 and the edge position of the array substrate 1 of the reinforcing region 17 to the color filter substrate.
  • the protective effect of the base substrate of 2 is better.
  • the first protective layer 15 and the second protective layer 16 may be transparent protective layers, thereby ensuring the pair of boxes.
  • the process and cutting process went smoothly.
  • the transparent protective layer can be formed of a photoresist, such as a negative photoresist.
  • the first protective layer 15 and the second protective layer 16 may be disposed in the same layer and have the same material and thickness, so that the pattern of the first protective layer 15 and the pattern of the second protective layer 16 may be simultaneously formed by one patterning process, thereby simplifying the preparation process. .
  • the step of preparing the first protective layer 15 and the second protective layer 16 may be added after the step of preparing the insulating layer 13 is completed. That is, a photoresist (PR) 4 is coated on the array substrate 1 on which the insulating layer 13 is prepared, and exposed, developed, and etched using the mask 5, on the edge of the insulating layer 13 not opposite to the color filter substrate 2.
  • the corner position of the position and/or binding region 14 forms a pattern of the first protective layer 15, and a second protection is formed at a corner position of the reinforcing region 17 of the insulating layer 13 and/or an edge position of the insulating layer 13 of the reinforcing region 17.
  • the photoresist 4 is used as a negative photoresist, and a pattern opposite to the light-shielding pattern of the mask 5 is formed on the array substrate 1 as an example, that is, the first protective layer is formed.
  • the pattern of the 15 and the second protective layer 16 is the same pattern as that of the hollow portion of the mask 4. It should be noted that, in the process of preparing the first protective layer 15 and the second protective layer 16, a positive photoresist or a negative photoresist may be selected according to the structure and pattern of the mask.
  • the thickness of the first protective layer 15 and the second protective layer 16 is the thickness of the first protective layer 15 and the second protective layer 16 is
  • the thickness of the first protective layer 15 and the second protective layer 16 is slightly smaller than the thickness of the sealant 3, that is, the first protective layer 15 and the second protective layer 16 and the color filter substrate. There is a gap between the two.
  • the color filter substrate 2 is cut, the color filter substrate 2 is subjected to a downward force, and the sealant 3 is compressed by force, and the color filter substrate 2 can be in contact with the second protective layer 16 located below.
  • the second protective layer 16 can serve as an auxiliary support and buffer for the color filter substrate 2.
  • the embodiment of the invention further provides a display panel comprising a color film substrate 2 and the array substrate 1 as described above.
  • the first protective layer 15 can be used for the counter substrate during the process of cutting the array substrate 1.
  • the substrate 11 plays a certain degree of supporting role, enhances the strength of the substrate 11 , prevents the substrate substrate 11 from being damaged, and improves the cutting yield.
  • the display panel may be an ADS (Advanced Super Dimension Switch) or an H-ADS (High Aperture Ratio ADS) display panel that is rubbed oriented along the length direction or the width direction of the display panel.
  • ADS Advanced Super Dimension Switch
  • H-ADS High Aperture Ratio ADS
  • the display panel AA area is located in the area surrounded by the sealant 3, since both the first protective layer 15 and the second protective layer 16 are located outside the AA area, When the rubbing orientation is performed, the rubbing orientation is along the longitudinal direction or the width direction of the display panel, and does not affect the orientation of the AA region.
  • a transparent first protective layer is provided in a weak region where the edge of the binding region of the array substrate and the corner position of the binding region are easily broken, and the first protective layer is disposed outside the AA region, and can be applied to the display along the display.
  • An ADS or H-ADS display panel that is frictionally oriented in the length or width direction of the panel.
  • the array substrate and the display panel of the invention can locally strengthen the array substrate and the color filter substrate, generate less corner breakage and cornering during cutting, and can reduce defects caused by progressive damage in subsequent fabrication. Machine impact and product loss.
  • Embodiments of the present invention also provide a display device including a display panel as described above.

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Liquid Crystal (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Optical Filters (AREA)

Abstract

提供一种阵列基板(1)、显示面板及显示装置,阵列基板(1)包括依次形成在衬底基板(11)上的走线层(12)和绝缘层(13),阵列基板(1)的绝缘层(13)远离走线层(12)的一侧包括绑定区域(14),通过在阵列基板(1)的绑定区域(14)内设置至少部分与阵列基板(1)的边缘平齐的第一保护层(15),在切割阵列基板的过程中,第一保护层(15)在一定程度上可以对衬底基板(11)起到支撑作用,增强衬底基板(11)的强度,避免衬底基板(11)发生破损,提高切割良率。

Description

阵列基板、显示面板及显示装置
相关申请的交叉引用
本公开要求于2017年3月31日提交的申请号为CN201710209163.4的中国专利申请的优先权,在此将其全部内容以引文方式整体并入本文。
技术领域
本发明涉及显示技术领域,具体涉及一种阵列基板、显示面板及显示装置。
背景技术
在显示面板制备过程中,阵列基板上由于设置电极、金属走线等,在长度方向和宽度方向通常都要比彩膜基板大,阵列基板上未与彩膜基板相对应的这部分区域即为绑定区域。
发明内容
本公开提供了一种阵列基板、显示面板及显示装置。
在本公开的一个方面,提供一种阵列基板,所述阵列基板包括依次形成在衬底基板上的走线层和绝缘层,所述阵列基板的绝缘层远离所述走线层的一侧包括绑定区域,其中,所述阵列基板还包括第一保护层,所述第一保护层位于所述阵列基板的绑定区域内,并至少部分与所述阵列基板的边缘平齐。
在一个实施例中,所述绑定区域位于所述阵列基板靠近对盒基板的一侧上的不与所述对盒基板相对的区域,以及所述第一保护层位于所述绑定区域的不与对盒基板相对的边缘位置,和/或,位于所述绑定区域的拐角位置。
在一个实施例中,所述第一保护层在所述绑定区域的边缘位置的宽度小于在所述绑定区域的拐角位置的宽度。
在一个实施例中,所述阵列基板还包括用于与所述对盒基板 进行对盒的封框胶、和位于所述绑定区域和所述封框胶之间的加强区域;所述加强区域上设置有第二保护层。
进一步的,所述第二保护层位于所述加强区域的拐角位置,和/或,所述加强区域中的所述阵列基板的边缘位置。
在一个实施例中,所述第二保护层在所述加强区域的所述阵列基板的边缘位置的宽度小于在所述加强区域的拐角位置的宽度。
在一个实施例中,所述第一保护层和/或第二保护层为透明保护层。
在一个实施例中,所述透明保护层的材料为光刻胶。
所述光刻胶可以为负性光刻胶。
在一个实施例中,所述第一保护层和第二保护层同层设置,且厚度相同。所述厚度可以小于所述封框胶的厚度,例如为
Figure PCTCN2018079308-appb-000001
本公开还提供一种显示面板,包括如前所述的阵列基板以及作为所述对盒基板的彩膜基板。所述显示面板可为用于沿显示面板的长度方向或宽度方向摩擦取向的高级超维场转换显示面板或高开口率高级超维场转换显示面板。
本公开还提供一种显示装置,包括前所述的显示面板。
附图说明
附图是用来提供对本公开的进一步理解,并且构成说明书的一部分,与下面的具体实施方式一起用于解释本公开,但并不构成对本公开的限制。在附图中:
图1a为本发明实施例的阵列基板的示意图;
图1b为图1a中A-A’处的截面图;
图2a为本发明实施例的阵列基板的示意图;
图2b为图2a中B-B’处的截面图;
图3为本发明实施例制备第一或第二保护层的工艺流程示意图。
具体实施方式
下面将结合附图,对本发明中的技术方案进行清楚、完整的描述,显然,所描述的实施例是本发明的一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动的前提下所获得的所有其他实施例,都属于本发明保护的范围。
在切割阵列基板时,由于阵列基板的绑定区域位置的衬底基板是单片玻璃(彩膜基板没有延伸到其上方),因此,阵列基板的绑定区域的边角位置处的衬底基板经常会发生贝壳状的破损。当衬底基板有毛边时,还需要进行打磨,但是由于衬底基板的强度不够,打磨时也容易发生破损。若阵列基板的绑定区域的边角位置发生破损导致缺角,会影响后续工艺,降低切割良率,而这种破损不易检出;或是在工艺过程中产生进行性破损影响后续制成过程,造成产品与材料损失。结合图1a、图1b、图2a和图2b所示,本发明实施例提供一种阵列基板1,所述阵列基板包括依次形成在衬底基板11上的走线层12和绝缘层13。走线层12可以包括栅线、数据线、测试线等,绝缘层13覆盖在走线层12上,起到绝缘和保护的作用。阵列基板1的绝缘层13远离走线层12的一侧包括绑定区域14,也就是说,绑定区域14为位于阵列基板1的与彩膜基板2对盒的一侧的区域,且未与彩膜基板2相对应,即绑定区域14为阵列基板1上不与彩膜基板2相对的区域。如图1a所示,通常情况下,彩膜基板2的面积通常小于阵列基板1的面积;彩膜基板2与阵列基板1对盒时,彩膜基板2的两个边缘与阵列基板1的两个边缘几乎完全重叠,阵列基板1的另外两个边缘将不会被彩膜基板2覆盖,而绑定区域14则位于阵列基板上不被彩膜基板2覆盖的区域。如图1a所示,绑定区域14可以包括沿阵列基板1的宽度方向(即图1a中阵列基板1的短边方向)延伸的第一绑定子区域141和沿阵列基板1的长度方向(即图1a中阵列基板1的长边方向)延伸的第二绑定子区域142。阵列基板1还包括第一保护层15,第一保护层15位于阵列基板1的绑定区域14内,并至少部分与阵列基板1的未与彩膜基板2相对的边缘 平齐。
通过在阵列基板1的绑定区域14内设置至少部分与阵列基板1的边缘平齐的第一保护层15,在切割阵列基板1的过程中,第一保护层15在一定程度上可以用对衬底基板11起到支撑作用,增强衬底基板11的强度,避免衬底基板11发生破损,提高切割良率。
具体的,如图1a所示,第一保护层15可以位于阵列基板1的未与彩膜基板2相对的边缘位置(即第一绑定子区域141和第二绑定子区域142的阵列基板1的边缘)和绑定区域14的拐角位置(即第一绑定子区域141和第二绑定子区域142中第一保护层15的宽度相对较大的区域)。
由于绑定区域14的拐角位置相对于阵列基板1的边缘位置受到撞击后更容易破损,造成阵列基板1缺角,因此,位于绑定区域14的拐角位置的第一保护层15的宽度可以大于位于阵列基板1的边缘位置的第一保护层15的宽度。这样,可以使阵列基板1的拐角位置处得到更有效的保护,降低破损率。
如图2a所示,第一保护层15也可以只设置在阵列基板1的未与彩膜基板2相对的边缘位置。第一保护层15也可以只设置在绑定区域14的拐角位置(即图1a中所示的第一绑定子区域141和第二绑定子区域142中第一保护层15的宽度相对较大的区域)。当然,本领域技术人员可知,同时在阵列基板1的未与彩膜基板2相对的边缘位置和绑定区域14的拐角位置设置第一保护层15(即图1a所示)的方案,对阵列基板1的衬底基板11的保护效果更佳。
进一步的,阵列基板1与彩膜基板2之间通过封框胶3密封。阵列基板1还可以包括第二保护层16,第二保护层16位于绑定区域14与封框胶3之间的加强区域17。
如图1b和图2b所示,加强区域17为封框胶3的边缘与彩膜基板2的边缘之间的区域在阵列基板1上的投影区域。类似于绑定区域14,加强区域17也可以包括沿阵列基板1的宽度方向延伸 的第一加强子区域171(即对应于图1a中阵列基板1的短边)和沿阵列基板1的长度方向延伸的第二加强子区域172(即对应于图1a中阵列基板1的长边)。结合图1a和图2a所示,图中虚线箭头的位置为彩膜基板2的切割线的位置。彩膜基板2也包括衬底基板(图中未示出),在切割彩膜基板2时,彩膜基板2的衬底基板的边缘受力,由于彩膜基板2的与加强区域17相对的区域是悬空的,使得彩膜基板2的与加强区域17相对的边缘容易发生破损,因此,在加强区域17内设置第二保护层16,第二保护层16可以在彩膜基板2被切割时对彩膜基板2起到支撑和缓冲作用,减少彩膜基板2的衬底基板的破损率。
具体的,如图1a和图2a所示,第二保护层16可以位于加强区域17的拐角位置,以及加强区域17中的阵列基板1的边缘位置。位于加强区域17的拐角位置的第二保护层16的宽度可以大于阵列基板1的边缘位置的第二保护层16的宽度。
当沿彩膜基板2的长度方向(x方向)切割时,位于加强区域17的拐角位置的第二保护层16和位于加强区域17中的阵列基板1的宽度方向的边缘位置的第二保护层16(即图1a和图2a中第二加强子区域172最右端的第二保护层16)共同对彩膜基板2起到支撑作用,可以在一定程度上对切割产生的作用力进行缓冲。当沿彩膜基板2的宽度方向(y方向)切割时,位于加强区域17的拐角位置的第二保护层16和位于加强区域17中的阵列基板1的长度方向的边缘位置的第二保护层16(即图1a和图2a中第一加强子区域171最下端的第二保护层16)共同对彩膜基板2起到支撑作用,可以在一定程度上对切割产生的作用力进行缓冲。
需要说明的是,第二保护层16也可以只设置在加强区域17的拐角位置,或者,只设置在加强区域17的阵列基板1的边缘位置。当然,本领域技术人员可知,同时在加强区域17的拐角位置和加强区域17的阵列基板1的边缘位置设置第二保护层16(即图1a和图2a所示)的方案,对彩膜基板2的衬底基板的保护效果更佳。
由于阵列基板1和彩膜基板2上设置有对位标记和切割标记,为了避免遮挡对位标记和切割标记,第一保护层15和第二保护层16可以为透明保护层,从而保证对盒工艺和切割工艺的顺利进行。透明保护层可以由光刻胶形成,例如负性光刻胶。
第一保护层15和第二保护层16可以同层设置,且材料和厚度相同,这样,可以通过一次构图工艺同时形成第一保护层15的图案和第二保护层16的图案,简化制备工艺。
如图3所示,可以在完成制备绝缘层13的步骤之后,增加制备第一保护层15和第二保护层16的步骤。即在制备完成绝缘层13的阵列基板1上涂覆光刻胶(PR)4,并采用掩膜板5进行曝光、显影、刻蚀,在绝缘层13的未与彩膜基板2相对的边缘位置和/或绑定区域14的拐角位置形成第一保护层15的图形,以及,在绝缘层13的加强区域17的拐角位置和/或加强区域17的绝缘层13的边缘位置形成第二保护层16的图形。
图3所示的工艺中,是以光刻胶4为负性光刻胶,在阵列基板1上形成与掩膜板5的遮光图案相反的图形为例说明的,即形成的第一保护层15和第二保护层16的图形为与掩膜板4的镂空部分的图案相同的图形。需要说明的是,在制备第一保护层15和第二保护层16的过程中,可以根据掩膜板的结构和图案选用正性光刻胶或负性光刻胶。
优选的,第一保护层15和第二保护层16的厚度为
Figure PCTCN2018079308-appb-000002
Figure PCTCN2018079308-appb-000003
如图1b和图2b所示,第一保护层15和第二保护层16的厚度略小于封框胶3的厚度,也就是说,第一保护层15和第二保护层16与彩膜基板2之间具有间隙,当切割彩膜基板2时,彩膜基板2受到向下的作用力,封框胶3受力压缩,彩膜基板2可以与位于其下方的第二保护层16接触,这样,第二保护层16可以对彩膜基板2起到辅助支撑和缓冲的作用。
本发明实施例还提供一种显示面板,所述显示面板包括彩膜 基板2和如前所述的阵列基板1。
通过在阵列基板1的绑定区域14内设置至少部分与阵列基板1的边缘平齐的第一保护层15,使得在切割阵列基板1的过程中,第一保护层15可以用于对衬底基板11起到一定程度的支撑作用,增强衬底基板11的强度,避免衬底基板11发生破损,提高切割良率。
所述显示面板可以为沿显示面板的长度方向或宽度方向摩擦取向的ADS(Advanced Super Dimension Switch,高级超维场转换)或H-ADS(高开口率ADS)显示面板。如图1a和图2a所示,所述显示面板AA区(显示区)位于封框胶3所包围的区域内,由于第一保护层15和第二保护层16均位于AA区之外,因此在进行摩擦取向时,沿显示面板的长度方向或宽度方向摩擦取向,不会影响AA区的取向。
本发明在阵列基板的绑定区域的边缘位置以及绑定区域的拐角位置等易发生破损的薄弱区域,设置透明的第一保护层,第一保护层设置在AA区以外,能够适用于沿显示面板的长度方向或宽度方向摩擦取向的ADS或H-ADS显示面板。
本发明的阵列基板及显示面板,能够对阵列基板和彩膜基板进行局部加强保护,在切割中产生较少的边角破损与缺角,而且可以减少后续制成中的进行性破损造成的宕机影响和产品损失。
本发明实施例还提供一种显示装置,所述显示装置包括如前所述的显示面板。
可以理解的是,以上实施方式仅仅是为了说明本发明的原理而采用的示例性实施方式,然而本发明并不局限于此。对于本领域内的普通技术人员而言,在不脱离本发明的精神和实质的情况下,可以做出各种变型和改进,这些变型和改进也视为本发明的保护范围。

Claims (15)

  1. 一种阵列基板,包括依次形成在衬底基板上的走线层和绝缘层,所述阵列基板的绝缘层远离所述走线层的一侧包括绑定区域,其中,所述阵列基板还包括第一保护层,所述第一保护层位于所述阵列基板的绑定区域内,并至少部分与所述阵列基板的边缘平齐。
  2. 如权利要求1所述的阵列基板,其中,所述绑定区域位于所述阵列基板靠近对盒基板的一侧上的不与所述对盒基板相对的区域,以及
    其中,所述第一保护层位于所述绑定区域的不与对盒基板相对的边缘位置,和/或位于所述绑定区域的拐角位置。
  3. 如权利要求2所述的阵列基板,其中,所述第一保护层在所述绑定区域的边缘位置的宽度小于在所述绑定区域的拐角位置的宽度。
  4. 如权利要求2或3所述的阵列基板,还包括用于与所述对盒基板进行对盒的封框胶、和位于所述绑定区域和所述封框胶之间的加强区域;所述加强区域上设置有第二保护层。
  5. 如权利要求4所述的阵列基板,其中,所述第二保护层位于所述加强区域的拐角位置,和/或所述加强区域中的所述阵列基板的边缘位置。
  6. 如权利要求5所述的阵列基板,其中,所述第二保护层在所述加强区域的所述阵列基板的边缘位置的宽度小于在所述加强区域的拐角位置的宽度。
  7. 如权利要求4至6中任一项所述的阵列基板,其中,所述第一保护层和/或第二保护层为透明保护层。
  8. 如权利要求7所述的阵列基板,其中,所述透明保护层的材料为光刻胶。
  9. 如权利要求8所述的阵列基板,其中,所述光刻胶为负性光刻胶。
  10. 如权利要求4至9中任一项所述的阵列基板,其中,所述第一保护层和第二保护层同层设置,且厚度相同。
  11. 如权利要求10所述的阵列基板,其中,所述厚度小于所述封框胶的厚度。
  12. 如权利要求11所述的阵列基板,其中,所述厚度为
    Figure PCTCN2018079308-appb-100001
  13. 一种显示面板,包括如权利要求1-12任一项所述的阵列基板以及作为所述对盒基板的彩膜基板。
  14. 如权利要求13所述的显示面板,其中,所述显示面板为高级超维场转换显示面板或高开口率高级超维场转换显示面板。
  15. 一种显示装置,包括如权利要求13或14所述的显示面板。
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CN114360393A (zh) * 2020-10-14 2022-04-15 上海和辉光电股份有限公司 一种异形屏的制备方法
CN112987374B (zh) * 2021-03-03 2023-01-20 捷开通讯(深圳)有限公司 显示面板及终端设备
US11982909B2 (en) 2021-07-19 2024-05-14 Tcl China Star Optoelectronics Technology Co., Ltd. Method for manufacturing a liquid crystal display panel and a liquid crystal display panel
CN113589569B (zh) * 2021-07-19 2022-11-08 Tcl华星光电技术有限公司 液晶显示面板的制造方法以及液晶显示面板
CN114200707A (zh) * 2021-12-13 2022-03-18 业成科技(成都)有限公司 一种显示面板的制备方法及显示面板

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1282007A2 (en) * 2001-08-03 2003-02-05 Eastman Kodak Company Film with color filter array
CN104199210A (zh) * 2014-08-04 2014-12-10 京东方科技集团股份有限公司 一种显示装置及其制作方法
CN104576658A (zh) * 2014-12-30 2015-04-29 上海天马微电子有限公司 一种阵列基板及其制作方法及显示器
CN105572986A (zh) * 2016-01-29 2016-05-11 武汉华星光电技术有限公司 双面显示装置
CN106324882A (zh) * 2016-10-31 2017-01-11 上海天马微电子有限公司 一种液晶显示面板及液晶显示装置
CN106711160A (zh) * 2017-03-31 2017-05-24 京东方科技集团股份有限公司 一种阵列基板、显示面板及显示装置

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102100374B1 (ko) * 2013-10-11 2020-04-14 삼성디스플레이 주식회사 유기 발광 표시 장치 및 그 제조 방법
CN104022233B (zh) 2014-05-28 2016-01-06 京东方科技集团股份有限公司 一种有机发光显示面板的封装方法和有机发光显示面板
JP6560887B2 (ja) * 2015-04-08 2019-08-14 株式会社ジャパンディスプレイ トランジスタ基板および表示装置
CN104834143A (zh) * 2015-06-03 2015-08-12 合肥京东方光电科技有限公司 一种阵列基板及其制备方法、显示装置

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1282007A2 (en) * 2001-08-03 2003-02-05 Eastman Kodak Company Film with color filter array
CN104199210A (zh) * 2014-08-04 2014-12-10 京东方科技集团股份有限公司 一种显示装置及其制作方法
CN104576658A (zh) * 2014-12-30 2015-04-29 上海天马微电子有限公司 一种阵列基板及其制作方法及显示器
CN105572986A (zh) * 2016-01-29 2016-05-11 武汉华星光电技术有限公司 双面显示装置
CN106324882A (zh) * 2016-10-31 2017-01-11 上海天马微电子有限公司 一种液晶显示面板及液晶显示装置
CN106711160A (zh) * 2017-03-31 2017-05-24 京东方科技集团股份有限公司 一种阵列基板、显示面板及显示装置

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