WO2018176522A1 - 垂直沟道有机薄膜晶体管及其制作方法 - Google Patents

垂直沟道有机薄膜晶体管及其制作方法 Download PDF

Info

Publication number
WO2018176522A1
WO2018176522A1 PCT/CN2017/081029 CN2017081029W WO2018176522A1 WO 2018176522 A1 WO2018176522 A1 WO 2018176522A1 CN 2017081029 W CN2017081029 W CN 2017081029W WO 2018176522 A1 WO2018176522 A1 WO 2018176522A1
Authority
WO
WIPO (PCT)
Prior art keywords
organic semiconductor
semiconductor layer
film transistor
thin film
source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2017/081029
Other languages
English (en)
French (fr)
Inventor
刘哲
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Wuhan China Star Optoelectronics Technology Co Ltd
Original Assignee
Wuhan China Star Optoelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Wuhan China Star Optoelectronics Technology Co Ltd filed Critical Wuhan China Star Optoelectronics Technology Co Ltd
Priority to US15/539,700 priority Critical patent/US20180287081A1/en
Publication of WO2018176522A1 publication Critical patent/WO2018176522A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
    • H10K10/40—Organic transistors
    • H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
    • H10K10/462—Insulated gate field-effect transistors [IGFETs]
    • H10K10/491—Vertical transistors, e.g. vertical carbon nanotube field effect transistors [CNT-FETs]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
    • H10K10/80—Constructional details
    • H10K10/82—Electrodes
    • H10K10/84—Ohmic electrodes, e.g. source or drain electrodes

Definitions

  • the present invention relates to the field of display technologies, and in particular, to a vertical channel organic thin film transistor and a method of fabricating the same.
  • liquid crystal display LCD
  • organic light emitting display OLED
  • LCD liquid crystal display
  • OLED organic light emitting display
  • the utility model has the advantages of thin body and wide application range, and is widely used in various consumer electronic products such as mobile phones, televisions, personal digital assistants, digital cameras, notebook computers, desktop computers, etc., and has become a mainstream in display devices.
  • Thin Film Transistor is an electronic switching element commonly used in flat panel display devices, usually composed of a gate electrode, an active layer, a gate insulating layer separating the gate electrode and the active layer, and respectively
  • the source layer is formed by a source and a drain of the interval distribution of the source layer.
  • the thin film transistor can be divided into a bottom gate structure and a top gate structure, and depending on the source and drain, and the positional order of the active layer, the thin film transistor can also be divided into a bottom contact electrode structure and a top contact.
  • Electrode structure Therefore, the structure of a common thin film transistor includes four types: a bottom gate bottom contact electrode structure, a bottom gate top contact electrode structure, a top gate bottom contact electrode structure, and a top gate top contact electrode structure.
  • the source and the drain are both located on the same film layer, and the effective conduction channel length of each thin film transistor is determined by the length of the channel between the source and the drain in the horizontal direction.
  • the smaller the length of the channel the higher the accuracy requirements for the vacuum device, especially the exposure and etching equipment, and the corresponding equipment procurement cost and process difficulty, especially when the thin film transistor in the display panel array
  • the control of process accuracy will be a very severe test.
  • the present invention provides a vertical channel organic thin film transistor including: a substrate, an annular source disposed on the substrate, and a source disposed inside the inner circle of the source and the source An annular organic semiconductor layer on a portion of the substrate, an insulating layer covering the substrate, the source and the organic semiconductor layer, and an annular via extending through the insulating layer on the organic semiconductor layer, disposed in the annular via hole And a ring-shaped drain that is in contact with the organic semiconductor layer and a gate electrode that is provided on the insulating layer inside the inner circle of the organic semiconductor layer.
  • the centers of the source, the organic semiconductor layer, the drain, and the gate are the same.
  • the invention also provides a method for fabricating a vertical channel organic thin film transistor, comprising the following steps:
  • Step 1 providing a substrate, forming a ring-shaped source on the substrate;
  • Step 4 forming a ring-shaped drain in the annular via, the drain being in contact with the organic semiconductor layer;
  • the organic semiconductor layer is prepared by a solution method.
  • the specific process includes: coating or spin coating an organic semiconductor material solution on the substrate and the source, and baking and curing to obtain an organic semiconductor material film, and then The organic semiconductor material film is patterned to obtain an organic semiconductor layer.
  • step 2 patterning of the thin film of the organic semiconductor material is completed by sequentially performing exposure, development, and etching processes on the thin film of the organic semiconductor material.
  • the material of the organic semiconductor layer is a small molecule type organic semiconductor material or a polymer type organic semiconductor material.
  • the step 1 is specifically: depositing a first metal thin film on the substrate, and then patterning the first metal thin film to obtain a ring-shaped source;
  • the step 4 is specifically: depositing a second metal film on the insulating layer, followed by patterning The second metal film obtains a ring-shaped drain;
  • the step 5 is specifically: depositing a third metal film on the insulating layer, and then patterning the third metal film to obtain a gate.
  • the present invention also provides a vertical channel organic thin film transistor, comprising: a substrate, an annular source disposed on the substrate, a ring formed on a portion of the substrate inside the source and the inner circle of the source An organic semiconductor layer, an insulating layer covering the substrate, the source and the organic semiconductor layer, an annular via penetrating through the insulating layer on the organic semiconductor layer, being disposed in the annular via and associated with the organic a ring-shaped drain contacted by the semiconductor layer, and a gate electrode provided on the insulating layer inside the inner circle of the organic semiconductor layer;
  • the organic semiconductor layer is prepared by a solution method.
  • the present invention provides a vertical channel organic thin film transistor including: an annular organic semiconductor layer, a ring-shaped drain and a ring-shaped source respectively contacting upper and lower sides of the annular organic semiconductor layer, And a gate electrode disposed inside the inner ring of the annular organic semiconductor layer and insulated from the annular organic semiconductor layer, the effective conductive trench of the thin film transistor can be changed by changing the thickness of the organic semiconductor layer formed by the solution method
  • the length of the track which in turn makes the definition of the short channel pattern no longer depends on high-precision exposure and etching equipment, can reduce the process difficulty and production cost, while the annular electrode structure can save the planar space of the thin film transistor and increase the application of the thin film transistor.
  • the scene enhances the flexibility of circuit design.
  • the invention also provides a method for fabricating a vertical channel organic thin film transistor, which can reduce the fabrication difficulty and fabrication cost of the short channel pattern, and save the planar space of the thin film transistor.
  • FIG. 1 is a cross-sectional view showing the first step of the method for fabricating a vertical channel organic thin film transistor of the present invention
  • FIG. 2 is a plan view showing a step 1 of a method for fabricating a vertical channel organic thin film transistor of the present invention
  • FIG. 4 is a plan view of step 2 of the method for fabricating a vertical channel organic thin film transistor of the present invention.
  • FIG. 5 is a cross-sectional view showing a step 3 of a method for fabricating a vertical channel organic thin film transistor of the present invention
  • FIG. 6 is a plan view showing a step 3 of a method for fabricating a vertical channel organic thin film transistor of the present invention
  • FIG. 7 is a cross-sectional view showing a step 4 of a method of fabricating a vertical channel organic thin film transistor of the present invention.
  • FIG. 8 is a plan view showing a step 4 of a method for fabricating a vertical channel organic thin film transistor of the present invention.
  • FIG. 9 is a cross-sectional view showing a step 5 of a method of fabricating a vertical channel organic thin film transistor of the present invention, and a cross-sectional view of the vertical channel organic thin film transistor of the present invention;
  • FIG. 10 is a plan view of a step 5 of a method for fabricating a vertical channel organic thin film transistor of the present invention and a top view of a vertical channel organic thin film transistor of the present invention;
  • FIG. 11 is a flow chart of a method of fabricating a vertical channel organic thin film transistor of the present invention.
  • the present invention provides a vertical channel organic thin film transistor including: a substrate 1, an annular source 2 disposed on the substrate 1, and a source 2 and the source.
  • the center of the source 2, the organic semiconductor layer 3, the drain 5, and the gate 6 are the same, wherein the outer diameter of the source 2 is larger than the outer diameter of the organic semiconductor layer 3, the organic semiconductor layer
  • the inner diameter of 3 is smaller than the inner diameter of the source 2, and the top view of the grid 6 is circular.
  • the organic semiconductor layer 3 is prepared by a solution method, and the specific manufacturing process may be: coating or spin coating an organic semiconductor material solution on the substrate 1 and the source 2, and baking and curing to obtain an organic semiconductor material film. Then, the organic semiconductor material film is patterned to obtain an organic semiconductor layer 3.
  • the vertical channel organic thin film transistor can be applied to a flexible flat panel display device including a flexible OLED display device to fully utilize the characteristics of the organic thin film transistor.
  • the annular drain 5 and the annular source 2 are respectively located on the upper and lower sides of the organic semiconductor layer 3, so that the film can be changed by changing the thickness of the organic semiconductor layer 3 produced by the solution method.
  • the effective conductive channel length of the transistor so that the definition of the short channel pattern is no longer dependent on high-precision exposure and etching equipment, can reduce the process difficulty and production cost, and the annular electrode structure can save the planar space of the thin film transistor. Increase the application of thin film transistors and increase the flexibility of circuit design.
  • the present invention further provides a method for fabricating the above vertical channel organic thin film transistor, comprising the following steps:
  • Step 1 Referring to Figures 1 and 2, a substrate 1 is provided on which an annular source 2 is formed.
  • the substrate 1 is a glass substrate
  • the material of the source 2 is a combination of one or more of metals such as aluminum, molybdenum and copper.
  • the step 1 is specifically: depositing a first metal film on the substrate 1, and then patterning the first metal film to obtain a ring-shaped source 2.
  • step 2 patterning of the thin film of the organic semiconductor material is completed by sequentially performing exposure, development, and etching processes on the thin film of the organic semiconductor material.
  • Step 3 referring to FIG. 5 and FIG. 6, an insulating layer 4 is deposited on the substrate 1, the source 2 and the organic semiconductor layer 3, and the insulating layer 4 is patterned to form through the organic semiconductor layer 3.
  • the material of the insulating layer 4 is an organic dielectric material.
  • the step 4 is specifically: depositing a second metal film on the insulating layer 4, and then patterning the second metal film to obtain a ring-shaped drain 5; the material of the drain 5 is aluminum and molybdenum And a combination of one or more of metals such as copper.
  • annular drain 5 and the annular source 2 are respectively located on the upper and lower sides of the organic semiconductor layer 3, so that the effective conductive trench of the thin film transistor can be changed by changing the thickness of the organic semiconductor layer 3 prepared by the solution method.
  • the length of the track which in turn makes the definition of the short channel pattern no longer depends on high-precision exposure and etching equipment, can reduce the process difficulty and production cost, while the annular electrode structure can save the planar space of the thin film transistor and increase the application of the thin film transistor.
  • the scene enhances the flexibility of circuit design.
  • Step 5 referring to FIG. 9 and FIG. 10, a gate electrode 6 is formed on the insulating layer 4 inside the inner circle of the organic semiconductor layer 3.
  • the step 5 is specifically: depositing a third metal thin film on the insulating layer 4, and then patterning the third metal thin film to obtain the gate electrode 6.
  • the material of the gate electrode 6 is a combination of one or more of metals such as aluminum, molybdenum and copper.
  • the center of the source electrode 2, the organic semiconductor layer 3, the drain electrode 5, and the gate electrode 6 are the same, wherein the outer diameter of the source electrode 2 is larger than the outer diameter of the organic semiconductor layer 3, the organic semiconductor layer
  • the inner diameter of 3 is smaller than the inner diameter of the source 2, and the top view of the grid 6 is circular.
  • the capacitor upper electrode plate is in contact with an edge of the outer circumference of the source 2 through a via hole penetrating the insulating layer 4; after the gate electrode 6 is completed, the gate electrode 6, the insulating layer 4, and the drain electrode are also a pole 5, and a capacitor upper electrode plate covering the passivation layer, a passivation layer covering the flat layer, and finally a pixel electrode formed on the flat layer, the pixel electrode passing through the through hole penetrating the passivation layer and the flat layer
  • the drain 5 is in contact; the rest are the same as the vertical channel organic thin film transistor of the present invention, and will not be described herein.
  • the vertical channel organic thin film transistor fabricated by the method for fabricating the vertical channel organic thin film transistor can be applied to a flexible flat panel display device including a flexible OLED display device, so as to fully exploit the characteristics of the organic thin film transistor. .
  • the present invention provides a vertical channel organic thin film transistor including: an annular organic semiconductor layer, a ring-shaped drain and a ring-shaped source respectively contacting upper and lower sides of the annular organic semiconductor layer, and Provided inside the inner ring of the annular organic semiconductor layer and with the The annular organic semiconductor layer insulates the spaced gates, and the effective conductive channel length of the thin film transistor can be changed by changing the thickness of the organic semiconductor layer formed by the solution method, so that the definition of the short channel pattern is no longer dependent on high precision.
  • the exposure and etching equipment can reduce the process difficulty and production cost.
  • the annular electrode structure can save the planar space of the thin film transistor, increase the applicable scene of the thin film transistor, and improve the flexibility of the circuit design.
  • the invention also provides a method for fabricating a vertical channel organic thin film transistor, which can reduce the fabrication difficulty and fabrication cost of the short channel pattern, and save the planar space of the thin film transistor.

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Materials Engineering (AREA)
  • Nanotechnology (AREA)
  • Thin Film Transistor (AREA)

Abstract

一种垂直沟道有机薄膜晶体管及其制作方法。垂直沟道有机薄膜晶体管包括：环形的有机半导体层（3）、分别与环形的有机半导体层上下两侧接触的环形的漏极（5）和环形的源极（2）、以及设于环形的有机半导体层的内环内部且与环形的有机半导体层绝缘间隔的栅极（6），可通过改变由溶液法制作的有机半导体层的厚度来改变薄膜晶体管的有效导电沟道长度，进而使得短沟道图形的定义不再依赖于高精度的曝光和刻蚀设备，能够降低制程难度和生产成本，同时环形的电极结构可节省薄膜晶体管的平面空间，增加薄膜晶体管的适用场景，提升电路设计的灵活性。

Description

垂直沟道有机薄膜晶体管及其制作方法 技术领域
本发明涉及显示技术领域，尤其涉及一种垂直沟道有机薄膜晶体管及其制作方法。
背景技术
随着显示技术的发展，包括液晶显示器件(Liquid Crystal Display，LCD)及有机发光二极管显示器件(Organic Light Emitting Display，OLED)在内的各种平板显示器件因具有高画质、省电、机身薄及应用范围广等优点，而被广泛的应用于手机、电视、个人数字助理、数字相机、笔记本电脑、台式计算机等各种消费性电子产品，成为显示装置中的主流。
薄膜晶体管(Thin Film Transistor，TFT)是平板显示器件中常用的一种电子开关元件，通常由栅极、有源层、间隔所述栅极和有源层的栅极绝缘层、以及分别与有源层接触的间隔分布的源极和漏极构成。根据栅极位置的不同，薄膜晶体管可分为底栅结构和顶栅结构，再根据源极和漏极、以及有源层的位置次序不同，薄膜晶体管还可分为底接触电极结构和顶接触电极结构。因而，常见的薄膜晶体管的结构包含四种：底栅底接触电极结构、底栅顶接触电极结构、顶栅底接触电极结构及顶栅顶接触电极结构。
在上述的四种结构中，源极与漏极均位于同一膜层上，各个薄膜晶体管的有效导电沟道长度都是由源极与漏极的之间的沟道在水平方向上的长度决定，此时沟道的长度越小，对于真空设备的尤其是曝光及和刻蚀设备的精度要求也越高，相应的设备采购费用及制程难度也越高，尤其是当显示面板阵列中薄膜晶体管的沟道设计尺寸在一微米甚至微米级以下时，对制程精度的控制将是非常严峻的考验。
有机薄膜晶体管(Organic Thin-film Transistors，OTFT)是采用有机半导体材料作为有源层的一种薄膜晶体管。与传统硅材料的薄膜晶体管相比，有机薄膜晶体管具有可通过溶液法低温加工、重量轻、可大面积集成以及兼容柔性基板等优点，目前已被应用于各种显示设备中。
发明内容
本发明的目的在于提供一种垂直沟道有机薄膜晶体管，能够降低短沟道图形的制作难度和制作成本，节省薄膜晶体管的平面空间。
本发明的目的还在于提供一种垂直沟道有机薄膜晶体管的制作方法，能够降低短沟道图形的制作难度和制作成本，节省薄膜晶体管的平面空间。
为实现上述目的，本发明提供了一种垂直沟道有机薄膜晶体管，包括：基板、设于所述基板上的环形的源极、设于所述源极以及所述源极的内圆内部的部分基板上的环形的有机半导体层、覆盖所述基板、源极和有机半导体层的绝缘层、贯穿所述有机半导体层上的绝缘层的环形的过孔、设于所述环形的过孔中并与所述有机半导体层接触的环形的漏极、及设于所述有机半导体层的内圆内部的绝缘层上的栅极。
所述源极、有机半导体层、漏极、以及栅极的圆心相同。
所述有机半导体层采用溶液法制备。
所述垂直沟道有机薄膜晶体管应用于柔性平板显示器件。
所述有机半导体层的材料为小分子型有机半导体材料或聚合物型有机半导体材料。
本发明还提供一种垂直沟道有机薄膜晶体管的制作方法，包括如下步骤：
步骤1、提供一基板，在所述基板上形成环形的源极；
步骤2、在所述源极以及所述源极的内圆内部的部分基板上形成环形的有机半导体层；
步骤3、在所述基板、源极和有机半导体层上沉积绝缘层，对所述绝缘层进行图案化工艺形成贯穿所述有机半导体层上的绝缘层的环形的过孔；
步骤4、在所述环形的过孔中形成环形的漏极，所述漏极与所述有机半导体层接触；
步骤5、在所述有机半导体层的内圆内部的绝缘层上形成栅极。
所述步骤2中采用溶液法制作所述有机半导体层，具体过程包括：在所述基板和源极上涂布或者旋涂有机半导体材料溶液，烘烤固化后得到一有机半导体材料薄膜，再对所述有机半导体材料薄膜进行图案化后得到有机半导体层。
所述步骤2中通过对所述有机半导体材料薄膜依次进行曝光、显影、以及蚀刻制程完成所述有机半导体材料薄膜的图案化。
所述有机半导体层的材料为小分子型有机半导体材料或聚合物型有机半导体材料。
所述步骤1具体为：在所述基板上沉积第一金属薄膜，接着图案化所述第一金属薄膜得到环形的源极；
所述步骤4具体为：在所述绝缘层上沉积第二金属薄膜，接着图案化 所述第二金属薄膜得到环形的漏极；
所述步骤5具体为：在所述绝缘层上沉积第三金属薄膜，接着图案化所述第三金属薄膜得到栅极。
本发明还提供一种垂直沟道有机薄膜晶体管，包括：基板、设于所述基板上的环形的源极、设于所述源极以及所述源极的内圆内部的部分基板上的环形的有机半导体层、覆盖所述基板、源极和有机半导体层的绝缘层、贯穿所述有机半导体层上的绝缘层的环形的过孔、设于所述环形的过孔中并与所述有机半导体层接触的环形的漏极、及设于所述有机半导体层的内圆内部的绝缘层上的栅极；
其中，所述源极、有机半导体层、漏极、以及栅极的圆心相同；
其中，所述有机半导体层采用溶液法制备。
本发明的有益效果：本发明提供一种垂直沟道有机薄膜晶体管，包括：环形的有机半导体层、分别与所述环形的有机半导体层上下两侧接触的环形的漏极和环形的源极、以及设于所述环形的有机半导体层的内环内部且与所述环形的有机半导体层绝缘间隔的栅极，可通过改变由溶液法制作的有机半导体层的厚度来改变薄膜晶体管的有效导电沟道长度，进而使得短沟道图形的定义不再依赖于高精度的曝光和刻蚀设备，能够降低制程难度和生产成本，同时环形的电极结构可节省薄膜晶体管的平面空间，增加薄膜晶体管的适用场景，提升电路设计的灵活性。本发明还提供一种垂直沟道有机薄膜晶体管的制作方法，能够降低短沟道图形的制作难度和制作成本，节省薄膜晶体管的平面空间。
附图说明
为了能更进一步了解本发明的特征以及技术内容，请参阅以下有关本发明的详细说明与附图，然而附图仅提供参考与说明用，并非用来对本发明加以限制。
附图中，
图1为本发明的垂直沟道有机薄膜晶体管的制作方法的步骤1的剖面图；
图2为本发明的垂直沟道有机薄膜晶体管的制作方法的步骤1的俯视图；
图3为本发明的垂直沟道有机薄膜晶体管的制作方法的步骤2的剖面图；
图4为本发明的垂直沟道有机薄膜晶体管的制作方法的步骤2的俯视 图；
图5为本发明的垂直沟道有机薄膜晶体管的制作方法的步骤3的剖面图；
图6为本发明的垂直沟道有机薄膜晶体管的制作方法的步骤3的俯视图；
图7为本发明的垂直沟道有机薄膜晶体管的制作方法的步骤4的剖面图；
图8为本发明的垂直沟道有机薄膜晶体管的制作方法的步骤4的俯视图；
图9为本发明的垂直沟道有机薄膜晶体管的制作方法的步骤5的剖面图暨本发明的垂直沟道有机薄膜晶体管的剖面图；
图10为本发明的垂直沟道有机薄膜晶体管的制作方法的步骤5的俯视图暨本发明的垂直沟道有机薄膜晶体管的俯视图；
图11为本发明的垂直沟道有机薄膜晶体管的制作方法的流程图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果，以下结合本发明的优选实施例及其附图进行详细描述。
请参阅图9和图10，本发明提供一种垂直沟道有机薄膜晶体管，包括：基板1、设于所述基板1上的环形的源极2、设于所述源极2以及所述源极2的内圆内部的部分基板1上的环形的有机半导体层3、覆盖所述基板1、源极2和有机半导体层3的绝缘层4、贯穿所述有机半导体层3上的绝缘层4的环形的过孔41、设于所述环形的过孔41中并与所述有机半导体层3接触的环形的漏极5、及设于所述有机半导体层3的内圆内部的绝缘层4上的栅极6。
具体地，所述源极2、有机半导体层3、漏极5、以及栅极6的圆心相同，其中，源极2的外径大于所述有机半导体层3的外径，所述有机半导体层3的内径小于所述源极2的内径，所述栅极6的俯视图呈圆形。
具体地，所述有机半导体层3采用溶液法制备，具体制作过程可以为：在所述基板1和源极2上涂布或者旋涂有机半导体材料溶液，烘烤固化后得到一有机半导体材料薄膜，再对所述有机半导体材料薄膜进行图案化后得到有机半导体层3。
进一步地，所述有机半导体层3的材料可以为小分子型有机半导体材料或聚合物型有机半导体材料，详细地，所述小分子型有机半导体材料可 以为并五苯、三苯基胺、富勒烯、酞菁、苝衍生物或花菁，所述聚合物型有机半导体材料可以为聚乙炔型、聚芳环型或共聚物型的聚合物材料。
值得一提的是，所述垂直沟道有机薄膜晶体管可应用于包括柔性OLED显示装置在内的柔性平板显示器件，以充分发挥有机薄膜晶体管的特性。
需要说明的是，在本发明中所述环形的漏极5和环形的源极2分别位于有机半导体层3上下两侧，从而可通过改变由溶液法制作的有机半导体层3的厚度来改变薄膜晶体管的有效导电沟道长度，进而使得短沟道图形的定义不再依赖于高精度的曝光和刻蚀设备，能够降低制程难度和生产成本，同时环形的电极结构可节省薄膜晶体管的平面空间，增加薄膜晶体管的适用场景，提升电路设计的灵活性。
请参阅图11，本发明还提供一种上述垂直沟道有机薄膜晶体管的制作方法，包括如下步骤：
步骤1、请参阅图1和图2，提供一基板1，在所述基板1上形成环形的源极2。
具体地，所述基板1为玻璃基板，所述源极2的材料为铝、钼及铜等金属中的一种或多种的组合。所述步骤1具体为：在所述基板1上沉积第一金属薄膜，接着图案化所述第一金属薄膜得到环形的源极2。
步骤2、请参阅图3和图4，在所述源极2以及所述源极2的内圆内部的部分基板1上形成环形的有机半导体层3。
具体地，所述步骤2中采用溶液法制作所述有机半导体层3，具体过程包括：在所述基板1和源极2上涂布或者旋涂有机半导体材料溶液，烘烤固化后得到一有机半导体材料薄膜，再对所述有机半导体材料薄膜进行图案化后得到有机半导体层3。
进一步地，所述步骤2中通过对所述有机半导体材料薄膜依次进行曝光、显影、以及蚀刻制程完成所述有机半导体材料薄膜的图案化。
具体地，所述有机半导体层3的材料可以为小分子型有机半导体材料或聚合物型有机半导体材料，详细地，所述小分子型有机半导体材料可以为并五苯、三苯基胺、富勒烯、酞菁、苝衍生物或花菁，所述聚合物型有机半导体材料可以为聚乙炔型、聚芳环型或共聚物型的聚合物材料。
步骤3、请参阅图5和图6，在所述基板1、源极2和有机半导体层3上沉积绝缘层4，对所述绝缘层4进行图案化工艺形成贯穿所述有机半导体层3上的绝缘层4的环形的过孔41。
优选地，所述绝缘层4的材料为有机介电材料。
步骤4、请参阅图7和图8，在所述环形的过孔41中形成环形的漏极5， 所述漏极5与所述有机半导体层3接触。
具体地，所述步骤4具体为：在所述绝缘层4上沉积第二金属薄膜，接着图案化所述第二金属薄膜得到环形的漏极5；所述漏极5的材料为铝、钼及铜等金属中的一种或多种的组合。
需要说明的，所述环形的漏极5和环形的源极2分别位于有机半导体层3上下两侧，从而可通过改变由溶液法制作的有机半导体层3的厚度来改变薄膜晶体管的有效导电沟道长度，进而使得短沟道图形的定义不再依赖于高精度的曝光和刻蚀设备，能够降低制程难度和生产成本，同时环形的电极结构可节省薄膜晶体管的平面空间，增加薄膜晶体管的适用场景，提升电路设计的灵活性。
步骤5、请参阅图9和图10，在所述有机半导体层3的内圆内部的绝缘层4上形成栅极6。
具体地，所述步骤5具体为：在所述绝缘层4上沉积第三金属薄膜，接着图案化所述第三金属薄膜得到栅极6。所述栅极6的材料为铝、钼及铜等金属中的一种或多种的组合。
进一步地，所述源极2、有机半导体层3、漏极5、以及栅极6的圆心相同，其中，源极2的外径大于所述有机半导体层3的外径，所述有机半导体层3的内径小于所述源极2的内径，所述栅极6的俯视图呈圆形。
可以理解的是，基于上述的垂直沟道有机薄膜晶体管的制作方法，本发明还可以衍生出一种阵列基板的制作方法，其与上述垂直沟道有机薄膜晶体管的制作方法的区别在于：在制作源极2的同时，还在基板1上形成与所述源极2间隔分布的电容下电极板；在制作漏极5的同时，还在电容下电极板上的绝缘层4上形成电容上电极板，所述电容上电极板通过一贯穿绝缘层4的过孔与所述源极2外圆的边缘接触；在栅极6制作完成后，还在所述栅极6、绝缘层4、漏极5、以及电容上电极板上覆盖钝化层，在钝化层上覆盖平坦层，最后在平坦层上形成像素电极，所述像素电极通过贯穿钝化层和平坦层的通孔与所述漏极5接触；其余均与本发明的垂直沟道有机薄膜晶体管的制作方法相同，此处不再赘述。
值得一提的是，所述垂直沟道有机薄膜晶体管的制作方法制得的垂直沟道有机薄膜晶体管可应用于包括柔性OLED显示装置在内的柔性平板显示器件，以充分发挥有机薄膜晶体管的特性。
综上所述，本发明提供一种垂直沟道有机薄膜晶体管，包括：环形的有机半导体层、分别与所述环形的有机半导体层上下两侧接触的环形的漏极和环形的源极、以及设于所述环形的有机半导体层的内环内部且与所述 环形的有机半导体层绝缘间隔的栅极，可通过改变由溶液法制作的有机半导体层的厚度来改变薄膜晶体管的有效导电沟道长度，进而使得短沟道图形的定义不再依赖于高精度的曝光和刻蚀设备，能够降低制程难度和生产成本，同时环形的电极结构可节省薄膜晶体管的平面空间，增加薄膜晶体管的适用场景，提升电路设计的灵活性。本发明还提供一种垂直沟道有机薄膜晶体管的制作方法，能够降低短沟道图形的制作难度和制作成本，节省薄膜晶体管的平面空间。
以上所述，对于本领域的普通技术人员来说，可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形，而所有这些改变和变形都应属于本发明权利要求的保护范围。

Claims (13)

  1. 一种垂直沟道有机薄膜晶体管，包括：基板、设于所述基板上的环形的源极、设于所述源极以及所述源极的内圆内部的部分基板上的环形的有机半导体层、覆盖所述基板、源极和有机半导体层的绝缘层、贯穿所述有机半导体层上的绝缘层的环形的过孔、设于所述环形的过孔中并与所述有机半导体层接触的环形的漏极、及设于所述有机半导体层的内圆内部的绝缘层上的栅极。
  2. 如权利要求1所述的垂直沟道有机薄膜晶体管，其中，所述源极、有机半导体层、漏极、以及栅极的圆心相同。
  3. 如权利要求1所述的垂直沟道有机薄膜晶体管，其中，所述有机半导体层采用溶液法制备。
  4. 如权利要求1所述的垂直沟道有机薄膜晶体管，其中，所述垂直沟道有机薄膜晶体管应用于柔性平板显示器件。
  5. 如权利要求1所述的垂直沟道有机薄膜晶体管，其中，所述有机半导体层的材料为小分子型有机半导体材料或聚合物型有机半导体材料。
  6. 一种垂直沟道有机薄膜晶体管的制作方法，包括如下步骤：
    步骤1、提供一基板，在所述基板上形成环形的源极；
    步骤2、在所述源极以及所述源极的内圆内部的部分基板上形成环形的有机半导体层；
    步骤3、在所述基板、源极和有机半导体层上沉积绝缘层，对所述绝缘层进行图案化工艺形成贯穿所述有机半导体层上的绝缘层的环形的过孔；
    步骤4、在所述环形的过孔中形成环形的漏极，所述漏极与所述有机半导体层接触；
    步骤5、在所述有机半导体层的内圆内部的绝缘层上形成栅极。
  7. 如权利要求6所述的垂直沟道有机薄膜晶体管的制作方法，其中，所述步骤2中采用溶液法制作所述有机半导体层，具体过程包括：在所述基板和源极上涂布或者旋涂有机半导体材料溶液，烘烤固化后得到一有机半导体材料薄膜，再对所述有机半导体材料薄膜进行图案化后得到有机半导体层。
  8. 如权利要求7所述的垂直沟道有机薄膜晶体管的制作方法，其中，所述步骤2中通过对所述有机半导体材料薄膜依次进行曝光、显影、以及蚀刻制程完成所述有机半导体材料薄膜的图案化。
  9. 如权利要求6所述的垂直沟道有机薄膜晶体管的制作方法，其中，所述有机半导体层的材料为小分子型有机半导体材料或聚合物型有机半导体材料。
  10. 如权利要求6所述的垂直沟道有机薄膜晶体管的制作方法，其中，所述步骤1具体为：在所述基板上沉积第一金属薄膜，接着图案化所述第一金属薄膜得到环形的源极；
    所述步骤4具体为：在所述绝缘层上沉积第二金属薄膜，接着图案化所述第二金属薄膜得到环形的漏极；
    所述步骤5具体为：在所述绝缘层上沉积第三金属薄膜，接着图案化所述第三金属薄膜得到栅极。
  11. 一种垂直沟道有机薄膜晶体管，包括：基板、设于所述基板上的环形的源极、设于所述源极以及所述源极的内圆内部的部分基板上的环形的有机半导体层、覆盖所述基板、源极和有机半导体层的绝缘层、贯穿所述有机半导体层上的绝缘层的环形的过孔、设于所述环形的过孔中并与所述有机半导体层接触的环形的漏极、及设于所述有机半导体层的内圆内部的绝缘层上的栅极；
    其中，所述源极、有机半导体层、漏极、以及栅极的圆心相同；
    其中，所述有机半导体层采用溶液法制备。
  12. 如权利要求11所述的垂直沟道有机薄膜晶体管，其中，所述垂直沟道有机薄膜晶体管应用于柔性平板显示器件。
  13. 如权利要求11所述的垂直沟道有机薄膜晶体管，其中，所述有机半导体层的材料为小分子型有机半导体材料或聚合物型有机半导体材料。
PCT/CN2017/081029 2017-03-28 2017-04-19 垂直沟道有机薄膜晶体管及其制作方法 Ceased WO2018176522A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US15/539,700 US20180287081A1 (en) 2017-03-28 2017-04-19 Vertical channel organic thin-film transistor and manufacturing method thereof

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201710194175.4 2017-03-28
CN201710194175.4A CN106953011B (zh) 2017-03-28 2017-03-28 垂直沟道有机薄膜晶体管及其制作方法

Publications (1)

Publication Number Publication Date
WO2018176522A1 true WO2018176522A1 (zh) 2018-10-04

Family

ID=59474919

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2017/081029 Ceased WO2018176522A1 (zh) 2017-03-28 2017-04-19 垂直沟道有机薄膜晶体管及其制作方法

Country Status (2)

Country Link
CN (1) CN106953011B (zh)
WO (1) WO2018176522A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN118841420A (zh) * 2024-08-13 2024-10-25 武汉华星光电半导体显示技术有限公司 阵列基板及显示面板

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108155246B (zh) * 2017-12-28 2020-07-24 深圳市华星光电半导体显示技术有限公司 薄膜晶体管及其制备方法、阵列基板
CN108400110B (zh) * 2018-04-27 2020-01-17 深圳市华星光电半导体显示技术有限公司 薄膜晶体管阵列基板及其制备方法
CN109755222B (zh) * 2019-01-14 2021-01-22 京东方科技集团股份有限公司 角度测量器及其制造方法、显示面板和角度测量方法
CN111081160B (zh) * 2019-12-31 2022-01-04 上海天马微电子有限公司 显示面板、显示装置及显示面板的制作方法
CN111312744B (zh) 2020-03-31 2022-10-11 上海天马微电子有限公司 显示面板及显示装置
CN111430382B (zh) * 2020-04-23 2022-09-23 上海天马微电子有限公司 显示面板及其制作方法和显示装置
CN114122015B (zh) * 2021-11-15 2023-08-22 武汉华星光电半导体显示技术有限公司 阵列基板及其制造方法、显示面板
CN117637771A (zh) * 2023-12-05 2024-03-01 武汉华星光电技术有限公司 显示面板及显示终端

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6664576B1 (en) * 2002-09-25 2003-12-16 International Business Machines Corporation Polymer thin-film transistor with contact etch stops
CN101593811A (zh) * 2009-06-26 2009-12-02 北京交通大学 圆环形闭合沟道有机薄膜晶体管
CN103022150A (zh) * 2012-12-25 2013-04-03 京东方科技集团股份有限公司 一种薄膜晶体管、其制备方法、阵列基板及显示装置

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101404321B (zh) * 2008-10-31 2011-04-20 中国科学院微电子研究所 一种垂直沟道有机场效应晶体管的制备方法
CN101447552B (zh) * 2008-11-25 2011-04-06 中国科学院微电子研究所 管状栅电极垂直沟道有机场效应晶体管及其制备方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6664576B1 (en) * 2002-09-25 2003-12-16 International Business Machines Corporation Polymer thin-film transistor with contact etch stops
CN101593811A (zh) * 2009-06-26 2009-12-02 北京交通大学 圆环形闭合沟道有机薄膜晶体管
CN103022150A (zh) * 2012-12-25 2013-04-03 京东方科技集团股份有限公司 一种薄膜晶体管、其制备方法、阵列基板及显示装置

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN118841420A (zh) * 2024-08-13 2024-10-25 武汉华星光电半导体显示技术有限公司 阵列基板及显示面板
CN118841420B (zh) * 2024-08-13 2025-11-14 武汉华星光电半导体显示技术有限公司 阵列基板及显示面板

Also Published As

Publication number Publication date
CN106953011B (zh) 2019-04-30
CN106953011A (zh) 2017-07-14

Similar Documents

Publication Publication Date Title
WO2018176522A1 (zh) 垂直沟道有机薄膜晶体管及其制作方法
CN104779272B (zh) 薄膜晶体管和阵列基板及其制作方法、显示装置
US7588971B2 (en) Method of fabricating vertical thin film transistor
KR101493583B1 (ko) 유기 박막 트랜지스터 어레이 기판과 그 제조방법 및 디스플레이 장치
CN102655155B (zh) 阵列基板及其制造方法和显示装置
JP5420820B2 (ja) 薄膜トランジスタバックプレーン回路
CN105097948B (zh) 薄膜晶体管、阵列基板及其制作方法、显示面板和装置
CN107424957A (zh) 柔性tft基板的制作方法
WO2016176881A1 (zh) 双栅极tft基板的制作方法及其结构
US20180212061A1 (en) Dual gate oxide thin-film transistor and manufacturing method for the same
WO2017215075A1 (zh) 一种阵列基板及其制备方法
CN109671722B (zh) 有机发光二极管阵列基板及其制造方法
CN106024639A (zh) 基于金属诱导结晶工艺的ltps tft的制作方法
US20200365671A1 (en) Organic electroluminescence display panel, method for manufacturing the same, and display apparatus
US20180287081A1 (en) Vertical channel organic thin-film transistor and manufacturing method thereof
CN108269856A (zh) 一种氧化物半导体薄膜晶体管及其制备方法、阵列基板
WO2016201864A1 (zh) 薄膜晶体管及其制作方法、阵列基板、显示装置
WO2017041435A1 (zh) 显示基板及其制作方法和显示装置
WO2016161668A1 (zh) 双栅极器件以及双栅极器件的制造方法
WO2017210995A1 (zh) 金属氧化物薄膜晶体管及其制备方法
CN207068871U (zh) 一种薄膜晶体管、阵列基板和显示装置
WO2016179877A1 (zh) 共平面型氧化物半导体tft基板结构及其制作方法
US9859308B1 (en) Multiple TFTs on common vertical support element
CN105304497B (zh) 一种薄膜晶体管、阵列基板及相关制作方法
CN109616444B (zh) Tft基板的制作方法及tft基板

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 15539700

Country of ref document: US

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 17903080

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 17903080

Country of ref document: EP

Kind code of ref document: A1