WO2018121906A1 - Elektrische maschine mit synchroner pulsmustererzeugung - Google Patents

Elektrische maschine mit synchroner pulsmustererzeugung Download PDF

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Publication number
WO2018121906A1
WO2018121906A1 PCT/EP2017/078029 EP2017078029W WO2018121906A1 WO 2018121906 A1 WO2018121906 A1 WO 2018121906A1 EP 2017078029 W EP2017078029 W EP 2017078029W WO 2018121906 A1 WO2018121906 A1 WO 2018121906A1
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WO
WIPO (PCT)
Prior art keywords
signal
slave
pulse pattern
pulse
clock
Prior art date
Application number
PCT/EP2017/078029
Other languages
German (de)
English (en)
French (fr)
Inventor
Sebastian Strache
Thomas Koss
Original Assignee
Robert Bosch Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Robert Bosch Gmbh filed Critical Robert Bosch Gmbh
Priority to CN201780081156.9A priority Critical patent/CN110089024B/zh
Publication of WO2018121906A1 publication Critical patent/WO2018121906A1/de

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Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02PCONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
    • H02P27/00Arrangements or methods for the control of AC motors characterised by the kind of supply voltage
    • H02P27/04Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage
    • H02P27/06Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters
    • H02P27/08Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters with pulse width modulation
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02PCONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
    • H02P6/00Arrangements for controlling synchronous motors or other dynamo-electric motors using electronic commutation dependent on the rotor position; Electronic commutators therefor
    • H02P6/28Arrangements for controlling current
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks
    • H04L12/403Bus networks with centralised control, e.g. polling

Definitions

  • the invention relates to an electrical machine with a stator and a rotor.
  • the stator has a plurality of stator coils. The electric
  • Machine also has at least two power output stages, which are each connected on the output side with a part of the stator coils.
  • the electric machine has at least or only one
  • Master synchronization signal hereinafter also referred to as master sync signal to generate for timely control of the stator coils.
  • the electric machine has at least two slave units which each have a pulse pattern generator and an input side with the pulse pattern generator.
  • the slave units are each designed to generate a - in particular constant or invariable - slave clock signal for generating the pulse pattern signal, and
  • Mastersyncsignal by means of the slave clock signal to detect, in particular to sample, and to generate the pulse pattern signal in response to the master sync signal at the same time that a through the pulse pattern signal
  • pulse pattern clock - in particular only - is determined by the master sync signal.
  • simultaneous generation of the pulse pattern signal regardless of a frequency deviation of the slave clock signals with each other.
  • the master sync signal preferably has a time sequence of, in particular, rising and / or falling edges. More preferably, the
  • Master sync signal temporally - in particular periodically or non-periodically - successive pulses and pulse pauses, with a pulse followed by a pulse pause.
  • the pulse has a pulse duration and the pulse pause has a pulse pause duration.
  • a pulse and a pulse break together form a pulse period with a pulse period duration.
  • the pulse has a rising edge and a falling edge.
  • the pulse is formed by a rectangular pulse, a sawtooth pulse or a triangular pulse.
  • the slave units can advantageously time-synchronously with one another, in particular in accordance with the master sync signal
  • Machine be formed a redundant pulse width modulated control of the stator, wherein the redundant control by at least two or a plurality of mutually independent pulse pattern generators in the slave
  • Each slave unit is at least one
  • Statorspule or a plurality of stator coils associated with the stator are Statorspule or a plurality of stator coils associated with the stator.
  • a three-phase electric machine may have its own pulse pattern generator for each phase.
  • the pulse pattern generations in the thus formed, three independently operating pulse pattern generators in three slave units can work synchronously to each other by the temporally parallel sampling of the master sync signal by the slave units, even if the timing of the slave units, for example conditionally by different temperatures, or component tolerances, are different from each other, and differ from each other.
  • a quartz oscillator of a timer of a slave unit generate a time signal whose frequency of a
  • Time signal of the timer of another slave unit - for example due to component tolerances or mutually different temperatures
  • the slave clock represented by the slave clock signal, can thus - apart from the mentioned temperature drift or component change - remain unchanged, and so does not need to be electronically adjusted or tracked.
  • a clock signal of a timer of the slave unit needs not be changed and can with its by component tolerance or
  • a temporal conformity of the PWM signals of the slave units is thus effected by an adaptation of the pulse duration of the PWM individual pulse generated by the PWM generator of the slave unit.
  • a PWM single pulse of a faster oscillating slave unit may be generated by means of more slave clock periods or clock oscillations than a PWM single pulse from a slower oscillating further slave unit in comparison.
  • the timely control of the slave units causes an increase in efficiency in the generation of torque and a reduction of the noise caused by the machine.
  • the master unit preferably has a processing unit, in particular a computer processor, for example a microprocessor or a microprocessor
  • the master unit is preferably formed, the
  • Generate master sync signal which represents a default timing for generating the PWM signal, in particular a PWM clock, and to send this to the slave unit.
  • the master unit in particular the processing unit, is preferably designed for each slave unit - in particular for the respective one
  • Slave unit individually generated - Master PWM command signal to be generated which represents a pulse width, in particular pulse duration, to be generated by the slave unit PWM pulse and to send this to the slave unit.
  • the master unit can thus generate mutually different master PWM command signals for the slave units and thus specify a desired rotational movement of the rotor.
  • the slave unit has an input for the master PWM command signal and is at least indirectly connected to the master unit and configured to generate the PWM signal in response to the master PWM command signal.
  • the machine has a data bus, wherein the master unit is connected to the slave units by means of the data bus and configured to send the master PWM default signal to the slave unit via the data bus.
  • the master PWM command signal represents a pulse pattern of the PWM signal to be generated by the slave unit.
  • the default signal thus indirectly represents a torque to be generated by the rotor and / or a rotor speed.
  • the slave unit has an input for the master sync signal.
  • the slave unit preferably has one
  • Processing unit in particular a computing unit, which is adapted to determine a number of clock pulses or clock oscillations of the slave clock signal, which corresponds to the represented by the master sync signal temporal edge or pulse spacing of successive edges or pulses, and the pulse pattern periods, in particular one Pulse train clock frequency successive PWM single pulses to generate according to the determined number of clock pulses of the slave clock signal.
  • the slave unit is designed to generate a PWM period data set representing the number of clock pulses and this
  • the PWM period data set preferably represents the number of oscillations of the slave clock corresponding to a predetermined number of pulse pattern periods.
  • the slave unit may generate a predetermined number of pulse pattern periods depending on the generated data set.
  • the slave unit can thus - preferably continuously - or at predetermined time intervals, scan the master sync signal and thus a possible temperature drift or frequency change of their own
  • Clock signal for generating the pulse pattern signal by means of a - in particular continuous adaptation to the master sync signal, in particular the temporal edge spacing of consecutive edges or pulses,
  • the master unit is configured to generate a period number signal which is a number during a
  • Pulse repetition period or pulse period of the master sync signal to be generated pulse pattern periods represents.
  • the slave unit preferably has an input for the period number signal, and is designed to have a clock duration, in particular a number of the clock pulses of the slave clock signal
  • Pulse pattern period corresponds to determine depending on the period number signal.
  • the period number signal which can be sent from the master unit to the slave unit, so a number of pulse pattern periods, which between two successive clock pulses of the
  • Master sync signal from the slave units to each other to be generated synchronously are set by the master unit dynamically.
  • Period number signal can be sent, for example via a data bus together with the PWM command signal to the slave units.
  • the number of pulse pattern periods to be generated by the slave units corresponding to the time pulse interval or the pulse clock of the master sync signal may be predetermined for the electric machine, and thus for the master unit and the slave units , thus the slave unit may advantageously generate the pulse pattern signal for a pulse pattern period corresponding to the master sync signal.
  • the slave unit has a
  • Computing unit which is formed, a clock pulses representing division remainder from its determination of the clock duration of the pulse pattern period to a clock period of at least indirectly successive subsequent pulse pattern periods or pulse pattern half periods - in particular depending on
  • the arithmetic unit of the slave unit is formed on chronologically successive pulse pattern periods or
  • Pulse pattern half periods each add a clock pulse until the
  • Divisional remainder is consumed. So the remainder of the division can be advantageous
  • the arithmetic unit is configured to add one clock pulse to temporally successive pulse pattern periods or pulse pattern half periods omitting at least one pulse pattern period until the remainder of the division has been consumed. The remainder of the division
  • a synchronization variation of the electric machine can be designed to be particularly low, as far as a cycle time change of the individual pulse pattern periods is evenly distributed over a PWM pattern generated by the slave units, represented by the PWM signal.
  • the arithmetic unit is formed, every second or every third
  • the electric machine has a slave unit for each phase of the machine.
  • the electric machine can be so unlike an electric machine with only one pulse pattern generator and, for example, a B6 bridge, which is formed, the
  • Stator coils of a stator to energize - mutually redundant
  • the electric machine has at least two sub-machines, each having the same number of phases, wherein the machine for each sub-machine, more preferably for each phase of the sub-machine - has at least one slave unit.
  • the electric machine can be operated with certainty in case of failure of part of a sub-machine or a complete failure of a sub-machine with the rest of the sub-machine or in the case of several sub-machines with the other sub-machines still safe.
  • a clock frequency of the slave clock is a multiple of the edge or pulse repetition frequency of
  • a clock frequency of the slave clock is more than ten megahertz, for example, 33 megahertz.
  • An edge or pulse repetition frequency, for example, of the master sync signal is less than
  • the master unit is formed, a period duration, preferably a repetition frequency of the master sync signal, and thus in particular a time interval of the pulses, the pulse duration of the pulses and / or the length of the pulse pauses between directly in time
  • the master sync signal can be modulated, for example by a modulator of the master unit, in particular pulse width modulator.
  • the slave units generate a predetermined number of PWM periods between two consecutive edges or pulses, or a number of times corresponding to the period number signal
  • a frequency bandwidth of the PWM generation can be changed by the master synchronization signal and thus influenced.
  • an increase or decrease in the period of the pulse sequence of the master sync signal causes a change in the PWM frequency content, in particular a spectral power density, what advantageously causes a change in a noise emission of electromagnetic waves.
  • the master unit is formed, the repetition frequency, in particular a time interval of the pulses or the length of the pulse pauses between temporally immediately successive edges or pulses of
  • Mastersyncsignals at random in particular in response to a generated random number to change.
  • Master unit connected processing unit in particular microprocessor or microcontroller, designed, the repetition frequency with a
  • Random frequency value to generate randomly within a predetermined frequency interval, so that a frequency bandwidth of the PWM signals generated by the slaves is increased.
  • the frequency bandwidth is increased, the energy of the PWM pulses is distributed within a frequency spectrum, which has a positive effect on EMC (electro-magnetic compatibility) emission behavior.
  • the master unit can have a modulator which is designed to have a pulse repetition frequency of the master sync signal in such a way-preferably by means of a change or fluctuation of the period modulated onto the period duration
  • the modulator is formed, a frequency band or
  • the frequency interval of the PWM generation is increased.
  • Modulator configured to generate the modulation such that the PWM signal white noise, in particular band noise of a predetermined
  • the modulator is designed to carry out the modulation by means of chirp modulation, sine modulation, frequency hopping or dithering within a predetermined modulation bandwidth of the pulse repetition frequency.
  • the invention also relates to an electric drive for an electric vehicle or a hybrid vehicle having an electric machine of the type described above, wherein the machine is designed to have a torque for moving the vehicle
  • the invention also relates to a power steering system for a vehicle with an electric machine of the type described above, wherein the machine is configured to generate a supporting steering torque for vehicle steering.
  • the invention also relates to a method for operating an electrical machine.
  • At least two parts of the stator coils of the machine each form a submachine.
  • the submachine is driven by a slave unit connected to the submachine, wherein a drive pattern for energizing the submachine is generated by the slave unit.
  • a time synchronization of the slave units with each other is predetermined by a master sync signal, which comprises a time interval comprising a
  • the slave units each have a timer which generates a slave clock signal representing a clock cycle for the slave unit independently of the master, in particular of a timer of the master, wherein the
  • Slave clock signal represents a clock cycle with which the slave unit, in particular a microprocessor or microcontroller of the slave unit is clocked.
  • the slave clock signal remains unchanged.
  • the master sync signal is sampled by the slave unit at the timing of the slave clock signal of the slave unit, and a number of clock pulses or clock oscillations of the slave unit
  • Slave clock signal determines which of the master sync signal
  • a number of clock pulses or clock oscillations of the slave clock signal is determined by the slave unit, which one
  • Period between successive edges for example, rising or falling edges or pulses corresponds.
  • the pulse pattern periods for a rotor revolution corresponding to the number of clock pulses generated.
  • a pulse period with the aforementioned period duration preferably has a pulse pause and a pulse.
  • FIG. 1 shows an exemplary embodiment of an electrical machine which has a master unit and two slave units, wherein the slave units are respectively designed to scan a pulse sequence generated by the master unit as a master sync signal and to determine a number of slave clocks corresponding to the master sync signal, and thus a chronological one To create synchronization with each other;
  • Figure 2 shows schematically an embodiment of a method according to which the slave units of the electric machine shown in Figure 1 can be synchronized with each other;
  • FIG. 3 schematically shows a chronological sequence of pulse pattern periods, among which a remainder of the division comprising individual slave clocks
  • successive pulse pattern periods is distributed with the addition of individual pulse pattern clocks, so that the individual pulse pattern periods are each formed longer in time than pulse pattern periods to which no slave clocks are added;
  • FIG. 4 schematically shows a chronological sequence of pulse pattern periods, under which a remainder of the division comprises individual slave clocks
  • Figure 5 shows a control unit for an electric machine, wherein the
  • Control unit comprises a master unit and a plurality of slave units, which are connected via a data bus to the master unit.
  • FIG. 1 shows an exemplary embodiment of an electrical machine 1.
  • the stator 1 has in this embodiment six stator coils, namely a stator coil 4, a stator coil 5 and a stator coil 6, which together form a dividing machine 10. Three more stator coils of the six stator coils, namely one
  • the stator 2 thus has two sub-machines.
  • the stator coils of the sub-machines are in this embodiment in
  • stator coils of the sub-machines can - unlike shown in Figure 1 - be connected to each other in delta connection.
  • the stator coils 4, 5, 6, 7, 8 and 9 are in this
  • a physical arrangement of the stator coils on the stator can include a circumferential angle of 120 degrees between two adjacent stator coils of the same submachine for each submachine.
  • the electric machine 1 also has a power output stage 12, which is connected on the output side via an output terminal 28 to the stator coils 4, 5 and 6 of the dividing machine 10 and which is formed, the stator coils 4, 5 and 6 of the dividing machine 10 for generating a rotating magnetic field to energize.
  • the electric machine 1 also has a power output stage 13, which on the output side via an output terminal 29 with the
  • Statorspulen 7, 8 and 9 of the dividing machine 1 1 is connected.
  • the electric machine for example, also has one
  • the rotor position sensor 14 is configured to detect a rotor position of the rotor 3 and a
  • the electric machine 1 also has a slave unit 15, which the Power output stage 12 includes and a slave unit 16, which the
  • Power output stage 13 includes.
  • the electric machine 1 also has a master unit 17, which is designed to generate a master PWM specification signal and a master sync signal for driving the slave units 15 and 16, in dependence on which the slave units 15 and 16 indirectly each have a pulse pattern -Signal for driving the power amplifier 12 and 13 can generate.
  • the master PWM command signal represents at least one PWM pattern to be generated, and thus represents a duty cycle of the PWM drive.
  • a torque to be generated or additionally a rotor speed or a direction of rotation of the rotor can thus be specified by the master unit.
  • the master unit 17 is connected on the input side to the rotor position sensor 14 and can thus generate the master PWM specification signal as a function of the rotor position signal.
  • the master unit 17 is connected on the output side via a connection 31, for example a data bus, to the slave units 15 and 16 and designed, the master PWM specification signal, for generating the PWM signals by the slave units 15 and 16 to the slave - Send units 15 and 16.
  • connection 31 may be formed differently than previously described, for example, as an electrical connection line.
  • the master unit 17 has a timer 23, in particular a quartz oscillator, which is designed to generate a time signal and to output it.
  • the master unit 17 also has a
  • Processing unit 20 in particular microprocessor or microcontroller, which on the input side connected to the timer 23 and is adapted to generate depending on the time signal, the master sync signal or additionally the master PWM command signal.
  • the master PWM command signal may include a torque, a start time for starting a rotational movement of the rotor, a rotational angle of the rotor, or a torque output via the rotor should, or additionally represent the aforementioned period number signal.
  • the slave unit 15 has an input 26 for the master sync signal 30.
  • the master unit 17 is connected on the output side to the input 26 of the slave unit 15 and designed to send the master sync signal 30 via the input 26 to the slave unit 15.
  • the slave unit 16 has an input 27 for the master sync signal 30.
  • the master unit 17 is also connected on the output side to the input 27 of the slave unit 16 and formed, the
  • connection between the master unit 17 and the slave units 15 and 16 is formed for example by a data bus, in particular an SPI data bus.
  • the master sync signal or, in addition, the master PWM command signal can thus advantageously be transmitted via the data bus to the slave units.
  • connection is a point-to-point connection in which the master unit is connected to the slave units via separate connection lines.
  • the slave units 15 and 16 can each sample the master sync signal 30.
  • the slave unit 15 has a timer 25, which is designed to generate a slave clock signal 34 and to send this to a processing unit 21.
  • the processing unit 21 is formed in this embodiment, to sample the master sync signal 30 and to determine a number of slave clock pulses or slave clock periods of the slave clock signal, which correspond to a period, in particular the time pulse sequence of the master sync signal.
  • the processing unit 21 is designed to generate a corresponding data record which determines the pulse pause duration, in the case of
  • the slave unit 15 also has a in this embodiment
  • Pulse width modulator 18 which is the input side to the processing unit 21 and the output side connected to the power output stage 12 and is designed to generate a pulse pattern signal 36 and send this output side to the power output stage 12.
  • the pulse width modulator 18 may generate the pulse pattern signal 36 as a function of the data set generated by the processing unit 21, which represents the period of the pulse sequence of the master sync signal.
  • the pulse width modulator 18 can generate the pulse pattern signal 36 as a function of the master PWM command signal received via the connection line 31, wherein the number of pulse pattern periods to be generated for a pulse period of the master sync signal is determined by the pulse width modulator 18 - for example by a stored number in FIG Pulse width modulator - is determined.
  • Pulse width modulator 19 which is designed to generate a pulse pattern signal 37 and send this output side to the power output stage 13 for the corresponding powering of the sub-machine 1 1.
  • the pulse width modulator 19 is connected on the input side to a processing unit 22 which is connected on the input side to a timer 24 and is adapted to sample the master sync signal 30 received at the input 27 as a function of a slave clock signal 35 generated by the timer 24 Slave unit 15 described - the
  • Pulse width modulator 19 for time-synchronous generation of the pulse pattern signal 37 to control.
  • the processing units 21 and 22 are each configured to receive a synchronization signal generated by the master unit for starting the synchronous PWM period generation, so that all slave units can perform a PWM signal generation in synchronism with one another.
  • the slave units are designed, for example, a resynchronization of the PWM generation after each reception of a new one
  • Mastersynchronisationspulses or - in response to a predetermined number of received successive pulses of the master sync signal, for example, less than five, as ten or as a hundred pulses - perform.
  • the pulse width modulators 18 and 19 can thus generate the pulse pattern signals 36 and 37 in synchronism with one another, even if the slave clock signals 35 and 34 deviate from one another, that is to say different frequencies, for example, due to component tolerances or mutually different temperatures.
  • the sub-machines 10 and 1 1 can thus be controlled in time-synchronous manner as a function of the master sync signal 30 without having to change a timing of the slave clock signals 34 or 35 or the slave clock signals 34 or 35 by means of a PLL (PLL) method. Locked loop) are approximated to the master sync signal 30.
  • PLL PLL
  • FIG. 2 shows an exemplary embodiment of a method for generating the pulse pattern signal 36 or 37 already shown in FIG. 1 as a function of the master sync signal 30.
  • the master sync signal 30 has a pulse repetition period 33, in particular period duration, which in this exemplary embodiment is 400 microseconds and eight generating pulse pattern periods of the pulse pattern clock corresponds.
  • the master sync signal 30 is converted by means of a comparator and sampled at a clock frequency which corresponds to the slave clock 34.
  • the slave clock 34 is generated by the timer 25 for this purpose.
  • the comparator is designed to detect a pulse, in particular a steep edge of a pulse of the master sync signal, and to generate an output signal which represents the pulse, in particular pulse start.
  • a data record is generated in particular as a function of the output signal of the comparator, which represents the number of clock pulses or clock oscillations of the slave clock signal 34, which the
  • the slave clock frequency is, for example, 38.65 megahertz.
  • a period duration of a pulse pattern period is calculated.
  • the number of pulse pattern periods can either be predetermined be, for example, stored in a memory of the slave unit, or as already shown in Figure 1, from the master unit as
  • Period signal the number of pulse pattern periods to be generated based on a temporal pulse interval or a pulse period of the
  • a pulse pattern period duration data set corresponding to the division result generated in step 43 is generated from the division result generated in step 43.
  • a remainder of the remainder is determined, and in a step 45 a remainder data set representing the integer remainder of the remainder is generated.
  • a pulse pattern period is generated and the
  • Pulse pattern periodic data record 42 loaded and the remaining data set loaded.
  • a further step 47 for example by means of a discriminator of the slave unit, which is contained for example by the processing unit 21-the number of clocks of the residual data set is detected. If the number of clocks of the remaining data set is more than zero, then in a further step 48 the number of clocks of the remaining data set is reduced by an integer value and in a further step 49 a pulse pattern period with a period duration is generated which corresponds to the number of clocks of the clock cycle Pulse pattern period duration data set and additionally a periodic clock of the slave clock, generated by the timer of the slave unit corresponds.
  • step 47 If, in step 47, the value of the remaining interval is equal to zero, then in a step 51 a pulse pattern period with the period duration of
  • a further step 52 it is discriminated whether the number of pulse pattern periods to be generated already corresponds to the time pulse interval 33 or period duration represented by the master sync signal 30.
  • the number of pulse pattern periods to be generated is eight
  • Pulse pattern periods during the pulse spacing 33 If not, the process returns to step 47. If so, that sets The method continues with step 46 in which a new pulse pattern period data record and a new residual data set may be loaded.
  • FIG. 3 shows an exemplary embodiment of a clock signal which represents the pulse pattern periods generated during the pulse repetition time 33 of the master sync signal 30.
  • a clock signal which represents the pulse pattern periods generated during the pulse repetition time 33 of the master sync signal 30.
  • Pulse pattern periods pulse pattern half periods are generated.
  • the clock signal 65 includes time
  • successive pulse pattern periods 53 and 54 are each corresponding to the Divisonsrestitz - in this example four slave clock pulses - a clock pulse of the slave clock signal longer than the half periods of the subsequent pulse pattern periods 55, 56, 57, 58, 59 and 60, which in the 2 have been produced in step 51 and their
  • Period duration corresponds to the pulse pattern period duration data set.
  • Periods 54 are each extended by one slave clock pulse, as compared to the half periods of the subsequent pulse pattern periods 55, 56, 57, 58, 59 and 60.
  • a period of the master sync signal corresponding to eight PWM periods to be generated by the slave units For example, at a period of the master sync signal corresponding to eight PWM periods to be generated by the slave units, a
  • FIG. 4 shows an exemplary embodiment in which the clocks of the residual data set-unlike in FIG. 3 -are displayed uniformly over the generated pulse pattern.
  • the pulse pattern signal 78 illustrated in FIG. 4 comprises eight pulse pattern periods, which follow each other in time.
  • a pulse pattern period 66 has a pulse pattern half-period extended by one clock period of the slave clock signal 74 on.
  • a pulse pattern period 67 immediately following the pulse pattern period 66 is not extended and thus has the period of the pulse duration
  • the pulse pattern period 67 is followed by a pulse pattern period 68 whose period 75 of the first half period is extended by one clock of the slave clock signal.
  • the pulse pattern period 68 is followed by a non-extended pulse pattern period 69 followed by a prolonged one
  • the rotor 3 shown in Figure 1 can thereby deliver a torque with a low torque ripple.
  • FIG. 5 shows a control unit for an electrical machine.
  • the control unit comprises a master unit 80 and a plurality of slave units, which are connected to the master unit 80 via a data bus 85.
  • a slave unit 81 for a U phase of a three-phase machine is connected to the input side via an input 86, for example a MOSI input (master output slave input) for the master PWM command signal to the master unit 80 and can from the master unit the master PWM
  • the slave unit 82 is connected on the output side via an output 89, for example MISO output, to a further slave unit 83 for a W phase, and there to an input 90, for example a MOSI input.
  • the slave unit 83 is connected via an output 91, for example MISO output, to a further slave unit 84 for a further phase, where it is connected to an input 92, for example a MOSI input.
  • control unit may also have further slave units, of which a slave unit 84 is shown by way of example.
  • An output 91 of the slave unit 83 for example a MISO output, is connected to a further slave unit 84 for one phase of a submachine, and there to an input 92, for example a MOSI input.
  • a control unit for a machine with submachines may have a slave unit for each phase of the submachine. This can be given a high reliability of the machine.
  • the master unit 80 has an output 93 for the master sync signal 30.
  • the slave units 81, 82, 83 and 84 are each connected on the input side by means of a common connection line 94 to the output 93 and can receive from there the master sync signal.
  • the connection line 94 may be part of the data bus 85, so that the slave units can receive the master sync signal via the data bus 85.
  • Master unit 80 is guided to the slave units.
  • the master unit 80 is configured to send the master PWM default signal via a slave select output 95 and a connecting line 96 to the slave units.
  • the slave units can each transmit the master PWM command signal via the
  • the master unit 80 is configured, for example, to transmit the master PWM command signal modulated via a slave select connection line.
  • the master unit can do this with a modulator and the slave units each comprise a demodulator for the master P WM command signal.
  • the master PWM command signal may be sent after a slave select signal is sent by the master unit.
  • the corresponding slave unit driven by the slave select signal can then receive the master PWM default signal.
  • Connection line 96 for transmitting the slave select signal can
  • the master unit is formed, the slave select signal and the master PWM command signal are different from each other
  • Frequency bands to send which facilitates a signal separation of the slave select signal and the master PWM command signal by the slave units.
  • connection lines to the cascaded connection between the slave units thus omitted between MISO outputs and MOSI inputs.
  • PWM signals generated by the slave units in particular a PWM signal 101 generated by the slave unit 81, a PWM signal 102 generated by the slave unit 82, a PWM generated by the slave unit 83 Signal 103 and a PWM signal 104 generated by the other slave unit 84.
  • the PWM signals each generated from mutually different slave units each comprise a PWM period with one
  • Pulse pattern period 105 The pulse pattern period can be represented by the already mentioned pulse pattern period duration data set.
  • the PWM signals are respectively generated in synchronism with each other by the slave units at the start time 98 according to the master sync signal 30 and end together at time 99 on the basis of the same period duration 105.
  • the start at the start time 98 and the end at time 99, respectively on a time axis 97 are thus - in particular within an accuracy of the slave system - independent of one

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Inverter Devices (AREA)
  • Control Of Motors That Do Not Use Commutators (AREA)
PCT/EP2017/078029 2016-12-28 2017-11-02 Elektrische maschine mit synchroner pulsmustererzeugung WO2018121906A1 (de)

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CN114422070B (zh) * 2022-01-25 2023-02-14 南京安科医疗科技有限公司 一种ct机定子和转子时间同步方法、ct机和存储介质

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