WO2018121351A1 - 接口卡状态检测方法、接口卡及线卡 - Google Patents

接口卡状态检测方法、接口卡及线卡 Download PDF

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Publication number
WO2018121351A1
WO2018121351A1 PCT/CN2017/117216 CN2017117216W WO2018121351A1 WO 2018121351 A1 WO2018121351 A1 WO 2018121351A1 CN 2017117216 W CN2017117216 W CN 2017117216W WO 2018121351 A1 WO2018121351 A1 WO 2018121351A1
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WIPO (PCT)
Prior art keywords
interface card
card
signal
clock signal
service
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PCT/CN2017/117216
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English (en)
French (fr)
Inventor
付晓炜
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中兴通讯股份有限公司
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Publication of WO2018121351A1 publication Critical patent/WO2018121351A1/zh

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/3051—Monitoring arrangements for monitoring the configuration of the computing system or of the computing system component, e.g. monitoring the presence of processing resources, peripherals, I/O links, software programs
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/3003—Monitoring arrangements specially adapted to the computing system or computing system component being monitored
    • G06F11/3031—Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system component is a motherboard or an expansion card
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/3055—Monitoring arrangements for monitoring the status of the computing system or of the computing system component, e.g. monitoring if the computing system is on, off, available, not available
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G06F13/4081—Live connection to bus, e.g. hot-plugging
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/409—Mechanical coupling

Definitions

  • Embodiments of the present invention relate to, but are not limited to, the field of data network communication, in particular, an interface card state detection method, an interface card, and a line card.
  • the line card unit is usually implemented by means of a motherboard and an interface card.
  • Motherboards and interface cards are typically mechanically and electrically connected by connectors.
  • a mated board should support hot plugging.
  • the in-position detection of the interface card is particularly important.
  • the general method used for in-position detection is to define one or more pins as physical in-position signals on the connector.
  • this signal is defined by a certain level (for example, high level) and is defined as the opposite level (for example, low level) on the side of the interface card.
  • the line card detects that the in-position signal is pulled low and considers that the interface card is inserted. Conversely, if the line card detects that the in-position signal has returned to a high level, the interface card is considered to be unplugged. In this way, the detection method can ensure the accurate detection and the in-position and insertion and removal of the interface card.
  • the in-situ signal function is relatively simple. Most interface cards are not simple interface signals directly connected, but need to complete complex conversion, packet parsing, construction and so on. Need to load various service versions or configure services. The interface card only has no effect in physical location. The service configuration must be completed to achieve normal functions.
  • Whether the interface card service is normal or not is usually determined by software query or manual judgment. There is a lack of effective means of obtaining some basic work on the interface card. It is often passive to know that the interface card has failed after the service is interrupted.
  • the embodiment of the invention provides an interface card state detection method, an interface card and a line card.
  • an interface card state detection method includes: the line card determines a state of the interface card according to a signal type of the received interface card, where The status of the interface card includes service in place, physical in place, and physical absence.
  • determining, by the line card, the state of the interface card according to the received signal type of the interface card includes: determining, by the line card, whether the signal of the received interface card is a clock signal; determining the received interface card In the case of a clock signal, the line card determines the status of the interface card as a service in place.
  • the interface card state detecting method further includes: in a case of determining that the signal of the received interface card is not a clock signal, the line card determines that the state of the interface card is physically in-position or physically absent.
  • the line card determines that the status of the interface card is physically in-position or physically absent: the line card determines the interface card if the received signal of the interface card is high The state is physically absent; in the case that the received signal of the interface card is low, the line card determines that the state of the interface card is physically in place.
  • the method further includes: determining, by the line card, whether the frequency of the clock signal is a first frequency value; determining the clock signal When the frequency is the first frequency value, the line card determines that the service state of the interface card is normal.
  • the method further includes: determining that the frequency of the clock signal is not the first frequency value, the line card determining the service abnormality type according to the correspondence between the preset service abnormality type and the frequency of the clock signal. .
  • the method further includes: determining, by the line card, whether the frequency of the clock signal is a second frequency value; determining the clock signal In the case where the frequency is the second frequency value, the line card determines that the interface card service loading is completed.
  • the method further includes: determining that the frequency of the clock signal is not the second frequency value, the line card determining the service loading phase according to the correspondence between the preset service loading phase and the frequency of the clock signal. .
  • the method before the line card determines whether the received interface card signal is a clock signal, the method further includes: the line card receiving a signal of the interface card; the line card pair receiving the interface card The signal is filtered.
  • the line card performing signal filtering on the received interface card signal includes: determining, by the line card, whether the interface card is at a high level or a low level is less than a second time threshold; When the interface card level is high or the level is low, the time is lower than the second time threshold, the line card determines that the signal has a glitch and performs signal filtering on the signal of the interface card.
  • the embodiment of the invention further provides a computer readable storage medium storing computer executable instructions, which are implemented when the computer executable instructions are executed.
  • a method for detecting an interface card state includes: an interface card generating a different type of signal as an interface card signal; the interface card transmitting the interface card signal to a line card, the interface card signal being used for the The line card determines the status of the interface card, which includes service in place, physical in place, and physical absence.
  • the interface card generating different types of signals as the interface card signal includes: when the interface card starts loading the service, the interface card generates a clock signal as an interface card signal; the interface card sends the line card to the line card
  • the interface card signal includes: the interface card sends the clock signal to the line card, wherein the clock signal is used by the line card to determine that the status of the interface card is a service in position.
  • the method further includes: when the interface card service is in place and the state is normal, the interface card sends a first clock signal having a frequency of a first frequency value to the line card, where the first clock signal is used
  • the line card determines the state of the interface card; when the interface card service is in place and the state is abnormal, the interface card sends a third clock signal having a frequency of a third frequency value to the line card, wherein the frequency of the third clock signal is based on The correspondence between the preset service abnormality type and the frequency of the clock signal is determined, and the third clock signal is used by the line card to determine a service abnormal type of the interface card.
  • the method further includes: when the interface card service is in place and loading is completed, the interface card sends a second clock signal having a frequency of a second frequency value to the line card, wherein the second clock signal is used for The line card determines the state of the interface card; when the interface card service is in place and is loading, the interface card sends a fourth clock signal having a frequency of a fourth frequency value to the line card, where the frequency of the fourth clock signal And determining, according to a preset correspondence between the service loading phase and the frequency of the clock signal, the clock signal is used by the line card to determine a service loading phase of the interface card.
  • the method before the interface card generates the clock signal as the interface card signal, the method further includes: the interface card is powered on; and after the power-on is completed, the interface card performs service loading.
  • the embodiment of the invention further provides a computer readable storage medium storing computer executable instructions, which are implemented when the computer executable instructions are executed.
  • a line card comprising: a pull-up resistor connected to a power source; and an Erasable Programmable Logic Device (EPLD), the line
  • EPLD Erasable Programmable Logic Device
  • the card EPLD is connected to the pull-up resistor and is configured to determine the state of the interface card according to the received signal type of the interface card, wherein the state of the interface card includes a service in-position, a physical in-position, and a physical absence.
  • an interface card comprising: a pull-down resistor, the pull-down resistor is grounded; an erasable editable logic device EPLD is connected, the interface card EPLD is connected to the pull-down resistor, and is configured to generate different types of signals
  • the interface card signal is sent to the line card, and the interface card signal is used by the line card to determine the status of the interface card, where the status includes a service in place, a physical in place, and a physical absence.
  • the interface card EPLD is further configured to: generate a clock signal as an interface card signal, and send the clock signal to the line card, where the interface card starts loading service, wherein the clock signal
  • the line card is used to determine that the status of the interface card is a service in place.
  • the interface card EPLD further includes a flag register configured to switch the frequency of the clock signal in accordance with the flag.
  • the technical solution that the line card service is in place is determined by the signal sent by the line card through the received interface card, and the state of the interface card is accurately and timely grasped.
  • FIG. 1 is a first flowchart of a method for detecting an interface card state according to an embodiment of the present invention
  • FIG. 2 is a schematic structural diagram of an interface card state detecting circuit
  • FIG. 3 is a second flowchart of a method for detecting an interface card state according to an embodiment of the present invention.
  • FIG. 4 is a schematic structural diagram of an interface card state detecting circuit according to an embodiment of the present invention.
  • FIG. 5 is a structural block diagram of an interface card according to an embodiment of the present invention.
  • FIG. 6 is a block diagram showing the structure of an interface card state detecting circuit according to an embodiment of the present invention.
  • FIG. 7 is a third flowchart of a method for monitoring interface card status according to an embodiment of the present invention.
  • an interface card state detecting method an interface card, and a line card are provided.
  • the method for detecting the status of the interface card is as shown in FIG. 1 , and includes step S101 : the line card is determined according to the signal type of the received interface card.
  • the state of the interface card wherein the state of the interface card includes a service in place, a physical in place, and a physical absence.
  • the physical in-position refers to that the signal pin on the interface card and the corresponding pin on the line card are reliably connected after the interface card is inserted into the line card.
  • the physical absence means that the line card and the interface card are not mechanically connected or connected, and the signal pins on the interface card do not form a reliable connection with the signal pins on the line card. Physical in place is the basis for the normal operation of the interface card, and is a necessary and insufficient condition for the service to be in place.
  • the service in-position refers to that the interface card service can be loaded.
  • the loaded service includes but is not limited to loading an FPGA (Field-Programmable Gate Array) version, configuring a clock chip, and configuring a PHY (Physical Layer). Chips, etc.
  • the line card can more accurately detect the in-position state of the interface card without increasing the signal definition and the device. Identify some common exception states and some special exception states that were previously unrecognizable. On the other hand, since there is no complicated protocol analysis, the judgment time of the bit signal in this embodiment is faster than that of other in-position signal detection schemes.
  • the above signal type includes a clock signal and a level signal
  • the level signal includes a high level signal and a low level signal.
  • the interface card can send a clock signal to the line card, and the clock signal is used to indicate that the interface card is in a state where the service is in place.
  • the level signal sent by the interface card is received, it is determined that the interface card service is not in place.
  • whether the state of the interface card is physically in-position or physically absent is determined according to whether the level signal is a high level signal or a low level signal.
  • the embodiment of the invention further provides a computer readable storage medium storing computer executable instructions, which are implemented when the computer executable instructions are executed.
  • the line card when the interface card is not physically located, the line card receives a high level signal; when the interface card is grounded, the line card is grounded through the interface card, and a low level is detected. .
  • the line card receives a low level signal when the interface card is physically absent, and the line card receives a high level signal when the interface card is physically in place. .
  • the above line card can determine the state of the service in place or the different stages of service loading according to the frequency of the clock signal.
  • a feasible implementation manner is: after the line card determines that the state of the interface card is the service being in position, the line card receives the clock frequency, and the line card determines whether the frequency of the clock signal is the first frequency value; When the frequency of the clock signal is the first frequency value, the line card determines that the service state of the interface card is normal; and determines that the service state of the interface card is abnormal after determining that the frequency of the clock signal is not the first frequency value.
  • the line card always detects the signal sent by the interface card.
  • the in-position signal detecting unit detects that the state of the signal reported by the interface card changes, the upper layer software reports in time.
  • the upper-layer software When the interface card is detected to be in the in-position state, the upper-layer software reports the physical status of the interface card, and notifies the upper-layer software to power on the interface card and load the service.
  • the software interface card When it is detected that the interface card changes from the physical in-position state to the service in-position state, the software interface card is notified to start the service online. When it is detected that the interface card becomes a specific service in-position state, the software interface card is notified that the service is successfully online.
  • the software interface card service When it is detected that the interface card changes from the service in-position state to the physical in-position state, the software interface card service is notified to be interrupted, and the software protects in time.
  • the software interface card service When it is detected that the interface card changes from the normal service in-position state to the abnormal service in-position state, the software interface card service is notified to be abnormal, and the software protects in time.
  • the software interface card is notified to be offline when it is detected that the interface card changes from the in-service state to the in-position state.
  • the software interface card is notified to be offline when it is detected that the interface card has changed from a physical in-position state to an in-position state.
  • the line card determines the service abnormality type according to the correspondence between the preset traffic abnormality type and the frequency of the clock signal.
  • the types of interface card service exceptions include chip over-temperature protection on the interface card, abnormal logic chip loss of the FPGA chip, loss of lock of the clock chip, and abnormal reset of the interface card of the line card.
  • the over-temperature protection of the chip on the above interface card includes self-protection after the chip exceeds the specified operating temperature, for example, automatic restart, and all configuration information will be lost.
  • the above-mentioned FPGA chip logic abnormal loss includes the internal RAM being abnormally emptied under the normal working condition of the FPGA due to the working temperature, power supply, and virtual soldering.
  • the line card described above includes a line card erasable editable logic device (also known as a line card EPLD) that can erase an editable logic device (also known as an interface card EPLD).
  • the above interface card EPLD is provided with a flag register for aggregating all abnormal signals to be detected.
  • the initialization success flag is given by the line card.
  • the FPGA version loading normal flag is given by the FPGA.
  • the clock normal flag is given by the clock chip through the lock signal, and the reset signal is given by the line card.
  • the FPGA and the clock chip are set together with the interface card EPLD on the interface card.
  • the service in-bit signal clock frequency is switched to f0, indicating that the service is completely normal; when the logic of the FPGA chip is abnormally lost, the frequency is switched to f1, indicating that the FPGA is lost; when the clock chip loses lock, the frequency is switched to F2, indicating that the clock normal flag is abnormal; when the line card is abnormally resetting the interface card, the frequency is switched to f3, indicating that the reset signal flag is abnormal, and so on.
  • the in-position signal changes from clock to low level, it indicates that the interface card power supply is abnormally powered down, and the interface card becomes physically in place.
  • Another feasible implementation manner is: after the line card determines that the state of the interface card is a service in position, the line card determines whether the frequency of the clock signal is a second frequency value; determining the frequency of the clock signal is In the case of the second frequency value, the line card determines that the service loading of the interface card is completed; and if it is determined that the frequency of the clock signal is not the second frequency value, the line card determines that the service loading of the interface card is not completed.
  • the line card determines the service loading phase according to the correspondence between the preset service loading phase and the frequency of the clock signal.
  • the above service loading phase includes verifying the local bus Localbus basic function, loading the FPGA logic, initializing the clock chip, and issuing the port configuration.
  • the line card described above includes a line card erasable editable logic device (also known as a line card EPLD) that can erase an editable logic device (also known as an interface card EPLD).
  • a line card erasable editable logic device also known as a line card EPLD
  • an editable logic device also known as an interface card EPLD
  • the above interface card EPLD is provided with a flag register to aggregate all detectable service loading phases.
  • the line card EPLD switches the frequency of the bit signal by judging the flag.
  • the interface card is in a physically in-position state, and the line card detects a fixed low level.
  • the signal clock frequency is f01; when the FPGA logic is loaded, the frequency is f02; when the clock chip is initialized, the frequency is f03; when the port is configured, the frequency is f04, and so on.
  • the software writes an initialization success flag to the interface card EPLD, and the frequency of the signal is switched to the normal frequency of the service, that is, f0.
  • the line card before the line card determines whether the received interface card signal is a clock signal, the line card performs signal filtering on the signal received by the line card to filter abnormal jitter of the in-position signal. In an exemplary embodiment, the line card determines whether the interface card level is high or the level is low is less than the second time threshold; when the interface card level is determined to be high or the level is low, the time is less than In the case of a two-time threshold, the line card determines that the signal has a glitch and filters the signal of the interface card to filter out the glitch to avoid affecting the judgment of the frequency of the clock signal.
  • FIG. 3 is a second flowchart of a method for detecting an interface card state according to an embodiment of the present invention. As shown in FIG. 3, the process includes the following steps:
  • Step S202 the interface card generates different types of signals as interface card signals
  • Step S204 The interface card sends the interface card signal to the line card, where the interface card signal is used by the line card to determine the status of the interface card, where the status includes a service in-position, a physical in-position, and a physical absence.
  • the interface card sends a clock signal to the line card for the line card to determine that the status of the interface card is service online.
  • the interface card in the case that the interface card starts loading the service, the interface card generates a clock signal as an interface card signal; the interface card sends the clock signal to the line card, wherein the clock signal is used for the line card The card determines that the status of the interface card is the service in place.
  • a feasible implementation manner is that, when the interface card service is in place and the state is normal, the interface card sends a first clock signal with a frequency of a first frequency value to the line card, where the first clock signal is used for determining the line card.
  • the correspondence between the type of the abnormality and the frequency of the clock signal is determined, and the third clock signal is used by the line card to determine the type of service abnormality of the interface card.
  • Another possible implementation manner is that, when the interface card service is in place and the loading is completed, the interface card sends a second clock signal with a frequency of the second frequency value to the line card, where the second clock signal is used for the line card. Determining the state of the interface card; when the interface card service is in place and in the loading state, the interface card sends a fourth clock signal with a frequency of the fourth frequency value to the line card, wherein the frequency of the fourth clock signal is preset according to the preset The correspondence between the service loading phase and the frequency of the clock signal is determined, and the clock signal is used by the line card to determine a service loading phase of the interface card.
  • the interface card before the interface card generates a clock signal as the interface card signal, the interface card is powered on; after the power-on is completed, the interface card performs service loading. During the power-on phase, the interface card is physically in place. When the service starts loading and the service is loaded, the interface card is in service.
  • the embodiment of the present invention further provides a computer readable storage medium storing computer executable instructions, and when the computer executable instructions are executed, the interface card state detecting method shown in FIG. 3 is implemented.
  • the signal detecting circuit includes a line card and an interface card, and the line card includes:
  • Pull-up resistor 32 the pull-up resistor is connected to the power source
  • the line card erasable editable logic device EPLD34 is connected to the pull-up resistor 32, and is configured to determine the state of the interface card according to the received signal type of the interface card, wherein the status of the interface card includes a service In place, physical in place, and physical are not in place.
  • the line card detects the in-position signal through the line card EPLD32.
  • the in-position signal is high.
  • the bit signal is directly grounded and becomes low.
  • the line card EPLD32 thus determines the presence of the interface card.
  • the interface card includes:
  • Pull-down resistor 36 the pull-down resistor is grounded
  • the interface card can erase the editable logic device EPLD38, and the interface card EPLD38 is connected to the pull-down resistor 36, and is configured to generate different types of signals as interface card signals; and send the interface card signals to the line card, the interface card signals are used for
  • the line card determines the status of the interface card, which includes service in place, physical in place, and physical absence.
  • the original interface card signal is connected to the interface card EPLD38.
  • the interface card EPLD 38 controls the in-position signal in accordance with various judgment conditions.
  • the in-position signal line is output by the logic device, that is, the interface card EPLD38, and is kept low during the period from the insertion of the board to the start of initialization. From initialization, the output of the logic device becomes a clock signal, and its frequency changes accordingly during different operating phases. After the initialization is completed, the initialization flag is set by the software, and the output of the logic device remains as a clock signal, and the frequency is a fixed value.
  • the interface card EPLD 38 is further configured to generate a clock signal as an interface card signal and transmit the clock signal to the line card, where the interface card starts loading the service, wherein the clock signal
  • the line card is used to determine that the status of the interface card is a service in place.
  • FIG. 5 is a structural block diagram of an interface card according to an embodiment of the present invention. As shown in FIG. 5, the interface card EPLD38 further includes:
  • the flag register 42 is arranged to switch the frequency of the clock signal in accordance with the flag.
  • FIG. 6 is a block diagram showing the structure of an interface card state detecting circuit according to an embodiment of the present invention. As shown in FIG. 6, the connector includes an interface card 52 and a matching line card 54.
  • the interface card includes a signal generating unit 522 configured to generate an interface card service in-position signal.
  • the line card includes a signal detecting unit 524 that receives a signal transmitted by the interface card and determines the state of the interface card based on the signal.
  • the status of the interface card includes physical in-position, physical out-of-position, and service in-position.
  • the signal generating unit After the interface card is inserted into the line card, the signal generating unit first sends a physical in-position signal. After detecting that the interface card is physically in place, the signal detecting unit on the line card notifies the upper-layer software to power on the interface card and delivers the service configuration version. . From the time the software loads the service version, the signal generation unit sends a service in-position signal, and the interface card signal changes correspondingly when the service is loaded to a different stage or when the service generates an abnormality.
  • the in-position signal detecting unit located on the line card always detects the signal transmitted by the signal generating unit on the interface card. When the in-position signal detecting unit detects that the state of the signal reported by the interface card changes, the upper layer software reports in time.
  • FIG. 7 is a third flowchart of a method for detecting an interface card state according to an embodiment of the present invention. As shown in FIG. 7, the process includes the following steps:
  • Step S602 after the line card detects that the interface card is physically in place, the line card is powered on. During the power-up of the EPLD, its output pin remains in a high-impedance state and does not affect the level of the in-position signal. The EPLD outputs a low level after power-on, and still does not affect the level of the in-position signal.
  • Step S604 after the power-on is completed, the upper layer software performs an initialization operation on the interface card, that is, loads the service, and the interface card outputs a service in-position signal.
  • the software writes the start initialization flag to the register in the interface card EPLD.
  • the interface card EPLD switches the function of the bit signal, and outputs a low level signal to a clock signal that outputs a certain frequency. This clock signal is the service in-position signal.
  • Step S606 after the initialization operation is completed, the software writes an initialization success flag to the register in the interface card EPLD, and the interface card signal is switched to a clock signal of another frequency, indicating that the service is loaded.
  • the traffic in-position signal can be subdivided as needed. Use different clock frequencies to indicate specific business anomalies; different frequencies can also be used to indicate the progress of business loading. This function can be implemented by setting the corresponding register flag in the interface card EPLD.
  • the interface card can actively or passively adjust the service in-position signal to notify the line card interface card that the service is abnormal or the service is offline. If any of the detectable conditions of the interface card service is abnormal, such as FPGA logic loss, line card reset interface card, clock chip operation abnormal, etc., the interface card immediately adjusts the clock frequency of the service in-position signal. If an undetectable abnormality occurs, such as an abnormal power failure of the interface card or an instantaneous drop of the power supply of the interface card, the interface card EPLD is restored to the initial state due to power failure, and the clock signal cannot be transmitted. This is a passive shutdown service in-position signal. The interface card signal becomes a low level output. The line card side judges that the interface card is abnormally reported to the system after the service is in place or the service is in place but the service is in the abnormal state, that is, after the service is offline or the service is abnormal.
  • the embodiment of the present invention further provides a computer readable storage medium storing computer executable instructions, and when the computer executable instructions are executed, implementing the interface card state detecting method shown in FIG.
  • modules or steps of the present invention described above can be implemented by a general-purpose computing device that can be centralized on a single computing device or distributed across a network of multiple computing devices. Alternatively, they may be implemented by program code executable by the computing device such that they may be stored in the storage device by the computing device and, in some cases, may be different from the order herein.
  • the steps shown or described are performed, or they are separately fabricated into individual integrated circuit modules, or a plurality of modules or steps thereof are fabricated as a single integrated circuit module.
  • the invention is not limited to any specific combination of hardware and software.
  • computer storage medium includes volatile and nonvolatile, implemented in any method or technology for storing information, such as computer readable instructions, data structures, program modules or other data. Sex, removable and non-removable media.
  • Computer storage media include, but are not limited to, Random Access Memory (RAM), Read-Only Memory (ROM), and Electrically Erasable Programmable Read-only Memory (EEPROM). Flash memory or other memory technology, compact disc read-only memory (CD-ROM), digital versatile disc (DVD) or other optical disc storage, magnetic cassette, magnetic tape, disk storage or other magnetic storage device, or Any other medium used to store the desired information and that can be accessed by the computer.
  • communication media typically includes computer readable instructions, data structures, program modules, or other data in a modulated data signal, such as a carrier wave or other transport mechanism, and can include any information delivery media. .
  • the embodiment of the present invention provides an interface card state detection method, an interface card, and a line card. According to the embodiment of the present invention, the interface card state can be accurately and timely grasped.

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Abstract

接口卡状态检测方法、接口卡及线卡，其中该接口卡状态检测方法包括：线卡根据接收到的接口卡的信号类型确定该接口卡的状态，其中，该接口卡的状态包括业务在位、物理在位和物理不在位。

Description

接口卡状态检测方法、接口卡及线卡 技术领域
本发明实施例涉及但不限于数据网络通信领域，尤其是接口卡状态检测方法、接口卡及线卡。
背景技术
在通信设备机框中，线卡单元通常采用母板和接口卡的方式来实现。母板和接口卡通常以连接器进行机械和电气连接。通常此类配合的板卡应支持热插拔功能。在热插拔过程中，接口卡的在位检测就显得尤为重要。
发明内容
以下是对本文详细描述的主题的概述。本概述并非是为了限制权利要求的保护范围。
在位检测一般使用的方法是在连接器上定义某个或某几个针脚为物理在位信号。在线卡一侧该信号默认定义为某个电平(例如高电平)，在接口卡一侧定义为相反的电平(例如低电平)。当接口卡插入后，线卡一侧检测到在位信号被拉低后，认为接口卡插入。相反，如果线卡检测到在位信号恢复为高电平，则认为接口卡拔出。这种检测方法在一般情况下可以保证准确无误的检测接口卡的在位和插拔情况。但在位信号功能较为单一。绝大多数的接口卡都不是简单的接口信号直连，而是需要完成复杂的转换、包的解析、构建等工作。需要加载各种业务版本或者进行业务配置。接口卡仅仅物理在位是没有任何作用的，必须完成业务配置才能实现正常的功能。
对于接口卡业务是否正常的判断通常采用软件查询或者人工判断等方法。对接口卡一些基础的工作情况缺乏一些有效的获取手段。往往是在业务中断后才被动的获知接口卡发生了故障。
针对无法及时掌握接口卡工作状态的问题，还未提出有效的解决方案。
本发明实施例提供了接口卡状态检测方法、接口卡及线卡。
根据本发明的一个方面，提供一种接口卡状态检测方法、接口卡及线卡，该接口卡状态检测方法包括：线卡根据接收到的接口卡的信号类型确定该接口卡的状态，其中，该接口卡的状态包括业务在位、物理在位和物理不在位。
在示例性实施方式中，该线卡根据接收到的接口卡的信号类型确定该接口卡的状态包括：该线卡判断接收到的接口卡的信号是否为时钟信号；在判断接收到的接口卡的信号是时钟信号的情况下，该线卡确定该接口卡的状态为业务在位。
在示例性实施方式中，该接口卡状态检测方法还包括：在判断接收到的接口卡的信号不是时钟信号的情况下，该线卡确定该接口卡的状态为物理在位或物理不在位。
在示例性实施方式中，该线卡确定该接口卡的状态为物理在位或物理不在位包括：在接收到的该接口卡的信号为高电平的情况下，该线卡确定该接口卡的状态为物理不在位；在接收到的该接口卡的信号为低电平的情况下，该线卡确定该接口卡的状态为物理在位。
在示例性实施方式中，在该线卡确定该接口卡的状态为业务在位之后，该方法还包括：该线卡判断该时钟信号的频率是否为第一频率值；在判断该时钟信号的频率是第一频率值的情况下，该线卡确定该接口卡的业务状态正常。
在示例性实施方式中，该方法还包括：在判断该时钟信号的频率不是第一频率值的情况下，该线卡根据预设的业务异常类型与时钟信号的频率的对应关系确定业务异常类型。
在示例性实施方式中，在该线卡确定该接口卡的状态为业务在位之后，该方法还包括：该线卡判断该时钟信号的频率是否为第二频率值；在判断该时钟信号的频率是第二频率值的情况下，该线卡确定该接口卡业务加载完成。
在示例性实施方式中，该方法还包括：在判断该时钟信号的频率不是第二频率值的情况下，该线卡根据预设的业务加载阶段与时钟信号的频率的对应关系确定业务加载阶段。
在示例性实施方式中，在该线卡判断接收到的接口卡信号是否为时钟信 号之前，该方法还包括：该线卡接收到该接口卡的信号；该线卡对接收到的该接口卡的信号进行信号过滤。
在示例性实施方式中，该线卡对接收到的该接口卡信号进行信号过滤包括：该线卡判断该接口卡电平为高位或电平为低位的时间是否小于第二时间阈值；在判断该接口卡电平为高位或电平为低位的时间小于第二时间阈值的情况下，该线卡确定该信号存在毛刺并对该接口卡的信号进行信号过滤。
本发明实施例还提供了一种计算机可读存储介质，存储有计算机可执行指令，所述计算机可执行指令被执行时实现上述接口卡状态检测方法。
根据本发明的另一方面，提供一种接口卡状态检测方法，包括：接口卡产生不同类型的信号作为接口卡信号；该接口卡向线卡发送该接口卡信号，该接口卡信号用于该线卡确定该接口卡的状态，该状态包括业务在位、物理在位和物理不在位。
在示例性实施方式中，该接口卡产生不同类型的信号作为接口卡信号包括：在接口卡开始加载业务的情况下，该接口卡产生时钟信号作为接口卡信号；该接口卡向线卡发送该接口卡信号包括：该接口卡将该时钟信号发送给该线卡，其中，该时钟信号用于该线卡确定该接口卡的状态为业务在位。
在示例性实施方式中，该方法还包括：在接口卡业务在位且状态正常，该接口卡向该线卡发送频率为第一频率值的第一时钟信号，其中该第一时钟信号用于该线卡确定该接口卡的状态；在接口卡业务在位且状态异常，该接口卡向该线卡发送频率为第三频率值的第三时钟信号，其中，该第三时钟信号的频率根据预设的业务异常类型与时钟信号的频率的对应关系确定，该第三时钟信号用于该线卡确定该接口卡的业务异常类型。
在示例性实施方式中，该方法还包括：在接口卡业务在位且加载完成，该接口卡向该线卡发送频率为第二频率值的第二时钟信号，其中该第二时钟信号用于该线卡确定该接口卡的状态；在接口卡业务在位且处于加载中，该接口卡向该线卡发送频率为第四频率值的第四时钟信号，其中，该第四时钟信号的频率根据预设的业务加载阶段与时钟信号的频率的对应关系确定，该时钟信号用于该线卡确定该接口卡的业务加载阶段。
在示例性实施方式中，在该接口卡产生时钟信号作为接口卡信号之前， 该方法还包括：该接口卡进行上电；在上电完成后，该接口卡进行业务加载。
本发明实施例还提供了一种计算机可读存储介质，存储有计算机可执行指令，所述计算机可执行指令被执行时实现上述接口卡状态检测方法。
根据本发明的另一方面，提供一种线卡，包括：上拉电阻，该上拉电阻与电源连接；线卡可擦除可编辑逻辑器件(Erasable Programmable Logic Device，简称为EPLD)，该线卡EPLD与该上拉电阻连接，设置成根据接收到的接口卡的信号类型确定该接口卡的状态，其中，该接口卡的状态包括业务在位、物理在位和物理不在位。
根据本发明的另一方面，提供一种接口卡，包括：下拉电阻，该下拉电阻接地；可擦除可编辑逻辑器件EPLD，该接口卡EPLD与该下拉电阻连接，设置成产生不同类型的信号作为接口卡信号；并向线卡发送该接口卡信号，该接口卡信号用于该线卡确定该接口卡的状态，该状态包括业务在位、物理在位和物理不在位。
在示例性实施方式中，该接口卡EPLD还设置成：在该接口卡开始加载业务的情况下，产生时钟信号作为接口卡信号，并将该时钟信号发送给该线卡，其中，该时钟信号用于该线卡确定该接口卡的状态为业务在位。
在示例性实施方式中，该接口卡EPLD还包括标志寄存器，设置成根据标志切换时钟信号的频率。
通过本发明的实施例，采用线卡通过接收到的接口卡发来的信号确定接口卡业务在位的技术方案，及时准确掌握接口卡状态。
在阅读并理解了附图和详细描述后，可以明白其他方面。
附图概述
图1是根据本发明实施例的接口卡状态检测方法的流程图一；
图2是接口卡状态检测电路的结构示意图；
图3是根据本发明实施例的接口卡状态检测方法的流程图二；
图4是根据本发明实施例接口卡状态检测电路的结构示意图；
图5是根据本发明实施例的接口卡的结构框图；
图6是根据本发明实施例接口卡状态检测电路的结构框图；
图7是根据本发明实施例接口卡状态监测方法的流程图三。
本发明的实施方式
下文中将参考附图并结合实施例来详细说明本发明。
在本发明实施例中提供了一种接口卡状态检测方法、接口卡及线卡，该接口卡状态检测方法如图1所示，包括步骤S101：线卡根据接收到的接口卡的信号类型确定该接口卡的状态，其中，该接口卡的状态包括业务在位、物理在位和物理不在位。
本发明实施例中物理在位是指接口卡插到线卡上后，该接口卡上的信号针脚和线卡上对应的针脚可靠连接。物理不在位是指，线卡与接口卡未机械连接或者连接不紧密，该接口卡上的信号针脚与线卡上的信号针脚未形成可靠连接。物理在位是接口卡正常工作的基础，是业务在位的必要非充分条件。业务在位是指接口卡业务能够实现加载，该加载的业务包括但不限于加载FPGA(Field－Programmable Gate Array，现场可编程门阵列)版本、配置时钟芯片、配置PHY(Physical Layer，物理层)芯片等。
通过上述步骤，在不增加信号定义以及器件的前提下，使得线卡能够更准确的检测接口卡的在位状态。识别一些普通异常状态以及一些原来无法识别的特殊异常状态。另一方面，由于没有复杂的协议解析，相对其他的在位信号检测方案，本实施例在位信号的判断时间更为快速。
在示例性实施方式中，上述信号类型包括时钟信号和电平信号，上述电平信号包括高电平信号和低电平信号。接口卡可以向线卡发送时钟信号，该时钟信号用来表示该接口卡处于业务在位的状态。在接收到接口卡发送来的电平信号的情况下，确定该接口卡业务不在位。在示例性实施方式中，根据上述电平信号为高电平信号还是低电平信号来判断上述接口卡的状态为物理在位还是物理不在位。
本发明实施例还提供了一种计算机可读存储介质，存储有计算机可执行 指令，所述计算机可执行指令被执行时实现图1所示的接口卡状态检测方法。
根据图2所示的接口卡状态检测电路，当接口卡物理不在位的情况下，线卡接收到高电平信号；当上述接口卡接地后，线卡通过接口卡接地，检测到低电平。本领域普通技术人员应当知道通过改变电路设计，使得当接口卡处于物理不在位时线卡接收到低电平信号，当接口卡处于物理在位时线卡接收到高电平信号也是可以实现的。
值得一提的是，上述线卡可以根据时钟信号频率确定业务在位的状态或业务加载的不同阶段。
一种可行的实施方式为，在该线卡确定该接口卡的状态为业务在位之后，线卡接收到时钟频率，该线卡判断该时钟信号的频率是否为第一频率值；在判断该时钟信号的频率是第一频率值的情况下，该线卡确定该接口卡的业务状态正常；在判断该时钟信号的频率不是第一频率值的情况下确定该接口卡的业务状态不正常。
在示例性实施方式中，线卡始终对接口卡发送的信号进行检测。当在位信号检测单元检测到接口卡上报的信号状态发生变化时，及时向上层软件进行上报。
当检测到接口卡由不在位状态变为物理在位状态时，向上层软件上报接口卡物理在位状态，通知上层软件给接口卡上电并加载业务。
当检测到接口卡由物理在位状态变为业务在位状态时，通知软件接口卡开始业务上线。当检测到接口卡变为特定业务在位状态时，通知软件接口卡已成功业务上线。
当检测到接口卡由业务在位状态变为物理在位状态时，通知软件接口卡业务中断，由软件及时进行保护。当检测到接口卡由正常业务在位状态变为异常业务在位状态时，通知软件接口卡业务异常，由软件及时进行保护。
当检测到接口卡由业务在位状态变为不在位状态时，通知软件接口卡离线。
当检测到接口卡由物理在位状态变为不在位状态时，通知软件接口卡离线。
在示例性实施方式中，在判断时钟信号的频率不是第一频率值的情况下，该线卡根据预设的业务异常类型与时钟信号的频率的对应关系确定业务异常类型。上述接口卡业务异常类型包括接口卡上芯片过温保护、FPGA芯片逻辑异常丢失、时钟芯片失锁；线卡异常复位接口卡等。上述接口卡上芯片过温保护包括芯片超过规定的工作温度后会进行自我保护，例如自动重启，此时所有配置信息都会丢失。上述FPGA芯片逻辑异常丢失包括由于工作温度、电源、虚焊等原因，FPGA在正常工作的情况下，内部RAM被异常清空。
上述线卡包括线卡可擦除可编辑逻辑器件(又称为线卡EPLD)，上述接口卡可擦除可编辑逻辑器件(又称为接口卡EPLD)。上述接口卡EPLD设置有一个标志寄存器，汇聚有所有需检测的异常信号。初始化成功标志由线卡给出，FPGA版本加载正常标志由FPGA给出，时钟正常标志由时钟芯片通过锁定信号给出，复位信号通过线卡给出。其中FPGA和时钟芯片与接口卡EPLD共同设置在接口卡上。
举例而言，初始化成功标志正常时，业务在位信号时钟频率切换为f0，表示业务完全正常；FPGA芯片逻辑异常丢失时，频率切换为f1，表示FPGA丢失；时钟芯片失锁时，频率切换为f2，表示时钟正常标志出现异常；线卡异常复位接口卡时，频率切换为f3，表示复位信号标志出现异常，等等。当在位信号由时钟变成低电平时，则表示出现了接口卡电源异常掉电，该接口卡变为物理在位。
另一种可行的实施方式为，在该线卡确定该接口卡的状态为业务在位之后，该线卡判断该时钟信号的频率是否为第二频率值；在判断该时钟信号的频率是第二频率值的情况下，该线卡确定该接口卡业务加载完成；在判断该时钟信号的频率不是第二频率值的情况下，该线卡确定该接口卡业务加载未完成。
在示例性实施方式中，在判断该时钟信号的频率不是第二频率值的情况下，该线卡根据预设的业务加载阶段与时钟信号的频率的对应关系确定业务加载阶段。上述业务加载阶段包括校验局部总线Localbus基本功能、加载FPGA逻辑、初始化时钟芯片、下发端口配置等。
上述线卡包括线卡可擦除可编辑逻辑器件(又称为线卡EPLD)，上述 接口卡可擦除可编辑逻辑器件(又称为接口卡EPLD)。上述接口卡EPLD设置有一个标志寄存器，汇聚所有可检测的业务加载阶段。线卡EPLD通过判断该标志切换在位信号的频率。
举例而言，单板上电的情况下，此时接口卡处于物理在位的状态，线卡检测到固定低电平。开始加载业务后，开始校验Localbus基本功能时，信号时钟频率为f01；加载FPGA逻辑时，频率为f02；初始化时钟芯片时，频率为f03；下发端口配置时，频率为f04，等等。业务加载完毕后，软件向接口卡EPLD写初始化成功标志，信号的频率切换为业务正常的频率，即f0。
在示例性实施方式中，在该线卡判断接收到的接口卡信号是否为时钟信号之前，该线卡对接收到该接口卡的信进行信号过滤，以过滤在位信号的异常抖动。在示例性实施方式中，该线卡判断该接口卡电平为高位或电平为低位的时间是否小于第二时间阈值；在判断该接口卡电平为高位或电平为低位的时间小于第二时间阈值的情况下，该线卡确定该信号存在毛刺并对该接口卡的信号进行信号过滤，以过滤掉该毛刺以免对时钟信号频率的判断产生影响。
图3是根据本发明实施例的接口卡状态检测方法的流程图二，如图3所示，该流程包括如下步骤：
步骤S202，接口卡产生不同类型的信号作为接口卡信号；
步骤S204，该接口卡向线卡发送该接口卡信号，该接口卡信号用于该线卡确定该接口卡的状态，该状态包括业务在位、物理在位和物理不在位。
在示例性实施方式中，接口卡向线卡发送时钟信号，该时钟信号用于线卡确定该接口卡的状态为业务在线。在示例性实施方式中，在接口卡开始加载业务的情况下，该接口卡产生时钟信号作为接口卡信号；该接口卡将该时钟信号发送给该线卡，其中，该时钟信号用于该线卡确定该接口卡的状态为业务在位。
一种可行的实施方式为，在接口卡业务在位且状态正常，该接口卡向该线卡发送频率为第一频率值的第一时钟信号，其中该第一时钟信号用于该线卡确定该接口卡的状态；在接口卡业务在位且状态异常，该接口卡向该线卡发送频率为第三频率值的第三时钟信号，其中，该第三时钟信号的频率根据 预设的业务异常类型与时钟信号的频率的对应关系确定，该第三时钟信号用于该线卡确定该接口卡的业务异常类型。
另一种可行的实施方式为，在接口卡业务在位且加载完成，该接口卡向该线卡发送频率为第二频率值的第二时钟信号，其中该第二时钟信号用于该线卡确定该接口卡的状态；在接口卡业务在位且处于加载中，该接口卡向该线卡发送频率为第四频率值的第四时钟信号，其中，该第四时钟信号的频率根据预设的业务加载阶段与时钟信号的频率的对应关系确定，该时钟信号用于该线卡确定该接口卡的业务加载阶段。
在示例性实施方式中，在该接口卡产生时钟信号作为接口卡信号之前，该接口卡进行上电；在上电完成后，该接口卡进行业务加载。在上电阶段，该接口卡处于物理在位，在业务开始加载并完成业务加载时，该接口卡处于业务在位。
本发明实施例还提供了一种计算机可读存储介质，存储有计算机可执行指令，所述计算机可执行指令被执行时实现图3所示的接口卡状态检测方法。
图4是根据本发明实施例接口卡状态检测电路的结构示意图，如图4所示，该信号检测电路包括线卡和接口卡，该线卡包括：
上拉电阻32，该上拉电阻与电源连接；
线卡可擦除可编辑逻辑器件EPLD34，该线卡EPLD34与该上拉电阻32连接，设置成根据接收到的接口卡的信号类型确定该接口卡的状态，其中，该接口卡的状态包括业务在位、物理在位和物理不在位。
线卡通过线卡EPLD32检测在位信号，当不插接口卡时，在位信号是高电平。插入接口卡后，在位信号直接接地，变成低电平。线卡EPLD32由此判断接口卡的在位情况。
该接口卡包括：
下拉电阻36，该下拉电阻接地；
接口卡可擦除可编辑逻辑器件EPLD38，该接口卡EPLD38与该下拉电阻36连接，设置成产生不同类型的信号作为接口卡信号；并向线卡发送该接口卡信号，该接口卡信号用于该线卡确定该接口卡的状态，该状态包括业务 在位、物理在位和物理不在位。
本发明实施例将原接口卡信号接入接口卡EPLD38。接口卡EPLD38根据各种判断条件来控制在位信号。
在接口卡上，在位信号线由逻辑器件，也即接口卡EPLD38输出，从单板插入到开始初始化的时间段里，保持低电平。从初始化开始，逻辑器件的输出变成时钟信号，在不同工作阶段其频率会产生相应变化。初始化完成后，由软件设置初始化完成标志，逻辑器件的输出仍保持为时钟信号，且频率为某一固定值。
在示例性实施方式中，上述接口卡EPLD38还设置成：在该接口卡开始加载业务的情况下，产生时钟信号作为接口卡信号，并将该时钟信号发送给该线卡，其中，该时钟信号用于该线卡确定该接口卡的状态为业务在位。
图5是根据本发明实施例的接口卡的结构框图，如图5所示，该接口卡EPLD38还包括：
标志寄存器42，设置成根据标志切换时钟信号的频率。
图6是根据本发明实施例接口卡状态检测电路的结构框图，如图6所示，该连接器包括：接口卡52和与之匹配的线卡54。
上述接口卡包括信号产生单元522，设置成产生接口卡业务在位信号。上述线卡包括信号检测单元524，接收接口卡发送的信号，并根据该信号判断该接口卡的状态。该接口卡的状态包括物理在位、物理不在位和业务在位。
接口卡插入线卡后，信号产生单元首先发出物理在位信号，线卡上的信号检测单元检测到接口卡物理在位后，通知上层软件对接口卡进行上电操作，并下发业务配置版本。从软件加载业务版本开始，信号产生单元就发出业务在位信号，业务加载到不同的阶段时或业务产生异常时接口卡信号都会做出相应的变化。位于线卡上的在位信号检测单元始终对接口卡上信号产生单元发送的信号进行检测。当在位信号检测单元检测到接口卡上报的信号状态发生变化时，及时向上层软件进行上报。
下面结合具体实施例对本发明进行进一步说明。
图7是根据本发明实施例接口卡状态检测方法的流程图三，如图7所示， 该流程包括如下步骤：
步骤S602，线卡检测到接口卡物理在位后，给接口卡上电。在EPLD上电过程中，其输出管脚保持高阻状态，不会对在位信号的电平产生影响。EPLD完成上电后输出低电平，仍不会对在位信号的电平产生影响。
步骤S604,上电完成后，上层软件对接口卡进行初始化操作，即加载业务，接口卡输出业务在位信号。从初始化过程开始，软件对接口卡EPLD中的寄存器写入开始初始化标志。接口卡EPLD切换在位信号的功能，由单纯输出低电平，变成输出某种频率的时钟信号。此时钟信号即为业务在位信号。
步骤S606，在初始化操作完成后，软件对接口卡EPLD中的寄存器写入初始化成功标志，接口卡信号切换为另一频率的时钟信号，表示业务加载完毕。在示例性实施方式中，业务在位信号可根据需要再进行细分。使用不同的时钟频率，表示特定的业务异常；也可使用不同频率，表示业务加载的进度。该功能可以通过在接口卡EPLD中设置相应的寄存器标志位来实现。
接口卡可以主动或被动调整业务在位信号，通知线卡接口卡业务异常或业务离线。如接口卡业务在位的任一个可检测条件出现异常，如FPGA逻辑丢失、线卡复位接口卡、时钟芯片工作异常等，接口卡立即主动调整业务在位信号的时钟频率。若出现不可检测的异常，如接口卡整体掉电、接口卡电源瞬间跌落等异常，接口卡EPLD因掉电而恢复初始状态，无法发送时钟信号，这种情况属被动关断业务在位信号，接口卡信号变成低电平输出。线卡一侧判断接口卡由业务在位变成物理在位或业务在位但有异常，即业务离线或业务异常原因后，向系统上报接口卡异常。
本发明实施例还提供了一种计算机可读存储介质，存储有计算机可执行指令，所述计算机可执行指令被执行时实现图7所示的接口卡状态检测方法。
显然，本领域的技术人员应该明白，上述的本发明的各模块或各步骤可以用通用的计算装置来实现，它们可以集中在单个的计算装置上，或者分布在多个计算装置所组成的网络上，可选地，它们可以用计算装置可执行的程序代码来实现，从而，可以将它们存储在存储装置中由计算装置来执行，并且在某些情况下，可以以不同于此处的顺序执行所示出或描述的步骤，或者将它们分别制作成各个集成电路模块，或者将它们中的多个模块或步骤制作 成单个集成电路模块来实现。这样，本发明不限制于任何特定的硬件和软件结合。
本领域普通技术人员可以理解，上文中所公开方法中的全部或某些步骤、系统、装置中的功能模块/单元可以被实施为软件、固件、硬件及其适当的组合。在硬件实施方式中，在以上描述中提及的功能模块/单元之间的划分不一定对应于物理组件的划分；例如，一个物理组件可以具有多个功能，或者一个功能或步骤可以由若干物理组件合作执行。某些组件或所有组件可以被实施为由处理器，如数字信号处理器或微处理器执行的软件，或者被实施为硬件，或者被实施为集成电路，如专用集成电路。这样的软件可以分布在计算机可读介质上，计算机可读介质可以包括计算机存储介质(或非暂时性介质)和通信介质(或暂时性介质)。如本领域普通技术人员公知的，术语计算机存储介质包括在用于存储信息(诸如计算机可读指令、数据结构、程序模块或其他数据)的任何方法或技术中实施的易失性和非易失性、可移除和不可移除介质。计算机存储介质包括但不限于随机存取存储器(RAM，Random Access Memory)、只读存储器(ROM，Read-Only Memory)、电可擦除只读存储器(EEPROM，Electrically Erasable Programmable Read-only Memory)、闪存或其他存储器技术、光盘只读存储器(CD-ROM，Compact Disc Read-Only Memory)、数字多功能盘(DVD)或其他光盘存储、磁盒、磁带、磁盘存储或其他磁存储装置、或者可以用于存储期望的信息并且可以被计算机访问的任何其他的介质。此外，本领域普通技术人员公知的是，通信介质通常包含计算机可读指令、数据结构、程序模块或者诸如载波或其他传输机制之类的调制数据信号中的其他数据，并且可包括任何信息递送介质。
工业实用性
本发明实施例提供了接口卡状态检测方法、接口卡及线卡，通过本发明的实施例，能够及时准确掌握接口卡状态。

Claims (19)

  1. 一种接口卡状态检测方法，包括：
    线卡根据接收到的接口卡的信号类型确定所述接口卡的状态，其中，所述接口卡的状态包括业务在位、物理在位和物理不在位。
  2. 根据权利要求1所述的方法，其中，所述线卡根据接收到的接口卡的信号类型确定所述接口卡的状态包括：
    所述线卡判断接收到的接口卡的信号是否为时钟信号；
    在判断接收到的接口卡的信号是时钟信号的情况下，所述线卡确定所述接口卡的状态为业务在位。
  3. 根据所述权利要求2所述的方法，所述方法还包括：
    在判断接收到的接口卡的信号不是时钟信号的情况下，所述线卡确定所述接口卡的状态为物理在位或物理不在位。
  4. 根据所述权利要求3所述的方法，其中，所述线卡确定所述接口卡的状态为物理在位或物理不在位包括：
    在接收到的所述接口卡的信号为高电平的情况下，所述线卡确定所述接口卡的状态为物理不在位；
    在接收到的所述接口卡的信号为低电平的情况下，所述线卡确定所述接口卡的状态为物理在位。
  5. 根据所述权利要求2所述的方法，在所述线卡确定所述接口卡的状态为业务在位之后，所述方法还包括：
    所述线卡判断所述时钟信号的频率是否为第一频率值；
    在判断所述时钟信号的频率是第一频率值的情况下，所述线卡确定所述接口卡的业务状态正常。
  6. 根据所述权利要求5所述的方法，所述方法还包括：
    在判断所述时钟信号的频率不是第一频率值的情况下，所述线卡根据预设的业务异常类型与时钟信号的频率的对应关系确定业务异常类型。
  7. 根据所述权利要求2所述的方法，在所述线卡确定所述接口卡的状态 为业务在位之后，所述方法还包括：
    所述线卡判断所述时钟信号的频率是否为第二频率值；
    在判断所述时钟信号的频率是第二频率值的情况下，所述线卡确定所述接口卡业务加载完成。
  8. 根据权利要求7所述的方法，所述方法还包括：
    在判断所述时钟信号的频率不是第二频率值的情况下，所述线卡根据预设的业务加载阶段与时钟信号的频率的对应关系确定业务加载阶段。
  9. 根据权利要求2-8中任一项所述的方法，在所述线卡判断接收到的接口卡信号是否为时钟信号之前，所述方法还包括：
    所述线卡接收到所述接口卡的信号；
    所述线卡对接收到的所述接口卡的信号进行信号过滤。
  10. 根据权利要求9所述的方法，所述线卡对接收到的所述接口卡信号进行信号过滤包括：
    所述线卡判断所述接口卡电平为高位或电平为低位的时间是否小于第二时间阈值；
    在判断所述接口卡电平为高位或电平为低位的时间小于第二时间阈值的情况下，所述线卡确定所述信号存在毛刺并对所述接口卡的信号进行信号过滤。
  11. 一种接口卡状态检测方法，包括：
    接口卡产生不同类型的信号作为接口卡信号；
    所述接口卡向线卡发送所述接口卡信号，所述接口卡信号用于所述线卡确定所述接口卡的状态，所述状态包括业务在位、物理在位和物理不在位。
  12. 根据所述权利要求11所述的方法，所述接口卡产生不同类型的信号作为接口卡信号包括：
    在接口卡开始加载业务的情况下，所述接口卡产生时钟信号作为接口卡信号；
    所述接口卡向线卡发送所述接口卡信号包括：
    所述接口卡将所述时钟信号发送给所述线卡，其中，所述时钟信号用于所述线卡确定所述接口卡的状态为业务在位。
  13. 根据所述权利要求12所述的方法，所述方法还包括：
    在接口卡业务在位且状态正常，所述接口卡向所述线卡发送频率为第一频率值的第一时钟信号，其中所述第一时钟信号用于所述线卡确定所述接口卡的状态；
    在接口卡业务在位且状态异常，所述接口卡向所述线卡发送频率为第三频率值的第三时钟信号，其中，所述第三时钟信号的频率根据预设的业务异常类型与时钟信号的频率的对应关系确定，所述第三时钟信号用于所述线卡确定所述接口卡的业务异常类型。
  14. 根据所述权利要求12所述的方法，所述方法还包括：
    在接口卡业务在位且加载完成，所述接口卡向所述线卡发送频率为第二频率值的第二时钟信号，其中所述第二时钟信号用于所述线卡确定所述接口卡的状态；
    在接口卡业务在位且处于加载中，所述接口卡向所述线卡发送频率为第四频率值的第四时钟信号，其中，所述第四时钟信号的频率根据预设的业务加载阶段与时钟信号的频率的对应关系确定，所述时钟信号用于所述线卡确定所述接口卡的业务加载阶段。
  15. 根据权利要求12所述的方法，在所述接口卡产生时钟信号作为接口卡信号之前，所述方法还包括：
    所述接口卡进行上电；
    在上电完成后，所述接口卡进行业务加载。
  16. 一种线卡，包括：
    上拉电阻，所述上拉电阻与电源连接；
    线卡可擦除可编辑逻辑器件EPLD，所述线卡EPLD与所述上拉电阻连接，设置成根据接收到的接口卡的信号类型确定所述接口卡的状态，其中，所述接口卡的状态包括业务在位、物理在位和物理不在位。
  17. 一种接口卡，包括：
    下拉电阻，所述下拉电阻接地；
    接口卡可擦除可编辑逻辑器件EPLD，所述接口卡EPLD与所述下拉电阻连接，设置成：产生不同类型的信号作为接口卡信号；并向线卡发送所述接口卡信号，所述接口卡信号用于所述线卡确定所述接口卡的状态，所述状态包括业务在位、物理在位和物理不在位。
  18. 根据权利要求17所述的接口卡，所述接口卡EPLD还设置成：在所述接口卡开始加载业务的情况下，产生时钟信号作为接口卡信号，并将所述时钟信号发送给所述线卡，其中，所述时钟信号用于所述线卡确定所述接口卡的状态为业务在位。
  19. 根据权利要求18所述的接口卡，所述接口卡EPLD还包括标志寄存器，设置成根据标志切换时钟信号的频率。
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