WO2018120296A1 - 一种能够提高goa信赖性的阵列基板 - Google Patents

一种能够提高goa信赖性的阵列基板 Download PDF

Info

Publication number
WO2018120296A1
WO2018120296A1 PCT/CN2017/071000 CN2017071000W WO2018120296A1 WO 2018120296 A1 WO2018120296 A1 WO 2018120296A1 CN 2017071000 W CN2017071000 W CN 2017071000W WO 2018120296 A1 WO2018120296 A1 WO 2018120296A1
Authority
WO
WIPO (PCT)
Prior art keywords
trace
vss
goa
array substrate
substrate capable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2017/071000
Other languages
English (en)
French (fr)
Inventor
王添鸿
郭平昇
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TCL China Star Optoelectronics Technology Co Ltd
Original Assignee
Shenzhen China Star Optoelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shenzhen China Star Optoelectronics Technology Co Ltd filed Critical Shenzhen China Star Optoelectronics Technology Co Ltd
Priority to US15/328,476 priority Critical patent/US10366659B2/en
Publication of WO2018120296A1 publication Critical patent/WO2018120296A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Images

Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136286Wiring, e.g. gate line, drain line
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3674Details of drivers for scan electrodes
    • G09G3/3677Details of drivers for scan electrodes suitable for active matrices only
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/04Structural and physical details of display devices
    • G09G2300/0404Matrix technologies
    • G09G2300/0408Integration of the drivers onto the display substrate
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/02Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264Details of driving circuits
    • G09G2310/0267Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays

Definitions

  • the present invention relates to the field of display technologies, and in particular, to an array substrate capable of improving GOA reliability.
  • a liquid crystal display is a commonly used flat panel display, and a Thin Film Transistor Liquid Crystal Display (TFT-LCD) is a mainstream product in a liquid crystal display. Due to its low cost, high yield and good display performance, TFT-LCD occupies the majority of market share in the small and medium size field. Although the TFT-LCD process has matured, the picture quality still needs to be continuously improved to meet the demanding needs of consumers.
  • TFT-LCD Thin Film Transistor Liquid Crystal Display
  • a conventional liquid crystal display panel includes an array substrate, a color filter substrate, and a liquid crystal disposed between the array substrate and the color filter substrate.
  • the common terminal voltage supplied to the array substrate is regulated by adding a grounding capacitor at the common terminal generating unit on the PCBA process, and the common terminal voltage regulated by the grounding capacitor passes through the wiring (wiring on the PCBA process,
  • the bonding between the PCBA process and the flip chip COF, the wiring on the flip chip COF, the adhesion between the CRCF and the liquid crystal display panel, and the wiring on the liquid crystal display panel are connected to the common electrode line inside the liquid crystal panel;
  • the technical problem to be solved by the present invention is a technical problem that the reliability of the GOA in the prior art is not high, and the present invention provides a function capable of preventing the low-voltage VSS signal from causing the GOA circuit to appear due to other signals. Declining array substrate.
  • An array substrate capable of improving GOA reliability comprising a GOA circuit, a CK clock signal trace, a peripheral CF_COM trace, and an effective display area, wherein the array substrate includes adjacent peripheral double VSS traces, including the first VSS trace a line and a second VSS trace, forming 2n stabilizing capacitors through different layers of metal between the second VSS trace and the CF_COM trace;
  • a single third VSS trace is disposed between the GOA circuit and the CF_COM trace of the active display area, and 2n voltage stabilizing capacitors are formed by different layers of metal between the third VSS trace and the CF_COM trace;
  • n is a positive integer.
  • first VSS trace is connected to the end of the second VSS trace.
  • the CK clock signal trace includes two CK clock signal traces located on the left and right sides of the effective display area, respectively located between the first VSS trace and the second VSS trace or at the periphery of the GOA circuit.
  • the third VSS traces are respectively located on the left and right sides of the effective display area.
  • the 2n voltage stabilizing capacitors are symmetrically placed with respect to the left and right sides of the effective display area.
  • the GOA circuit is bilaterally symmetric on both sides of the effective display area.
  • a voltage stabilizing capacitor is disposed at a junction of the first VSS trace and the second VSS trace.
  • the array substrate capable of improving GOA reliability is used for a display panel.
  • first VSS trace, the second VSS trace, and the third VSS trace are located on different planes from the CF_COM trace.
  • the invention adopts the design of the voltage stabilizing capacitor by using the VSS routing area to prevent the low voltage VSS from causing functional degradation of the GOA circuit 1 due to other signals, reducing the noise amplitude of the scan driving signal output and the VSS low voltage voltage regulation, improving the transistor deterioration situation and improving GOA reliability.
  • the second effect is to improve the chromatic aberration deterioration in the display area.
  • FIG. 1 is a schematic diagram of a dual VSS trace of the present invention
  • FIG. 2 is a schematic diagram of a single VSS trace of the present invention.
  • FIG. 1 is a schematic diagram of a dual VSS trace of the present invention.
  • FIG. 2 is a schematic diagram of a single VSS trace of the present invention.
  • An array substrate capable of improving GOA reliability includes a GOA circuit 1, a CK clock signal trace 2, a peripheral CF_COM trace 3, and an effective display area 4AA.
  • the CF_COM is a test Pad that is extracted from the CF_COM Lead on the COF.
  • the array substrate includes adjacent peripheral double VSS traces, including a first VSS trace 5 (VSS1) and a second VSS trace 6 (VSS2) connected to the second VSS trace 6 (VSS2).
  • 2n voltage stabilizing capacitors 8 are formed between the CF_COM traces 3 through different layers of metal, where n is a positive integer.
  • the first VSS trace 5 (VSS1) is connected to the end of the second VSS trace 6 (VSS2).
  • a Zener capacitor is disposed at the junction of the first VSS trace 5 (VSS1) and 6.
  • the CK clock signal trace 2 includes two CK clock signal traces 2, located on the left and right sides of the effective display area 4 (AA), respectively located at the first VSS trace 5 (VSS1) and the second VSS trace 6 ( VSS2) is located between the periphery of the GOA circuit 1.
  • the 2n stabilizing capacitors are placed symmetrically with respect to the left and right sides of the effective display area 4.
  • One of the plates of the stabilizing capacitor 8 is made of a metal material different from the VSS trace.
  • the GOA circuit 1 is bilaterally symmetric on both sides of the effective display area 4 (AA).
  • the array substrate capable of improving GOA reliability is used for a display panel.
  • the first VSS trace 5 (VSS1), the second VSS trace 6 (VSS2), and the third VSS trace 7 (VSS3) are located on different planes from the CF_COM trace 3.
  • An array substrate capable of improving GOA reliability comprising a GOA circuit 1, a CK clock signal trace 2, a peripheral CF_COM trace 3, and an effective display area 4 (AA).
  • a single third VSS trace 7 (VSS3) is disposed between the GOA circuit 1 and the CF_COM trace 3 of the active display area 4 (AA), and the single third VSS trace 7 is VSS3) and CF_COM trace 3 form a regulated 2n voltage stabilizing capacitor 8 through different layers of metal, where n is a positive integer.
  • the third VSS traces 7 (VSS3) are respectively located on the left and right sides of the effective display area 4 (AA).
  • the CK clock signal trace 2 includes two CK clock signal traces 2 located on the left and right sides of the effective display area 4AA, respectively located at the first VSS trace 5 (VSS1) and the second VSS trace 6 (VSS2). It is either located on the periphery of the GOA circuit 1.
  • the 2n stabilizing capacitors 8 are placed symmetrically with respect to the left and right sides of the effective display area 4 (AA).
  • One layer of the stabilizing capacitor is made of a metal material different from the VSS trace.
  • the GOA circuit 1 is bilaterally symmetric on both sides.
  • the array substrate capable of improving GOA reliability is used for a display panel.
  • the first VSS trace 5 (VSS1), the second VSS trace 6 (VSS2), and the single third VSS trace 7 (VSS3) are located on different planes from the CF_COM trace 3.

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Optics & Photonics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Manufacturing & Machinery (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

一种能够提高GOA信赖性的阵列基板,主要解决了现有技术中的GOA可靠性不高的技术问题。通过采用阵列基板包含相邻的外围双VSS走线(5,6),包含第一VSS走线(5)与第二VSS走线(6),在第二VSS走线(6)与CF_COM走线(3)之间通过不同层金属形成2n个稳压电容(8);或者在GOA电路(1)与有效显示区域(4)的CF_COM走线(3)之间设置单根的第三VSS走线(7),在第三VSS走线(7)与CF_COM走线(3)之间通过不同层金属层形成2n个稳压电容(8)的技术方案,较好的解决了该问题,可用于TFT显示面板生产中。

Description

一种能够提高GOA信赖性的阵列基板 技术领域
本发明涉及显示技术领域,尤其涉及一种能够提高GOA信赖性的阵列基板。
背景技术
液晶显示器是目前常用的平板显示器,其中层晶体管液晶显示器(Thin Film Transistor Liquid Crystal Display,简称TFT-LCD)是液晶显示器中的主流产品。TFT-LCD由于其低成本、高良率以及良好的显示效果,使得其在中小尺寸领域,占据着绝大部分的市场份额。尽管TFT-LCD的工艺已经日渐成熟,但画面品质仍需要不断提高,以满足消费者的挑剔需求。
现有的液晶显示面板,包括阵列基板、彩膜基板以及设置在阵列基板与彩膜基板之间的液晶。液晶显示装置中通过在PCBA制程上公共端产生单元处添加接地电容对供给阵列基板的公共端电压进行稳压,经过所述接地电容稳压后的公共端电压通过走线(PCBA制程上布线、PCBA制程和覆晶薄膜COF之间粘连接、覆晶薄膜COF上走线、覆晶薄膜COF和液晶显示面板之间粘合、液晶显示面板上布线)和液晶面板内部的公共电极线相连;从PCBA制程上公共端产生单元处与液晶显示面板内部公共电极线之间存在电阻R;液晶面板中,由于数据线、栅极线同公共电极线存在耦合,公共端电压往往因为耦合而产生扰动,又称噪音;若受扰动的公共端电压不能迅速恢复,则会产生液晶显示面板显示画面颤动或者泛绿等不良;此时驱动扰动后公共端电压恢复稳定值是由PCBA上的公共端产生单元及其周围的接地电容共同完成。因为所述电阻R的存在,大大降低公共端产生单元及其所连接的接地电容维持公共端稳定的能力的技术问题。因此,提供一种防止VSS低压因其他信号导致GOA电路出现功能性衰退的阵列基板就很有必要。
发明内容
本发明所要解决的技术问题是现有技术中GOA可靠性不高的技术问题,本发明提供一种能够防止低压VSS信号因其他信号导致GOA电路出现功能性 衰退的阵列基板。
为解决上述技术问题,本发明采用的技术方案如下:
一种能够提高GOA信赖性的阵列基板,包括GOA电路、CK时钟信号走线、外围CF_COM走线、及有效显示区域,所述阵列基板包含相邻的外围双VSS走线,包含第一VSS走线与第二VSS走线,在第二VSS走线与CF_COM走线之间通过不同层金属形成2n个稳压电容;
或者在GOA电路与有效显示区域的CF_COM走线之间设置单根第三VSS走线,在所述第三VSS走线与CF_COM走线之间通过不同层金属形成2n个稳压电容;
其中n为正整数。
进一步地,所述第一VSS走线与第二VSS走线末端相连。
进一步地,所述CK时钟信号走线包含两根CK时钟信号走线,位于有效显示区域的左右两侧,分别位于第一VSS走线与第二VSS走线之间或者位于GOA电路外围。
进一步地,所述第三VSS走线分别位于有效显示区域的左右两侧。
进一步地,所述2n个稳压电容相对于有效显示区域的左右两侧对称放置。
进一步地,所述GOA电路左右对称分别在有效显示区域两侧。
进一步地,所述第一VSS走线与第二VSS走线的连接处设置一个稳压电容。
进一步地,所述能够提高GOA信赖性的阵列基板用于显示面板。
进一步地,所述第一VSS走线,第二VSS走线及第三VSS走线与CF_COM走线位于不同平面。
本发明通过采用利用VSS走线区进行稳压电容设计,防止低压VSS因其他信号导致GOA电路1出现功能性衰退降低扫描驱动信号输出和VSS低压稳压时的噪音振幅,改善晶体管恶化情形,提升GOA可靠度。
本发明的有益效果:
效果一,提高GOA可靠度;
效果二,改善显示区域的色差恶化情形。
附图说明
图1本发明双VSS走线示意图;
图2本发明单根VSS走线示意图。
具体实施方式
为了使本发明的目的、技术方案及优点更加清楚明白,以下结合实施例,对本发明进行进一步详细说明。应当理解,此处所描述的具体实施例仅仅用以解释本发明,并不用于限定本发明。
图1本发明双VSS走线示意图。
图2本发明单根VSS走线示意图。
实施例1:
一种能够提高GOA信赖性的阵列基板,包括GOA电路1,CK时钟信号走线2,外围CF_COM走线3,及有效显示区域4AA。所述CF_COM为自COF上CF_COM Lead上引出的测试Pad。
如图1:阵列基板包含相邻的外围双VSS走线,包含第一VSS走线5(VSS1)与第二VSS走线6(VSS2),在与第二VSS走线6(VSS2)相连的CF_COM走线3之间通过不同层金属形成2n个稳压电容8,其中n为正整数。所述第一VSS走线5(VSS1)与第二VSS走线6(VSS2)末端相连。所述第一VSS走线5(VSS1)与6的连接处设置一个稳压电容。
所述CK时钟信号走线2包含两根CK时钟信号走线2,位于有效显示区域4(AA)的左右两侧,分别位于第一VSS走线5(VSS1)与第二VSS走线6(VSS2)之间或者位于GOA电路1外围。所述2n个稳压电容相对于有效显示区域4的左右两侧对称放置。所述稳压电容8的一层极板由不同于VSS走线的金属材料制成。所述GOA电路1左右对称分别在有效显示区域4(AA)两侧。所述能够提高GOA信赖性的阵列基板用于显示面板。所述第一VSS走线5(VSS1)、第二VSS走线6(VSS2)及第三VSS走线7(VSS3)与CF_COM走线3位于不同平面。
实施例2:
本实施例进一步说明VSS走线方式对于本发明的影响:
一种能够提高GOA信赖性的阵列基板,包括GOA电路1,CK时钟信号走线2,外围CF_COM走线3,及有效显示区域4(AA)。
如图2,在GOA电路1与有效显示区域4(AA)的CF_COM走线3之间设置单根的第三VSS走线7(VSS3),在所述单根的第三VSS走线7(VSS3)与CF_COM走线3之间通过不同层金属形成稳压2n个稳压电容8,其中n为正整数。所述第三VSS走线7(VSS3)分别位于有效显示区域4(AA)的左右两侧。
所述CK时钟信号走线2包含两根CK时钟信号走线2,位于有效显示区域4AA的左右两侧,分别位于第一VSS走线5(VSS1)与第二VSS走线6(VSS2)之间或者位于GOA电路1外围。所述2n个稳压电容8相对于有效显示区域4(AA)的左右两侧对称放置。所述稳压电容的一层极板由不同于VSS走线的金属材料制成。所述GOA电路1左右对称分别在4两侧。所述能够提高GOA信赖性的阵列基板用于显示面板。所述第一VSS走线5(VSS1),第二VSS走线6(VSS2)及单根的第三VSS走线7(VSS3)与CF_COM走线3位于不同平面。
尽管上面对本发明说明性的具体实施方式进行了描述,以便于本技术领域的技术人员能够理解本发明,但是本发明不仅限于具体实施方式的范围,对本技术领域的普通技术人员而言,只要各种变化只要在所附的权利要求限定和确定的本发明精神和范围内,一切利用本发明构思的发明创造均在保护之列。

Claims (13)

  1. 一种能够提高GOA信赖性的阵列基板,包括GOA电路、CK时钟信号走线、外围CF_COM走线、及有效显示区域,其中:所述阵列基板包含相邻的外围双VSS走线,包含第一VSS走线与第二VSS走线,在第二VSS走线与CF_COM走线之间通过不同层金属形成2n个稳压电容;其中n为正整数。
  2. 一种能够提高GOA信赖性的阵列基板,包括GOA电路、CK时钟信号走线、外围CF_COM走线、及有效显示区域,其中:在GOA电路与有效显示区域的CF_COM走线之间设置单根第三VSS走线,在所述第三VSS走线与CF_COM走线之间通过不同层金属层形成2n个稳压电容;其中n为正整数。
  3. 根据权利要求1所述的能够提高GOA信赖性的阵列基板,其中:所述第一VSS走线与第二VSS走线末端相连。
  4. 根据权利要求3所述的能够提高GOA信赖性的阵列基板,其中:所述CK时钟信号走线包含两根CK时钟信号走线,位于有效显示区域的左右两侧,分别位于第一VSS走线与第二VSS走线之间或者位于GOA电路外围。
  5. 根据权利要求2所述的能够提高GOA信赖性的阵列基板,其中:所述第三VSS走线分别位于有效显示区域的左右两侧。
  6. 根据权利要求1所述的能够提高GOA信赖性的阵列基板,其中:所述2n个稳压电容相对于有效显示区域的左右两侧对称放置。
  7. 根据权利要求2所述的能够提高GOA信赖性的阵列基板,其中:所述2n个稳压电容相对于有效显示区域的左右两侧对称放置。
  8. 根据权利要求1所述的能够提高GOA信赖性的阵列基板,其中:所述GOA电路左右对称分别在有效显示区域两侧。
  9. 根据权利要求2所述的能够提高GOA信赖性的阵列基板,其中:所述GOA电路左右对称分别在有效显示区域两侧。
  10. 根据权利要求1所述的能够提高GOA信赖性的阵列基板,其中:所述第一VSS走线与第二VSS走线的连接处设置一个稳压电容。
  11. 根据权利要求1所述的能够提高GOA信赖性的阵列基板,其中:所述能够提高GOA信赖性的阵列基板用于显示面板。
  12. 根据权利要求1所述的能够提高GOA信赖性的阵列基板,其中:所 述第一VSS走线,第二VSS走线与CF_COM走线位于不同平面。
  13. 根据权利要求2所述的能够提高GOA信赖性的阵列基板,其中:所述第三VSS走线与CF_COM走线位于不同平面。
PCT/CN2017/071000 2016-12-29 2017-01-12 一种能够提高goa信赖性的阵列基板 Ceased WO2018120296A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US15/328,476 US10366659B2 (en) 2016-12-29 2017-01-12 Array substrates for enhancing gate driver on array (GOA) reliability

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201611248670.0A CN106527002B (zh) 2016-12-29 2016-12-29 一种能够提高goa信赖性的阵列基板
CN201611248670.0 2016-12-29

Publications (1)

Publication Number Publication Date
WO2018120296A1 true WO2018120296A1 (zh) 2018-07-05

Family

ID=58338513

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2017/071000 Ceased WO2018120296A1 (zh) 2016-12-29 2017-01-12 一种能够提高goa信赖性的阵列基板

Country Status (3)

Country Link
US (1) US10366659B2 (zh)
CN (1) CN106527002B (zh)
WO (1) WO2018120296A1 (zh)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107945726A (zh) * 2017-11-22 2018-04-20 深圳市华星光电技术有限公司 一种阵列基板和显示面板
CN107799087B (zh) * 2017-11-24 2020-06-05 深圳市华星光电技术有限公司 一种goa电路及显示装置
CN110928082B (zh) * 2019-11-01 2022-06-10 武汉华星光电技术有限公司 一种阵列基板和显示面板
CN115917634B (zh) 2020-09-30 2025-04-08 京东方科技集团股份有限公司 一种像素电路及显示面板
KR102740142B1 (ko) * 2020-10-21 2024-12-06 엘지디스플레이 주식회사 전계발광 표시장치
CN112582431B (zh) * 2020-12-08 2023-08-01 深圳市华星光电半导体显示技术有限公司 一种goa电路及其制备方法

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110150169A1 (en) * 2009-12-22 2011-06-23 Au Optronics Corp. Shift register
CN102789770A (zh) * 2012-07-20 2012-11-21 北京京东方光电科技有限公司 一种goa复位电路、阵列基板及显示器
CN104318909A (zh) * 2014-11-12 2015-01-28 京东方科技集团股份有限公司 移位寄存器单元、栅极驱动电路及其驱动方法、显示面板
CN106205538A (zh) * 2016-08-31 2016-12-07 深圳市华星光电技术有限公司 一种goa驱动单元及驱动电路
CN106200163A (zh) * 2016-07-25 2016-12-07 深圳市华星光电技术有限公司 阵列基板行驱动电路及液晶显示面板
CN106251817A (zh) * 2016-08-31 2016-12-21 深圳市华星光电技术有限公司 一种goa驱动电路

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104835476B (zh) * 2015-06-08 2017-09-15 京东方科技集团股份有限公司 移位寄存器单元、栅极驱动电路及其驱动方法、阵列基板
CN105096876B (zh) * 2015-08-19 2017-06-27 深圳市华星光电技术有限公司 Goa驱动系统及液晶面板
CN109426041B (zh) * 2017-08-21 2020-11-10 京东方科技集团股份有限公司 一种阵列基板及显示装置

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110150169A1 (en) * 2009-12-22 2011-06-23 Au Optronics Corp. Shift register
CN102789770A (zh) * 2012-07-20 2012-11-21 北京京东方光电科技有限公司 一种goa复位电路、阵列基板及显示器
CN104318909A (zh) * 2014-11-12 2015-01-28 京东方科技集团股份有限公司 移位寄存器单元、栅极驱动电路及其驱动方法、显示面板
CN106200163A (zh) * 2016-07-25 2016-12-07 深圳市华星光电技术有限公司 阵列基板行驱动电路及液晶显示面板
CN106205538A (zh) * 2016-08-31 2016-12-07 深圳市华星光电技术有限公司 一种goa驱动单元及驱动电路
CN106251817A (zh) * 2016-08-31 2016-12-21 深圳市华星光电技术有限公司 一种goa驱动电路

Also Published As

Publication number Publication date
US20180336830A1 (en) 2018-11-22
CN106527002B (zh) 2019-09-17
US10366659B2 (en) 2019-07-30
CN106527002A (zh) 2017-03-22

Similar Documents

Publication Publication Date Title
WO2018120296A1 (zh) 一种能够提高goa信赖性的阵列基板
CN107991818A (zh) 薄膜晶体管液晶显示面板及液晶显示器
CN103217845B (zh) 下基板及其制造方法、液晶显示面板和液晶显示器
US20150054724A1 (en) Liquid crystal device and display device
US10263018B2 (en) Signal line structure, array substrate, and display device
WO2017028324A1 (zh) Goa驱动系统及液晶面板
US10429681B1 (en) Structure of GOA circuit
US20160357041A1 (en) Array substrate and manufacturing method thereof, display panel and manufacturing method thereof, and display device
CN105097838A (zh) 显示面板及薄膜晶体管阵列基板
CN103606359A (zh) 一种驱动电路及其移位寄存器
US7671930B2 (en) Liquid crystal display pixel structure having sub-pixels with particular capacitance
US9570034B2 (en) Pixel cell circuits of compensation feedback voltage
US11532644B2 (en) Display panel and display device applying the same
CN107807467B (zh) 防止面板外围走线发生静电击伤的结构
CN107608103B (zh) 显示面板及其应用的显示装置
TWI414867B (zh) 畫素陣列
TW202101150A (zh) 元件基板
WO2020073561A1 (zh) 一种走线结构及液晶面板
CN107783344B (zh) 显示面板及其应用的显示装置
CN105549270A (zh) 液晶光配向电路及液晶面板
CN108073004B (zh) 阵列基板、显示装置及其驱动方法
US10789905B2 (en) Array substrate and display panel
US20160170249A1 (en) Display device and display panel
WO2020220466A1 (zh) 印刷电路板及显示装置
US10453412B2 (en) Shift register circuit, waveform generating method for same, and display panel using the same

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 15328476

Country of ref document: US

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 17887825

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 17887825

Country of ref document: EP

Kind code of ref document: A1