WO2018113546A1 - 一种面向5g的协议栈多维度切分方法及其装置、终端 - Google Patents

一种面向5g的协议栈多维度切分方法及其装置、终端 Download PDF

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Publication number
WO2018113546A1
WO2018113546A1 PCT/CN2017/115404 CN2017115404W WO2018113546A1 WO 2018113546 A1 WO2018113546 A1 WO 2018113546A1 CN 2017115404 W CN2017115404 W CN 2017115404W WO 2018113546 A1 WO2018113546 A1 WO 2018113546A1
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Prior art keywords
module
fpga
physical layer
protocol stack
mac layer
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PCT/CN2017/115404
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English (en)
French (fr)
Inventor
唐彦波
仝林
顾建良
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惠州Tcl移动通信有限公司
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Priority to US16/472,885 priority Critical patent/US10798777B2/en
Publication of WO2018113546A1 publication Critical patent/WO2018113546A1/zh

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/30—Definitions, standards or architectural aspects of layered protocol stacks
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/34—Circuit design for reconfigurable circuits, e.g. field programmable gate arrays [FPGA] or programmable logic devices [PLD]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/12—Arrangements for detecting or preventing errors in the information received by using return channel
    • H04L1/16—Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
    • H04L1/18—Automatic repetition systems, e.g. Van Duuren systems
    • H04L1/1812—Hybrid protocols; Hybrid automatic repeat request [HARQ]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H04L27/2601—Multicarrier modulation systems
    • H04L27/2602—Signal structure
    • H04L27/2605—Symbol extensions, e.g. Zero Tail, Unique Word [UW]
    • H04L27/2607—Cyclic extensions
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H04L27/2601—Multicarrier modulation systems
    • H04L27/2626—Arrangements specific to the transmitter only
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H04L27/2601—Multicarrier modulation systems
    • H04L27/2626—Arrangements specific to the transmitter only
    • H04L27/2627—Modulators
    • H04L27/2634—Inverse fast Fourier transform [IFFT] or inverse discrete Fourier transform [IDFT] modulators in combination with other circuits for modulation
    • H04L27/2636—Inverse fast Fourier transform [IFFT] or inverse discrete Fourier transform [IDFT] modulators in combination with other circuits for modulation with FFT or DFT modulators, e.g. standard single-carrier frequency-division multiple access [SC-FDMA] transmitter or DFT spread orthogonal frequency division multiplexing [DFT-SOFDM]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/06—Notations for structuring of protocol data, e.g. abstract syntax notation one [ASN.1]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W80/00—Wireless network protocols or protocol adaptations to wireless operation
    • H04W80/02—Data link layer protocols
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2117/00—Details relating to the type or aim of the circuit design
    • G06F2117/08—HW-SW co-design, e.g. HW-SW partitioning

Definitions

  • the present invention relates to the field of protocol stack technologies, and in particular, to a multi-dimensional segmentation method for a 5G protocol stack, a device thereof, and a terminal.
  • GPP general purpose processor, The general purpose processor
  • GPP general purpose processor, The general purpose processor
  • PDCP Packet Data Convergence on Intel's X86 platform
  • Protocol Packet Data Convergence Protocol
  • RLC Radio Link Control, Radio Link Control Layer Protocol in Wireless Communication System
  • MAC Medium Access Control
  • PHY Physical Layer
  • the frame period in the 5G protocol stack becomes more than the current LTE (Long Term Evolution) is much shorter, HARQ (Hybrid Automatic Repeat)
  • HARQ Hybrid Automatic Repeat
  • the physical layer code of the commercial LTE platform is basically FPGA (Field-Programmable Gate). Array, field programmable gate array), DSP (digital signal processing) to complete, the performance is better.
  • FPGA Field-Programmable Gate
  • DSP digital signal processing
  • Embodiments of the present invention provide a multi-dimensional segmentation method for a 5G protocol stack, a device thereof, and a terminal, which can solve the problem that the implementation manner of the existing protocol stack is difficult to meet the requirements of the 5G platform, and the function upgrade needs to be updated. problem.
  • an embodiment of the present invention provides a terminal, including a processor and a memory, where the memory is used to store instructions and data, and the processor is configured to perform the following steps:
  • the relevant part of the physical layer module is moved to the FPGA for processing according to the calculation amount and the functional requirement.
  • the step of performing the processing on the MAC layer in the protocol stack, and putting the HARQ entity in the physical layer and the MAC layer into the preset physical resource for processing specifically includes:
  • the HARQ entity and the physical layer of the MAC layer that are segmented are implemented in one carrier module entity, and the HARQ entity of the physical layer and the MAC layer are placed together in a preset physical resource for processing.
  • the interface split by the MAC layer is a G-bit Ethernet port.
  • the carrier module entity includes a GPP board and a radio frequency board, and the FPGA is integrated into the radio frequency board, and the interface of the radio frequency board and the GPP board is a PCIe interface or an SRIO interface.
  • the step of moving the relevant part of the physical layer to the FPGA for processing according to the calculation amount and the functional requirement includes: moving a part of the module in the physical layer that is larger than the preset value to the RF board of the FPGA .
  • the part of the module whose calculation amount is greater than the preset value includes an FFT/IFFT module and an addition and subtraction cyclic prefix module in the GPP card.
  • the step of moving the relevant part of the physical layer to the FPGA for processing according to the calculation amount and the functional requirement includes: moving the module for precoding the data channel in the physical layer to the RF board of the FPGA.
  • the step of moving the relevant part of the physical layer to the FPGA for processing according to the calculation amount and the functional requirement, including: FFT and Turbe The relevant modules of the codec are moved to the FPGA for processing.
  • an embodiment of the present invention provides a multi-dimensional segmentation method for a protocol stack oriented to 5G, which includes:
  • the relevant part of the physical layer module is moved to the FPGA for processing according to the calculation amount and the functional requirement.
  • the step of dividing the MAC layer in the protocol stack, and putting the HARQ entity of the physical layer and the MAC layer into a preset physical resource for processing Specifically include:
  • the HARQ entity and the physical layer of the MAC layer that are segmented are implemented in one carrier module entity, and the HARQ entity of the physical layer and the MAC layer are placed together in a preset physical resource for processing.
  • the MAC layer segmentation interface is a G-bit Ethernet port.
  • the carrier module entity includes a GPP board and a radio frequency board
  • the FPGA is integrated in the radio frequency board
  • the interface of the radio frequency board and the GPP board is a PCIe interface or SRIO interface.
  • the step of moving the relevant part of the physical layer to the FPGA for processing according to the calculation amount and the functional requirement includes: calculating the calculation amount in the physical layer is greater than the pre- Some of the set values of the module are moved to the RF board of the FPGA.
  • the part of the module whose calculation amount is greater than the preset value includes an FFT/IFFT module and an addition and subtraction cyclic prefix module in the GPP card.
  • the step of moving the relevant part of the physical layer to the FPGA for processing according to the calculation amount and the functional requirement includes: performing data channel in the physical layer
  • the precoded module is moved to the RF board of the FPGA.
  • the step of moving the relevant part of the physical layer to the FPGA for processing according to the calculation amount and the functional requirement, including: FFT and Turbe The relevant modules of the codec are moved to the FPGA for processing.
  • an embodiment of the present invention provides a protocol stack multi-dimensional segmentation device for implementing the multi-dimensional segmentation method for a 5G protocol stack, which includes:
  • One or more processors are One or more processors;
  • One or more applications wherein the one or more applications are stored in the memory and configured to be executed by the processor; the one or more applications include:
  • the sharding module splits the MAC layer in the protocol stack, and puts the HARQ entity of the physical layer and the MAC layer into a preset physical resource for processing; the mobile module compares the relevant part of the physical layer according to the calculation amount and the functional requirement. The module is moved to the FPGA for processing.
  • the sharding module is specifically configured to sever the MAC layer in the protocol stack to separate the HARQ entities of the MAC layer, and implement the HARQ entity and the physical layer of the MAC layer in the MAC layer in one carrier module entity.
  • the HARQ entity of the physical layer and the MAC layer are placed together in a preset physical resource for processing.
  • the mobile module is specifically configured to move a part of the module in the physical layer that is larger than the preset value to the RF board of the FPGA.
  • the mobile module is specifically configured to move a module that performs precoding of a data channel in a physical layer to a radio frequency board of an FPGA.
  • the present invention provides a 5G-oriented protocol stack multi-dimensional segmentation method and device thereof, and the protocol stack multi-dimensional segmentation method includes: Step A, segmenting the MAC layer in the protocol stack, and physics The layer and the HARQ entity of the MAC layer are placed together in a preset physical resource for processing; in step B, the relevant part of the physical layer is moved to the FPGA for processing according to the calculation amount and the functional requirement.
  • the multi-dimensional segmentation can be used to rationally utilize the physical resources, and the location of the module can be flexibly configured and scheduled in the small dimension.
  • the processing in the FPGA can meet the time requirement of the HARQ on the 5G platform, which facilitates the upgrade of the function. Code debugging, which solves the problem that the implementation of the existing protocol stack is difficult to meet the requirements of the 5G platform, and the functions that need to be updated are upgraded; the hardware configuration requirements are reduced on the basis of ensuring performance.
  • FIG. 1 is a flowchart of a multi-dimensional segmentation method for a 5G protocol stack according to an embodiment of the present invention.
  • FIG. 2 is a schematic diagram of layers of a multi-dimensional segmentation method for a 5G protocol stack according to an embodiment of the present invention.
  • FIG. 3 is a schematic diagram of an embodiment of moving a relevant part of a physical layer to an FPGA according to an embodiment of the present invention.
  • FIG. 4 is a schematic diagram of another embodiment of moving a relevant part of a physical layer to an FPGA according to an embodiment of the present invention.
  • FIG. 5 is a schematic diagram of a 5G-oriented protocol stack multi-dimensional segmentation device according to an embodiment of the present invention.
  • FIG. 6 is a schematic structural diagram of a terminal according to an embodiment of the present invention.
  • the invention provides a 5G-oriented protocol stack multi-dimensional segmentation method and device thereof, which can utilize physical resources reasonably by multi-dimensional segmentation, and can flexibly configure and schedule module positions in a small dimension, and ensure performance. Based on the requirements of the hardware configuration is reduced.
  • the multi-dimensional segmentation method for the 5G protocol stack includes:
  • S100 Perform a sharding on the MAC layer in the protocol stack, and put the physical layer and the HARQ entity of the MAC layer into a preset physical resource for processing;
  • S200 Move relevant parts of the physical layer to the FPGA for processing according to the calculation amount and the functional requirement.
  • the protocol stack includes Layer 1, Layer 2, and Layer 3.
  • Layer 2 also includes three sub-layers, namely PDCP, RLC, and MAC.
  • the module of the non-HARQ entity in the MAC has lower hardware resources than the physical layer.
  • the processing method of separating the MACs of the protocol stack has a small impact on the delay.
  • the MAC layer is divided, the HARQ entities of the MAC layer are separated, and the HARQ entity and the physical layer of the MAC layer are separated into one carrier module.
  • the HARQ entity of the physical layer and the MAC layer are processed together in a preset physical resource (such as an FPGA or a DSP), and the physical layer has high hardware requirements and needs real-time processing; and layer 2, layer 3 The hardware requirements are lower.
  • the benefit of this partitioning lies in the application layer, taking into account the subsequent C-RAN (based on centralized processing (Centralized Processing), Collaborative Radio and Real-Time Cloud Computing Architecture (Real-time Cloud) Infrastructure) green wireless access network architecture (Clean System)) and cloud computing support, these modules of different base stations can be aggregated and implemented in the base layer to a certain server entity.
  • UE user Equipment, terminal
  • UE user Equipment, terminal
  • the dotted line in Fig. 2 indicates the dicing line
  • the dotted line on the left indicates which node is segmented
  • the newly formed module includes the entire module of the HARQ entity and the physical layer of the MAC layer, where Call it CCe.
  • the block diagram on the right shows the internal structure of CCe.
  • the MAC layer segmentation interface is shown in Figure 2 as a G-bit Ethernet port. Therefore, the data terminal device (Data Terminal Equipment) via G Ethernet Switch (Gb Ethemet Switch) Connects the carrier module entity.
  • One carrier module entity includes two boards, and one part is a partial baseband processing board. The board adopts a GPP mode and can be called a GPP board. 4700EQ processor.
  • the other board is essentially a radio frequency module (ie, a radio frequency board that connects to the RF front end (RF). FrontEnd)), but a high-performance FPGA is integrated into this RF board, which uses Xilinx's V7.
  • the interface between the RF board and the GPP board is PCIe interface or SRIO (serial high-speed input/output) interface, which can ensure the high-speed data transmission requirements of each module in the physical layer segmentation.
  • RF in Figure 2 The IC is a radio frequency chip.
  • a multi-dimensional and hierarchical method for performing protocol stack segmentation is provided, wherein specific node segmentation may be changed according to actual requirements, that is, a module combination requiring high hardware resources is required.
  • the partitioning is performed from the MAC layer, and may also be separated from the physical layer (PHY).
  • the high-dimension partition is determined by the computing resource distribution of the platform, that is, a part of the module whose calculation amount is greater than the preset value is moved to the RF board of the FPGA.
  • a computationally intensive FFT module/IFFT that would otherwise be implemented in a GPP module ( Inverse Fast Fourier The Transform, Inverse Fast Fourier Transform module and the Addition and Subtraction Cyclic Prefix Module (+CP) are transferred to the FPGA for execution.
  • the phase-shifted frequency data is used for transmission in PCIe, and the data rate is low.
  • FPGA optimized IP library for FFT Fast Fourier Transformation, Fast Fourier Transform, IFFT, and Turbe codec have great advantages. In the implementation, you can also FFT and Turbe The relevant modules of the codec are moved to the FPGA for processing.
  • the low-dimension partitioning takes into account the hardware requirements and different features to flexibly deploy different modules to flexibly adjust and partition the physical layer modules.
  • FIG 4 in the development of 5G-oriented functions, there are often some new functions for pre-verification. These verifications require multiple attempts, and optimization of parameters such as algorithms and delays is critical.
  • precoding of the control channel requires less resources, but precoding of the data channel requires a large amount of computation.
  • the module for performing precoding of the data channel is moved to the FPGA, and the processing capability of the FPGA is very powerful, and the precoding of the data channel can be completely processed in parallel, thereby reducing the requirement on the hardware configuration.
  • a physical layer model can be established in the early stage of the segmentation.
  • the simulation analysis of the physical layer model leads to a general division direction and feasibility.
  • the basic principle is to meet the 3GPP requirements for delay and HARQ.
  • part of the FPGA resources in the carrier module entity may also be reserved for control of the radio frequency module.
  • Step 1 Perform FPGA bitstream downloading
  • Step 2 Start Leon3 in the embedded ROM through the ‘pcie bootloader’;
  • Step 3 The Linux operating system identifies the FPGA board
  • Step 4 Start the openair_rf.ko driver in the GPP board
  • Step 5 The driver boots the application from DDR3 and starts the application.
  • Step 6 Run a software defined radio program in the GPP board; this step first establishes an interface between the FPGA and the GPP board, and then sends configuration information from the GPP board and starts configuration;
  • Step 7 The Leon 3 in the FPGA performs configuration of the transceiver according to the configuration information sent by the GPP board.
  • the multi-dimensional segmentation device of the protocol stack is further provided by the above-mentioned protocol stack multi-dimensional segmentation method.
  • the protocol stack multi-dimensional segmentation device includes a segmentation module 10 and a mobile module 20;
  • the segmentation module 10 divides the MAC layer in the protocol stack, and puts the HARQ entity of the physical layer and the MAC layer into a preset physical resource for processing;
  • the mobile module compares the relevant part of the physical layer according to the calculation amount and the functional requirement.
  • the module is moved to the FPGA for processing.
  • the multi-dimensional module segmentation mechanism of the present invention utilizes multi-dimensional segmentation to rationally utilize physical resources, and dynamically adjusts the position of some modules of the physical layer to the FPGA in a small scale according to functions and requirements;
  • the processing in the FPGA can meet the time requirement of the HARQ on the 5G platform, and facilitate the code debugging during the function upgrade, thereby solving the problem that the implementation of the existing protocol stack is difficult to meet the requirements of the 5G platform, and the function upgrade needs to be updated. More problems; on the basis of ensuring performance, the requirements for hardware configuration are reduced, and the implementation of the protocol stack for 5G is optimized.
  • Embodiments of the present invention also provide a storage medium storing a computer program, wherein the computer program causes the computer to perform a 5G-oriented protocol stack multi-dimensional segmentation method as described above.
  • the program may be stored in a computer readable storage medium, and the storage medium may include: Read only memory (ROM, Read Only Memory), Random Access Memory (RAM), disk or CD.
  • ROM Read only memory
  • RAM Random Access Memory
  • FIG. 6 is a block diagram showing a specific structure of a terminal provided by the embodiment of the present invention.
  • the terminal can be used to implement the multi-dimensional segmentation method and device for the 5G-oriented protocol stack provided in the foregoing embodiment.
  • the terminal 1200 can be a smartphone or a tablet.
  • the terminal 1200 may include an RF (Radio). Frequency (RF) circuit 110, memory 120 including one or more (only one shown) computer readable storage medium, input unit 130, display unit 140, sensor 150, audio circuit 160, transmission module 170, including There are one or more (only one shown in the figure) processing core processor 180 and power supply 190 and the like. It will be understood by those skilled in the art that the structure of the terminal 1200 shown in FIG. 6 does not constitute a limitation of the terminal 1200, and may include more or less components than those illustrated, or a combination of certain components, or different component arrangements. among them:
  • the RF circuit 110 is configured to receive and transmit electromagnetic waves, and realize mutual conversion between electromagnetic waves and electrical signals, thereby communicating with a communication network or other devices.
  • the RF circuit 110 may include various existing circuit elements for performing these functions, such as an antenna, a radio frequency transceiver, a digital signal processor, an encryption/decryption chip, a Subscriber Identity Module (SIM) card, a memory, and the like.
  • SIM Subscriber Identity Module
  • the RF circuit 110 can communicate with various networks such as the Internet, an intranet, a wireless network, or communicate with other devices over a wireless network.
  • the wireless network described above may include a cellular telephone network, a wireless local area network, or a metropolitan area network.
  • the above wireless networks may use various communication standards, protocols and technologies, including but not limited to global mobile communication systems (Global System for Mobile Communication, GSM), Enhanced Data GSM Environment (Enhanced Data GSM Environment, EDGE), Wideband Code Division Multiple Access (WCDMA), Code Division Multiple Access (Code) Division Access, CDMA), Time Division Multiple Access (Time Division Multiple Access, TDMA), Wireless Fidelity (Wi-Fi) (eg American Institute of Electrical and Electronics Engineers Standard IEEE 802.11a, IEEE) 802.11b, IEEE802.11g and/or IEEE 802.11n), Voice over Internet Protocol (Voice over Internet Protocol, VoIP), Worldwide Interoperability for Microwave Access, Wi-Max, other protocols for mail, instant messaging, and short messages, as well as any other suitable communication protocol, may even include protocols that are not currently being developed.
  • GSM Global System for Mobile Communication
  • EDGE Enhanced Data GSM Environment
  • WCDMA Wideband Code Division Multiple Access
  • Code Division Multiple Access Code Division Multiple Access
  • CDMA Code Division Multiple Access
  • Time Division Multiple Access
  • the memory 120 can be used to store software programs and modules, such as the 5G-oriented protocol stack multi-dimensional segmentation method and the program instructions/modules corresponding thereto, and the processor 180 runs the software programs and modules stored in the memory 120. In order to perform various functional applications and data processing, that is, the function of multi-dimensional segmentation of the protocol stack for 5G is realized.
  • Memory 120 may include high speed random access memory, and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid state memory.
  • memory 120 can further include memory remotely located relative to processor 180, which can be connected to terminal 1200 via a network. Examples of such networks include, but are not limited to, the Internet, intranets, local area networks, mobile communication networks, and combinations thereof.
  • the input unit 130 can be configured to receive input numeric or character information and to generate keyboard, mouse, joystick, optical or trackball signal inputs related to user settings and function controls.
  • input unit 130 can include touch-sensitive surface 131 as well as other input devices 132.
  • Touch-sensitive surface 131 also referred to as a touch display or trackpad, can collect touch operations on or near the user (such as a user using a finger, stylus, etc., on any suitable object or accessory on touch-sensitive surface 131 or The operation near the touch-sensitive surface 131) and driving the corresponding connecting device according to a preset program.
  • the touch-sensitive surface 131 can include two portions of a touch detection device and a touch controller.
  • the touch detection device detects the touch orientation of the user, and detects a signal brought by the touch operation, and transmits the signal to the touch controller; the touch controller receives the touch information from the touch detection device, converts the touch information into contact coordinates, and sends the touch information.
  • the processor 180 is provided and can receive commands from the processor 180 and execute them.
  • the touch-sensitive surface 131 can be implemented in various types such as resistive, capacitive, infrared, and surface acoustic waves.
  • the input unit 130 can also include other input devices 132.
  • other input devices 132 may include, but are not limited to, one or more of a physical keyboard, function keys (such as volume control buttons, switch buttons, etc.), trackballs, mice, joysticks, and the like.
  • the display unit 140 can be used to display information entered by the user or information provided to the user and various graphical user interfaces of the terminal 1200, which can be composed of graphics, text, icons, video, and any combination thereof.
  • the display unit 140 may include a display panel 141, and optionally, an LCD (Liquid may be used) Crystal Display, LCD (Organic Light-Emitting)
  • the display panel 141 is configured in the form of a Diode, an organic light emitting diode, or the like.
  • touch-sensitive surface 131 may cover the display panel 141, and when the touch-sensitive surface 131 detects a touch operation thereon or nearby, it is transmitted to the processor 180 to determine the type of the touch event, and then the processor 180 according to the touch event The type provides a corresponding visual output on display panel 141.
  • touch-sensitive surface 131 and display panel 141 are implemented as two separate components to implement input and input functions, in some embodiments, touch-sensitive surface 131 can be integrated with display panel 141 for input. And output function.
  • Terminal 1200 can also include at least one type of sensor 150, such as a light sensor, motion sensor, and other sensors.
  • the light sensor may include an ambient light sensor and a proximity sensor, wherein the ambient light sensor may adjust the brightness of the display panel 141 according to the brightness of the ambient light, and the proximity sensor may close the display panel 141 when the terminal 1200 moves to the ear. / or backlight.
  • the gravity acceleration sensor can detect the magnitude of acceleration in all directions (usually three axes). When it is stationary, it can detect the magnitude and direction of gravity.
  • gesture of the mobile phone such as horizontal and vertical screen switching, related Game, magnetometer attitude calibration), vibration recognition related functions (such as pedometer, tapping), etc.;
  • Other sensors such as a gyroscope, a barometer, a hygrometer, a thermometer, an infrared sensor, and the like which are also configurable by the terminal 1200 are not described herein.
  • the audio circuit 160, the speaker 161, and the microphone 162 can provide an audio interface between the user and the terminal 1200.
  • the audio circuit 160 can transmit the converted electrical data of the received audio data to the speaker 161 for conversion to the sound signal output by the speaker 161; on the other hand, the microphone 162 converts the collected sound signal into an electrical signal by the audio circuit 160. After receiving, it is converted into audio data, and then processed by the audio data output processor 180, transmitted to the terminal, for example, via the RF circuit 110, or outputted to the memory 120 for further processing.
  • the audio circuit 160 may also include an earbud jack to provide communication of the peripheral earphones with the terminal 1200.
  • the terminal 1200 can help the user to send and receive emails, browse web pages, access streaming media, etc. through the transmission module 170 (for example, a Wi-Fi module), which provides wireless broadband Internet access to the user.
  • the transmission module 170 for example, a Wi-Fi module
  • FIG. 6 shows the transmission module 170, it can be understood that it does not belong to the essential configuration of the terminal 1200, and may be omitted as needed within the scope of not changing the essence of the invention.
  • the processor 180 is a control center of the terminal 1200 that connects various portions of the entire handset with various interfaces and lines, by running or executing software programs and/or modules stored in the memory 120, and recalling data stored in the memory 120, The various functions and processing data of the terminal 1200 are executed to perform overall monitoring of the mobile phone.
  • the processor 180 may include one or more processing cores; in some embodiments, the processor 180 may integrate an application processor and a modem processor, wherein the application processor mainly processes an operating system, a user interface, and For applications, etc., the modem processor primarily handles wireless communications. It can be understood that the above modem processor may not be integrated into the processor 180.
  • Terminal 1200 also includes a power supply 190 (such as a battery) that powers various components.
  • the power supply can be logically coupled to processor 180 through a power management system to manage charging, discharging, and power management through a power management system. And other functions.
  • Power supply 190 may also include any one or more of a DC or AC power source, a recharging system, a power failure detection circuit, a power converter or inverter, a power status indicator, and the like.
  • the terminal 1200 may further include a camera (such as a front camera, a rear camera), a Bluetooth module, and the like, and details are not described herein.
  • the display unit of the terminal is a touch screen display
  • the terminal further includes a memory, and one or more programs, wherein one or more programs are stored in the memory and configured to be processed by one or more The execution of one or more programs includes instructions for performing the following operations:
  • the relevant part of the physical layer module is moved to the FPGA for processing according to the calculation amount and the functional requirement.
  • the step of performing the processing on the MAC layer in the protocol stack, and putting the HARQ entity in the physical layer and the MAC layer into the preset physical resource for processing specifically includes:
  • the HARQ entity and the physical layer of the MAC layer that are segmented are implemented in one carrier module entity, and the HARQ entity of the physical layer and the MAC layer are placed together in a preset physical resource for processing.
  • the interface split by the MAC layer is a G-bit Ethernet port.
  • the carrier module entity includes a GPP board and a radio frequency board, and the FPGA is integrated into the radio frequency board, and the interface of the radio frequency board and the GPP board is a PCIe interface or an SRIO interface.
  • the step of moving the relevant part of the physical layer to the FPGA for processing according to the calculation amount and the functional requirement includes: moving a part of the module in the physical layer that is larger than the preset value to the RF board of the FPGA .
  • the part of the module whose calculation amount is greater than the preset value includes an FFT/IFFT module and an addition and subtraction cyclic prefix module in the GPP card.
  • the step of moving the relevant part of the physical layer to the FPGA for processing according to the calculation amount and the functional requirement includes: moving the module for precoding the data channel in the physical layer to the RF board of the FPGA.
  • the step of moving the relevant part of the physical layer to the FPGA for processing according to the calculation amount and the functional requirement, including: FFT and Turbe The relevant modules of the codec are moved to the FPGA for processing.

Abstract

本发明公开了一种面向5G的协议栈多维度切分方法及其装置、终端，包括：对协议栈中的MAC层进行切分，将物理层和MAC层的HARQ实体一起放到预设物理资源中进行处理；根据计算量和功能需求将物理层的相关部分模块移动到FPGA中进行处理。在保证性能的基础上降低了对硬件配置的要求。

Description

一种面向5G的协议栈多维度切分方法及其装置、终端
本申请要求于2016年12月22日提交中国专利局、申请号为201611198621.0、发明名称为“一种面向5G的协议栈多维度切分方法及其装置”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本发明涉及协议栈技术领域，尤其涉及的是一种面向5G的协议栈多维度切分方法及其装置、终端。
 背景技术
面向5G（第五代移动电话行动通信标准）的终端平台设计中，协议栈的实现是关键因素，目前有两种方式来实现协议栈的功能。
一是GPP(general purpose processor， 通用处理器)平台基本上都是在Intel的X86平台上运行PDCP（Packet Data Convergence Protocol，分组数据汇聚协议），RLC（Radio Link Control，是无线通信系统中的无线链路控制层协议），MAC（Medium Access Control，媒体接入控制）和PHY（物理层）。代码开发整体一致性较好，开发周期也较短，实现较方便，但实时性以及吞吐量上没有保证。同时面向5G的协议栈中的帧周期变得比现在LTE（Long Term Evolution）短很多，HARQ（Hybrid Automatic Repeat reQuest，混合自动重传请求）的时间也要求更严格，因此，此方法在5G平台中很难满足需求。
二是商用的LTE平台物理层代码基本上是由FPGA（Field-Programmable Gate Array，现场可编程门阵列）、DSP（数字信号处理）来完成的，性能比较好。但开发成本和周期都很长，且某个功能的升级换代需要更新的代码也较多。
因此，迫切需要一种新的方法来实现面向5G的协议栈开发，现有技术还有待于改进和发展。
 技术问题
本发明实施例提供一种面向5G的协议栈多维度切分方法及其装置、终端，可以解决现有协议栈的实现方式很难满足5G平台的需求、功能升级换代需要更新的代码较多的问题。
 技术解决方案
第一方面，本发明实施例提供一种终端，其中，包括处理器和存储器，所述存储器用于存储指令和数据，所述处理器用于执行以下步骤：
对协议栈中的MAC层进行切分，将物理层和MAC层的HARQ实体一起放到FPGA或DSP中进行处理；
根据计算量和功能需求将物理层的相关部分模块移动到FPGA中进行处理。
其中，所述对协议栈中的MAC层进行切分，将物理层和MAC层的HARQ实体一起放到预设物理资源中进行处理的步骤，具体包括：
对协议栈中的MAC层进行切分，将MAC层的HARQ实体分开；
将切分后的MAC层的HARQ实体和物理层在一个载波模块实体中实现，将物理层和MAC层的HARQ实体一起放到预设物理资源中进行处理。
其中，所述MAC层切分的接口为G比特的以太网口。
其中，所述载波模块实体包括GPP板卡和射频板卡，射频板卡中集成了FPGA，射频板卡和GPP板卡的接口为PCIe接口或SRIO接口。
其中，在所述根据计算量和功能需求将物理层的相关部分模块移动到FPGA中进行处理的步骤，包括：将物理层中计算量大于预设值的部分模块移动到FPGA的射频板卡里。
其中，所述计算量大于预设值的部分模块包括GPP板卡中的FFT/IFFT模块和加减循环前缀模块。
其中，在所述根据计算量和功能需求将物理层的相关部分模块移动到FPGA中进行处理的步骤，包括：将物理层中进行数据信道的预编码的模块移动到FPGA的射频板卡里。
其中，在所述根据计算量和功能需求将物理层的相关部分模块移动到FPGA中进行处理的步骤，包括：将FFT和Turbe 编解码的相关模块移动到FPGA中进行处理。
第二方面，本发明实施例提供一种面向5G的协议栈多维度切分方法，其包括：
对协议栈中的MAC层进行切分，将物理层和MAC层的HARQ实体一起放到预设物理资源中进行处理；
根据计算量和功能需求将物理层的相关部分模块移动到FPGA中进行处理。
所述的面向5G的协议栈多维度切分方法中，所述对协议栈中的MAC层进行切分，将物理层和MAC层的HARQ实体一起放到预设物理资源中进行处理的步骤，具体包括：
对协议栈中的MAC层进行切分，将MAC层的HARQ实体分开；
将切分后的MAC层的HARQ实体和物理层在一个载波模块实体中实现，将物理层和MAC层的HARQ实体一起放到预设物理资源中进行处理。
所述的面向5G的协议栈多维度切分方法中，所述MAC层切分的接口为G比特的以太网口。
所述的面向5G的协议栈多维度切分方法中，所述载波模块实体包括GPP板卡和射频板卡，射频板卡中集成了FPGA，射频板卡和GPP板卡的接口为PCIe接口或SRIO接口。
所述的面向5G的协议栈多维度切分方法中，所述根据计算量和功能需求将物理层的相关部分模块移动到FPGA中进行处理的的步骤，包括：将物理层中计算量大于预设值的部分模块移动到FPGA的射频板卡里。
所述的面向5G的协议栈多维度切分方法中，所述计算量大于预设值的部分模块包括GPP板卡中的FFT/IFFT模块和加减循环前缀模块。
所述的面向5G的协议栈多维度切分方法中，所述根据计算量和功能需求将物理层的相关部分模块移动到FPGA中进行处理的的步骤，包括：将物理层中进行数据信道的预编码的模块移动到FPGA的射频板卡里。
其中，在所述根据计算量和功能需求将物理层的相关部分模块移动到FPGA中进行处理的步骤，包括：将FFT和Turbe 编解码的相关模块移动到FPGA中进行处理。
第三方面，本发明实施例提供一种实现所述的面向5G的协议栈多维度切分方法的协议栈多维度切分装置，其中，包括：
一个或多个处理器；
存储器；以及
一个或多个应用程序，其中所述一个或多个应用程序被存储于所述存储器中，并配置为由所述处理器执行；所述一个或多个应用程序包括：
切分模块和移动模块；
所述切分模块对协议栈中的MAC层进行切分，将物理层和MAC层的HARQ实体一起放到预设物理资源中进行处理；移动模块根据计算量和功能需求将物理层的相关部分模块移动到FPGA中进行处理。
其中，所述切分模块，具体用于对协议栈中的MAC层进行切分，将MAC层的HARQ实体分开；将切分后的MAC层的HARQ实体和物理层在一个载波模块实体中实现，将物理层和MAC层的HARQ实体一起放到预设物理资源中进行处理。
其中，所述移动模块，具体用于将物理层中计算量大于预设值的部分模块移动到FPGA的射频板卡里。
其中，所述移动模块，具体用于将物理层中进行数据信道的预编码的模块移动到FPGA的射频板卡里。
 有益效果
相较于现有技术，本发明提供的面向5G的协议栈多维度切分方法及其装置，协议栈多维度切分方法包括：步骤A、对协议栈中的MAC层进行切分，将物理层和MAC层的HARQ实体一起放到预设物理资源中进行处理；步骤B、根据计算量和功能需求将物理层的相关部分模块移动到FPGA中进行处理。通过多维度的切分来合理利用实体资源，同时在小维度的范围内可以灵活配置和调度模块的位置，在FPGA中进行处理能满足5G平台对HARQ的时间要求，方便了功能升级换代时的代码调试，从而解决了现有协议栈的实现方式很难满足5G平台的需求、功能升级换代需要更新的代码较多的问题；在保证性能的基础上降低了对硬件配置的要求。
 附图说明
图1是本发明实施例提供的面向5G的协议栈多维度切分方法流程图。
图2是本发明实施例提供的面向5G的协议栈多维度切分方法的各层示意图。
图3是本发明实施例提供的将物理层的相关部分模块移动到FPGA中的一实施例的示意图。
图4是本发明实施例提供的将物理层的相关部分模块移动到FPGA中的另一实施例的示意图。
图5是本发明实施例提供的面向5G的协议栈多维度切分装置的示意图。
图6是本发明实施例提供的终端的结构示意图。
 本发明的最佳实施方式
本发明提供一种面向5G的协议栈多维度切分方法及其装置，通过多维度的切分来合理利用实体资源，同时在小维度的范围内可以灵活配置和调度模块的位置，在保证性能的基础上降低了对硬件配置的要求。为使本发明的目的、技术方案及优点更加清楚、明确，以下参照附图并举实施例对本发明进一步详细说明。应当理解，此处所描述的具体实施例仅仅用以解释本发明，并不用于限定本发明。
请同时参阅图1和图2，本发明提供的面向5G的协议栈多维度切分方法包括：
S100、对协议栈中的MAC层进行切分，将物理层和MAC层的HARQ实体一起放到预设物理资源中进行处理；
S200、根据计算量和功能需求将物理层的相关部分模块移动到FPGA中进行处理。
如图2所示，Application （应用程序）运行在LTE协议栈上面。协议栈包括层1、层2和层3。层2中又包括3个子层，即PDCP、RLC、MAC。基于PDCP和RLC， MAC中非HARQ实体的模块对硬件资源比物理层要低。将协议栈的MAC分开的处理方式对延时影响小，本实施例是从MAC层进行划分，将MAC层的HARQ实体分开，将切分后的MAC层的HARQ实体和物理层在一个载波模块实体（CCe）中实现，将物理层和MAC层的HARQ实体一起放到预设物理资源（如FPGA或DSP）中处理，物理层对硬件要求很高，需要实时处理；而层2、层3对硬件的要求低些。这样划分的好处在于应用层，考虑到后续对C-RAN（是基于集中化处理（Centralized Processing），协作式无线电（Collaborative Radio）和实时云计算构架（Real-time Cloud Infrastructure）的绿色无线接入网构架（Clean system））和云计算的支持，不同基站的这些模块可以汇聚和基层到某一服务器实体中实现。对于UE（user equipment，终端）来说可以减少手机处理器的计算资源。
图2中的虚线表示切分线，左边的虚线表示从哪个节点进行切分，切分后新组成的模块（以方框表示）包括了MAC层的HARQ实体和物理层的整个模块，此处称之为CCe。右边的框图即表示CCe的内部结构。MAC层切分的接口如图2所示为G比特的以太网口，因此，数据终端设备（Data Terminal Equipment）通过G以太网交换机（Gb Ethemet switch）连接载波模块实体。一个载波模块实体包括2块板卡，一块是部分基带处理板，该板卡采用GPP的模式，可称为GPP板卡，如图所示具体可采用Intel 4700EQ处理器。另一块板卡本质上是射频模块（即射频板卡，连接射频前端（RF FrontEnd）），但此射频板卡中集成了一块高性能的FPGA，此处采用Xilinx的V7。射频板卡和GPP板卡的接口为PCIe接口或SRIO（串行高速输入输出）接口，这样能保证在物理层的切分中各个模块对高速数据传输的要求。图2中RF IC为射频芯片。
需要理解的是，本实施例提供的是一种多维度、分层次来进行协议栈切分的方法，其中具体哪个节点进行切分可根据实际需求改变，即将对硬件资源要求较高的模块组合在一起，如本实施例是从MAC层进行划分，也可以从物理层（PHY）分开。
在分层次的划分方法中，即所述步骤S200中，在同一个CCe实体中，将物理层的哪部分模块移动到FPGA中，是要根据GPP板卡的处理能力，某个feature对性能的要求，FPGA模块的处理能力，以及接口实现的难易程度来进行综合考虑的。如图3所示，高维度的划分是以平台的计算资源分布来定夺的，即将计算量大于预设值的部分模块移动到FPGA的射频板卡里面。例如，将本来在GPP模块中实现的计算量较大的FFT模块/IFFT（ Inverse Fast Fourier Transform，逆快速傅里叶变换）模块和加减循环前缀模块（+CP）转移到FPGA里执行，变相的在PCIe中采用频率数据来进行传输，数据速率会低。另外，FPGA优化过的IP库对FFT(Fast Fourier Transformation，快速傅氏变换）、IFFT以及Turbe 编解码等模块的处理有很大的优势。在具体实施时，还可以将FFT和Turbe 编解码的相关模块移动到FPGA中进行处理。
低维度的划分则考虑硬件需求和不同的feature（功能）来灵活调配不同模块，以灵活地对物理层模块进行调整和划分。如图4所示，在面向5G的功能开发中，经常会有一些新的功能进行预验证，这些验证需要进行多次尝试，算法和时延等参数的优化都很关键。如在控制数据分离的某些算法中，控制信道的预编码需要的资源较少，但数据信道的预编码需要进行大量的运算。则本实施例将进行数据信道的预编码的模块移动到FPGA，FPGA的运算处理能力很强大，完全可以并行处理数据信道的预编码，降低对硬件配置的要求。
需要理解的是，物理层中并不是任何一个模块都可以随便移动到FPGA中进行处理，需要考虑时延，HARQ等协议定义的处理时间的要求。在具体实施时，可在切分前期建立一个物理层模型，对此物理层模型进行仿真分析后得出大概的划分方向和可行性，基本原则是满足3GPP对时延和HARQ的要求。
进一步实施例中，载波模块实体中部分FPGA资源还可预留做射频模块的控制。基于FPGA中增加了物理层的相关部分模块，则开机后，GPP模块对射频板卡的基本配置流程为：
步骤1、进行FPGA比特流下载；
步骤2、在嵌入式ROM通过‘pcie bootloader’启动Leon3；
步骤3、Linux操作系统识别FPGA板卡；
步骤4、在GPP板卡中启动openair_rf.ko驱动；
步骤5、驱动从DDR3中引导应用程序并启动该应用；
步骤6、在GPP板卡中运行软件定义无线电的程序；本步骤先建立FPGA和GPP板卡之间的接口，再从GPP板卡中发送配置信息并启动配置；
步骤7、FPGA中的Leon3根据GPP板卡发送过来的配置信息进行收发信机的配置。
基于上述的协议栈多维度切分方法，本发明还提供一种协议栈多维度切分装置，请参阅图5，所述协议栈多维度切分装置包括切分模块10和移动模块20；所述切分模块10对协议栈中的MAC层进行切分，将物理层和MAC层的HARQ实体一起放到预设物理资源中进行处理；移动模块根据计算量和功能需求将物理层的相关部分模块移动到FPGA中进行处理。
综上所述，本发明的多维度模块切分机制，通过多维度的切分来合理利用实体资源，并根据功能和需求动态小尺度地灵活调整物理层的部分模块的位置至FPGA中处理；在FPGA中进行处理能满足5G平台对HARQ的时间要求，方便了功能升级换代时的代码调试，从而解决了现有协议栈的实现方式很难满足5G平台的需求、功能升级换代需要更新的代码较多的问题；在保证性能的基础上降低了对硬件配置的要求，优化了面向5G的协议栈的实现方式。
本发明实施例还提供了一种存储介质，其存储有计算机程序，其中，所述计算机程序使得计算机执行如上面所述的面向5G的协议栈多维度切分方法。
本领域普通技术人员可以理解上述实施例的各种方法中的全部或部分步骤是可以通过程序来指令相关的硬件来完成，该程序可以存储于一计算机可读存储介质中，存储介质可以包括：只读存储器（ROM，Read Only Memory）、随机存取记忆体（RAM，Random Access Memory）、磁盘或光盘等。
图6示出了本发明实施例提供的终端的具体结构框图，该终端可以用于实施上述实施例中提供的面向5G的协议栈多维度切分方法及其装置。该终端1200可以为智能手机或平板电脑。
如图6所示，终端1200可以包括RF（Radio Frequency，射频）电路110、包括有一个或一个以上（图中仅示出一个）计算机可读存储介质的存储器120、输入单元130、显示单元140、传感器150、音频电路160、传输模块170、包括有一个或者一个以上（图中仅示出一个）处理核心的处理器180以及电源190等部件。本领域技术人员可以理解，图6中示出的终端1200结构并不构成对终端1200的限定，可以包括比图示更多或更少的部件，或者组合某些部件，或者不同的部件布置。其中：
RF电路110用于接收以及发送电磁波，实现电磁波与电信号的相互转换，从而与通讯网络或者其他设备进行通讯。RF电路110可包括各种现有的用于执行这些功能的电路元件，例如，天线、射频收发器、数字信号处理器、加密/解密芯片、用户身份模块（SIM）卡、存储器等等。RF电路110可与各种网络如互联网、企业内部网、无线网络进行通讯或者通过无线网络与其他设备进行通讯。上述的无线网络可包括蜂窝式电话网、无线局域网或者城域网。上述的无线网络可以使用各种通信标准、协议及技术，包括但并不限于全球移动通信系统（Global System for Mobile Communication, GSM）、增强型移动通信技术（Enhanced Data GSM Environment, EDGE)，宽带码分多址技术（Wideband Code Division Multiple Access, WCDMA），码分多址技术（Code Division Access, CDMA）、时分多址技术（Time Division Multiple Access, TDMA），无线保真技术（Wireless Fidelity， Wi-Fi）（如美国电气和电子工程师协会标准 IEEE 802.11a， IEEE 802.11b, IEEE802.11g 和/或 IEEE 802.11n）、网络电话（Voice over Internet Protocol, VoIP）、全球微波互联接入（Worldwide Interoperability for Microwave Access， Wi-Max）、其他用于邮件、即时通讯及短消息的协议，以及任何其他合适的通讯协议，甚至可包括那些当前仍未被开发出来的协议。
存储器120可用于存储软件程序以及模块，如上述实施例中面向5G的协议栈多维度切分方法及其装置对应的程序指令/模块，处理器180通过运行存储在存储器120内的软件程序以及模块，从而执行各种功能应用以及数据处理，即实现面向5G的协议栈多维度切分的功能。存储器120可包括高速随机存储器，还可包括非易失性存储器，如一个或者多个磁性存储装置、闪存、或者其他非易失性固态存储器。在一些实例中，存储器120可进一步包括相对于处理器180远程设置的存储器，这些远程存储器可以通过网络连接至终端1200。上述网络的实例包括但不限于互联网、企业内部网、局域网、移动通信网及其组合。
输入单元130可用于接收输入的数字或字符信息，以及产生与用户设置以及功能控制有关的键盘、鼠标、操作杆、光学或者轨迹球信号输入。具体地，输入单元130可包括触敏表面131以及其他输入设备132。触敏表面131，也称为触摸显示屏或者触控板，可收集用户在其上或附近的触摸操作（比如用户使用手指、触笔等任何适合的物体或附件在触敏表面131上或在触敏表面131附近的操作），并根据预先设定的程式驱动相应的连接装置。可选的，触敏表面131可包括触摸检测装置和触摸控制器两个部分。其中，触摸检测装置检测用户的触摸方位，并检测触摸操作带来的信号，将信号传送给触摸控制器；触摸控制器从触摸检测装置上接收触摸信息，并将它转换成触点坐标，再送给处理器180，并能接收处理器180发来的命令并加以执行。此外，可以采用电阻式、电容式、红外线以及表面声波等多种类型实现触敏表面131。除了触敏表面131，输入单元130还可以包括其他输入设备132。具体地，其他输入设备132可以包括但不限于物理键盘、功能键（比如音量控制按键、开关按键等）、轨迹球、鼠标、操作杆等中的一种或多种。
显示单元140可用于显示由用户输入的信息或提供给用户的信息以及终端1200的各种图形用户接口，这些图形用户接口可以由图形、文本、图标、视频和其任意组合来构成。显示单元140可包括显示面板141，可选的，可以采用LCD(Liquid Crystal Display，液晶显示器)、OLED(Organic Light-Emitting Diode,有机发光二极管)等形式来配置显示面板141。进一步的，触敏表面131可覆盖显示面板141，当触敏表面131检测到在其上或附近的触摸操作后，传送给处理器180以确定触摸事件的类型，随后处理器180根据触摸事件的类型在显示面板141上提供相应的视觉输出。虽然在图6中，触敏表面131与显示面板141是作为两个独立的部件来实现输入和输入功能，但是在某些实施例中，可以将触敏表面131与显示面板141集成而实现输入和输出功能。
终端1200还可包括至少一种传感器150，比如光传感器、运动传感器以及其他传感器。具体地，光传感器可包括环境光传感器及接近传感器，其中，环境光传感器可根据环境光线的明暗来调节显示面板141的亮度，接近传感器可在终端1200移动到耳边时，关闭显示面板141和/或背光。作为运动传感器的一种，重力加速度传感器可检测各个方向上（一般为三轴）加速度的大小，静止时可检测出重力的大小及方向，可用于识别手机姿态的应用（比如横竖屏切换、相关游戏、磁力计姿态校准）、振动识别相关功能（比如计步器、敲击）等; 至于终端1200还可配置的陀螺仪、气压计、湿度计、温度计、红外线传感器等其他传感器，在此不再赘述。
音频电路160、扬声器161，传声器162可提供用户与终端1200之间的音频接口。音频电路160可将接收到的音频数据转换后的电信号，传输到扬声器161，由扬声器161转换为声音信号输出；另一方面，传声器162将收集的声音信号转换为电信号，由音频电路160接收后转换为音频数据，再将音频数据输出处理器180处理后，经RF电路110以发送给比如另一终端，或者将音频数据输出至存储器120以便进一步处理。音频电路160还可能包括耳塞插孔，以提供外设耳机与终端1200的通信。
终端1200通过传输模块170（例如Wi-Fi模块）可以帮助用户收发电子邮件、浏览网页和访问流式媒体等，它为用户提供了无线的宽带互联网访问。虽然图6示出了传输模块170，但是可以理解的是，其并不属于终端1200的必须构成，完全可以根据需要在不改变发明的本质的范围内而省略。
处理器180是终端1200的控制中心，利用各种接口和线路连接整个手机的各个部分，通过运行或执行存储在存储器120内的软件程序和/或模块，以及调用存储在存储器120内的数据，执行终端1200的各种功能和处理数据，从而对手机进行整体监控。可选的，处理器180可包括一个或多个处理核心；在一些实施例中，处理器180可集成应用处理器和调制解调处理器，其中，应用处理器主要处理操作系统、用户界面和应用程序等，调制解调处理器主要处理无线通信。可以理解的是，上述调制解调处理器也可以不集成到处理器180中。
终端1200还包括给各个部件供电的电源190（比如电池），在一些实施例中，电源可以通过电源管理系统与处理器180逻辑相连，从而通过电源管理系统实现管理充电、放电、以及功耗管理等功能。电源190还可以包括一个或一个以上的直流或交流电源、再充电系统、电源故障检测电路、电源转换器或者逆变器、电源状态指示器等任意组件。
尽管未示出，终端1200还可以包括摄像头（如前置摄像头、后置摄像头）、蓝牙模块等，在此不再赘述。具体在本实施例中，终端的显示单元是触摸屏显示器，终端还包括有存储器，以及一个或者一个以上的程序，其中一个或者一个以上程序存储于存储器中，且经配置以由一个或者一个以上处理器执行述一个或者一个以上程序包含用于进行以下操作的指令：
对协议栈中的MAC层进行切分，将物理层和MAC层的HARQ实体一起放到FPGA或DSP中进行处理；
根据计算量和功能需求将物理层的相关部分模块移动到FPGA中进行处理。
其中，所述对协议栈中的MAC层进行切分，将物理层和MAC层的HARQ实体一起放到预设物理资源中进行处理的步骤，具体包括：
对协议栈中的MAC层进行切分，将MAC层的HARQ实体分开；
将切分后的MAC层的HARQ实体和物理层在一个载波模块实体中实现，将物理层和MAC层的HARQ实体一起放到预设物理资源中进行处理。
其中，所述MAC层切分的接口为G比特的以太网口。
其中，所述载波模块实体包括GPP板卡和射频板卡，射频板卡中集成了FPGA，射频板卡和GPP板卡的接口为PCIe接口或SRIO接口。
其中，在所述根据计算量和功能需求将物理层的相关部分模块移动到FPGA中进行处理的步骤，包括：将物理层中计算量大于预设值的部分模块移动到FPGA的射频板卡里。
其中，所述计算量大于预设值的部分模块包括GPP板卡中的FFT/IFFT模块和加减循环前缀模块。
其中，在所述根据计算量和功能需求将物理层的相关部分模块移动到FPGA中进行处理的步骤，包括：将物理层中进行数据信道的预编码的模块移动到FPGA的射频板卡里。
其中，在所述根据计算量和功能需求将物理层的相关部分模块移动到FPGA中进行处理的步骤，包括：将FFT和Turbe 编解码的相关模块移动到FPGA中进行处理。
应当理解的是，本发明的应用不限于上述的举例，对本领域普通技术人员来说，可以根据上述说明加以改进或变换，所有这些改进和变换都应属于本发明所附权利要求的保护范围。

Claims (20)

  1. 一种终端，其中，包括处理器和存储器，所述存储器用于存储指令和数据，所述处理器用于执行以下步骤：
    对协议栈中的MAC层进行切分，将物理层和MAC层的HARQ实体一起放到FPGA或DSP中进行处理；
    根据计算量和功能需求将物理层的相关部分模块移动到FPGA中进行处理。
  2. 根据权利要求1所述的终端，其中，所述对协议栈中的MAC层进行切分，将物理层和MAC层的HARQ实体一起放到预设物理资源中进行处理的步骤，具体包括：
    对协议栈中的MAC层进行切分，将MAC层的HARQ实体分开；
    将切分后的MAC层的HARQ实体和物理层在一个载波模块实体中实现，将物理层和MAC层的HARQ实体一起放到预设物理资源中进行处理。
  3. 根据权利要求1所述的终端，其中，所述MAC层切分的接口为G比特的以太网口。
  4. 根据权利要求2所述的终端，其中，所述载波模块实体包括GPP板卡和射频板卡，射频板卡中集成了FPGA，射频板卡和GPP板卡的接口为PCIe接口或SRIO接口。
  5. 根据权利要求4所述的终端，其中，在所述根据计算量和功能需求将物理层的相关部分模块移动到FPGA中进行处理的步骤，包括：将物理层中计算量大于预设值的部分模块移动到FPGA的射频板卡里。
  6. 根据权利要求5所述的终端，其中，所述计算量大于预设值的部分模块包括GPP板卡中的FFT/IFFT模块和加减循环前缀模块。
  7. 根据权利要求4所述的终端，其中，在所述根据计算量和功能需求将物理层的相关部分模块移动到FPGA中进行处理的步骤，包括：将物理层中进行数据信道的预编码的模块移动到FPGA的射频板卡里。
  8. 根据权利要求1所述的终端，其中，在所述根据计算量和功能需求将物理层的相关部分模块移动到FPGA中进行处理的步骤，包括：将FFT和Turbe 编解码的相关模块移动到FPGA中进行处理。
  9. 一种面向5G的协议栈多维度切分方法，其中，包括：
    对协议栈中的MAC层进行切分，将物理层和MAC层的HARQ实体一起放到预设物理资源中进行处理；
    根据计算量和功能需求将物理层的相关部分模块移动到FPGA中进行处理。
  10. 根据权利要求9所述的面向5G的协议栈多维度切分方法，其中，所述对协议栈中的MAC层进行切分，将物理层和MAC层的HARQ实体一起放到预设物理资源中进行处理的步骤，具体包括：
    对协议栈中的MAC层进行切分，将MAC层的HARQ实体分开；
    将切分后的MAC层的HARQ实体和物理层在一个载波模块实体中实现，将物理层和MAC层的HARQ实体一起放到预设物理资源中进行处理。
  11. 根据权利要求9所述的面向5G的协议栈多维度切分方法，其中，所述MAC层切分的接口为G比特的以太网口。
  12. 根据权利要求10所述的面向5G的协议栈多维度切分方法，其中，所述载波模块实体包括GPP板卡和射频板卡，射频板卡中集成了FPGA，射频板卡和GPP板卡的接口为PCIe接口或SRIO接口。
  13. 根据权利要求12所述的面向5G的协议栈多维度切分方法，其中，在所述根据计算量和功能需求将物理层的相关部分模块移动到FPGA中进行处理的步骤，包括：将物理层中计算量大于预设值的部分模块移动到FPGA的射频板卡里。
  14. 根据权利要求13所述的面向5G的协议栈多维度切分方法，其中，所述计算量大于预设值的部分模块包括GPP板卡中的FFT/IFFT模块和加减循环前缀模块。
  15. 根据权利要求12所述的面向5G的协议栈多维度切分方法，其中，在所述根据计算量和功能需求将物理层的相关部分模块移动到FPGA中进行处理的步骤，包括：将物理层中进行数据信道的预编码的模块移动到FPGA的射频板卡里。
  16. 根据权利要求9所述的面向5G的协议栈多维度切分方法，其中，在所述根据计算量和功能需求将物理层的相关部分模块移动到FPGA中进行处理的步骤，包括：将FFT和Turbe 编解码的相关模块移动到FPGA中进行处理。
  17. 一种实现权利要求9所述的面向5G的协议栈多维度切分方法的协议栈多维度切分装置，其中，包括：
    一个或多个处理器；
    存储器；以及
    一个或多个应用程序，其中所述一个或多个应用程序被存储于所述存储器中，并配置为由所述处理器执行；所述一个或多个应用程序包括：
    切分模块和移动模块；
    所述切分模块对协议栈中的MAC层进行切分，将物理层和MAC层的HARQ实体一起放到预设物理资源中进行处理；移动模块根据计算量和功能需求将物理层的相关部分模块移动到FPGA中进行处理。
  18. 根据权利要求17所述的装置，其中，
    所述切分模块，具体用于对协议栈中的MAC层进行切分，将MAC层的HARQ实体分开；将切分后的MAC层的HARQ实体和物理层在一个载波模块实体中实现，将物理层和MAC层的HARQ实体一起放到预设物理资源中进行处理。
  19. 根据权利要求17所述的装置，其中，
    所述移动模块，具体用于将物理层中计算量大于预设值的部分模块移动到FPGA的射频板卡里。
  20. 根据权利要求17所述的装置，其中，
    所述移动模块，具体用于将物理层中进行数据信道的预编码的模块移动到FPGA的射频板卡里。
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