WO2018107713A1 - Inn nanocolumn epitaxial wafer grown on si substrate and fabrication method for wafer - Google Patents

Inn nanocolumn epitaxial wafer grown on si substrate and fabrication method for wafer Download PDF

Info

Publication number
WO2018107713A1
WO2018107713A1 PCT/CN2017/090006 CN2017090006W WO2018107713A1 WO 2018107713 A1 WO2018107713 A1 WO 2018107713A1 CN 2017090006 W CN2017090006 W CN 2017090006W WO 2018107713 A1 WO2018107713 A1 WO 2018107713A1
Authority
WO
WIPO (PCT)
Prior art keywords
inn
substrate
pillar
nano
nanocolumn
Prior art date
Application number
PCT/CN2017/090006
Other languages
French (fr)
Chinese (zh)
Inventor
李国强
高芳亮
温雷
Original Assignee
华南理工大学
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 华南理工大学 filed Critical 华南理工大学
Publication of WO2018107713A1 publication Critical patent/WO2018107713A1/en

Links

Images

Classifications

    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B23/00—Single-crystal growth by condensing evaporated or sublimed materials
    • C30B23/02—Epitaxial-layer growth
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02—Elements
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10—Inorganic compounds or compositions
    • C30B29/40—AIIIBV compounds wherein A is B, Al, Ga, In or Tl and B is N, P, As, Sb or Bi
    • C30B29/403—AIII-nitrides
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/60—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape characterised by shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02491—Conductive materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02513—Microstructure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/0254—Nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
    • H01L29/0665—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body the shape of the body defining a nanostructure
    • H01L29/0669—Nanowires or nanotubes
    • H01L29/0676—Nanowires or nanotubes oriented perpendicular or at an angle to a substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/2003—Nitride compounds
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the invention relates to an InN nano-column epitaxial wafer and a preparation method thereof, in particular to an InN nano-column epitaxial wafer grown on a Si substrate and a preparation method thereof.
  • III-V nitrides are widely used in light-emitting diodes (LEDs), lasers, and optoelectronic devices due to their stable physicochemical properties, high thermal conductivity, and high electron saturation speed.
  • LEDs light-emitting diodes
  • lasers lasers
  • optoelectronic devices due to their stable physicochemical properties, high thermal conductivity, and high electron saturation speed.
  • Group III-V nitrides indium nitride (InN) has attracted more and more attention from researchers due to its unique advantages.
  • InN has the smallest effective electron mass, the highest carrier mobility, and the highest saturation transit speed, which is extremely advantageous for developing high-speed electronic devices.
  • InN has a minimum direct bandgap with a forbidden band width of about 0.7 eV, which allows the nitride-based light-emitting diode to broaden its range from ultraviolet (6.2 eV) to near-infrared (0.7 eV), in infrared lasers,
  • the full spectrum display and high conversion efficiency solar cells show great application prospects.
  • InN materials Compared with other III-V nitride semiconductor materials, InN materials have the above-mentioned advantages, and their nano-scale materials also exhibit more novel characteristics in terms of quantum effect, interface effect, volume effect, size effect and the like.
  • III-V nitride semiconductor devices are mainly based on epitaxial growth and preparation on sapphire substrates.
  • the heat generated by the high-power nitride semiconductor device with sapphire as the substrate cannot be effectively released, resulting in the accumulation of heat to increase the temperature, accelerate the deterioration of the nitride semiconductor device, and have poor device performance and longevity.
  • Si has a higher thermal conductivity than sapphire and is less expensive. It is an inevitable development trend to prepare a high performance, low cost nitride semiconductor device on a Si substrate.
  • the growth of a uniform diameter and high order order of InN nano-pillars on a Si substrate is a prerequisite for the fabrication of high-performance nitride semiconductor optoelectronic devices. Due to the large lattice mismatch and thermal mismatch between Si and InN, at the same time, the difference in the distribution ratio of In and N atoms on the surface of the substrate at the initial stage of growth causes the growth of the InN nanocolumn to have a high height and uneven length. , poor order, etc.
  • the InN nano-pillars are directly grown on a Si substrate.
  • the diameter of the nano-columns obtained by this growth method is not uniform, that is, the diameters of the top and bottom are inconsistent, and the nano-columns are inverted pyramids, softballs and the like. If In, Ni, Au, etc. are used as catalysts for the growth of InN nanopillars, metals such as In, Ni, and Au, which are catalysts, are present at the top of InN after growth, and subsequent device fabrication is performed. At the same time, the top metal catalyst needs to be removed, increasing the complexity of the device process.
  • an object of the present invention is to provide an InN nano-pillar epitaxial wafer grown on a Si substrate, through In metal nano-microspheres on a Si substrate, first, In metal nano-micro As a supplementary source of In in the growth process of InN nano-pillars, the sphere is beneficial to the nucleation and growth of high-order, uniform-sized InN nano-pillars. Secondly, it solves the problem of large lattice mismatch between InN and Si.
  • the defect density of the epitaxial layer of the InN nano-pillar is greatly reduced, the radiation recombination efficiency of the carrier is advantageously improved, and the luminous efficiency of the nitride device such as the semiconductor laser and the light-emitting diode can be greatly improved.
  • Another object of the present invention is to provide a method for preparing an InN nano-pillar epitaxial wafer grown on a Si substrate, which has the advantages of simple growth process, controllable nano-column morphology, and low preparation cost.
  • An InN nano-pillar epitaxial wafer grown on a Si substrate includes, in order from bottom to top, a Si substrate, an In metal nano-microsphere layer, and an InN nano-pillar layer.
  • the In metal nanospheres in the In metal nanosphere layer have a diameter of 20-70 nm.
  • the InN nanocolumn in the InN nanopillar layer has a diameter of 40-80 nm.
  • the method for preparing an InN nanocolumn epitaxial wafer grown on a Si substrate comprises the following steps:
  • the annealing temperature in the step (2) is 400 to 550 ° C, and the annealing time is 50 to 300 seconds.
  • the substrate cleaning in step (1) is specifically:
  • the Si substrate was placed in a mixed solution of HF and deionized water at a volume ratio of 1:20 for 1 to 2 minutes to remove oxides and viscous particles on the surface of the silicon substrate, and then ultrasonicated in deionized water for 1-2 minutes. Remove surface impurities and dry them with high purity dry nitrogen.
  • the In metal nanospheres in the In metal nanosphere layer have a diameter of 20-70 nm.
  • the InN nanocolumn in the InN nanopillar layer has a diameter of 40-80 nm.
  • the present invention has the following advantages and benefits:
  • the technical problem of a large number of dislocations greatly reduces the defect density of the epitaxial layer of the InN nano-pillar, and advantageously improves the radiation recombination efficiency of the carrier, and can greatly improve the luminous efficiency of the nitride device such as the semiconductor laser and the light-emitting diode.
  • the InN nano-pillar epitaxial wafer grown on the Si substrate of the present invention adopts a Si substrate, and the Si substrate has the advantage of being easily removed, and an electrode is formed on the InN nano-pillar semiconductor epitaxial wafer after removing the Si substrate, It is advantageous to prepare a nitride semiconductor device of a vertical structure.
  • the Si substrate has the advantages of radiation resistance, high thermal conductivity, high temperature resistance, stable chemical properties, high strength, etc., and has high reliability.
  • the InN nano-pillar epitaxial wafer based on Si substrate can be widely applied to high-temperature devices.
  • the present invention uses Si as a substrate, deposits In on a Si substrate by a molecular beam epitaxy technique and anneals to form In metal nanospheres, and In metal nanospheres pre-deposited on a Si substrate as InN nanometers.
  • the In supplement source in the column growth process prevents the InN nanocolumn from growing due to the lack of In source, resulting in a nano-column with a top diameter larger than the bottom diameter and a non-uniform diameter, which is favorable for the high order, uniform diameter of the InN nanocolumn.
  • Nuclear and growth solve the technical problem of difficulty in directly growing a uniform diameter InN nanocolumn on a Si substrate.
  • FIG. 1 is a schematic view showing the structure of an InN nano-pillar epitaxial wafer grown on a Si substrate of the present invention.
  • Example 2 is a scanning electron micrograph of Depositing In metal nanospheres on a Si substrate according to Example 1 of the present invention.
  • Example 3 is a scanning electron micrograph of an InN nanocolumn deposited on an In metal nanosphere layer on a Si substrate according to Example 1 of the present invention.
  • FIG. 1 is a schematic structural view of an InN nano-pillar epitaxial wafer grown on a silicon substrate according to the present embodiment,
  • the bottom to top includes a Si substrate 1, an In metal nanosphere layer 2, and an InN nanopillar layer 3 in this order.
  • Substrate cleaning The Si substrate was placed in a mixed solution of HF and deionized water at a volume ratio of 1:20 for 2 minutes to remove oxides and cohesive particles on the surface of the Si substrate, and then placed in deionized water. Ultrasonic for 2 minutes, remove surface impurities, and dry with high purity dry nitrogen;
  • this embodiment pre-deposits In metal nano-micro on a Si substrate, and has a scanning electron micrograph of In metal nanospheres having a diameter of 30-50 nm.
  • FIG. 3 is a scanning electron micrograph of an InN nanocolumn in which a high order, uniform diameter, and top metal-free In residue is grown on a Si substrate, and the InN nanocolumn epitaxial wafer prepared by the present invention is excellent in performance.
  • a cross-sectional scanning electron micrograph of a directly grown InN nanocolumn on a Si substrate is shown in FIG. 4. It can be seen that the diameter of the nanocolumn obtained by the growth method of directly growing the InN nanocolumn on the Si substrate is not uniform, that is, The diameters of the top and bottom are inconsistent, and they are nano-columns with inverted pyramids and softballs.
  • the InN nano-pillar epitaxial wafer grown on the silicon substrate of the present embodiment includes a Si substrate, an In metal nano-microsphere layer, and an InN nano-pillar layer in this order from bottom to top.
  • Substrate cleaning The Si substrate was placed in a mixed solution of HF and deionized water at a volume ratio of 1:20 for 2 minutes to remove oxides and viscous particles on the surface of the silicon substrate, and then placed in deionized water. Ultrasonic for 1 minute, remove surface impurities, and dry with high purity dry nitrogen;
  • the InN nano-pillar epitaxial wafer on the Si substrate prepared in this embodiment has very good performance in terms of electrical properties, optical properties, defect density, and crystal quality, and the test data is similar to that of Embodiment 1, and is not Let me repeat.

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Materials Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Ceramic Engineering (AREA)
  • Nanotechnology (AREA)
  • Inorganic Chemistry (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)

Abstract

Provided is an InN nanocolumn epitaxial wafer grown on a Si substrate, comprising in an upward sequence the Si substrate (1), an In metal nanosphere layer (2), and an InN nanocolumn layer (3). The diameter of In metal nanospheres in the In metal nanosphere layer is 20-70 nm. The diameter of InN nanocolumns in the InN nanocolumn layer is 40-80 nm. Provided is a fabrication method for the InN nanocolumn epitaxial wafer grown on the Si substrate. The nanocolumns fabricated are uniform in diameter, and solved at the same time is the technical difficulty of a large number of dislocations being produced due to a large lattice mismatch found between InN and Si, thus greatly reducing the defect density of an InN nanocolumn epitaxial layer, increasing the radiative recombination efficiency of a charge carrier, and increasing the luminous efficiency of nitride components such as a semiconductor laser and a light-emitting diode.

Description

生长在Si衬底上的InN纳米柱外延片及其制备方法InN nano-column epitaxial wafer grown on Si substrate and preparation method thereof 技术领域Technical field
本发明涉及InN纳米柱外延片及制备方法，特别涉及生长在Si衬底上的InN纳米柱外延片及其制备方法。The invention relates to an InN nano-column epitaxial wafer and a preparation method thereof, in particular to an InN nano-column epitaxial wafer grown on a Si substrate and a preparation method thereof.
背景技术Background technique
III-V族氮化物由于稳定的物理化学性质、高的热导率和高的电子饱和速度等优点，广泛应用于发光二极管(LED)、激光器和光电子器件等方面。在III-V族氮化物中，氮化铟(InN)由于其自身独特的优势而越来越受到研究者的关注。在III族氮化物半导体中，InN具有最小的有效电子质量、最高的载流子迁移率和最高饱和渡越速度，对于发展高速电子器件极为有利。不仅如此，InN具有最小的直接带隙，其禁带宽度约为0.7eV，这就使得氮化物基发光二极管的发光范围从紫外(6.2eV)拓宽至近红外区域(0.7eV)，在红外激光器、全光谱显示及高转换效率太阳电池等方面展示了极大的应用前景。与其他III-V族氮化物半导体材料相比，InN材料除具有上述优点外，其纳米级的材料在量子效应、界面效应、体积效应、尺寸效应等方面还表现出更多新颖的特性。III-V nitrides are widely used in light-emitting diodes (LEDs), lasers, and optoelectronic devices due to their stable physicochemical properties, high thermal conductivity, and high electron saturation speed. In Group III-V nitrides, indium nitride (InN) has attracted more and more attention from researchers due to its unique advantages. Among the Group III nitride semiconductors, InN has the smallest effective electron mass, the highest carrier mobility, and the highest saturation transit speed, which is extremely advantageous for developing high-speed electronic devices. Moreover, InN has a minimum direct bandgap with a forbidden band width of about 0.7 eV, which allows the nitride-based light-emitting diode to broaden its range from ultraviolet (6.2 eV) to near-infrared (0.7 eV), in infrared lasers, The full spectrum display and high conversion efficiency solar cells show great application prospects. Compared with other III-V nitride semiconductor materials, InN materials have the above-mentioned advantages, and their nano-scale materials also exhibit more novel characteristics in terms of quantum effect, interface effect, volume effect, size effect and the like.
目前，III-V族氮化物半导体器件主要是基于蓝宝石衬底上外延生长和制备。然而，蓝宝石由于热导率低，以蓝宝石为衬底的大功率氮化物半导体器件产生的热量无法有效释放，导致热量不断累计使温度上升，加速氮化物半导体器件的劣化，存在器件性能差、寿命短等缺点。相比之下，Si的热导率比蓝宝石高，且成本较低。在Si衬底上制备高性能、低成本的氮化物半导体器件是必然的发展趋势。然而，在Si衬底上生长直径均一、有序性高的InN纳米柱是制备高性能氮化物半导体光电器件的先提条件。由于Si与InN之间的晶格失配和热失配大；同时，在生长初期，衬底表面的In和N原子分布比例的差异，导致生长的InN纳米柱会有高度、径长不均匀、有序性差等情况。At present, III-V nitride semiconductor devices are mainly based on epitaxial growth and preparation on sapphire substrates. However, due to the low thermal conductivity of sapphire, the heat generated by the high-power nitride semiconductor device with sapphire as the substrate cannot be effectively released, resulting in the accumulation of heat to increase the temperature, accelerate the deterioration of the nitride semiconductor device, and have poor device performance and longevity. Short shortcomings. In contrast, Si has a higher thermal conductivity than sapphire and is less expensive. It is an inevitable development trend to prepare a high performance, low cost nitride semiconductor device on a Si substrate. However, the growth of a uniform diameter and high order order of InN nano-pillars on a Si substrate is a prerequisite for the fabrication of high-performance nitride semiconductor optoelectronic devices. Due to the large lattice mismatch and thermal mismatch between Si and InN, at the same time, the difference in the distribution ratio of In and N atoms on the surface of the substrate at the initial stage of growth causes the growth of the InN nanocolumn to have a high height and uneven length. , poor order, etc.
目前多数采用在Si衬底上直接生长InN纳米柱，这种生长方法所获得的纳米柱直径不均一，也就是顶部和底部的直径不一致，呈倒金字塔、垒球棒等形貌的纳米柱。若采用In、Ni、Au等作为催化剂进行InN纳米柱的生长，作为催化剂的In、Ni和Au等金属在生长后存在于InN的顶端，在后续进行器件制作 时，需要把顶端的金属催化剂去除，增加了器件工艺的复杂性。At present, most of the InN nano-pillars are directly grown on a Si substrate. The diameter of the nano-columns obtained by this growth method is not uniform, that is, the diameters of the top and bottom are inconsistent, and the nano-columns are inverted pyramids, softballs and the like. If In, Ni, Au, etc. are used as catalysts for the growth of InN nanopillars, metals such as In, Ni, and Au, which are catalysts, are present at the top of InN after growth, and subsequent device fabrication is performed. At the same time, the top metal catalyst needs to be removed, increasing the complexity of the device process.
发明内容Summary of the invention
为了克服现有技术的上述缺点与不足，本发明的目的在于提供一种生长在Si衬底上的InN纳米柱外延片，通过Si衬底上的In金属纳米微球，首先，In金属纳米微球作为在InN纳米柱生长过程中的In补充源，有利于高有序性、直径均一InN纳米柱的形核与生长；其次，解决了InN因与Si之间存在较大晶格失配而在其中产生大量位错的技术难题，大大减少了InN纳米柱外延层的缺陷密度，有利提高了载流子的辐射复合效率，可大幅度提高氮化物器件如半导体激光器、发光二极管的发光效率。In order to overcome the above disadvantages and disadvantages of the prior art, an object of the present invention is to provide an InN nano-pillar epitaxial wafer grown on a Si substrate, through In metal nano-microspheres on a Si substrate, first, In metal nano-micro As a supplementary source of In in the growth process of InN nano-pillars, the sphere is beneficial to the nucleation and growth of high-order, uniform-sized InN nano-pillars. Secondly, it solves the problem of large lattice mismatch between InN and Si. In the technical problem of generating a large number of dislocations, the defect density of the epitaxial layer of the InN nano-pillar is greatly reduced, the radiation recombination efficiency of the carrier is advantageously improved, and the luminous efficiency of the nitride device such as the semiconductor laser and the light-emitting diode can be greatly improved.
本发明的另一目的在于提供上述生长在Si衬底上的InN纳米柱外延片的制备方法，具有生长工艺简单，纳米柱形貌可控、制备成本低廉的优点。Another object of the present invention is to provide a method for preparing an InN nano-pillar epitaxial wafer grown on a Si substrate, which has the advantages of simple growth process, controllable nano-column morphology, and low preparation cost.
本发明的目的通过以下技术方案实现：The object of the invention is achieved by the following technical solutions:
生长在Si衬底上的InN纳米柱外延片，由下至上依次包括Si衬底、In金属纳米微球层和InN纳米柱层。An InN nano-pillar epitaxial wafer grown on a Si substrate includes, in order from bottom to top, a Si substrate, an In metal nano-microsphere layer, and an InN nano-pillar layer.
所述In金属纳米微球层中的In金属纳米微球的直径为20-70nm。The In metal nanospheres in the In metal nanosphere layer have a diameter of 20-70 nm.
所述InN纳米柱层中InN纳米柱直径为40-80nm。The InN nanocolumn in the InN nanopillar layer has a diameter of 40-80 nm.
所述的生长在Si衬底上的InN纳米柱外延片的制备方法，包括以下步骤：The method for preparing an InN nanocolumn epitaxial wafer grown on a Si substrate comprises the following steps:
(1)Si衬底清洗；(1) Si substrate cleaning;
(2)沉积In金属纳米微球层：采用分子束外延生长工艺，衬底温度控制在400-550℃，在反应室的压力为5.0～6.0×10-10Torr条件下，在Si衬底上沉积In薄膜，并退火，得到In金属纳米微球；(2) Deposition of In metal nanospheres: using a molecular beam epitaxial growth process, the substrate temperature is controlled at 400-550 ° C, and the pressure in the reaction chamber is 5.0 to 6.0 × 10 -10 Torr on a Si substrate. Depositing an In film and annealing to obtain In metal nanospheres;
(3)InN纳米柱层的生长：采用分子束外延生长工艺，衬底温度控制在500～700℃，在反应室的压力为4.0～10.0×10-5Torr，束流比V/III值为30～40条件下，在步骤(2)得到的In金属纳米微球上生长直径均一的InN纳米柱。(3) Growth of InN nano-pillar layer: using molecular beam epitaxial growth process, the substrate temperature is controlled at 500-700 ° C, the pressure in the reaction chamber is 4.0-10.0×10 -5 Torr, and the beam current ratio V/III value is An InN nanocolumn having a uniform diameter was grown on the In metal nanospheres obtained in the step (2) under conditions of 30 to 40.
步骤(2)中退火的温度为400-550℃，退火时间为50-300秒。The annealing temperature in the step (2) is 400 to 550 ° C, and the annealing time is 50 to 300 seconds.
步骤(1)所述衬底清洗，具体为：The substrate cleaning in step (1) is specifically:
将Si衬底放入体积比为1:20的HF和去离子水混合溶液中超声1～2分钟，去除硅衬底表面氧化物和粘污颗粒，再放入去离子水中超声1～2分钟，去除表面杂质，用高纯干燥氮气吹干。The Si substrate was placed in a mixed solution of HF and deionized water at a volume ratio of 1:20 for 1 to 2 minutes to remove oxides and viscous particles on the surface of the silicon substrate, and then ultrasonicated in deionized water for 1-2 minutes. Remove surface impurities and dry them with high purity dry nitrogen.
所述In金属纳米微球层中的In金属纳米微球的直径为20-70nm。The In metal nanospheres in the In metal nanosphere layer have a diameter of 20-70 nm.
所述InN纳米柱层中InN纳米柱直径为40-80nm。 The InN nanocolumn in the InN nanopillar layer has a diameter of 40-80 nm.
与现有技术相比，本发明具有以下优点和有益效果：Compared with the prior art, the present invention has the following advantages and benefits:
(1)本发明的生长在Si衬底上的InN纳米柱外延片，通过Si衬底上的In金属纳米微球，解决了InN因与Si之间存在较大晶格失配而在其中产生大量位错的技术难题，大大减少了InN纳米柱外延层的缺陷密度，有利提高了载流子的辐射复合效率，可大幅度提高氮化物器件如半导体激光器、发光二极管的发光效率。(1) The InN nano-pillar epitaxial wafer grown on a Si substrate of the present invention, through the In metal nano-microspheres on the Si substrate, solves the problem that InN is generated due to a large lattice mismatch between Si and Si. The technical problem of a large number of dislocations greatly reduces the defect density of the epitaxial layer of the InN nano-pillar, and advantageously improves the radiation recombination efficiency of the carrier, and can greatly improve the luminous efficiency of the nitride device such as the semiconductor laser and the light-emitting diode.
(2)本发明的生长在Si衬底上的InN纳米柱外延片，采用Si衬底，Si衬底具有容易去除的优点，在去除Si衬底后的InN纳米柱半导体外延片上制作电极，有利于制备垂直结构的氮化物半导体器件。同时Si衬底有抗辐射、热导率高、耐高温、化学性质较稳定、强度较高等优点，具有很高的可靠性，基于Si衬底的InN纳米柱外延片可广泛应用于高温器件。(2) The InN nano-pillar epitaxial wafer grown on the Si substrate of the present invention adopts a Si substrate, and the Si substrate has the advantage of being easily removed, and an electrode is formed on the InN nano-pillar semiconductor epitaxial wafer after removing the Si substrate, It is advantageous to prepare a nitride semiconductor device of a vertical structure. At the same time, the Si substrate has the advantages of radiation resistance, high thermal conductivity, high temperature resistance, stable chemical properties, high strength, etc., and has high reliability. The InN nano-pillar epitaxial wafer based on Si substrate can be widely applied to high-temperature devices.
(3)本发明使用Si作为衬底，采用分子束外延技术先在Si衬底上沉积In并退火形成In金属纳米微球，预沉积在Si衬底上的In金属纳米微球作为在InN纳米柱生长过程中的In补充源，避免InN纳米柱在生长过程中由于In源不足导致出现顶部直径大于底部直径，直径不均一的纳米柱，有利于高有序性、直径均一InN纳米柱的形核与生长，解决了在Si衬底上难以直接生长直径均一InN纳米柱的技术难题。(3) The present invention uses Si as a substrate, deposits In on a Si substrate by a molecular beam epitaxy technique and anneals to form In metal nanospheres, and In metal nanospheres pre-deposited on a Si substrate as InN nanometers. The In supplement source in the column growth process prevents the InN nanocolumn from growing due to the lack of In source, resulting in a nano-column with a top diameter larger than the bottom diameter and a non-uniform diameter, which is favorable for the high order, uniform diameter of the InN nanocolumn. Nuclear and growth solve the technical problem of difficulty in directly growing a uniform diameter InN nanocolumn on a Si substrate.
(4)本发明的生长工艺独特而简单易行，具有可重复性。(4) The growth process of the present invention is unique, simple, and reproducible.
附图说明DRAWINGS
图1为本发明的生长在Si衬底上的InN纳米柱外延片的结构示意图。1 is a schematic view showing the structure of an InN nano-pillar epitaxial wafer grown on a Si substrate of the present invention.
图2为本发明的实施例1在Si衬底上沉积In金属纳米微球的扫描电子显微镜照片。2 is a scanning electron micrograph of Depositing In metal nanospheres on a Si substrate according to Example 1 of the present invention.
图3为本发明的实施例1在Si衬底上的In金属纳米微球层上沉积得到的InN纳米柱的扫描电子显微镜照片。3 is a scanning electron micrograph of an InN nanocolumn deposited on an In metal nanosphere layer on a Si substrate according to Example 1 of the present invention.
图4为在Si衬底上直接生长InN纳米柱的截面扫描电子显微镜照片。4 is a cross-sectional scanning electron micrograph of a directly grown InN nanocolumn on a Si substrate.
具体实施方式detailed description
下面结合实施例，对本发明作进一步地详细说明，但本发明的实施方式不限于此。The present invention will be further described in detail below with reference to the embodiments, but the embodiments of the present invention are not limited thereto.
实施例1Example 1
图1为本实施例的生长在硅衬底上的InN纳米柱外延片的结构示意图，由 下至上依次包括Si衬底1、In金属纳米微球层2和InN纳米柱层3。1 is a schematic structural view of an InN nano-pillar epitaxial wafer grown on a silicon substrate according to the present embodiment, The bottom to top includes a Si substrate 1, an In metal nanosphere layer 2, and an InN nanopillar layer 3 in this order.
本实施例的生长在硅衬底上的InN纳米柱外延片的制备方法，包括以下步骤：The method for preparing an InN nano-pillar epitaxial wafer grown on a silicon substrate of the embodiment comprises the following steps:
(1)衬底以及其晶向的选取：采用普通Si衬底；(1) selection of the substrate and its crystal orientation: using a common Si substrate;
(2)衬底清洗：将Si衬底放入体积比为1:20的HF和去离子水混合溶液中超声2分钟，去除Si衬底表面氧化物和粘污颗粒，再放入去离子水中超声2分钟，去除表面杂质，用高纯干燥氮气吹干；(2) Substrate cleaning: The Si substrate was placed in a mixed solution of HF and deionized water at a volume ratio of 1:20 for 2 minutes to remove oxides and cohesive particles on the surface of the Si substrate, and then placed in deionized water. Ultrasonic for 2 minutes, remove surface impurities, and dry with high purity dry nitrogen;
(3)沉积In金属纳米微球：采用分子束外延生长工艺，衬底温度控制在400℃，在反应室的压力为6.0×10-10Torr条件下，在Si衬底上沉积In薄膜，并在原位退火50秒，形成直径为30-50nm的In金属纳米微球。(3) depositing In metal nanospheres: using a molecular beam epitaxial growth process, the substrate temperature is controlled at 400 ° C, and the In film is deposited on the Si substrate under the pressure of the reaction chamber of 6.0 × 10 -10 Torr, and Annealing in situ for 50 seconds to form In metal nanospheres having a diameter of 30-50 nm.
(4)直径均一InN纳米柱的生长：采用分子束外延生长工艺，衬底温度控制在600℃，在反应室的压力为6.0×10-5Torr，束流比V/III值为30条件下，在步骤(3)得到的In金属纳米微球的Si衬底上生长顶部和底部直径均一、直径分布为30-80nm的InN纳米柱。(4) Growth of a uniform diameter InN nanocolumn: using a molecular beam epitaxial growth process, the substrate temperature is controlled at 600 ° C, the pressure in the reaction chamber is 6.0 × 10 -5 Torr, and the beam current ratio is 30 under the V/III value. An InN nanocolumn having a uniform top and bottom diameter and a diameter distribution of 30-80 nm was grown on the Si substrate of the In metal nanosphere obtained in the step (3).
如图2所示，本实施例在Si衬底上预沉积In金属纳米微，其直径为30-50nm的In金属纳米微球扫描电子显微镜照片。As shown in FIG. 2, this embodiment pre-deposits In metal nano-micro on a Si substrate, and has a scanning electron micrograph of In metal nanospheres having a diameter of 30-50 nm.
图3是实施例1在Si衬底上生长高有序性、直径均一、顶部无金属In残留的InN纳米柱扫描电子显微镜照片，显示出了本发明制备的InN纳米柱外延片性能优异。而在Si衬底上直接生长InN纳米柱的截面扫描电子显微镜照片如图4所示，可知，采用在Si衬底上直接生长InN纳米柱的生长方法所获得的纳米柱直径不均一，也就是顶部和底部的直径不一致，呈倒金字塔、垒球棒等形貌的纳米柱。3 is a scanning electron micrograph of an InN nanocolumn in which a high order, uniform diameter, and top metal-free In residue is grown on a Si substrate, and the InN nanocolumn epitaxial wafer prepared by the present invention is excellent in performance. A cross-sectional scanning electron micrograph of a directly grown InN nanocolumn on a Si substrate is shown in FIG. 4. It can be seen that the diameter of the nanocolumn obtained by the growth method of directly growing the InN nanocolumn on the Si substrate is not uniform, that is, The diameters of the top and bottom are inconsistent, and they are nano-columns with inverted pyramids and softballs.
实施例2Example 2
本实施例的生长在硅衬底上的InN纳米柱外延片由下至上依次包括Si衬底、In金属纳米微球层和InN纳米柱层。The InN nano-pillar epitaxial wafer grown on the silicon substrate of the present embodiment includes a Si substrate, an In metal nano-microsphere layer, and an InN nano-pillar layer in this order from bottom to top.
本实施例的生长在Si衬底上的GaN纳米柱LED外延片的制备方法，包括以下步骤：The method for preparing a GaN nano-pillar LED epitaxial wafer grown on a Si substrate of the embodiment comprises the following steps:
(1)衬底以及其晶向的选取：采用普通Si衬底；(1) selection of the substrate and its crystal orientation: using a common Si substrate;
(2)衬底清洗：将Si衬底放入体积比为1:20的HF和去离子水混合溶液中超声2分钟，去除硅衬底表面氧化物和粘污颗粒，再放入去离子水中超声1分钟，去除表面杂质，用高纯干燥氮气吹干； (2) Substrate cleaning: The Si substrate was placed in a mixed solution of HF and deionized water at a volume ratio of 1:20 for 2 minutes to remove oxides and viscous particles on the surface of the silicon substrate, and then placed in deionized water. Ultrasonic for 1 minute, remove surface impurities, and dry with high purity dry nitrogen;
(3)沉积In金属纳米微球：采用分子束外延生长工艺，衬底温度控制在550℃，在反应室的压力为6.0×10-10Torr条件下，在Si衬底上沉积In薄膜，并在原位退火300秒，形成直径为50-70nm的In金属纳米微球。(3) deposition of In metal nanospheres: using a molecular beam epitaxial growth process, the substrate temperature is controlled at 550 ° C, and the In film is deposited on the Si substrate under the pressure of the reaction chamber of 6.0 × 10 -10 Torr, and After annealing in situ for 300 seconds, In metal nanospheres having a diameter of 50-70 nm were formed.
(4)直径均一InN纳米柱的生长：采用分子束外延生长工艺，衬底温度控制在700℃，在反应室的压力为6.0×10-5Torr，束流比V/III值为40条件下，在步骤(3)得到的In金属纳米微球的Si衬底上生长顶部和底部直径均一、直径分布为30-80nm的InN纳米柱。(4) Growth of a uniform diameter InN nanocolumn: using a molecular beam epitaxial growth process, the substrate temperature is controlled at 700 ° C, the pressure in the reaction chamber is 6.0 × 10 -5 Torr, and the beam current ratio is V/III is 40. An InN nanocolumn having a uniform top and bottom diameter and a diameter distribution of 30-80 nm was grown on the Si substrate of the In metal nanosphere obtained in the step (3).
本实施例制备的Si衬底上的InN纳米柱外延片无论是在电学性质、光学性质上，还是在缺陷密度、结晶质量都具有非常好的性能，测试数据与实施例1相近，在此不再赘述。The InN nano-pillar epitaxial wafer on the Si substrate prepared in this embodiment has very good performance in terms of electrical properties, optical properties, defect density, and crystal quality, and the test data is similar to that of Embodiment 1, and is not Let me repeat.
上述实施例为本发明较佳的实施方式，但本发明的实施方式并不受所述实施例的限制，其他的任何未背离本发明的精神实质与原理下所作的改变、修饰、替代、组合、简化，均应为等效的置换方式，都包含在本发明的保护范围之内。 The above embodiments are preferred embodiments of the present invention, but the embodiments of the present invention are not limited to the embodiments, and any other changes, modifications, substitutions, and combinations may be made without departing from the spirit and scope of the present invention. And simplifications, all of which are equivalent replacement means, are included in the scope of protection of the present invention.

Claims (8)

  1. 生长在Si衬底上的InN纳米柱外延片，其特征在于，由下至上依次包括Si衬底、In金属纳米微球层和InN纳米柱层。An InN nano-pillar epitaxial wafer grown on a Si substrate, characterized by comprising a Si substrate, an In metal nano-microsphere layer, and an InN nano-pillar layer in this order from bottom to top.
  2. 根据权利要求1所述的生长在Si衬底上的InN纳米柱外延片，其特征在于，所述In金属纳米微球层中的In金属纳米微球的直径为20-70nm。The InN nanocolumn epitaxial wafer grown on a Si substrate according to claim 1, wherein the In metal nanospheres in the In metal nanosphere layer have a diameter of 20 to 70 nm.
  3. 根据权利要求1所述的生长在Si衬底上的InN纳米柱外延片，其特征在于，所述InN纳米柱层中InN纳米柱直径为40-80nm。The InN nano-pillar epitaxial wafer grown on a Si substrate according to claim 1, wherein the InN nano-pillar in the InN nano-pillar layer has a diameter of 40-80 nm.
  4. 权利要求1所述的生长在Si衬底上的InN纳米柱外延片的制备方法，其特征在于，包括以下步骤：The method for preparing an InN nano-pillar epitaxial wafer grown on a Si substrate according to claim 1, comprising the steps of:
    (1)Si衬底清洗；(1) Si substrate cleaning;
    (2)沉积In金属纳米微球层：采用分子束外延生长工艺，衬底温度控制在400-550℃，在反应室的压力为5.0～6.0×10-10Torr条件下，在Si衬底上沉积In薄膜，并退火，得到In金属纳米微球；(2) Deposition of In metal nanospheres: using a molecular beam epitaxial growth process, the substrate temperature is controlled at 400-550 ° C, and the pressure in the reaction chamber is 5.0 to 6.0 × 10 -10 Torr on a Si substrate. Depositing an In film and annealing to obtain In metal nanospheres;
    (3)InN纳米柱层的生长：采用分子束外延生长工艺，衬底温度控制在500～700℃，在反应室的压力为4.0～10.0×10-5Torr，束流比V/III值为30～40条件下，在步骤(2)得到的In金属纳米微球上生长直径均一的InN纳米柱。(3) Growth of InN nano-pillar layer: using molecular beam epitaxial growth process, the substrate temperature is controlled at 500-700 ° C, the pressure in the reaction chamber is 4.0-10.0×10 -5 Torr, and the beam current ratio V/III value is An InN nanocolumn having a uniform diameter was grown on the In metal nanospheres obtained in the step (2) under conditions of 30 to 40.
  5. 根据权利要求1所述的生长在Si衬底上的InN纳米柱外延片的制备方法，其特征在于，步骤(2)中退火的温度为400-550℃，退火时间为50-300秒。The method for preparing an InN nano-pillar epitaxial wafer grown on a Si substrate according to claim 1, wherein the annealing temperature in the step (2) is 400-550 ° C, and the annealing time is 50-300 seconds.
  6. 根据权利要求1所述的生长在Si衬底上的InN纳米柱外延片的制备方法，其特征在于，步骤(1)所述Si衬底清洗，具体为：The method for preparing an InN nano-pillar epitaxial wafer grown on a Si substrate according to claim 1, wherein the Si substrate is cleaned in the step (1), specifically:
    将Si衬底放入体积比为1:20的HF和去离子水混合溶液中超声1～2分钟，去除硅衬底表面氧化物和粘污颗粒，再放入去离子水中超声1～2分钟，去除表面杂质，用高纯干燥氮气吹干。The Si substrate was placed in a mixed solution of HF and deionized water at a volume ratio of 1:20 for 1 to 2 minutes to remove oxides and viscous particles on the surface of the silicon substrate, and then ultrasonicated in deionized water for 1-2 minutes. Remove surface impurities and dry them with high purity dry nitrogen.
  7. 根据权利要求1所述的生长在Si衬底上的InN纳米柱外延片的制备方法，其特征在于，所述In金属纳米微球层中的In金属纳米微球的直径为20-70nm。The method for preparing an InN nanocolumn epitaxial wafer grown on a Si substrate according to claim 1, wherein the In metal nanospheres in the In metal nanosphere layer have a diameter of 20 to 70 nm.
  8. 根据权利要求1所述的生长在Si衬底上的InN纳米柱外延片的制备方法，其特征在于，所述InN纳米柱层中InN纳米柱直径为40-80nm。 The method for preparing an InN nano-pillar epitaxial wafer grown on a Si substrate according to claim 1, wherein the InN nano-pillar in the InN nano-pillar layer has a diameter of 40-80 nm.
PCT/CN2017/090006 2016-12-16 2017-06-26 Inn nanocolumn epitaxial wafer grown on si substrate and fabrication method for wafer WO2018107713A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201611166965.3A CN106783948B (en) 2016-12-16 2016-12-16 InN nano-pillar epitaxial wafer grown on Si substrate and preparation method thereof
CN201611166965.3 2016-12-16

Publications (1)

Publication Number Publication Date
WO2018107713A1 true WO2018107713A1 (en) 2018-06-21

Family

ID=58891924

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2017/090006 WO2018107713A1 (en) 2016-12-16 2017-06-26 Inn nanocolumn epitaxial wafer grown on si substrate and fabrication method for wafer

Country Status (2)

Country Link
CN (1) CN106783948B (en)
WO (1) WO2018107713A1 (en)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106783948B (en) * 2016-12-16 2023-08-22 华南理工大学 InN nano-pillar epitaxial wafer grown on Si substrate and preparation method thereof
CN107731975B (en) * 2017-10-24 2023-10-31 江门市奥伦德光电有限公司 Nanotube LED and manufacturing method thereof
CN108206130B (en) * 2018-01-11 2023-10-10 华南理工大学 Indium nitride nano-pillar epitaxial wafer grown on aluminum foil substrate and preparation method thereof
CN108231545B (en) * 2018-01-11 2020-09-22 华南理工大学 InN nano-column epitaxial wafer grown on copper foil substrate and preparation method thereof
CN108735866A (en) * 2018-07-20 2018-11-02 华南理工大学 It is grown in InN nano-pillar epitaxial wafers and preparation method thereof in Si/ graphene compound substrates
CN110747506A (en) * 2019-10-22 2020-02-04 华南理工大学 Transition metal doped InxGa1-xN nano column and preparation method and application thereof
CN114657534B (en) * 2022-02-18 2023-06-16 华南理工大学 MoS-based 2 InN nano-pillar as well as preparation method and application thereof
CN114657641A (en) * 2022-02-22 2022-06-24 华南理工大学 Annealed Si-based InN nano-column heterojunction and preparation method and application thereof
CN114921804B (en) * 2022-04-26 2023-06-20 华南理工大学 InN/organic heterostructure-based photoelectrode material and preparation method and application thereof
CN114875493B (en) * 2022-04-29 2023-08-18 华南理工大学 InN-VIA group heterojunction on Si substrate and preparation method and application thereof

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102842490A (en) * 2012-08-17 2012-12-26 马鞍山圆融光电科技有限公司 Self-assembling growth method of compound semiconductor film
CN103050350A (en) * 2012-12-28 2013-04-17 青岛润鑫伟业科贸有限公司 Preparation method of field emitting cathode
CN106783948A (en) * 2016-12-16 2017-05-31 华南理工大学 Growth InN nano-pillar epitaxial wafers on a si substrate and preparation method thereof
CN206271710U (en) * 2016-12-16 2017-06-20 华南理工大学 Growth InN nano-pillar epitaxial wafers on a si substrate

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7745315B1 (en) * 2007-10-03 2010-06-29 Sandia Corporation Highly aligned vertical GaN nanowires using submonolayer metal catalysts
CN102201332B (en) * 2011-05-08 2012-11-14 北京燕园中镓半导体工程研发中心有限公司 Preparation method of GaN substrate

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102842490A (en) * 2012-08-17 2012-12-26 马鞍山圆融光电科技有限公司 Self-assembling growth method of compound semiconductor film
CN103050350A (en) * 2012-12-28 2013-04-17 青岛润鑫伟业科贸有限公司 Preparation method of field emitting cathode
CN106783948A (en) * 2016-12-16 2017-05-31 华南理工大学 Growth InN nano-pillar epitaxial wafers on a si substrate and preparation method thereof
CN206271710U (en) * 2016-12-16 2017-06-20 华南理工大学 Growth InN nano-pillar epitaxial wafers on a si substrate

Also Published As

Publication number Publication date
CN106783948A (en) 2017-05-31
CN106783948B (en) 2023-08-22

Similar Documents

Publication Publication Date Title
WO2018107713A1 (en) Inn nanocolumn epitaxial wafer grown on si substrate and fabrication method for wafer
US11626491B2 (en) Indium nitride nanopillar epitaxial wafer grown on aluminum foil substrate and preparation method of indium nitride nanopillar epitaxial wafer
US8563395B2 (en) Method of growing uniform semiconductor nanowires without foreign metal catalyst and devices thereof
US9070794B2 (en) Method for making light emitting diode
TWI473758B (en) Method for making epitaxial structure
CN106981549B (en) Gallium nitride nano-pillar LED epitaxial wafer grown on silicon substrate and preparation method thereof
TW201343989A (en) Method of making epitaxial structure with micro-structure
US20140306256A1 (en) Light emitting diode
TW201241876A (en) A epitaxialstructure and method for making the same
CN107046088B (en) The GaN nano-pillar and its preparation method and application being grown on Si (111) substrate
CN108231545B (en) InN nano-column epitaxial wafer grown on copper foil substrate and preparation method thereof
US9269856B2 (en) Method for making light emitting diode
US9698350B2 (en) Light emitting diode
CN206271710U (en) Growth InN nano-pillar epitaxial wafers on a si substrate
Bakin et al. Vapour phase transport growth of ZnO layers and nanostructures
TWI442451B (en) A substrate with micro-structure and method for making the same
TW201339084A (en) Method for making epitaxial structure
CN108735866A (en) It is grown in InN nano-pillar epitaxial wafers and preparation method thereof in Si/ graphene compound substrates
CN109003888A (en) Epitaxial growth GaN nano-pillar and preparation method in silicon/graphene compound substrate
CN207834252U (en) The InN nano-pillar epitaxial wafers being grown on copper foil substrate
CN103996607B (en) Growth metal Al monocrystal thin films on a sapphire substrate and its preparation method and application
CN102560675A (en) Nonpolar InN film growing on LiGao2 substrate and preparation method of nonpolar InN film
Zhang et al. The InGaN material system and blue/green emitters
金ボラム Heteroepitaxial metal-organic vapor phase epitaxy of III-V semiconductors on Si for high efficiency and low-cost solar cells
CN104733580A (en) Epitaxial GaN structure with silylene as buffer layer and preparation method thereof

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 17880639

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

32PN Ep: public notification in the ep bulletin as address of the adressee cannot be established

Free format text: NOTING OF LOSS OF RIGHTS PURSUANT TO RULE 112(1) EPC (EPO FORM 1205A DATED 26/09/2019)

122 Ep: pct application non-entry in european phase

Ref document number: 17880639

Country of ref document: EP

Kind code of ref document: A1