WO2018095835A1 - Procédé pour identifier une défaillance d'un semi-conducteur monté en parallèle - Google Patents

Procédé pour identifier une défaillance d'un semi-conducteur monté en parallèle Download PDF

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Publication number
WO2018095835A1
WO2018095835A1 PCT/EP2017/079708 EP2017079708W WO2018095835A1 WO 2018095835 A1 WO2018095835 A1 WO 2018095835A1 EP 2017079708 W EP2017079708 W EP 2017079708W WO 2018095835 A1 WO2018095835 A1 WO 2018095835A1
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WO
WIPO (PCT)
Prior art keywords
signal
parallel
circuit
failure
evaluation
Prior art date
Application number
PCT/EP2017/079708
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German (de)
English (en)
Inventor
Martin NEUBERGER
Nils Draese
Mirko Schinzel
Christian Bohne
Original Assignee
Robert Bosch Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Robert Bosch Gmbh filed Critical Robert Bosch Gmbh
Publication of WO2018095835A1 publication Critical patent/WO2018095835A1/fr

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Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26—Testing of individual semiconductor devices
    • G01R31/2607—Circuits therefor
    • G01R31/2608—Circuits therefor for testing bipolar transistors
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26—Testing of individual semiconductor devices
    • G01R31/2607—Circuits therefor
    • G01R31/2621—Circuits therefor for testing field effect transistors, i.e. FET's
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26—Testing of individual semiconductor devices
    • G01R31/2642—Testing semiconductor operation lifetime or reliability, e.g. by accelerated life tests

Definitions

  • the invention relates to a method for detecting an at least partial failure of at least one parallel-connected semiconductor, in particular in an electrical system of a motor vehicle, and an arrangement for carrying out the method.
  • a highly automatic driving which is also referred to as highly automated driving
  • the vehicle has its own intelligence that could plan ahead and take on the driving task, at least in most driving situations. Therefore, in a highly automatic driving the electrical supply has a high safety relevance.
  • Multiphase DC-DC converters have long been known and are also used in multiple-voltage on-board networks.
  • the parallel connection of several semiconductors is already known as well as the control via a driver module.
  • the diagnosis of the entire DC-DC converter is known.
  • the testing of primary windings of voltage transformers is also known.
  • there are methods in which the switching converter can be diagnosed via FFT (Fast Fourier Transformation) or temperature measurements.
  • driver for MOSFETs which have already implemented a detection via the switching behavior.
  • the presented method is intended to detect the failure of a semiconductor component or of a semiconductor component which is connected in parallel with other components or components, for example of the same type.
  • a semiconductor device of the type discussed here is in particular a power semiconductor device.
  • Component such as, for example, a MOSFET or an IGBT, which is connected in parallel in an electronic device, such as a DC-DC converter.
  • it is now provided to measure a supply current and thereby determine a level of the supply current or its charge quantity, which in turn to a number of to be controlled semiconductors or
  • the method is, for example, in a parallel circuit of four
  • the embodiment detects the failure of a single phase of a DC-DC converter during operation in multi-phase circuits.
  • This can be used, for example, in the context of implementing an emergency operation.
  • the presented method enables the detection of the partial failure of clocked parallel-connected MOSFETs over the time course of the supply current of the driver. Since usually the parallel-connected MOSFETs are driven by a common driver and parasitic capacitances must be loaded or reloaded at each driving process, the supply current or its peak of the driver behaves in proportion to the number the semiconductor devices to be driven. This peak supply current serves as the basis of the diagnosis.
  • the presented circuit arrangement for detecting a failure can be used in an embodiment regardless of the amount of voltage supply of the driver or drive module. Likewise, the required positive
  • Supply voltage of the signal conditioning circuit can be provided by an additional circuit.
  • An advantage of the presented method is that in multi-phase systems with sequential control only one evaluation circuit is necessary for all phases. Upon detection of the partial failure of parallel semiconductor switches in multi-phase converters, a limp home mode can be realized by the current load of the partially defective phase is minimized by a phase current control.
  • a measuring resistor is implemented in the central power supply for all phase drivers, ie a signal conditioning circuit for all phases. Since in the embodiment is a nested multiphase converter with a time-offset timing, which is the rule, caused by the driver voltage peaks or peaks of the individual phases are offset in time. That's why only a simple implementation of the measuring circuit, ie only one circuit arrangement, needed to diagnose all phases. In the case of multiphase converters, the phases are always switched in an offset manner, otherwise some advantages of the topology would be omitted. The sig- nal running can be seen on the measuring resistor used. Reference is made to FIGS. 9 and 10.
  • the presented method also diagnoses the phase failure caused by the failure of all phase MOSFETs of multiphase transducers.
  • the threshold value is set to a low value, which is used to diagnose a failure of all MOSFETs, for example 10% to 15% of the maximum peak ripple of the phases.
  • the circuit arrangement and the method can be used for different evaluations.
  • the threshold value of the comparator (see FIG. 6) is set such that a permanent high or continuous low level is present at the microcontroller during partial failure. This method does not require high computing power, as it only responds to toggling of the output (see Figures 7 and 8).
  • a comparator output (see FIG. 6) is connected to an ADC pin of the microcontroller and the average voltage value is evaluated. If the average voltage drops below a threshold defined in the microcontroller, a certain number of MOSFETs have failed. Thus, the exact number of defective components can be diagnosed.
  • the comparator output (see Figure 6) is connected to a digital signal processor.
  • the signal is sampled at a multiple of the MOSFET switching frequency and a high / low evaluation is performed. Due to the 0-1 evaluation, small influences occur.
  • Digital signal processors also provide fast processing of the signal.
  • Figure 1 shows a block diagram of an embodiment of a two-channel electrical system according to the prior art.
  • Figure 2 shows a simplified representation of a prior art four-phase up-down switching converter.
  • FIG. 3 shows a failure of a parallel-connected MOSFET.
  • FIG. 4 shows measuring points of a driver monitoring.
  • Figure 5 shows a signal conditioning circuit
  • Figure 6 shows a PWM threshold and a comparator circuit.
  • FIG. 7 shows signal curves in the error-free case.
  • FIG. 8 shows signal curves in the event of an error.
  • FIG. 9 shows voltage ripple on the measuring resistor.
  • Figure 10 shows an output of a comparator in an interleaved multiphase DC-DC converter.
  • the invention is schematically illustrated by means of embodiments in the drawings and will be described in detail below with reference to the drawings.
  • the invention is illustrated by the example of a 48 V / 14 V voltage converter, but is also applicable to many other electronic components, even in pure 14 V, 48 V or high-voltage on-board networks.
  • FIG. 1 shows a vehicle electrical system, which is provided overall with the reference numeral 10 and represents a two-channel vehicle electrical system according to the prior art.
  • a base vehicle network 1 1 is marked with a border, in which 48V components and 14V components are provided without safety relevance.
  • a first channel 13 and a second channel 15 are provided.
  • the illustration shows a generator or an electric machine 12, which supplies a voltage of 48 V, a first so-called electronic power distribution unit 14 (electronic power supply unit; ePDU), a first consumer 16, a first battery 18 with 48V, a first battery management system (BMS) B, a first DC / DC converter 22 that converts the voltage of 48V to a voltage of 14V, a second ePDU 24, a second load 26, a second 14V battery 28 with a battery sensor 30, a second DC-DC converter 32, which converts the voltage of 48 V to a voltage of 14 V, a third battery 34 with a battery sensor 36, a safety-relevant consumer Rsla 38, whose function is redundantly satisfied by a consumer Rslb 40, a safety-relevant consumer Rs2a 42 with an internal, redundant load Rs2b 44.
  • ePDU electronic power supply unit
  • BMS battery management system
  • the first safety-related channel 13 is coupled to the base vehicle network 11 and includes safety-relevant consumers, such as. Brake and steering.
  • the second safety-relevant channel 15 also contains safety-relevant consumers. Since 14V are also supplied in this safety-relevant component, the second DC-DC converter 32 and the third battery 34 are provided.
  • FIG. 2 shows in a block diagram a simplified illustration of a four-phase DC-DC converter, which is denoted overall by the reference numeral 100 and is designed for both an upward and downward wall operation.
  • the illustration shows a high-side 102 with four parallel-connected MOSFETs 104 and a low-side 106 also each with four parallel-connected MOSFETs 108.
  • a ferrite module 120, a circuit breaker 122 for the high-side 102, a circuit breaker 124 for the low-side 106, a first filter 130, a second filter 132, terminal 40 134, terminal 30 136 and terminal 31 138 reproduced.
  • FIG. 3 shows on the left side a parallel circuit 150 of four MOSFETs 152, 154, 156, 158 as semiconductor elements or semiconductor switches. Furthermore, current arrows are entered, namely for an inflowing current I to 160, which divides an outgoing current b 162 and into four partial streams Ii 170, B 172, I 174 and I 4 176.
  • the object of the invention is the detection of a single failure of an array of parallel MOSFETs. This means that even if one of four parallel-connected semiconductor devices fails or is interrupted and thus the remaining three can still maintain the function of the circuit, this failure is to be recognized, since in later operation of the
  • FIG. 4 shows a driver 300 for parallel-connected semiconductor components, in particular of semiconductor switches, such as, for example, MOSFETs or IGBTs.
  • the illustration shows a supply voltage driver 302, a measuring resistor 304, a blocking capacitor 306, an inductance 308, a Zener diode 310, a capacitor 312, a first pulse driver 314 and a second pulse driver 316.
  • the two pulse drivers 314, 316 each provide a PWM signal ( PWM: pulse width modulation) for driving the driver 300 via a first input 320 and a second input 322 ready.
  • the supply in this case a supply voltage, is provided via a third input 324.
  • This supply and in particular its course can now be determined via the current flowing through the measurement resistor 304 or via the voltage at the blocking capacitor 306.
  • a first measuring point 330 and / or a second measuring point 332 can be provided.
  • the supply and in particular its course can thus be determined either via a profile of the supply current at the measuring resistor 304, which is connected in series with a supply line, or with the blocking capacitor 306 or a backup capacitor at the driver 300.
  • This backup capacitor is typically located between the supply pins of the driver 300 and the ground pin of the driver 300.
  • the driver outputs signals for gate connections of high-side MOSFETs at an output 340, signals for source connections of high-side MOSFETs and drain connections of low-side MOSFETs at a second output 342, and at a third output 344 signals for gate connections of low-side MOSFETs.
  • the invention will be described using the example of a voltage converter for a boost
  • the voltage converter is a 4-phase DC switching converter that can convert 14 V to 48 V or 48 V to 14 V.
  • the diagnosis basically works with control units or components which
  • MOSFET or IGBT drivers with external semiconductor switches such as MOS-FETs or IGBTs included.
  • the voltage converter is four-phase, each phase has four parallel high-side and four parallel-connected low-side MOSFETs. Each phase also has a respective driver component, which alternately controls the low-side and high-side MOSFETs.
  • One way of measuring the current consumption of the MOSFET drive module is the measurement of the voltage ripple across a defined resistor which is connected in series with the supply line, in FIG. 4 this is the first measurement point 330.
  • This defined resistance will also be referred to below as the measuring resistor or shunt .
  • the current required by the driver chip flows through the resistor causing a voltage drop across the resistor. About the voltage drop, an indirect current measurement is performed and evaluated in the next step in a developed measurement circuit.
  • the current of the driver supply is determined by measuring the voltage drop across a blocking capacitor.
  • the low-cost SM D resistor (shunt) can be replaced by a high-precision measurement shunt for increased accuracy.
  • OCV operational amplifiers
  • FIG. 5 shows a signal conditioning circuit 400 for removing a DC offset and for amplifying the signal.
  • a subtractor 402 consisting of resistors 404, 406, an operational amplifier 408, resistors 410, 412 to ground and a resistor 414 in parallel with the operational amplifier 408 of the signal conditioning circuit 400 serves to remove the DC offset, thereby the signal conditioning circuit 400 is independent of the height the driver supply voltage can be used. By removing the DC offset as possible voltage fluctuations in the supply line of the drive module for the diagnosis are not critical.
  • a serial amplifier 450 which includes an operational amplifier 452 and resistors 454 and 456, serves to condition the fundamental signal.
  • the signal conditioning circuit 400 does not require a separate positive supply to the operational amplifiers 408 and 452, since these are specifically provided by the circuitry.
  • An advantage of analogue signal conditioning is the high speed of error detection. Furthermore, the component costs are low.
  • the subsequent signal conditioning of the output signal of the amplifier or of the amplifier element 450 may alternatively be effected by means of a microcontroller, digital signal processor (DSP) or a field programmable gate array (FPGA) (digital or analog).
  • DSP digital signal processor
  • FPGA field programmable gate array
  • the voltage drop is interrogated via an ADC input PIN and evaluated integrally via a change in the voltage surface or evaluated by means of an internal comparator.
  • FIG. 6 shows an example of signal conditioning from a PWM
  • This threshold 482 can z. B. via a microcontroller and the PWM.
  • the result is an output signal, the input signal 502 for a comparator 490 together with the output signal 500 of the circuit arrangement shown in Figure 5.
  • the values 500 and 502 are compared with each other.
  • the threshold value can be set permanently via a high-impedance voltage divider or alternatively via a PWM output of a microcontroller.
  • the output of the comparator switches between its positive or negative modulation range when it exceeds or falls below the defined threshold value.
  • the evaluation of the output signal of the comparator can be done in various ways.
  • FIGS. 7 and 8 A possible output signal of the analog signal processing in connection with the comparator circuit is shown in FIGS. 7 and 8.
  • FIG. 7 shows the signal curve of the voltage at the output of the signal
  • the pulse-shaped voltage curve 610 with a significant peak value is attributed to the current flow through the recharge of the gate charges in the MOSFET or IGBT.
  • the threshold value can therefore be set so that only when all parallel-connected gate charges are charged, the threshold is exceeded,
  • Figure 8 shows the waveform of the voltage at the output of the comparator in the faulty case, d. H. one or more power semiconductors connected in parallel are defective, for example.
  • the illustration shows in a graph 700, at the abscissa 602 the time [ ⁇ ] and at the ordinate 604 the voltage [V] is plotted, the voltage curve 710, the course of a signal 712 to the microcontroller, in the faulty case permanent low signal at the microcontroller, and a level 714 of a threshold, which is not exceeded in this case.
  • an equal-clocking high level 612 is output from the comparator, depending on the set switching frequency of the MOSFETs.
  • the threshold 714 is not reached and a steady LOW signal 712 is asserted on the microcontroller.
  • the evaluation of the comparator signal can be realized in various ways. By interchanging the input pins of the comparator, the output signal can always be inverted. The positive as well as negative level of the output voltage depends on the supply voltage of the OPV.
  • the evaluation of the diagnosis or of the output signal can be realized with the following approaches:
  • the threshold value of the comparator is set so that a permanent high or continuous low level is present at the microcontroller during partial failure.
  • This method does not require high computing power, as it reacts only to a toggle of the output (see FIG. 7 and FIG. 8).
  • - Analog average evaluation The comparator output 612/712 is connected to an ADC PIN of the microcontroller and the average voltage value is evaluated. If the average voltage drops below a threshold defined in the microcontroller, a certain number of MOSFETs have failed.
  • the comparator output 612/712 is connected to a digital signal processor (DSP), the signal is multiplied by a few
  • DSPs Due to the 0-1-evaluation low influences, DSPs offer a fast further processing of the signal.
  • the invention can be further developed as follows.
  • FIG. 9 shows the signal curve in which a four-phase converter is diagnosed with the aid of the abovementioned devices.
  • FIG. 9 shows graph 810 of the voltage drop at the shunt for the first phase 820, the second phase 822, the third phase 824 and the fourth phase in a graph 800 whose abscissa 802 is the time and the ordinate 804 the voltage 826 for the error-free case.
  • An additional registered history 830 in the second phase 822 illustrates an error 832 in this phase.
  • the curve 830 remains below the variably settable PWM threshold 840.
  • FIG. 9 thus shows the input signal, corresponding to 610/710 in the preceding maps for the iO case and the niO case in an image.
  • FIG. 10 further shows the output signal of the comparator circuit, corresponding to 612/712 in the previous figures for the case of iO and the case of niO in an image.
  • FIG. 10 shows in a graph 900, at the abscissa 902 the time and at whose ordinate 904 the voltage is plotted, the profile 910 of the pending signal at the microcontroller when using the diagnostic system. on a multiphase transformer for the first phase 920, the second phase 922, the third phase 924 and the fourth phase for the error-free case.
  • Another trace 930 shows this signal at an error 932 in the second phase.
  • the measuring resistor is implemented in the central power supply for all phase drivers, d. H. a signal conditioning circuit for all phases. Since it is an interleaved multiphase converter with staggered timing of the phases, which is the rule, the current peaks caused by the driver of the individual phases are offset in time. For this reason, only a single implementation of the measurement circuit is needed to diagnose all phases. It should be noted that in multi-phase converters, the phases are shifted in almost all designs, otherwise some advantages of the topology would be omitted.
  • the waveform used in FIG. 9 can be seen on the measuring resistor used. In error-free operation (FIGS. 9 and 10, reference numerals 810, 910), the signal curve shown results.
  • the illustrated threshold value 840 for the comparator can be realized by means of a PWM output of the microcontroller, thereby the value can be set variably.
  • Reference numerals 830 and 930, respectively, represent the waveform of the fault, in this case a partial failure of MOSFETs in phase 2.
  • the level of the comparator changes to low in phase 2.
  • the presented method also diagnoses the phase failure caused by the failure of all phase MOSFETs by multiphase transducers.
  • the threshold value is set to a low value which serves to diagnose a failure of all MOSFETs, for example 10% -15% of the maximum peak ripple of the phases.
  • the threshold would have to be very be set low, for example in the range of 10% of the peak voltage value of the phases. This is due to the fact that in case of failure of a phase of the drive module does not receive power.
  • the failure of a phase can have different causes, by means of this diagnosis the phase failure due to the failure of the driver module of the parallel connected
  • the maximum voltage peak value can be determined in order to take into account possible influences of the temperature or component tolerances for the diagnosis.
  • the threshold value 840 of the comparator (reference numeral 490 in FIG. 6) is incrementally increased upon booting of the component until the peak value of the conditioned measurement signal is detected. If the threshold value exceeds the processed measuring signal, the comparator output tilts and the peak value of the measuring signal is detected. On the basis of this maximum value, the threshold value 840 is set individually.
  • the method can be used for monitoring all converters with parallel-connected semiconductor or multiphase converters.
  • the transducers in which an increased self-diagnosis and emergency running properties are required, eg. For example, in an automated driving or Limp Home mode.
  • the method may also provide that an initialization run is performed during a boot process that sets the thresholds of the comparator circuit.
  • an initialization run is performed during a boot process that sets the thresholds of the comparator circuit.
  • the method can also be used for products other than those described herein, in which high currents are switched and thus parallel semiconductor are installed.

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Dc-Dc Converters (AREA)

Abstract

L'invention concerne un procédé pour identifier une défaillance au moins partielle d'au moins un composant semi-conducteur (252) monté en parallèle avec d'autres composants semi-conducteurs (254, 256, 258), une variation d'une alimentation, représentée par un signal de mesure, d'un circuit d'attaque (300) prévu pour exciter les composants semi-conducteurs (252, 254, 256, 258) étant déterminée et évaluée, et un post-traitement de cette variation permettant de déterminer si au moins un des composants semi-conducteurs (252, 254, 256, 258) montés en parallèle présente une défaillance.
PCT/EP2017/079708 2016-11-28 2017-11-20 Procédé pour identifier une défaillance d'un semi-conducteur monté en parallèle WO2018095835A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102016223511.7 2016-11-28
DE102016223511.7A DE102016223511A1 (de) 2016-11-28 2016-11-28 Verfahren zum Erkennen eines Ausfalls eines parallel geschalteten Halbleiters

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WO2018095835A1 true WO2018095835A1 (fr) 2018-05-31

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WO (1) WO2018095835A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111679170A (zh) * 2020-06-09 2020-09-18 浙江大学 一种基于可靠性快速测试的晶体管阵列结构设计方法

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102022204075A1 (de) 2022-04-27 2023-11-02 Robert Bosch Gesellschaft mit beschränkter Haftung Verfahren und Vorrichtung zur Überwachung einer Vielzahl parallelgeschalteter Halbleiterschalter

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Publication number Priority date Publication date Assignee Title
DE102007024175A1 (de) * 2007-05-24 2008-12-11 Robert Seuffer Gmbh & Co. Kg Verfahren und Vorrichtung zur Frühausfallerkennung bei einer Halbleiterschaltanordnung mit zumindest einer isolierten Steuerelektrode, und Herstellungsverfahren für eine solche
DE102013219975A1 (de) * 2012-10-09 2014-04-10 Fuji Electric Co., Ltd Gate-Ansteuerschaltung mit einer Fehlererkennungsschaltung für eine Halbleiter-Schalteinrichtung

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102007024175A1 (de) * 2007-05-24 2008-12-11 Robert Seuffer Gmbh & Co. Kg Verfahren und Vorrichtung zur Frühausfallerkennung bei einer Halbleiterschaltanordnung mit zumindest einer isolierten Steuerelektrode, und Herstellungsverfahren für eine solche
DE102013219975A1 (de) * 2012-10-09 2014-04-10 Fuji Electric Co., Ltd Gate-Ansteuerschaltung mit einer Fehlererkennungsschaltung für eine Halbleiter-Schalteinrichtung

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111679170A (zh) * 2020-06-09 2020-09-18 浙江大学 一种基于可靠性快速测试的晶体管阵列结构设计方法
CN111679170B (zh) * 2020-06-09 2021-12-07 浙江大学 一种基于可靠性快速测试的晶体管阵列结构设计方法

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