WO2018095399A1 - 供电 - Google Patents

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Publication number
WO2018095399A1
WO2018095399A1 PCT/CN2017/112797 CN2017112797W WO2018095399A1 WO 2018095399 A1 WO2018095399 A1 WO 2018095399A1 CN 2017112797 W CN2017112797 W CN 2017112797W WO 2018095399 A1 WO2018095399 A1 WO 2018095399A1
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WIPO (PCT)
Prior art keywords
pse
port group
pair
power
ports
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PCT/CN2017/112797
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English (en)
French (fr)
Inventor
汲哲
宁保涛
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新华三技术有限公司
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Application filed by 新华三技术有限公司 filed Critical 新华三技术有限公司
Priority to US16/462,275 priority Critical patent/US11025441B2/en
Priority to EP17874614.5A priority patent/EP3547479B1/en
Priority to JP2019527381A priority patent/JP6975785B2/ja
Publication of WO2018095399A1 publication Critical patent/WO2018095399A1/zh

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J1/00—Circuit arrangements for dc mains or dc distribution networks
    • H02J1/08—Three-wire systems; Systems having more than three wires
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/02—Details
    • H04L12/10—Current supply arrangements

Definitions

  • PoE Power over Ethernet
  • PoL Power over LAN
  • Active Ethernet refers to the Ethernet Cat.5 cabling infrastructure.
  • IP Internet Protocol
  • IP Internet Protocol
  • DC power supply technology ensures the proper operation of the network while ensuring the security of structured cabling, minimizing costs.
  • FIG. 1 is a schematic structural diagram of a PSE according to an exemplary embodiment of the present application.
  • FIG. 2 is another schematic structural diagram of a PSE according to an exemplary embodiment of the present application.
  • FIG. 3 is a schematic structural diagram of a PSE and a connected PD thereof according to an exemplary embodiment of the present application.
  • the PoE system includes: PSE (Power Sourcing Equipment) and PD (Power Device). Equipment) and Ethernet cable.
  • PSE Power Sourcing Equipment
  • PD Power Device
  • Ethernet cable the PSE delivers electrical energy to the PD through an Ethernet line, and performs power management and statistics.
  • the PD takes power from the PSE through the Ethernet line and converts it to a normal voltage for its own use.
  • a PSE is provided in the embodiment of the present application, and the PSE can provide ultra-high power to the PD through a single Ethernet cable.
  • the PSE includes: a detection and classification unit 101, a power supply unit 102, and a first port group 103 composed of a plurality of PSE ports and a second port group 104 composed of a plurality of PSE ports, wherein:
  • the first port group 103 is composed of M PSE ports, denoted as Vport1_1, Vport1_2, ..., Vport1_M, where M ⁇ 2; M PSE ports in the first port group 103 are connected in parallel and connected to the first pair in the Ethernet line. 201 and second pair 202. Specifically, since each PSE port has two pins for outputting a positive voltage and a negative voltage, respectively, the manner in which the M PSE ports are connected in parallel and the first pair 201 and the second pair 202 in the Ethernet line are connected in parallel. The first pin on the M PSE ports is connected in parallel and connected to the first wire pair 201 through a transformer. The second pins on the M PSE ports are connected in parallel and connected to the second wire pair 202 through a transformer.
  • the second port group 104 is composed of N PSE ports, denoted as Vport2_1, Vport2_2, ..., Vport2_N, where N ⁇ 2; N PSE ports in the second port group 104 are connected in parallel and connected to the third pair 203 in the Ethernet line. And the fourth line pair 204.
  • N PSE ports in the second port group 104 are connected in parallel and connected to the third pair 203 in the Ethernet line.
  • the fourth line pair 204 is composed of N PSE ports, denoted as Vport2_1, Vport2_2, ..., Vport2_N, where N ⁇ 2; N PSE ports in the second port group 104 are connected in parallel and connected to the third pair 203 in the Ethernet line. And the fourth line pair 204.
  • each PSE port has two pins for outputting a positive voltage and a negative voltage, the manner in which the N PSE ports are connected in parallel and the third pair 203 and the fourth pair 204 in the Ethernet line are connected in parallel
  • M and N may be the same or different, for example, both M and N are 2.
  • the first pair 201 may be a pair of 1st and 2nd lines in the Ethernet line
  • the second pair 202 may be a pair of 3rd and 6th lines
  • the third pair 203 may be The pair of the 4th and 5th lines may be the pair of the 7th and 8th lines.
  • the first pair 201 may be a pair of 4th and 5th lines in the Ethernet line
  • the second pair 202 may be a pair of 7th and 8th lines
  • the third pair 203 may be It is a pair of the first and second lines
  • the fourth pair 204 can be a pair of the third and sixth lines, which is not limited in this application.
  • the detection and classification unit 101 is configured to perform feature detection on the PD connected to the Ethernet line.
  • the feature detection refers to outputting a low voltage of 2V to 10V (called a detection voltage for convenience of description) before powering the PD. To detect whether the PD meets the relevant standards.
  • the detection and classification unit 101 is further configured to perform power classification on the PD when the PD passes the feature detection. If the feature detection passes, the output voltage is further increased to power the PD to determine how much work the PD needs. Rate, then power adjustment and allocation, for example, divided into five power levels of class 0 ⁇ 4.
  • the power supply unit 102 is configured to output a working voltage from the first port group 103 to supply power to the PD through the first pair 201 and the second pair 202 when the detecting and classifying unit 101 completes feature detection and power classification of the PD, and
  • the operating voltage is output from the second port group 104 to supply power to the PD through the third pair 203 and the fourth pair 204.
  • the power supply unit 102 outputs a positive voltage (or a negative voltage) from a first pin of the M PSE ports included in the first port group 103, and a negative voltage (or a positive voltage) from the second pin.
  • the working voltage is output to the PD through the first pair 201 and the second pair 202;
  • the power supply unit 102 outputs a positive voltage (or a negative voltage) from the first pin of the N PSE ports included in the second port group 104, from A negative voltage (or a positive voltage) is outputted on the second pin, thereby outputting an operating voltage to the PD through the third pair 203 and the fourth pair 204.
  • the operating voltage is generally between 50V and 57V.
  • the PSE contains two port groups, each of which consists of multiple PSE ports.
  • the PSE ports in each port group are connected in parallel and the PD is powered by two pairs of lines in the Ethernet line.
  • the minimum output power of a single PSE port is 30 W (watts), so the PSE transmits the voltage output from at least 4 PSE ports to the PD over a single Ethernet line, providing a minimum of 120 W for the PD.
  • the number of the connected devices that can be connected to the power supply device is greatly increased. For example, the number of ultra-thin bodies that can be connected to the ultra-thin body in the WLAN network can be increased.
  • the detection and classification unit 101 may output a first detection voltage from the first port group, where the first detection voltage may range from 2V to 10V, and acquire the first on the port group. a current, according to the obtained first current value, obtaining a first impedance value of the PD; outputting a second detection voltage from the second port group, the second detection voltage may range from 2V to 10V, and acquiring the port group a second current, according to the obtained second current value, obtaining a second impedance value of the PD; if the first impedance value and the second impedance value are both within a predetermined characteristic signature range (Accept Signature Resistance), then It is determined that the PD passes the feature detection, wherein the characteristic impedance range is related to the internal resistance of the PSE port included in the port group in parallel.
  • a predetermined characteristic signature range (Accept Signature Resistance)
  • each port group consists of multiple PSE ports, after these PSE ports are connected in parallel, the internal resistance of the port will be reduced accordingly. Therefore, it is required to increase the impedance value of the PD so that the total resistance value in the circuit (the internal resistance of the PSE port) The sum of the impedance values of the PD remains unchanged.
  • the lower and lower limits of the characteristic impedance range need to be increased accordingly. For example, when a port group consists of two PSE ports, the characteristic impedance ranges from 37K to 42K ohms by calculation.
  • the minimum output power of each PSE port is increased to 35W or more, so that when the PSE transmits the voltage output from at least four PSE ports to the PD through a single Ethernet cable, It is possible to further increase the minimum output power of the PSE to more than 140W.
  • the PSE chip can be used to implement the above PSE. Since the number of PSE ports on different types of PSE chips may be different, some PSE chips have 2 PSE ports, and some PSE chips have 4 or 8 PSE ports, therefore, if the number of PSE ports on the PSE chip is less than 4, more than 2 PSE chips are needed to implement the above PSE, and if the number of PSE ports on the PSE chip is equal to or greater than 4, one can be used. The PSE chip can be used.
  • the PSE in the embodiment of the present application may further include: a register unit 105, where:
  • the preset overload protection power value is stored in the register unit 105.
  • the power supply unit 102 is further configured to stop from the first port group 103 and when detecting that the current power of the PD exceeds the overload protection power value held in the register unit 105.
  • the working voltage is outputted on the second port group 104 to power off the PD to protect the security of the device.
  • the configuration of the power classification is also stored in the register unit 105.
  • the configuration information includes: dividing the power level into six levels class0 to class5, and the minimum output power of the PSE corresponding to class5 is (M+N)*B. Where M represents the number of PSE ports in the first port group, N represents the number of PSE ports in the second port group, and B represents the minimum output power of the PSE port.
  • the detection and classification unit 101 is specifically configured to perform power classification on the PD according to the configuration information related to the power classification stored in the register unit 105.
  • the power level and the corresponding PSE minimum output power in the embodiment of the present application are as shown in Table 1:
  • the minimum output power of the PSE side corresponding to class 5 is (M+N)*B watts.
  • the class 5 is not stored in the PSE chip used, it is necessary to add class 5 and its corresponding PSE minimum output power to the register of the PSE chip.
  • the foregoing detection and classification unit 101 may not perform power classification on the PD.
  • the power supply unit 102 directly supplies power to the PD.
  • the related configuration information about the power level saved in the register of the PSE chip needs to be canceled (or set to not enabled), for example, canceling each class corresponding The power threshold, etc., also need to stop detecting the power level error, or stop the power classification error alarm, that is, not detecting the power classification error, or Power rating error alarms are not performed.
  • the PSE is used as a PSE chip.
  • the PSE chip has four PSE ports Vport1_1, Vport1_2, Vport2_1, and Vport2_2 as an example.
  • the power supply principle of the PSE in this embodiment is introduced. As shown in Figure 3, one pin on Vport1_1 and one pin on Vport1_2 are connected in parallel and then connected to the first and second pairs in the Ethernet line through the transformer, the other pin on Vport1_1 and the other pin on Vport1_2.
  • the PD connected to the Ethernet line may include more than two PD chips.
  • FIG. 3 only two PD chips are taken as an example.
  • the PD chip 3_1 passes through the transformer and the first of the Ethernet lines.
  • the 2-pair pair is connected to the 3rd and 6th pairs
  • the PD chip 3_2 is connected to the 4th and 5th pairs and the 7th and 8th pairs in the Ethernet line through a transformer.
  • more than two of the chips can be connected in parallel with the first, second, and third and sixth pairs, or in parallel with the fourth and fifth pairs. Connect to the 7th and 8th pairs.
  • the PSE chip performs feature detection on the PD chip 3_1 by outputting detection voltages from the PSE ports Vport1_1 and Vport1_2, and performs feature detection on the PD chip 3_2 by outputting detection voltages from the PSE ports Vport2_1 and Vport2_2;
  • the PSE chip performs power classification on the PD chip 3_1, and if the PD chip 3_2 feature detection passes, the PSE chip performs power classification on the PD chip 3_2;
  • the PSE chip If the power classification of the PD chip 3_1 is completed, the PSE chip outputs an operating voltage from the PSE ports Vport1_1 and Vport1_2 to supply power to the PD chip 3_1, and if the power classification of the PD chip 3_2 is completed, the PSE chip outputs the operating voltage from the PSE ports Vport2_1 and Vport2_2. To supply power to the PD chip 3_2.
  • the PSE chip may perform feature detection, power classification, and power supply on the PD chip 3_1, and then directly use the above feature detection and power classification results to supply power to the PD chip 3_2.
  • the device embodiment since it basically corresponds to the method embodiment, reference may be made to the partial description of the method embodiment.
  • the device embodiments described above are merely illustrative, wherein the units described as separate components may or may not be physically separate, and the components displayed as units may or may not be physical units, ie may be located A place, or it can be distributed to multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the embodiment. Those of ordinary skill in the art are not creative In the case of action, it can be understood and implemented.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Power Engineering (AREA)
  • Small-Scale Networks (AREA)
  • Power Sources (AREA)
  • Direct Current Feeding And Distribution (AREA)

Abstract

本申请示例提供了PSE。在一示例中，该PSE中包括：第一端口组，包括多个PSE端口，所述第一端口组中的PSE端口并联后连接以太网线中的第一线对和第二线对；第二端口组，包括多个PSE端口，所述第二端口组中的PSE端口并联后连接所述以太网线中的第三线对和第四线对；检测分级单元，用于对所述以太网线所连接的受电设备PD进行特征检测；供电单元，用于当所述PD通过了所述特征检测，从所述第一端口组上输出工作电压，以及，从所述第二端口组上输出工作电压。

Description

供电
相关申请的交叉引用
本专利申请要求于2016年11月25日提交的、申请号为201611067048.X、发明名称为“一种PSE”的中国专利申请的优先权，该申请的全文以引用的方式并入本文中。
背景技术
PoE(Power over Ethernet，以太网供电)，也被称为基于局域网的供电系统(PoL，Power over LAN)或有源以太网(Active Ethernet)，指的是在以太网Cat.5布线基础架构不作任何改动的情况下，在为一些基于IP(Internet Protocol，因特网协议)的终端设备，如IP电话机、无线局域网接入点AP、网络摄像机等传输数据信号的同时，还能为此类终端设备提供直流供电的技术。PoE技术能在确保结构化布线安全的同时保证网络的正常运作，最大限度地降低成本。
附图说明
图1是本申请一示例性实施例示出的PSE的一种结构示意图；
图2是本申请一示例性实施例示出的PSE的另一种结构示意图；
图3是本申请一示例性实施例示出的PSE及其连接的PD的结构示意图。
具体实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
PoE系统包括：PSE(Power Sourcing Equipment，供电设备)、PD(Power Device，受电 设备)和以太网线。其中，PSE通过以太网线向PD输送电能，并且进行电力的管理和统计。PD通过以太网线从PSE获取电能，并转换成普通电压以供自身使用。
本申请实施例中提供了一种PSE，该PSE能够通过单根以太网线为PD提供超大功率的电能。
如图1所示，该PSE中包括：检测分级单元101、供电单元102、以及由多个PSE端口组成的第一端口组103和多个PSE端口组成的第二端口组104，其中：
第一端口组103由M个PSE端口组成，记为Vport1_1、Vport1_2、…、Vport1_M，其中，M≥2；第一端口组103中的M个PSE端口并联后连接以太网线中的第一线对201和第二线对202。具体的，由于每一个PSE端口具有2个管脚，分别用于输出正电压和负电压，因此，上述M个PSE端口并联后连接以太网线中的第一线对201和第二线对202的方式可为：这M个PSE端口上的第一管脚并联后通过变压器连接第一线对201，这M个PSE端口上的第二管脚并联后通过变压器连接第二线对202。
第二端口组104由N个PSE端口组成，记为Vport2_1、Vport2_2、…、Vport2_N，其中，N≥2；第二端口组104中的N个PSE端口并联后连接以太网线中的第三线对203和第四线对204。具体的，由于每一个PSE端口具有2个管脚，分别用于输出正电压和负电压，因此，上述N个PSE端口并联后连接以太网线中的第三线对203和第四线对204的方式为：这N个PSE端口上的第一管脚并联后通过变压器连接第三线对203，这N个PSE端口上的第二管脚并联后通过变压器连接第四线对204。
M和N可以相同也可以不同，例如，M和N均为2。在一示例中，第一线对201可以是以太网线中的第1、2根线组成的线对，第二线对202可以是第3、6根线组成的线对，第三线对203可以是第4、5根线组成的线对，第四线对可以是第7、8根线组成的线对。在另一示例中，第一线对201可以是以太网线中的第4、5根线组成的线对，第二线对202可以是第7、8根线组成的线对，第三线对203可以是第1、2根线组成的线对，第四线对204可以是第3、6根线组成的线对，本申请对此不做限定。
检测分级单元101，用于对以太网线所连接的PD进行特征检测；其中，特征检测是指在为PD供电之前，先输出一个2V～10V的低电压(为了描述方便，称为检测电压)，来检测PD是否符合相关标准。
该检测分级单元101还用于在所述PD通过了特征检测时，对所述PD进行功率分级。如果特征检测通过，会将输出电压进一步提高来对PD进行功率分级，来判断PD需要多大的功 率，然后进行功率调整和分配，例如，分为了class 0～4这5个功率等级。
供电单元102，用于当检测分级单元101完成了对PD的特征检测和功率分级，从第一端口组103上输出工作电压，以通过第一线对201和第二线对202向PD供电，以及，从第二端口组104上输出工作电压，以通过第三线对203和第四线对204向PD供电。
在一示例中，供电单元102从第一端口组103包含的M个PSE端口的第一管脚上输出正电压(或负电压)，从第二管脚上输出负电压(或正电压)，从而实现通过第一线对201和第二线对202向PD输出工作电压；供电单元102从第二端口组104包含的N个PSE端口的第一管脚上输出正电压(或负电压)，从第二管脚上输出负电压(或正电压)，从而实现通过第三线对203和第四线对204向PD输出工作电压。例如，工作电压一般在50V～57V。
由上，PSE中包含2个端口组，每一个端口组由多个PSE端口组成，每一个端口组中的PSE端口并联后通过以太网线中的2对线为PD供电。在一示例中，单个PSE端口的最小输出功率为30W(瓦)，因此，PSE将至少4个PSE端口输出的电压通过单根以太网线传输给PD，能够为PD提供最低120W的功率。对于需要超大功率的供电设备而言，大大增加了此种供电设备可连接的下挂设备的数量，例如，能够增加WLAN组网中的超瘦本体可连接的超瘦分体的数量。
其中，为了实现对PD的特征检测，检测分级单元101可以从该第一端口组上输出第一检测电压，该第一检测电压的范围可以在2V～10V，同时获取该端口组上的第一电流，根据获取到的第一电流值，得到PD的第一阻抗值；从该第二端口组上输出第二检测电压，该第二检测电压的范围可以在2V～10V，同时获取该端口组上的第二电流，根据获取到的第二电流值，得到PD的第二阻抗值；如果所述第一阻抗值和第二阻抗值都在预定的特征阻抗范围(Accept Signature Resistance)内，则确定PD通过了特征检测，其中，该特征阻抗范围与该端口组包含的PSE端口并联后的内阻有关。
由于每一个端口组由多个PSE端口组成，这些PSE端口并联后，端口内阻会相应减小，因此，这就要求增加PD的阻抗值，以使电路中的总电阻值(PSE端口内阻与PD的阻抗值之和)保持不变。在一示例中，特征阻抗范围中的下限值和下限值需要相应增大。例如，当端口组由2个PSE端口组成时，通过计算，该特征阻抗范围为37K～42K欧姆。
另外，为了满足实际的超大功率供电的需求，将每一个PSE端口的最小输出功率提高为35W甚至更大，这样，当PSE将至少4个PSE端口输出的电压通过单根以太网线传输给PD，能够进一步将PSE的最小输出功率提高到140W以上。
在一示例中，可以采用PSE芯片来实现上述的PSE，由于不同型号的PSE芯片上的PSE端口数量有可能不同，有的PSE芯片上有2个PSE端口，有的PSE芯片上有4个或8个PSE端口，因此，如果PSE芯片上的PSE端口数量小于4，则需要使用2个以上PSE芯片来实现上述PSE，而如果PSE芯片上的PSE端口数量等于或大于4，则可使用1个PSE芯片即可。
如图2所示，本申请实施例的PSE中还可以包括：寄存器单元105，其中：
寄存器单元105中保存有预设的过载保护功率值，这样，供电单元102还用于在检测到PD的当前功率超过寄存器单元105中保存的过载保护功率值时，停止从第一端口组103和第二端口组104上输出工作电压，从而对PD进行断电，以保护自身设备的安全。
寄存器单元105中还保存有功率分级相关的配置信息，其中，该配置信息中包括：将功率等级分为6个等级class0～class5，class5对应的PSE最小输出功率为(M+N)*B瓦，其中，M表示所述第一端口组中的PSE端口数量，N表示所述第二端口组中的PSE端口数量，B表示PSE端口的最小输出功率。这样，检测分级单元101具体用于根据寄存器单元105中保存的功率分级相关的配置信息，对PD进行功率分级。
具体的，本申请实施例中的功率等级及其对应的PSE最小输出功率如表1所示：
表1
class0 15.4瓦
class1 4瓦
class2 7瓦
class3 15.4瓦
class4 30瓦
class5 (M+N)*B瓦
由表1可见，class5对应的PSE侧的最小输出功率为(M+N)*B瓦。其中，当M＝2、N＝2、B＝30时，class5对应的PSE侧的最小输出功率为120瓦。在一示例中，当所使用的PSE芯片中未存储上述class 5时，需要在该PSE芯片的寄存器中增加class5及其对应的PSE最小输出功率。
另外，在一示例中，上述检测分级单元101也可以不对PD进行功率分级，在检测分级单元101对PD进行特征检测通过后，供电单元102直接对PD进行供电。在一示例中，当所使用PSE芯片预先设置了不对PD执行功率分级，需要将该PSE芯片的寄存器中保存的关于功率等级的相关配置信息取消(或设置为不启用)，例如，取消各个class对应的功率门限值等，还需要停止检测功率等级错误，或停止对功率分级错误报警，即，不检测功率分级错误，或 不会进行功率分级错误报警。
下面以上述PSE为一个PSE芯片，该PSE芯片上具有4个PSE端口Vport1_1、Vport1_2、Vport2_1、Vport2_2为例，对本申请实施例的PSE的供电原理进行介绍。如图3所示，Vport1_1上的一个管脚和Vport1_2上的一个管脚并联后通过变压器连接以太网线中的第1、2线对，Vport1_1上的另一个管脚和Vport1_2上的另一个管脚并联后通过变压器连接该以太网线中的第3、6线对；Vport2_1上的一个管脚和Vport2_2上的一个管脚并联后通过变压器连接该以太网线中的第4、5线对，Vport2_1上的另一个管脚和Vport2_2上的另一个管脚并联后通过变压器连接该以太网线中的第7、8线对。
该以太网线所连接的PD中可以包含两个以上PD芯片，图3中仅以2个PD芯片为例进行说明，由图3可以看出，PD芯片3_1通过变压器与该以太网线中的第1、2线对和第3、6线对连接，PD芯片3_2通过变压器与该以太网线中的第4、5线对和第7、8线对连接。当PD中有3个以上PD芯片时，其中的两个以上芯片可以采用并联的方式与第1、2线对和第3、6线对连接，或者采用并联的方式与第4、5线对和第7、8线对连接。
如图3所示的PSE的供电原理如下：
PSE芯片通过从PSE端口Vport1_1和Vport1_2输出检测电压，对PD芯片3_1进行特征检测，并且，通过从PSE端口Vport2_1和Vport2_2输出检测电压，对PD芯片3_2进行特征检测；
如果PD芯片3_1特征检测通过，PSE芯片对PD芯片3_1进行功率分级，并且，如果PD芯片3_2特征检测通过，PSE芯片对PD芯片3_2进行功率分级；
如果完成PD芯片3_1的功率分级，PSE芯片从PSE端口Vport1_1和Vport1_2输出工作电压，以向PD芯片3_1供电，并且，如果完成PD芯片3_2的功率分级，PSE芯片从PSE端口Vport2_1和Vport2_2输出工作电压，以向PD芯片3_2供电。
或者，在上述供电原理中，PSE芯片可以先对PD芯片3_1进行特征检测、功率分级和供电，然后，直接利用上述特征检测和功率分级结果，对PD芯片3_2供电。
对于装置实施例而言，由于其基本对应于方法实施例，所以相关之处参见方法实施例的部分说明即可。以上所描述的装置实施例仅仅是示意性的，其中所述作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部模块来实现本实施例方案的目的。本领域普通技术人员在不付出创造性劳 动的情况下，即可以理解并实施。
需要说明的是，在本文中，诸如第一和第二等之类的关系术语仅仅用来将一个实体或者操作与另一个实体或操作区分开来，而不一定要求或者暗示这些实体或操作之间存在任何这种实际的关系或者顺序。术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含，从而使得包括一系列要素的过程、方法、物品或者设备不仅包括那些要素，而且还包括没有明确列出的其他要素，或者是还包括为这种过程、方法、物品或者设备所固有的要素。在没有更多限制的情况下，由语句“包括一个……”限定的要素，并不排除在包括所述要素的过程、方法、物品或者设备中还存在另外的相同要素。
以上对本发明实施例所提供的方法和装置进行了详细介绍，本文中应用了具体个例对本发明的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本发明的方法及其核心思想；同时，对于本领域的一般技术人员，依据本发明的思想，在具体实施方式及应用范围上均会有改变之处，综上所述，本说明书内容不应理解为对本发明的限制。

Claims (11)

  1. 一种供电设备PSE，包括：
    第一端口组，包括多个PSE端口，所述第一端口组中的PSE端口并联后连接以太网线中的第一线对和第二线对；
    第二端口组，包括多个PSE端口，所述第二端口组中的PSE端口并联后连接所述以太网线中的第三线对和第四线对；
    检测分级单元，用于对所述以太网线所连接的受电设备PD进行特征检测；
    供电单元，用于当所述PD通过了所述特征检测，从所述第一端口组上输出工作电压，以通过所述第一线对和所述第二线对向所述PD供电，以及，从所述第二端口组上输出工作电压，以通过所述第三线对和所述第四线对向所述PD供电。
  2. 根据权利要求1所述的PSE，其中，所述第一端口组和所述第二端口组均由2个PSE端口组成。
  3. 根据权利要求1所述的PSE，其中，所述检测分级单元具体用于：
    从所述第一端口组上输出第一检测电压，并获取该第一端口组上的第一电流，根据获取到的第一电流值，得到所述PD的第一阻抗值；
    从所述第二端口组上输出第二检测电压，并获取该第二端口组上的第二电流，根据获取到的第二电流，得到所述PD的第二阻抗值；
    如果所述第一阻抗值和第二阻抗值都在预定的特征阻抗范围内，则确定所述PD通过了特征检测。
  4. 根据权利要求3所述的PSE，其中，
    所述特征阻抗范围为37K～42K欧姆。
  5. 根据权利要求1所述的PSE，其中，第一端口组和第二端口组中的每个PSE端口上具有2个管脚，分别输出正电压和负电压；
    所述第一端口组中的各个PSE端口上输出正电压的管脚并联后连接所述第一线对，输出负电压的管脚并联后连接所述第二线对；
    所述第二端口组中的各个PSE端口上输出正电压的管脚并联后连接所述第三线对，输出负电压的管脚并联后连接所述第四线对。
  6. 根据权利要求1所述的PSE，其中，第一端口组和第二端口组中的每个PSE端口的最小输出功率为30W以上。
  7. 根据权利要求1所述的PSE，其中，所述PSE中还包括：寄存器单元，其中：
    所述寄存器单元中保存有预设的过载保护功率值；
    所述供电单元还用于在检测到所述PD的当前功率超过所述寄存器单元中保存的过载保护功率值时，停止从所述第一端口组和所述第二端口组上输出工作电压。
  8. 根据权利要求1所述的PSE，其中，所述检测分级单元还用于对所述PD进行功率分级。
  9. 根据权利要求8所述的PSE，其中，所述PSE中还包括：寄存器单元，其中：
    所述寄存器单元中保存有功率分级相关的配置信息，所述配置信息中包括：功率等级class0～class5，其中，class5对应的PSE最小输出功率为(M+N)*B瓦，其中，M表示所述第一端口组中的PSE端口数量，N表示所述第二端口组中的PSE端口数量，B表示PSE端口的最小输出功率；
    所述检测分级单元具体用于根据所述寄存器中保存的所述功率分级相关的配置信息，对所述PD进行功率分级。
  10. 根据权利要求1所述的PSE，其中，所述PSE中包括至少一个PSE芯片。
  11. 根据权利要求1所述的PSE，其中，所述PD中包含有两个以上PD芯片，所述两个以上PD芯片中的至少一个PD芯片连接所述第一线对和所述第二线对，其余PD芯片连接所述第三线对和所述第四线对。
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