WO2018094973A1 - 源极驱动电路以及显示装置 - Google Patents

源极驱动电路以及显示装置 Download PDF

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Publication number
WO2018094973A1
WO2018094973A1 PCT/CN2017/083715 CN2017083715W WO2018094973A1 WO 2018094973 A1 WO2018094973 A1 WO 2018094973A1 CN 2017083715 W CN2017083715 W CN 2017083715W WO 2018094973 A1 WO2018094973 A1 WO 2018094973A1
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Prior art keywords
common voltage
resistor
data signal
signal
circuit
Prior art date
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Ceased
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PCT/CN2017/083715
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English (en)
French (fr)
Inventor
戴珂
鲁文武
聂春扬
程晓亮
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BOE Technology Group Co Ltd
Hefei Xinsheng Optoelectronics Technology Co Ltd
Original Assignee
BOE Technology Group Co Ltd
Hefei Xinsheng Optoelectronics Technology Co Ltd
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Priority to US15/576,373 priority Critical patent/US10504472B2/en
Publication of WO2018094973A1 publication Critical patent/WO2018094973A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3685—Details of drivers for data electrodes
    • G09G3/3688—Details of drivers for data electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0291—Details of output amplifiers or buffers arranged for use in a driving circuit
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0219—Reducing feedthrough effects in active matrix panels, i.e. voltage changes on the scan electrode influencing the pixel voltage due to capacitive coupling
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/06—Adjustment of display parameters
    • G09G2320/0693—Calibration of display systems

Definitions

  • Embodiments of the present disclosure relate to a source driving circuit and a display device.
  • the common voltage line and the data line in the liquid crystal display panel form a capacitance.
  • the common voltage VCOM on the common voltage line is pulled and changes due to the presence of the capacitor.
  • the capacitance between the common voltage line and the data line is relatively large, the variation caused by the pull of the common voltage VCOM is larger, and the pulling of the common voltage VCOM is more difficult. Recovery, it is easy to cause errors in the charging voltage on the pixel, resulting in residual charge, resulting in residual image.
  • At least one embodiment of the present disclosure provides a source driving circuit including: a detecting circuit configured to detect a variation value of a common voltage; and a compensation circuit configured to compensate based on a data signal and a variation value of the common voltage The data signal is output to the pixel electrode of the display panel.
  • the detection circuit includes a differential amplifier configured to perform a difference operation on the common voltage reference signal and the common voltage feedback signal to obtain a variation value of the common voltage.
  • the compensation circuit includes: an inverting operational amplifier and an in-phase adder; the inverting operational amplifier is configured to invert and amplify the variation value of the common voltage to obtain an amplified common voltage variation value,
  • the in-phase adder is configured to derive and output the compensation data signal based on the data signal and the amplified common voltage change value.
  • the non-inverting input of the differential amplifier is connected to the common voltage line via a first resistor, the inverting input is connected to the feedback common voltage line via a second resistor, and the output is connected to the inverting input of the inverting operational amplifier.
  • the non-inverting input terminal is connected to the first voltage terminal through a third resistor; the inverting input terminal and the output terminal are connected by a fourth resistor; the differential amplification
  • the output of the inverter is connected to the inverting input terminal of the inverting operational amplifier through a fifth resistor, and the inverting input terminal of the inverting operational amplifier is connected to the output terminal of the inverting operational amplifier through a sixth resistor.
  • the non-inverting operational amplifier has a non-inverting operational amplifier connected to the second voltage terminal through a seventh resistor; the non-inverting input terminal of the in-phase adder is further connected to the data signal voltage line through an eighth resistor, the inverting operational amplifier The output terminal is connected to the non-inverting input terminal of the in-phase adder through a ninth resistor, and the inverting input terminal of the in-phase adder is connected to the output terminal through a tenth resistor, the in-phase adder The inverting input is connected to the third voltage terminal through the eleventh resistor.
  • the first, second, and third voltage terminals are both ground voltage terminals.
  • the resistance of the sixth resistor is adjustable.
  • the common voltage reference signal is from a timing control circuit.
  • the common voltage feedback signal is a common voltage signal that is disposed at a detection point on the display panel.
  • the data signal is an initial data signal when there is no common voltage compensation.
  • At least one embodiment of the present disclosure also provides a display device including: the source driving circuit; and a display panel connected to the source driving circuit.
  • the display panel provides the common voltage feedback signal to the source drive circuit, and the source drive circuit provides the compensation data signal to the display panel based at least on the common voltage feedback signal.
  • the display panel is provided with a detection point for acquiring the common voltage feedback signal.
  • FIG. 1A is a schematic diagram of a display device according to an embodiment of the present disclosure.
  • FIG. 1B is a second schematic structural diagram of a display device according to an embodiment of the present disclosure.
  • FIG. 1C is a schematic structural diagram of a source driving circuit according to an embodiment of the present disclosure.
  • FIG. 2 is a schematic structural diagram of a source driving circuit according to an embodiment of the present disclosure
  • FIG. 3 is a schematic block diagram of a compensation circuit provided by an embodiment of the present disclosure.
  • FIG. 4 is a schematic diagram of a composition of a source driving circuit according to an embodiment of the present disclosure
  • FIG. 5 is a schematic diagram of comparison between a common voltage feedback signal and a compensation data signal according to an embodiment of the present disclosure.
  • Embodiments of the present disclosure provide a source drive circuit having a common voltage VCOM compensation.
  • the source driving circuit can receive the feedback of the pull portion of the common voltage VCOM when the common voltage VCOM on the display panel is pulled, and adjust the output signal of the source driving circuit by detecting the change value of the common voltage VCOM being pulled (ie, By adjusting the compensation data signal outputted from the source driving circuit to the pixel electrode to cancel the change of the common voltage VCOM on the display panel, ensuring the accuracy of the pixel charging voltage on the display panel, and preventing the voltage loaded on the liquid crystal display panel from being biased. To avoid charge residue.
  • the display device 100 includes at least a source driving circuit 120 and a display panel 110 connected to the source driving circuit 120.
  • the display device 100 may further include a gate driving circuit, and may also include a control circuit (as shown in FIG. 1B).
  • the gate drive circuits are sequentially outputted line by line for turning on the display scan signal of the TFT device.
  • the gate driving circuit can also be configured to eliminate phenomena such as shutdown remaining.
  • the control circuit is configured to drive the IC control function, that is, the control circuit can convert the control signal of the input interface into a control signal that the source drive circuit and the gate drive circuit can recognize. In this In the disclosed embodiment, the control circuit can also be used to output a common voltage VCOM provided to the display panel.
  • the display panel 110 may provide a common voltage feedback signal for the source driving circuit 120 (as shown in FIG. 1A ), and the source driving circuit 120 may provide the display panel 110 at least based on the received common voltage feedback signal. Compensation data signal.
  • the manner in which the source drive circuit 120 generates the compensated data signal can be further referenced in FIG.
  • At least a plurality of rows of scan lines G0, G1 ... Gn, a plurality of columns of data lines D1, D2 ... Dn, a column of common voltage lines Vcom, and a control circuit are disposed on the display device 100.
  • the control circuit can be a timing control circuit.
  • Each scan line is used to transmit a display scan signal to strobe a certain row of pixels.
  • the source driving circuit 120 may provide a data signal (or a compensation data signal provided by an embodiment of the present disclosure) to a data line disposed on the display panel to charge the pixel electrode to a corresponding gray scale voltage.
  • the scan lines are arranged to intersect the data lines, and pixel units 190 are disposed at the intersection of the two to form a pixel unit array.
  • the pixel unit 190 includes a transistor (not shown), the gate of the transistor is connected to the corresponding scan line, the source is connected to the corresponding data line, and the drain is connected to the corresponding pixel electrode, and the pixel electrode is connected to the common voltage.
  • a liquid crystal capacitor can be formed between the common electrodes.
  • the source of the transistor is coupled to the data line for receiving a corresponding compensation data signal.
  • the common voltage line Vcom shown in FIG. 1B is configured to provide a common voltage to the pixels 190 of the display panel, wherein the acquisition of the common voltage can be implemented by a control circuit (eg, a timing control circuit).
  • the display panel 110 is further configured to input a common voltage feedback signal (as shown in FIG. 1A) to the source driving circuit 120, the common voltage feedback signal being associated with a common voltage VCOM provided by the common voltage line Vcom, Specifically, the common voltage feedback signal is a voltage signal formed by the voltage on the common voltage line Vcom being pulled. For example, a specific waveform of the common voltage feedback signal may be measured from a detection point on the display panel 110. As shown in FIG.
  • the farthest end of the common voltage line disposed on the display panel can be set as a detection point, such as the detection point 180 shown in FIG. 1B, and the common voltage is measured from the detection point 180 in real time or periodically. Feedback signal. The measured common voltage feedback signal is then input to the source drive circuit 120. It can be understood that the position of the detection point can be set according to actual conditions, which is not limited in the disclosure.
  • the common voltage line is connected to the entire substrate.
  • the common voltage VCOM needs to be driven negative.
  • the detection point at which the common voltage feedback signal is acquired at this time may be set at a certain point on the substrate.
  • display panel 110 is a liquid crystal display panel or other type of display panel.
  • the structure of the source driver circuit 120 can also include a digital portion and an analog portion.
  • the digital portion may include a bidirectional shift register 121, an input register 122, a data buffer 123, a level shifter 124, and the like.
  • the analog portion includes a digital to analog conversion circuit 125, an output buffer 126, a charge sharing circuit (not shown in FIG. 1C), and the like.
  • the function of acquiring the compensation data signal integrated by the embodiment of the present disclosure may further be integrated in the output buffer 126.
  • an output signal of the source driving circuit in the absence of the common voltage compensation is referred to as a data signal.
  • the output signal of the source driving circuit when there is a common voltage compensation is referred to as a compensation data signal.
  • the data signal or the data signal is compensated, it can be supplied to the pixel unit through the data line of the display panel, and then the pixel unit is charged.
  • the data signal and the detected common voltage feedback signal are summed to obtain a compensation data signal (refer to FIG. 2 in detail), and the compensation data signal is further provided to a corresponding pixel on the display panel.
  • the source driving circuit 120 of the embodiment of the present disclosure further integrates a function of analyzing a common voltage feedback signal input by the display panel 110 to obtain a position where a common voltage changes and a magnitude of a change; the source is then The driving circuit 120 generates a compensation data signal according to the change of the common voltage; finally, the source driving circuit 120 inputs the compensation data signal to the corresponding data line of the display panel 110, and finally charges the pixel electrode on the data line to the same.
  • the corresponding gray scale voltage of the compensation data signal is described.
  • the bidirectional shift register 121 functions to output a shift pulse driven by the clock signal CLK, sequentially strobe each input register 122, and input a binary code data signal input from the interface circuit (for example, RSDS). (For example, D00-D07 in Fig. 1B, etc.) is transmitted to the corresponding output channel.
  • Input register 122 and data buffer 123 are both data registers.
  • the number of data registers is related to the number of data channels. For example, when the number of output channels is 480 as shown in FIG. 1B and an 8-bit signal is transmitted, a total of 7680 data registers are required.
  • Level shifter 124 is configured to boost the level of the data register output.
  • the reason why the data needs to be boosted is for the subsequent digital-to-analog conversion.
  • the digital-to-analog conversion circuit 125 After the data input from the level shifter 124 is processed by the digital-to-analog conversion circuit 125, one of the simulated gray-scale voltages generated by the gamma function module is selected and transmitted to An output buffer 126 can output the signal in an amplified manner.
  • the output buffer 126 amplifies an analog signal and can be used as an analog amplifier using an operational amplifier.
  • the digital to analog conversion circuit 125 can be a decoding circuit and is also a voltage selection function block.
  • the so-called voltage selection function is that the digital-to-analog conversion circuit 125 selects a desired analog voltage (corresponding to a gray scale voltage) based on the digital "password" (corresponding to a grayscale level) output from the level conversion circuit 125.
  • the output buffer 126 has a function of receiving a common voltage feedback signal and analyzing the common voltage feedback signal to obtain a compensation data signal.
  • the detection circuit 201 and the compensation circuit 211 shown in FIG. 2 below may be integrated into the output buffer 126.
  • the compensation data signal is finally input to the corresponding pixel on the display panel through the data lines S1, S2, ..., S480 shown in FIG. 1B, and charging of the pixel is completed based on the compensation data signal and the common voltage feedback signal. 480 data lines are shown in FIG. 1B. This is just an example. In an actual source circuit design, the total number of corresponding data lines needs to be designed according to the number of pixels.
  • the specific structure of the source driving circuit 120 will be analyzed one by one in conjunction with FIGS. 2 to 4.
  • the source driving circuit 120 may include a detecting circuit 201 and a compensation circuit 211.
  • the detection circuit 201 can be configured to detect a change value of the common voltage VCOM.
  • the compensation circuit 211 is configured to obtain a compensation data signal based on the data signal and a variation value of the common voltage VCOM, and output the compensation data signal to the pixel electrode of the display panel through the data line.
  • the detecting circuit 201 can obtain a change value of the common voltage by detecting a position where the common voltage changes and a magnitude of the change of the common voltage (for example, detecting a change value of the common voltage can be regarded as obtaining the following FIG.
  • the position and amplitude of the waveform change at 510) the change value of the common voltage can be specifically obtained by calculating the difference between the common voltage and the common voltage feedback signal.
  • the detection circuit 201 can obtain a variation value of the common voltage using a differential amplifier (refer to FIG. 3 or FIG. 4 for details).
  • a differential amplifier is a circuit that amplifies the difference between two input voltages.
  • the two input voltages of the differential amplifier can be a common voltage reference signal and a common voltage feedback signal, respectively.
  • the common voltage reference signal is an initial common voltage signal supplied to the display panel by the timing control circuit
  • the common voltage feedback signal is a common voltage signal obtained from a detection point set on the display panel.
  • the difference between the common voltage feedback signal and the common voltage reference signal is due to the formation of a capacitance between the common voltage line and the data line on the display panel.
  • the common voltage reference signal is pulled due to the presence of the capacitor, and the pulled common voltage signal can be measured from the detection point set on the display panel, that is, the common voltage. Feedback signal.
  • the compensation circuit 211 is configured to obtain a compensation data signal provided to the data lines of the display panel by analyzing the output signals of the detection circuit 201.
  • the compensation data signal (for example, the waveform of the compensation data signal can be referred to FIG. 5) is related to the common voltage feedback signal (for example, the common voltage feedback signal of FIG. 5) input by the detection circuit 201, and the relationship between the two can be referred to the figure. 5.
  • the embodiment of the present disclosure can ensure that the common voltage signal loaded on the common electrode and the pixel electrode are loaded by providing a compensation data signal including a feature of the common voltage pulled portion to the pixel electrode on the display panel.
  • the voltage difference between the data signals is relatively stable and eventually overcomes the distortion of the common voltage due to the capacitance.
  • the compensation circuit 211 may specifically adopt an inverting operational amplifier and an in-phase adder (refer to FIG. 3 and FIG. 4 in detail).
  • the detecting circuit 201 and the compensation circuit 211 may be simultaneously disposed on the substrate of the source driving circuit.
  • the detection circuit 201 and the compensation circuit 211 are simultaneously located on the output circuit portion of the source drive circuit substrate.
  • the detecting circuit 201 is connected to the display panel through a signal line, and the signal line is used for transmitting at least a common voltage feedback signal
  • the compensation circuit 211 is connected to the display panel through the data line, and the data line is used for providing a compensation data signal to the display panel, wherein
  • the compensation data signal is a data signal generated by analyzing a common voltage feedback signal.
  • the source driving circuit 120 specifically includes a differential amplifier 301 (for implementing the function of the detecting circuit of FIG. 2), an inverting operational amplifier 302, and an in-phase adder 303.
  • the inverting operational amplifier 302 and the in-phase adder 303 can be used to implement the functions of the compensation circuit 211.
  • the differential amplifier 301 is specifically configured to perform a difference operation on the common voltage reference signal and the common voltage feedback signal to obtain a variation value of the common voltage.
  • the inverting operational amplifier 302 is configured to invert and amplify the variation value of the common voltage obtained by the differential amplifier 301 to obtain an amplified common voltage variation value
  • the in-phase adder 303 is configured to be based on the data signal and the amplification. The subsequent common voltage change value is obtained and outputs a compensation data signal.
  • the amplification of the inverting operational amplifier 302 is adjustable.
  • the in-phase adder 303 is configured to vary the detected common voltage. Superimposed on the data signal and output to the data line of the display panel.
  • FIG. 4 is a schematic diagram showing the specific structure of the source driving circuit 120.
  • the non-inverting input of the differential amplifier 301 is connected to the common voltage line via the first resistor R1 to receive the input common voltage reference signal, and the inverting input of the differential amplifier 301 is connected to the feedback common voltage line via the second resistor R2 to receive the input common
  • the voltage feedback signal, the output of the differential amplifier 301 is coupled to the inverting input of the inverting operational amplifier 302.
  • the non-inverting input of the differential amplifier 301 can also be connected to the first voltage terminal through the third resistor R3.
  • the inverting input terminal and the output terminal of the differential amplifier 301 are connected by a fourth resistor R4.
  • the output of the differential amplifier 301 is coupled to the inverting input of the inverting operational amplifier 302 via a fifth resistor R5, and the inverting input of the inverting operational amplifier 302 is coupled to the output of the inverting operational amplifier 302 via a sixth resistor R6.
  • the non-inverting operational amplifier 302 has a non-inverting input coupled to the second voltage terminal via a seventh resistor R7.
  • the non-inverting input of the in-phase adder 303 is further connected to the data signal line through the eighth resistor R8 to receive the input data signal, and the output of the inverting operational amplifier 302 is in phase with the in-phase adder 303 through the ninth resistor R9.
  • the input terminals are connected, and the inverting input terminal of the in-phase adder 303 is connected to the output terminal of the in-phase adder 303 through a tenth resistor R10, and the inverting input terminal of the in-phase adder 303 also passes through the eleventh resistor.
  • R11 is connected to the third voltage terminal.
  • the data signal is S data
  • the compensation data signal is S compensation
  • the output signal of the inverting operational amplifier 302 is S out-inv-amp
  • the compensation data signal is S compensation :
  • the first voltage terminal, the second voltage terminal, and the third voltage terminal may be ground voltage terminals at the same time.
  • the first voltage terminal, the second voltage terminal, and the third voltage terminal may each be a fixed voltage terminal.
  • the resistance of the sixth resistor R6 is adjustable.
  • the amplification factor of the inverting operational amplifier 302 can be changed by adjusting the resistance of the sixth resistor R6.
  • the common voltage reference signal is from a timing control circuit.
  • the common voltage feedback signal is a common voltage signal disposed at a detection point on the display panel.
  • the common voltage at the detection point can be continuously measured by the voltage measuring circuit to obtain a common voltage feedback signal.
  • the data signal is a source driver circuit when there is no common voltage compensation
  • the data signal is used as an add signal of the non-inverting input of the in-phase adder 303.
  • Embodiments of the present disclosure may implement the technical purposes of the present disclosure by means of a differential amplifier 301, an inverting operational amplifier 302, and an in-phase adder 303 cascaded.
  • the input signals of the differential amplifier 301 in FIG. 3 are a common voltage reference signal and a common voltage feedback signal.
  • the differential amplifier 301 can perform a difference operation between the common voltage reference signal and the common voltage feedback signal to extract a portion where the common voltage signal is pulled. The portion of the common voltage signal that is pulled is then applied as a signal to the inverting operational amplifier 302.
  • the inverting operational amplifier 302 inverts and amplifies the portion of the common voltage signal that is pulled, and finally controls the output of the source driving circuit by controlling the amplification factor of the inverting amplifier (for example, by changing the resistance of the sixth resistor R6). Compensation data signal.
  • the output circuit of the source driving circuit is implemented by using the in-phase adder 303, wherein the input signal of one end of the in-phase adder 303 is an output signal inverted and amplified by the inverting operational amplifier 302, and the input signal of the other end is input.
  • the operation of the in-phase adder 303 causes the portion of the common voltage signal to be pulled to be reflected in the output of the source drive circuit to compensate for the data signal outputted by the source drive.
  • the differential amplifier 301 acts as a pull extraction circuit for the common voltage Vcom, which can extract and amplify the pulled portion of the common voltage Vcom.
  • the differential amplifier 301 can be placed on the source drive printed circuit board S-PCB.
  • the inverting operational amplifier 302 can also be placed on the source drive printed circuit board S-PCB at the same time. Further, part of the circuit of the in-phase adder 303 can be placed on the source driver chip S-Driver.
  • the in-phase adder 303 may superimpose the pulled portion of the common voltage with the data signal S-output output by the normal source driving circuit (ie, the source driving circuit without the common voltage feedback signal compensation).
  • the source driving circuit then inputs the compensation data signal into the data line of the display panel.
  • the waveform correspondence relationship between the common voltage feedback signal and the compensation data signal voltage obtained based on the common voltage feedback signal can be referred to FIG. 5.
  • the figure provides a waveform of a common voltage feedback signal obtained by measuring a detection point. And a waveform of the compensation data signal finally generated by the source driving circuit.
  • the waveform of the common voltage feedback signal reflects the change of the common voltage VCOM, which is located at 510 in FIG. 5, and the embodiment of the present disclosure may specifically adopt a map for detecting the voltage change at 510.
  • 4 shows a differential amplifier 301.
  • the differential amplifier 301 can respectively use the common voltage reference signal and the common voltage feedback signal as the non-inverting input signal and the inverting input signal, and then difference and amplification of the two signals can obtain the change value at 510.
  • the pulled portion of the compensation data signal corresponds to the pulled portion of the common voltage feedback signal (ie, the positions at 510 and 520 of FIG. 5 are the same, the amplitude is related), and the difference between the two remains. Relatively constant, this can further ensure that many problems caused by changes in the common voltage are offset on the display panel.
  • the magnitude of the change at 520 in FIG. 5 can be adjusted. Specifically, the magnitude of the change at 520 can be adjusted by adjusting the resistance of the sixth resistor R6 of the inverting operational amplifier 302 of FIG.
  • the embodiment of the present disclosure can achieve relatively stable difference between the compensation data signal and the common voltage feedback signal, thereby ensuring voltage applied to the source and drain electrodes of the transistor included in the pixel. Stability.
  • the embodiment of the present disclosure adjusts the output voltage of the source driving circuit based on the change of the common voltage on the display panel, and ensures the accuracy of the charging voltage on the pixel to prevent loading.
  • the voltage on the liquid crystal is biased to avoid charge residue.
  • the present disclosure provides a design of a source driving circuit having a common voltage VCOM compensation. When the common voltage VCOM is pulled, the common voltage VCOM pulling portion is fed back to the output portion of the source driving circuit S-Driver, and then the common voltage is detected.
  • the pull of VCOM adjusts the output signal of the source drive S-Driver to ensure that the charging voltage on the pixels of the display panel is correct, and the voltage applied to the liquid crystal is biased, resulting in charge residue.

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  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
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  • Liquid Crystal Display Device Control (AREA)
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Abstract

一种源极驱动电路(120)及显示装置(100)。所述源极驱动电路(120)包括：检测电路(201)，被配置为检测公共电压的变化值；以及补偿电路(211)，被配置为基于数据信号以及所述公共电压的变化值得到补偿数据信号,并将所述补偿数据信号输出至显示面板(110)的像素电极。

Description

源极驱动电路以及显示装置 技术领域
本公开的实施例涉及一种源极驱动电路及显示装置。
背景技术
液晶显示面板中的公共电压线与数据线(Data line)形成电容，当数据线上的数据信号发生变化时，由于有电容的存在，公共电压线上的公共电压VCOM会被拉动而产生变化。特别是对于HADS(High advanced super Dimension Switch)显示模式，由于公共电压线与数据线之间的电容相对较大，公共电压VCOM被拉动而产生的变化也会更大，公共电压VCOM的拉动更难恢复，容易造成像素上充电电压的误差，从而导致电荷残留，造成画面残像。
发明内容
本公开的至少一个实施例提供一种源极驱动电路，包括：检测电路，被配置为检测公共电压的变化值；以及补偿电路，被配置为基于数据信号以及所述公共电压的变化值得到补偿数据信号,并将所述补偿数据信号输出至显示面板的像素电极。
例如，所述检测电路包括：差分放大器，被配置为对公共电压参考信号和公共电压反馈信号进行差值运算来得到所述公共电压的变化值。
例如，所述补偿电路包括：反相运算放大器和同相加法器；所述反相运算放大器被配置为对所述公共电压的变化值进行反相并放大得到放大后的公共电压变化值，所述同相加法器被配置为基于所述数据信号以及所述放大后的公共电压变化值得到并输出所述补偿数据信号。
例如，所述差分放大器的同相输入端经过第一电阻与公共电压线相连，反相输入端经过第二电阻与反馈公共电压线相连，输出端与所述反相运算放大器的反相输入端相连；其中，所述同相输入端通过第三电阻与第一电压端相连；所述反相输入端与所述输出端之间通过第四电阻相连；所述差分放大 器的输出端通过第五电阻与所述反相运算放大器的反相输入端相连，所述反相运算放大器的反相输入端通过第六电阻与所述反相运算放大器的输出端相连，所述反相运算放大器的正相输入端通过第七电阻与第二电压端相连；所述同相加法器的同相输入端还通过第八电阻与数据信号电压线相连，所述反相运算放大器的输出端通过第九电阻与所述同相加法器的同相输入端相连，所述同相加法器的反相输入端通过第十电阻与输出端相连，所述同相加法器的反相输入端通过第十一电阻与第三电压端相连。
例如，所述第一、第二和第三电压端均为接地电压端。
例如，所述第六电阻的阻值可调。
例如，所述公共电压参考信号来自于时序控制电路。
例如，所述公共电压反馈信号为设置于显示面板上检测点的公共电压信号。
例如，所述数据信号为不存在公共电压补偿时的初始数据信号。
本公开的至少一个实施例还提供一种显示装置，包括：所述的源极驱动电路；以及与所述源极驱动电路连接的显示面板。
例如，所述显示面板为所述源极驱动电路提供所述公共电压反馈信号，所述源极驱动电路至少基于所述公共电压反馈信号向所述显示面板提供所述补偿数据信号。
例如，所述显示面板设置有用于获取所述公共电压反馈信号的检测点。
附图说明
为了更清楚地说明本公开实施例的技术方案，下面将对实施例的附图作简单地介绍，显而易见地，下面描述中的附图仅仅涉及本公开的一些实施例，而非对本公开的限制。
图1A为本公开的一个实施例提供的显示装置的示意图之一；
图1B为本公开的一个实施例提供的显示装置的结构示意图之二；
图1C为本公开的一个实施例提供的源极驱动电路的结构示意图；
图2为本公开的一个实施例提供的源极驱动电路的组成示意图；
图3为本公开的一个实施例提供的补偿电路的示意框图；
图4为本公开的一个实施例提供的源极驱动电路的组成示意图；
图5为本公开的一个实施例提供的公共电压反馈信号与补偿数据信号之间的对比示意图。
具体实施方式
为使本公开实施例的目的、技术方案和优点更加清楚，下面将结合本公开实施例的附图，对本公开实施例的技术方案进行清楚、完整地描述。显然，所描述的实施例是本公开的一部分实施例，而不是全部的实施例。基于所描述的本公开的实施例，本领域普通技术人员在无需创造性劳动的前提下所获得的所有其他实施例，都属于本公开保护的范围。
除非另外定义，本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。“包括”或者类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同，而不排除其他元件或者物件。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接，而是可以包括电性的连接，不管该连接是直接还是间接的。
本公开实施例提供一种具有公共电压VCOM补偿的源极驱动电路。该源极驱动电路能够在显示面板上的公共电压VCOM被拉动时，接收公共电压VCOM拉动部分的反馈，并通过检测公共电压VCOM被拉动的变化值来调整此源极驱动电路的输出信号(即，通过调整源极驱动电路输出到像素电极的补偿数据信号来抵消显示面板上的公共电压VCOM的变化)，保证显示面板上像素充电电压的准确，防止加载在液晶显示面板上的电压有偏压，从而避免电荷残留。
如图1A所示，显示装置100至少包括源极驱动电路120，以及与源极驱动电路120相连接的显示面板110。
在一些实施例中，显示装置100还可以包括栅极驱动电路，也可以包括控制电路(如图1B所示)。栅极驱动电路一行一行地有序输出用于开启TFT器件的显示扫描信号。此外，栅极驱动电路还可以被配置为实现消除关机残存等现象。控制电路被配置为驱动IC控制功能，即控制电路能够将输入接口的控制信号转换成源极驱动电路和栅极驱动电路能够识别的控制信号。在本 公开的实施例中，控制电路还可以用于输出向显示面板提供的公共电压VCOM。
在本公开的实施例中，显示面板110可以为源极驱动电路120提供公共电压反馈信号(如图1A所示)，源极驱动电路120至少可以基于接收的公共电压反馈信号向显示面板110提供补偿数据信号。源极驱动电路120生成补偿数据信号的方式可以进一步参考图2。
如图1B所示，在一些实施例中，显示装置100上至少布放了多行扫描线G0，G1……Gn、多列数据线D1，D2……Dn，一列公共电压线Vcom以及控制电路，该控制电路可以为时序控制电路。每条扫描线用于传输显示扫描信号，以便选通某一行像素。源极驱动电路120可以向显示面板上布放的数据线提供数据信号(或本公开实施例提供的补偿数据信号)，以便把像素电极充电到相应的灰阶电压。扫描线与数据线交叉设置，在二者的交会处设置有像素单元190，从而形成像素单元阵列。像素单元190包括晶体管(图中未示出)，晶体管的栅极与相应的扫描线相连，源极与相应的数据线相连，漏极与相应的像素电极相连，该像素电极与连接公共电压的公共电极之间可以形成液晶电容。在本公开的实施例中，晶体管的源极与数据线相连用于接收相应的补偿数据信号。
图1B示出的公共电压线Vcom被配置为向显示面板的像素190提供公共电压，其中，公共电压的获取可以由控制电路(例如，时序控制电路)实现。在本公开实施例，显示面板110还被配置为向源极驱动电路120输入公共电压反馈信号(如图1A所示)，该公共电压反馈信号与公共电压线Vcom提供的公共电压VCOM相关联，具体地，公共电压反馈信号是由于公共电压线Vcom上的电压被拉动而形成的电压信号。例如，公共电压反馈信号的具体波形可以是从显示面板110上的检测点处测量得到。如图1B所示，可以将显示面板上布放的公共电压线的最远端设定为检测点，例如图1B示出的检测点180，实时或者周期性的从检测点180测量得到公共电压反馈信号。之后将测量得到的公共电压反馈信号输入源极驱动电路120。可以理解的是，可以根据实际情况设置检测点的位置，本公开对此不作限定。
在一些实施例中，公共电压线是连接整个基板的，在驱动一个像素单元时，需要同时为整块基板施加公共电压，即公共电压VCOM需要驱动的负 载为整个阵列基板上的所有像素单元。此时获取公共电压反馈信号的检测点可以设置于基板上的某一点。
在一些实施例中，显示面板110为液晶显示面板或其他类型的显示面板。
如图1C所示，在一些实施例中，源极驱动电路120的结构还可以包括数字部分和模拟部分。数字部分可以包括双向移位寄存器121、输入寄存器122、数据缓存器123、电平转换器124等。模拟部分包括数模转换电路125、输出缓存器126、电荷分享电路(图1C中未示出)等。本公开实施例集成的获取补偿数据信号的功能还可以进一步集成在输出缓存器126中。
此外，为了方便描述本公开实施例的技术方案，在下文中，将不存在公共电压补偿时的源极驱动电路的输出信号称为数据信号。将存在公共电压补偿时的源极驱动电路的输出信号称为补偿数据信号。但是无论是补偿数据信号或者数据信号，均可以通过显示面板的数据线提供给像素单元，继而对像素单元进行充电。
在本公开实施例中，可以将数据信号与检测得到的公共电压反馈信号求和后得到补偿数据信号(具体可参考图2)，再将该补偿数据信号提供至显示面板上对应的像素。具体地，本公开的实施例的源极驱动电路120还集成了如下功能：对显示面板110输入的公共电压反馈信号进行分析，得到公共电压发生变化的位置以及变化的数值大小；之后该源极驱动电路120会根据公共电压的变化情况生成补偿数据信号；最后源极驱动电路120会将补偿数据信号输入至显示面板110的相应的数据线上，最终把数据线上的像素电极充电到与所述补偿数据信号相应的灰阶电压。
如图1C所示，双向移位寄存器121的作用是在时钟信号CLK的驱动下输出移位脉冲，依次选通每个输入寄存器122，把从接口电路(例如，RSDS)输入的二进制码数据信号(例如，图1B中的D00-D07等)传送到对应的输出通道上。输入寄存器122和数据缓存器123都是数据暂存器。数据暂存器的个数与数据通道的个数相关。例如，当输出通道的个数为图1B示出的480根，且传输的是8bits信号时，则共需要7680个数据暂存器。电平转换器124被配置为将数据暂存器输出的电平进行升压处理。之所以需要对数据进行升压处理是为了后续数模变换的需要。从电平转换器124输入的数据经数模转换电路125处理后，从伽玛功能模块生成的模拟灰阶电压中选出一路，传给 输出缓存器126，该输出缓存器126可以对信号进行放大输出。输出缓存器126放大的是类比信号，可以使用运算放大器来充当类比放大器。数模转换电路125可以是一个译码电路，也是一个电压选择功能块。所谓电压选择功能是该数模转换电路125根据电平转换电路125输出的数字“密码”(对应灰阶等级)选择所需的模拟电压(对应灰阶电压)。此外，输出缓存器126还具有接收公共电压反馈信号、并分析公共电压反馈信号而得到补偿数据信号的功能。例如，下图2所示的检测电路201和补偿电路211可以集成于输出缓存器126之内。补偿数据信号最终通过图1B示出的数据线S1，S2，……S480输入至显示面板上的相应像素，并基于该补偿数据信号以及公共电压反馈信号即可完成对像素的充电。图1B中示出了480根数据线，这仅仅是一个示例，在实际的源极电路设计中，需要根据像素的数量设计相应的数据线的总条数。
下面结合图2-图4逐一分析源极驱动电路120的具体结构。
图2示出了本公开的实施例提供的一种源极驱动电路120的具体结构,该源极驱动电路120可以包括：检测电路201以及补偿电路211。检测电路201可以被配置为检测公共电压VCOM的变化值。补偿电路211被配置为基于数据信号以及公共电压VCOM的变化值得到补偿数据信号,并将补偿数据信号通过数据线输出至显示面板的像素电极。
在一些实施例中，检测电路201可以通过检测公共电压发生变化的位置以及公共电压发生变化的幅度等参量得到公共电压的变化值(例如，检测公共电压的变化值可以认为是获取下图5示出的510处的波形变化的位置和幅度)，该公共电压的变化值具体可以通过计算公共电压与公共电压反馈信号的差值而获取。
在本公开的实施例中，检测电路201可以采用差分放大器获得公共电压的变化值(具体请参考图3或者图4)。差分放大器是能把两个输入电压的差值加以放大的电路。例如，差分放大器的两个输入电压可以分别为公共电压参考信号和公共电压反馈信号。公共电压参考信号为通过时序控制电路向显示面板提供的初始公共电压信号，而公共电压反馈信号是从显示面板上设置的检测点得到的公共电压信号。公共电压反馈信号与公共电压参考信号之间之所以有差别是由于显示面板上的公共电压线与数据线之间形成电容，所 以当数据线上的数据信号发生变化时，由于电容的存在，会使得公共电压参考信号被拉动，该被拉动后的公共电压信号可以从显示面板上设置的检测点测量得到，即为公共电压反馈信号。
在一些实施例中，补偿电路211被配置为通过分析检测电路201的输出信号得到向显示面板的数据线提供的补偿数据信号。该补偿数据信号(例如，该补偿数据信号的波形可以参考图5)与检测电路201输入的公共电压反馈信号(例如，图5的公共电压反馈信号)相关，两者之间的关系可以参考图5。结合图5的内容可知，本公开实施例可以通过向显示面板上的像素电极提供包含了公共电压被拉动部分的特征的补偿数据信号，进而保证加载在公共电极的公共电压信号和加载在像素电极的数据信号之间的电压差值的相对稳定，并最终克服由于电容导致的公共电压的畸变。
在本公开的实施例中，补偿电路211具体可以采用反相运算放大器以及同相加法器(具体可以参考图3和图4)。
在本公开的实施例中，检测电路201和补偿电路211可以同时布放于源极驱动电路的基板上。例如，检测电路201和补偿电路211同时位于源极驱动电路基板上的输出电路部分。检测电路201通过信号线与显示面板相连，所述信号线至少用于传输公共电压反馈信号，补偿电路211通过数据线与显示面板相连，该数据线用于向显示面板提供补偿数据信号，其中，补偿数据信号是经过分析公共电压反馈信号而生成的数据信号。
如图3所示，源极驱动电路120具体包括差分放大器301(用于实现图2的检测电路的功能)，反相运算放大器302以及同相加法器303。例如，反相运算放大器302以及同相加法器303可以用于实现补偿电路211的功能。
差分放大器301具体被配置为对公共电压参考信号和公共电压反馈信号进行差值运算来得到公共电压的变化值。
相应的，反相运算放大器302被配置为对差分放大器301得到的公共电压的变化值进行反相并放大得到放大后的公共电压变化值，同相加法器303被配置为基于数据信号以及放大后的公共电压变化值得到并输出补偿数据信号。
在一些实施例中，反相运算放大器302的放大倍数可调。
在一些实施例中，同相加法器303用于将检测得到的公共电压的变化量 叠加至数据信号上，并向显示面板的数据线进行输出。
如图4所示为源极驱动电路120的具体结构示意图。
差分放大器301的同相输入端经过第一电阻R1与公共电压线相连从而接收输入的公共电压参考信号，差分放大器301的反相输入端经过第二电阻R2与反馈公共电压线相连从而接收输入的公共电压反馈信号，差分放大器301的输出端与反相运算放大器302的反相输入端相连。此外，差分放大器301的同相输入端还可以通过第三电阻R3与第一电压端相连。差分放大器301的反相输入端与输出端之间通过第四电阻R4相连。
差分放大器301的输出端通过第五电阻R5与反相运算放大器302的反相输入端相连，反相运算放大器302的反相输入端通过第六电阻R6与反相运算放大器302的输出端相连，反相运算放大器302的正相输入端通过第七电阻R7与第二电压端相连。
同相加法器303的同相输入端还通过第八电阻R8与数据信号线相连以接收输入的数据信号，反相运算放大器302的输出端通过第九电阻R9与同相加法器303的同相输入端相连，同相加法器303的反相输入端通过第十电阻R10与该同相加法器303的输出端相连，同相加法器303的反相输入端还通过第十一电阻R11与第三电压端相连。
例如，数据信号为Sdata，补偿数据信号为Scompensation，反相运算放大器302的输出信号为Sout-inv-amp，则补偿数据信号为Scompensation为：
Figure PCTCN2017083715-appb-000001
在一些实施例中，上述第一电压端、第二电压端和第三电压端可以同时为接地电压端。第一电压端、第二电压端和第三电压端均可以为固定电压端。
在一些实施例中，上述第六电阻R6的阻值可调。通过调整第六电阻R6的阻值可以改变反相运算放大器302的放大倍数。
在一些实施例中，公共电压参考信号来自于时序控制电路。
在一些实施例中，公共电压反馈信号为设置于显示面板上检测点处的公共电压信号。例如，可以通过测压电路连续测量检测点处的公共电压，得到公共电压反馈信号。
在一些实施例中，数据信号为不存在公共电压补偿时的源极驱动电路向 显示面板的数据线输出的数据信号，即，初始数据信号。具体到本实施例中，该数据信号作为同相加法器303的同相输入端的一路加法信号。
本公开实施例可以使用差分放大器301、反相运算放大器302以及同相加法器303级联的方式来实现本公开的技术目的。但是本领域技术人员可以不脱离本公开的技术构思，设计采用不同于本申请的电路也应该涵盖在本公开的实施例范围内。例如，图3中的差分放大器301的输入信号为公共电压参考信号以及公共电压反馈信号。该差分放大器301可以将公共电压参考信号与公共电压反馈信号进行差值运算，而提取公共电压信号被拉动的部分。然后将公共电压信号被拉动的部分作为信号，输入反相运算放大器302。之后反相运算放大器302将公共电压信号被拉动的部分进行反相并放大，再通过控制反相放大器的放大倍数(例如，可以通过改变第六电阻R6的阻值)最终控制源极驱动电路输出的补偿数据信号。使用同相加法器303来实现源极驱动电路的输出电路，其中，同相加法器303的一端的输入信号为经反相运算放大器302反相放大后的输出信号，另一端的输入信号为数据信号，经过同相加法器303的运算，使得公共电压信号被拉动的部分体现在源极驱动电路的输出中，达到对源极驱动输出的数据信号的补偿作用。通过补偿数据信号与被拉动的公共电压信号之间的差值的相对稳定，继而克服由于公共电压被拉动而产生的诸多问题。
在一些实施例中，差分放大器301作为公共电压Vcom的拉动提取电路，可以将公共电压Vcom的拉动部分进行提取并放大。在具体设计时，可以将差分放大器301放在源极驱动印制电路板S-PCB上。反相运算放大器302也可以同时设置于源极驱动印制电路板S-PCB上。此外，同相加法器303的部分电路可以放置在源极驱动芯片S-Driver上。
在一些实施例中，同相加法器303可以将公共电压的拉动部分与正常源极驱动电路(即未经公共电压反馈信号补偿时的源极驱动电路)输出的数据信号S-output进行叠加，作为补偿之后的补偿数据信号，之后源极驱动电路再将补偿数据信号输入显示面板的数据线上。例如，公共电压反馈信号和基于该公共电压反馈信号得到的补偿数据信号电压的波形对应关系可以参考图5。
如图5所示，该图提供了测量检测点得到的公共电压反馈信号的波形， 以及源极驱动电路最终生成的补偿数据信号的波形。从图5中可以看出公共电压反馈信号的波形反应了公共电压VCOM的变化情况，所述变化情况位于图5中的510处，本公开实施例为了检测510处的电压变化情况具体可以采用图4示出的差分放大器301。例如，差分放大器301可以分别将公共电压参考信号和公共电压反馈信号作为同相输入信号和反相输入信号，再对这两种信号求差并放大即可以得到510处的变化值。
此外，从图5可以看出补偿数据信号的被拉动部分与公共电压反馈信号的被拉动部分相对应(即图5的510处和520处位置相同，幅度相关)，而两者的差值保持相对不变，这样就可以进一步保证在显示面板上抵消由于公共电压变化带来的诸多问题。此外，图5中520处的变化幅度可以调整，具体可以通过调整图4的反相运算放大器302的第六电阻R6的阻值来调整520处的变化幅度。
结合图5的波形可知，本公开实施例可以实现将补偿数据信号与公共电压反馈信号之间的差值保持相对稳定，进而保证了加载在像素包含的晶体管的源极和漏极两极上的电压的稳定性。
综上所述，本公开的实施例通过检测显示面板上的公共电压的变化，并基于该公共电压的变化调整源极驱动电路的输出信号，从而保证像素上充电电压的准确性，防止加载在液晶上的电压有偏压，避免造成电荷残留。本公开提供一种具有公共电压VCOM补偿的源极驱动电路的设计，当公共电压VCOM被拉动时，将公共电压VCOM拉动部分反馈至源极驱动电路S-Driver的输出部分，再通过检测公共电压VCOM的拉动来调整源极驱动S-Driver的输出信号，来保证显示面板的像素上充电电压正确，防止加载在液晶上的电压有偏压，造成电荷残留。
本公开实施例附图只涉及到与本公开实施例涉及到的结构，而其他结构可参考通常设计。在不冲突的情况下，本公开的实施例及实施例中的不同特征可以相互组合。
以上所述，仅为本公开的具体实施方式，但本公开的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本公开揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本公开的保护范围之内。因此，本公开的保护范围应以权利要求的保护范围为准。
本公开要求于2016年11月24日递交的中国专利申请第201611053935.1号的优先权，在此全文引用上述中国专利申请公开的内容以作为本申请的一部分。

Claims (12)

  1. 一种源极驱动电路，包括：
    检测电路，被配置为检测公共电压的变化值；以及
    补偿电路，被配置为基于数据信号以及所述公共电压的变化值得到补偿数据信号,并将所述补偿数据信号输出至显示面板的像素电极。
  2. 如权利要求1所述的源极驱动电路，其中，所述检测电路包括：差分放大器，被配置为对公共电压参考信号和公共电压反馈信号进行差值运算来得到所述公共电压的变化值。
  3. 如权利要求2所述的源极驱动电路，其中，所述补偿电路包括：反相运算放大器和同相加法器；
    所述反相运算放大器被配置为对所述公共电压的变化值进行反相并放大，得到放大后的公共电压变化值，所述同相加法器被配置为基于所述数据信号以及所述放大后的公共电压变化值得到并输出所述补偿数据信号。
  4. 如权利要求3所述的源极驱动电路，其中，
    所述差分放大器的同相输入端经过第一电阻与公共电压线相连，反相输入端经过第二电阻与反馈公共电压线相连，输出端与所述反相运算放大器的反相输入端相连；其中，所述同相输入端通过第三电阻与第一电压端相连；所述反相输入端与所述输出端之间通过第四电阻相连；
    所述差分放大器的输出端通过第五电阻与所述反相运算放大器的反相输入端相连，所述反相运算放大器的反相输入端通过第六电阻与所述反相运算放大器的输出端相连，所述反相运算放大器的正相输入端通过第七电阻与第二电压端相连；
    所述同相加法器的同相输入端还通过第八电阻与数据信号电压线相连，所述反相运算放大器的输出端通过第九电阻与所述同相加法器的同相输入端相连，所述同相加法器的反相输入端通过第十电阻与输出端相连，所述同相加法器的反相输入端通过第十一电阻与第三电压端相连。
  5. 如权利要求4所述的源极驱动电路，其中，所述第一、第二和第三电压端均为接地电压端。
  6. 如权利要求4所述的源极驱动电路，其中，所述第六电阻的阻值可调。
  7. 如权利要求2所述的源极驱动电路，其中，所述公共电压参考信号来自于时序控制电路。
  8. 如权利要求3所述的源极驱动电路，其中，所述公共电压反馈信号为设置于显示面板上检测点的公共电压信号。
  9. 如权利要求1所述的源极驱动电路，其中，所述数据信号为不存在公共电压补偿时的初始数据信号。
  10. 一种显示装置，包括：
    如权利要求1-9任一项所述的源极驱动电路；以及
    与所述源极驱动电路连接的显示面板。
  11. 如权利要求10所述的显示装置，其中，所述显示面板为所述源极驱动电路提供所述公共电压反馈信号，所述源极驱动电路至少基于所述公共电压反馈信号向所述显示面板提供所述补偿数据信号。
  12. 如权利要求10所述的显示装置，其中，所述显示面板设置有用于获取所述公共电压反馈信号的检测点。
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CN105810161A (zh) * 2015-01-15 2016-07-27 三星显示有限公司 显示设备
CN105702195A (zh) * 2016-04-28 2016-06-22 京东方科技集团股份有限公司 公共电极电压补偿电路、方法、显示控制电路和显示装置

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