WO2018090395A1 - 一种手持式fc总线测试仪 - Google Patents
一种手持式fc总线测试仪 Download PDFInfo
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/50—Testing arrangements
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/40169—Flexible bus arrangements
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/18—Protocol analysers
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- the invention relates to a handheld FC bus tester.
- FC Fibre Channel
- FC protocol testing as a stand-alone module.
- PXI or CPCI boards for use with desktop or laptops.
- the FC bus test instruments currently on the market generally adopt FPGA and CPU independent design, DPPU uses DPRAM to interact with each other, and CPCI interface uses CPLD for interface decoding and control. This architecture uses a large number of chips and occupies The printed board has large space, low integration, inconvenient carrying and high cost.
- the object of the present invention is to solve the above problems and provide a handheld FC bus tester, which enables the handheld FC bus tester to meet not only the requirements of FC protocol analysis and testing, but also is easy to use and portable.
- a handheld FC bus tester includes a data capture module, the data capture module captures data and stores the data to a storage unit, and has data filtering and data triggering functions;
- the data sending module sends the data to the device under test through the optical interface
- the statistics module performs statistics on data captured by the data capture module and data sent by the data sending module, including short-term statistical values and accumulated statistical values, and performs data interaction with the control module;
- Human machine interface receiving input control information and displaying test results
- the control module controls the data capture module, the data sending module, the statistics module, the protocol parsing module, and the human machine interface to coordinately operate.
- the data capture module stores the data captured during the FC link establishment and data transmission in the order of capture time.
- the data capture module has a data filtering function capable of capturing a specific type of primitive, delimiter or header content according to control.
- the data capture module has a data triggering capability that can be opened after capturing a specific primitive, delimiter or header content
- the captured data is initially stored.
- the protocol parsing module reads the FC data frame captured by the data capture module from the storage unit for analysis, analyzes the frame type, frame header content, and payload data of the data frame, and performs CRC check on the data frame; automatically parsing and identifying FC-2 frame, FC-AE-ASM, FC-AE-1553, SCSI and FICON.
- the data sending module generates different primitives and FC frames according to the settings at different rates and sends them to the device under test through the optical interface, and supports FC-AE-ASM and FC-AE-1553 protocol data transmission.
- the statistics module collects short-term data and accumulated data of each port, including the number of frames sent and received, and the number of bytes, calculates real-time bandwidth utilization, and counts FC1 error statistics and FC2 error statistics.
- the data capture module, data transmission module and statistical module are all implemented in the field programmable gate array FPGA using VHDL hardware description language.
- the control module and protocol analysis module are implemented in C language by the dual-core CotexA9 core integrated in the field programmable gate array FPGA. .
- the field programmable logic array FPGA is connected to the SFP optical module through the GTX interface, and the data generated by the data sending module is transmitted to the SFP optical module through the GTX interface in the field programmable logic array FPGA; the data capture module passes the field programmable logic.
- the GTX interface in the array FPGA receives the data captured by the SFP interface optical module and stores the data to the storage unit.
- the data capture module and the data sending module are connected to the SFP optical module through the GTX interface in the field programmable gate array FPGA, and perform data interaction with the device under test through the SFP optical module; 4.25 Gb/s, 2.125 Gb/s, 1.0625 Gb/ s Three different port rates are switched by DRP mode through the GTX interface in the field programmable gate array FPGA.
- the handheld FC bus tester not only meets the requirements of FC protocol analysis and testing, but also is easy to use and easy to carry.
- Figure 1 is an overall structural view of the present invention
- FIG. 2 is a hardware architecture diagram of the present invention.
- the handheld FC bus tester of the present invention comprises: a data capture module, a protocol parsing module, a data sending module, a statistics module, a control module and a human machine interface. . among them:
- the data capture module locates the data captured during the FC link establishment and data transmission according to the frame delimiter, and displays the time stamp at the frame start position, and stores the data in the storage unit according to the capture time sequence. And have a number According to filtering and data triggering function;
- the protocol parsing module reads the FC data frame captured by the data capture module from the DDR storage unit for analysis, analyzes the frame type, the header content and the payload data of the data frame, and performs CRC check on the data frame;
- the data sending module generates different primitives and FC frames according to the settings at different rates, and sends the same to the device under test through the SFP optical module;
- the statistics module collects data collected by the data capture module and data sent by the data sending module, and is divided into short-term values and accumulated values, including the number of frames sent and received, and the number of bytes, calculating real-time bandwidth utilization, and counting FC1 error statistics. , FC2 error statistics;
- the control module controls the data capture module, the data transmission module, the statistics module, the protocol analysis module, and the human-machine interface to coordinately operate, and reads the control information from the human-machine interface, controls the data capture module, and the data transmission module to send and receive data, and controls the data capture module. Filtering and triggering the captured data according to the control information, and storing the captured data in a specified address of the storage unit, the control protocol parsing module reads the captured data from the storage unit, and controls the statistics module to perform statistics on the sent and received data, The result of the protocol parsing module parsing and the result of the statistic module are sent to the human-machine interface for display;
- the human machine interface receives control information of the data sending module and the data capturing module, the result of the protocol analysis, and the statistical result.
- the data capture module has a data filtering function capable of capturing a specific type of primitive, delimiter or frame header content according to the control.
- the data capture module has a data trigger function that can start storing the captured data after capturing a specific primitive, delimiter or header content.
- protocol parsing module can automatically parse and identify the FC-2 frame, FC-AE-ASM, FC-AE-1553, SCSI, and FICON.
- the data sending module can support FC-AE-ASM and FC-AE-1553 protocol data transmission.
- the hand-held FC bus tester of the invention adopts the WinCE system as a system platform, and the user is easy to accept and get started quickly.
- the software interface is graphically designed, and the control buttons of each module are clear and easy to use.
- the hand-held FC bus tester of the present invention uses a TFT touch screen as a human-machine interface and an input/output platform;
- control module is implemented in the dual-core CotexA9 core integrated in the FPGA, and the protocol parsing module is implemented in the application software of the CotexA9 core;
- DDR3 memory as a storage unit for capturing data
- the data capture module and the data sending module pass through the GTX interface and the SFP optical mode in the field programmable gate array FPGA.
- the blocks are connected, and the data is exchanged with the device under test through the SFP optical module; the three different port rates of 4.25 Gb/s, 2.125 Gb/s, and 1.0625 Gb/s are switched by the DTX mode through the GTX interface in the field programmable gate array FPGA. ;
- the data capture module and the protocol parsing module interact with the data through the field programmable gate array FPGA and DDR3.
- the hand-held FC bus tester of the present invention is divided into two ports, which are all connected by a standard SFP interface optical module.
- the data generated by the data sending module is transmitted to the SFP optical module through the GTX interface in the field programmable logic array FPGA for transmission.
- the data capture module receives the data captured by the SFP interface optical module through the GTX interface in the field programmable logic array FPGA, and stores the data to the storage unit.
- the two ports adopt standard SFP connectors
- the optical transceiver module communicates with the FPGA through the GTX transceiver interface
- the GTX transceiver interface implements data frames in the FC-0 layer, the FC-1 layer, and the FC-2 layer.
- Transceiver provides an interface for the data capture module and the data transmission module, and provides a FIFO channel for data frame transmission and reception.
- DDR3 memory is used to store the captured data
- a high-stability high-frequency crystal oscillator is used to provide a clock reference and a dedicated power chip for power supply.
- the data capture module, data transmission module and statistical module of the handheld FC bus tester of the invention are implemented in a large-scale field programmable logic device FPGA by using a VHDL hardware description language, and the control module and the protocol analysis module are in the field programmable gate array FPGA.
- the integrated dual-core CotexA9 core is implemented in C language. In this example, Xilinx's ZYNQ 7000 series high-performance FPGA is selected.
- the hand-held FC bus tester of the invention is powered by a lithium battery, and preferably uses low-power components to ensure the life time of the tester. Better meet the requirements of portable use.
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Abstract
本发明公开了一种手持式FC总线测试仪,包括数据捕获模块,所述数据捕获模块捕获数据并将数据存储到存储单元,具备数据过滤和数据触发功能;数据发送模块,将数据通过光接口发送给被测设备;统计模块,对数据捕获模块捕获的数据和数据发送模块发送的数据进行统计,包括短期统计值与累计统计值,并与控制模块进行数据交互;人机接口,接收输入的控制信息并显示测试结果;控制模块,控制数据捕获模块、数据发送模块、统计模块、协议解析模块以及人机接口协调运行。克服了现有测试仪器存在的集成性低、携带不方便、价格昂贵等问题,使得手持式FC总线测试仪不仅满足FC协议分析和测试的需求,而且简单易用、便于携带。
Description
本发明涉及一种手持式FC总线测试仪。
随着FC技术得到越来越广泛的应用,采用FC技术的交换机、仪器及终端也越来越多。在FC设备终端应用范围日益广泛的情况下,针对FC设备终端的简单易用的自动化测试仪器并不多见,大多为体积较大的台式机或者便携机,把FC协议测试作为独立模块制作成PXI或者CPCI板卡,配合台式机或者便携机使用。而且目前市场上的FC总线测试仪器普遍采用FPGA与CPU独立设计,FPGA与CPU之间采用DPRAM进行交互,与CPCI接口采用CPLD进行接口译码与控制,这种架构采用的芯片种类数量多,占用印制板空间大,集成性不高,携带不方便,成本较高。
发明内容
本发明的目的就是为了解决上述问题,提供一种手持式FC总线测试仪,使得手持式FC总线测试仪不仅满足FC协议分析和测试的需求,而且简单易用、便于携带。
为了实现上述目的,本发明采用如下技术方案:
一种手持式FC总线测试仪,包括数据捕获模块,所述数据捕获模块捕获数据并将数据存储到存储单元,具备数据过滤和数据触发功能;
数据发送模块,将数据通过光接口发送给被测设备;
统计模块,对数据捕获模块捕获的数据和数据发送模块发送的数据进行统计,包括短期统计值与累计统计值,并与控制模块进行数据交互;
人机接口,接收输入的控制信息并显示测试结果;
控制模块,控制数据捕获模块、数据发送模块、统计模块、协议解析模块以及人机接口协调运行。
所述数据捕获模块将FC链路建立和数据传输过程中捕获的数据按照捕获时间先后顺序存储下来。
所述数据捕获模块具有数据过滤功能,能够根据控制捕获特定类型的原语、分界符或者帧头内容。
数据捕获模块具有数据触发功能,能够在捕获到特定的原语、分界符或者帧头内容后开
始对捕获的数据进行存储。
所述协议解析模块从存储单元中读取数据捕获模块捕获的FC数据帧进行分析,分析出数据帧的帧类型、帧头内容和净荷数据,并对数据帧进行CRC校验;自动解析识别FC-2帧、FC-AE-ASM、FC-AE-1553、SCSI及FICON。
所述数据发送模块在不同速率下根据设置产生不同的原语及FC帧并通过光接口向被测设备发送,支持FC-AE-ASM、FC-AE-1553协议数据发送。
所述统计模块统计各端口短期数据与累计数据,包括发送、接收的帧数量以及字节数,计算实时带宽利用率,统计FC1错误统计和FC2错误统计。
数据捕获模块、数据发送模块、统计模块均在现场可编程门阵列FPGA中采用VHDL硬件描述语言实现,控制模块和协议解析模块在现场可编程门阵列FPGA中集成的双核CotexA9内核中采用C语言实现。
所述现场可编程逻辑阵列FPGA通过GTX接口与SFP光模块连接,数据发送模块产生的数据通过现场可编程逻辑阵列FPGA中的GTX接口传送到SFP光模块进行发送;数据捕获模块通过现场可编程逻辑阵列FPGA中的GTX接口接收SFP接口光模块捕获的数据,并将数据存储到存储单元。
数据捕获模块、和数据发送模块通过现场可编程门阵列FPGA内的GTX接口与SFP光模块相连,通过SFP光模块跟被测设备进行数据交互;4.25Gb/s、2.125Gb/s、1.0625Gb/s三种不同端口速率通过现场可编程门阵列FPGA中的GTX接口采用DRP方式进行切换。本发明的有益效果:
克服了现有测试仪器存在的集成性低、携带不方便、价格昂贵等问题,使得手持式FC总线测试仪不仅满足FC协议分析和测试的需求,而且简单易用、便于携带。
图1为本发明的整体构架图;
图2为本发明的硬件构架图。
下面结合附图与实施例对本发明作进一步说明。
如图1所示,一种手持式FC总线测试仪,由图可知,本发明手持式FC总线测试仪包括:数据捕获模块、协议解析模块、数据发送模块、统计模块、控制模块和人机接口。其中:
数据捕获模块将FC链路建立和数据传输过程中捕获的数据,根据帧定界符定位出每一帧数据,并在帧起始符位置打上时标,按照捕获时间先后顺序存储到存储单元,并且具备数
据过滤和数据触发功能;
协议解析模块,从DDR存储单元中读取数据捕获模块捕获的FC数据帧进行分析,分析出数据帧的帧类型、帧头内容和净荷数据,并对数据帧的进行CRC校验;
数据发送模块,在不同速率下根据设置产生不同的原语及FC帧并通过SFP光模块向被测设备发送;
统计模块,对数据捕获模块捕获的数据和数据发送模块发送的数据进行统计,分为短期值与累计值,包括发送、接收的帧数量以及字节数,计算实时带宽利用率,统计FC1错误统计、FC2错误统计;
控制模块,控制数据捕获模块、数据发送模块、统计模块、协议解析模块以及人机接口协调运行,从人机接口中读取控制信息控制数据捕获模块和数据发送模块进行收发数据,控制数据捕获模块根据控制信息对捕获的数据进行过滤和触发,并将捕获的数据存储到存储单元的指定地址中,控制协议解析模块从存储单元中读取捕获数据,控制统计模块对收发的数据进行统计,将协议解析模块解析的结果和统计模块的结果送至人机接口中进行显示;
人机接口,接收对数据发送模块和数据捕获模块的控制信息,协议解析的结果以及统计结果。
进一步的,数据捕获模块具有数据过滤功能,能够根据控制捕获特定类型的原语、分界符或者帧头内容。
进一步的,数据捕获模块具有数据触发功能,能够在捕获到特定的原语、分界符或者帧头内容后开始对捕获的数据进行存储。
进一步的,协议解析模块能够自动解析识别FC-2帧、FC-AE-ASM、FC-AE-1553、SCSI、FICON。
进一步的,数据发送模块能够支持FC-AE-ASM、FC-AE-1553协议数据发送。
本发明手持式FC总线测试仪以WinCE系统为系统平台,用户易于接受上手快。此外,软件界面采用图形化设计,各模块控制按钮功能清晰明确,易于使用。
如图2所示,由图可知,本发明一种手持式FC总线测试仪,采用一种TFT触摸屏作为人机接口及输入输出平台;
在现场可编程逻辑门阵列FPGA中设计实现数据捕获模块、数据发送模块和统计模块;
同时FPGA内集成的双核CotexA9内核中实现控制模块,在CotexA9内核的应用软件中实现协议解析模块;
采用DDR3存储器作为捕获数据的存储单元;
其中数据捕获模块和数据发送模块通过现场可编程门阵列FPGA内GTX接口与SFP光模
块相连,通过SFP光模块跟被测设备进行数据交互;4.25Gb/s、2.125Gb/s、1.0625Gb/s三种不同端口速率通过现场可编程门阵列FPGA中的GTX接口采用DRP方式进行切换;
数据捕获模块和与协议解析模块通过现场可编程门阵列FPGA与DDR3进行数据交互。
本发明手持式FC总线测试仪分为两个端口,均采用标准SFP接口光模块进行连接。在数据发送模块产生的数据通过现场可编程逻辑阵列FPGA中的GTX接口传送到SFP光模块进行发送。数据捕获模块通过现场可编程逻辑阵列FPGA中的GTX接口接收SFP接口光模块捕获的数据,并将数据存储到存储单元。
在本实施例中,两个端口采用标准SFP连接器,光收发模块与FPGA之间通过GTX收发接口进行通信,GTX收发接口实现FC-0层、FC-1层和FC-2层中数据帧收发,为数据捕获模块和数据发送模块提供接口,提供用于数据帧收发的FIFO通道。
此外,采用DDR3存储器进行捕获数据的存储,采用高稳定度的高频晶振提供时钟参考以及专用电源芯片进行供电。
本发明手持式FC总线测试仪的数据捕获模块、数据发送模块、统计模块均在大规模现场可编程逻辑器件FPGA中采用VHDL硬件描述语言实现,控制模块和协议解析模块在现场可编程门阵列FPGA中集成的双核CotexA9内核中采用C语言实现。本实例中选用了Xilinx公司的ZYNQ 7000系列高性能FPGA。
本发明手持式FC总线测试仪采用锂电池供电,并优选选用低功耗元器件,保证测试仪的续航时间。较好满足了便携使用的要求。
上述虽然结合附图对本发明的具体实施方式进行了描述,但并非对本发明保护范围的限制,所属领域技术人员应该明白,在本发明的技术方案的基础上,本领域技术人员不需要付出创造性劳动即可做出的各种修改或变形仍在本发明的保护范围以内。
Claims (10)
- 一种手持式FC总线测试仪,其特征是,包括数据捕获模块,所述数据捕获模块捕获数据并将数据存储到存储单元,具备数据过滤和数据触发功能;数据发送模块,将数据通过光接口发送给被测设备;统计模块,对数据捕获模块捕获的数据和数据发送模块发送的数据进行统计,包括短期统计值与累计统计值,并与控制模块进行数据交互;人机接口,接收输入的控制信息并显示测试结果;控制模块,控制数据捕获模块、数据发送模块、统计模块、协议解析模块以及人机接口协调运行。
- 如权利要求1所述一种手持式FC总线测试仪,其特征是,所述数据捕获模块将FC链路建立和数据传输过程中捕获的数据按照捕获时间先后顺序存储下来。
- 如权利要求1所述一种手持式FC总线测试仪,其特征是,所述数据捕获模块具有数据过滤功能,能够根据控制捕获特定类型的原语、分界符或者帧头内容。
- 如权利要求1所述一种手持式FC总线测试仪,其特征是,数据捕获模块具有数据触发功能,能够在捕获到特定的原语、分界符或者帧头内容后开始对捕获的数据进行存储。
- 如权利要求1所述一种手持式FC总线测试仪,其特征是,所述协议解析模块从存储单元中读取数据捕获模块捕获的FC数据帧进行分析,分析出数据帧的帧类型、帧头内容和净荷数据,并对数据帧进行CRC校验;自动解析识别FC-2帧、FC-AE-ASM、FC-AE-1553、SCSI及FICON。
- 如权利要求1所述一种手持式FC总线测试仪,其特征是,所述数据发送模块在不同速率下根据设置产生不同的原语及FC帧并通过光接口向被测设备发送,支持FC-AE-ASM、FC-AE-1553协议数据发送。
- 如权利要求1所述一种手持式FC总线测试仪,其特征是,所述统计模块统计各端口短期数据与累计数据,包括发送、接收的帧数量以及字节数,计算实时带宽利用率,统计FC1错误统计和FC2错误统计。
- 如权利要求1所述一种手持式FC总线测试仪,其特征是,数据捕获模块、数据发送模块、统计模块均在现场可编程门阵列FPGA中采用VHDL硬件描述语言实现,控制模块和协议解析模块在现场可编程门阵列FPGA中集成的双核CotexA9内核中采用C语言实现。
- 如权利要求8所述一种手持式FC总线测试仪,其特征是,所述现场可编程逻辑阵列FPGA通过GTX接口与SFP光模块连接,数据发送模块产生的数据通过现场可编程逻辑阵列FPGA中的GTX接口传送到SFP光模块进行发送;数据捕获模块通过现场可编程逻辑阵列FPGA 中的GTX接口接收SFP接口光模块捕获的数据,并将数据存储到存储单元。
- 如权利要求8所述一种手持式FC总线测试仪,其特征是,数据捕获模块、和数据发送模块通过现场可编程门阵列FPGA内的GTX接口与SFP光模块相连,通过SFP光模块跟被测设备进行数据交互;4.25Gb/s、2.125Gb/s、1.0625Gb/s三种不同端口速率通过现场可编程门阵列FPGA中的GTX接口采用DRP方式进行切换。
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CN107566085A (zh) * | 2017-09-04 | 2018-01-09 | 中国电子科技集团公司第四十研究所 | 一种基于fc总线的比特误码测试方法及系统 |
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