WO2018072065A1 - Led芯片制作方法及led芯片 - Google Patents

Led芯片制作方法及led芯片 Download PDF

Info

Publication number
WO2018072065A1
WO2018072065A1 PCT/CN2016/102301 CN2016102301W WO2018072065A1 WO 2018072065 A1 WO2018072065 A1 WO 2018072065A1 CN 2016102301 W CN2016102301 W CN 2016102301W WO 2018072065 A1 WO2018072065 A1 WO 2018072065A1
Authority
WO
WIPO (PCT)
Prior art keywords
led chip
substrate
light emitting
lower surfaces
chip substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2016/102301
Other languages
English (en)
French (fr)
Inventor
张金勇
罗剑生
王磊
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shenzhen Institute of Advanced Technology of CAS
Original Assignee
Shenzhen Institute of Advanced Technology of CAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shenzhen Institute of Advanced Technology of CAS filed Critical Shenzhen Institute of Advanced Technology of CAS
Priority to PCT/CN2016/102301 priority Critical patent/WO2018072065A1/zh
Publication of WO2018072065A1 publication Critical patent/WO2018072065A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/81—Bodies
    • H10H20/813—Bodies having a plurality of light-emitting regions, e.g. multi-junction LEDs or light-emitting devices having photoluminescent regions within the bodies

Definitions

  • the invention relates to the technical field of LED chips, in particular to an LED chip manufacturing method and an LED chip.
  • LED lamps are widely used in the world market, with small size, high brightness, low power consumption, low heat generation, long service life, environmental protection, etc., and have a variety of colors, deeply received by consumers. favorite.
  • LED chips as backlights play an indispensable role in electronic products that require display screens, such as mobile phones and televisions.
  • display screens such as mobile phones and televisions.
  • the size of LED chips is also required to be greatly reduced. Therefore, the world's major LED chip manufacturers have been committed to the development of high-efficiency chip structure.
  • the mainstream technology is to increase the number of quantum wells in the active area of the LED chip.
  • the mechanism of LED chip illumination is the hole and current when the current passes through the quantum well of the active region of the chip.
  • the quantum well is mainly to improve the composite efficiency.
  • the more complex the quantum well the higher the complex efficiency, but it cannot be infinitely limited.
  • the wall thickness between the quantum well and the quantum well If there are too many quantum wells, the wall will be thin and electron tunneling will occur, resulting in uneven distribution of the quantum well.
  • the thickness of the active portion of an LED chip is about several micrometers. Designing a large number of quantum wells in such a thin interval will inevitably cause a concentration of heat flux, which will cause a series of reliability problems, and the service life will be greatly reduced.
  • Embodiments of the present invention provide a method for fabricating an LED chip, which is capable of achieving double the number of quantum wells under the same size of the chip area without causing reliability problems.
  • the LED chip fabrication method is in the process of manufacturing the LED chip.
  • a light emitting unit is formed on each of the upper and lower surfaces of the LED chip substrate.
  • Embodiments of the present invention also provide an LED chip for achieving double the number of quantum wells under the same size of chip area without causing reliability problems.
  • the upper and lower surfaces of the LED chip substrate each have a light emitting unit.
  • the structure design of the light-emitting unit is formed by the upper and lower surfaces of the LED chip substrate, and the LED chip produced can realize double quantum under the same-sized chip area compared with the conventional LED chip.
  • the number of wells does not cause reliability problems.
  • the LED chip of the embodiment of the invention has high luminous efficiency, is brighter than the conventional chip in the same area, has a longer life, good reliability, simple process, low cost, and has greater market value.
  • FIG. 1 is a schematic structural view of a conventional LED chip according to an embodiment of the present invention.
  • FIG. 2 is a schematic structural view of an LED chip according to an embodiment of the present invention.
  • FIG. 3 is a schematic diagram of an LED chip package form according to an embodiment of the present invention.
  • a method for fabricating an LED chip is provided.
  • the LED chip produced by the method has high luminous efficiency, is brighter than a conventional chip in the same area, has a longer life, is more reliable, and has a simple process and a cost. Low, with greater market value.
  • the LED chip manufacturing method of the embodiment of the invention can make an LED chip with an active area on both sides of the substrate without changing the process flow of the existing LED chip, thereby making the number of quantum wells The design is multiplied.
  • FIG. 1 is a schematic structural view of a conventional LED chip involved in the embodiment of the present invention.
  • the substrate 11 is provided with an N-type buffer layer 12 and N.
  • LED chips are roughly process flow, for example, fabricating substrates, structural design, buffer layer growth, N-type GaN layer growth, and more Quantum well luminescent layer growth, P-type GaN layer growth, annealing, detection (photofluorescence, X-ray), epitaxial wafer, design, processing reticle, photolithography, ion etching, N-type electrode (coating, annealing, etching) , P-type electrode (coating, annealing, etching), dicing, chip sorting, grading, etc. Since the conventional LED chip production process has been developed to be quite mature, the general process flow will be described here by way of example only, and those skilled in the art are familiar with the fact that there may be some details of the process during the specific production process.
  • one light emitting unit is formed on each of the upper and lower surfaces of the LED chip substrate.
  • one light-emitting unit is respectively formed on the upper and lower surfaces of the same substrate, and the upper and lower light-emitting units can be sequentially produced according to the above-mentioned conventional LED chip process, which is relatively simple to implement.
  • the process flow can be changed as needed on the basis of the above-mentioned conventional LED chip process to produce an LED chip that meets the requirements. That is, in the LED chip of the embodiment of the present invention, each of the upper and lower surfaces of the LED chip substrate has one light emitting unit.
  • forming one light emitting unit on each of the upper and lower surfaces of the LED chip substrate may include: forming a light-emitting unit of uniform size on each of the upper and lower surfaces of the LED chip substrate.
  • one and the same light-emitting unit are respectively formed on the same substrate, and the size of the light-emitting unit on the upper and lower surfaces is kept uniform, and only one production process is repeated, and the production line configuration is not required to be adjusted, which is suitable for mass production. That is, in the example, in the LED chip of the embodiment of the invention, the size of the upper and lower surface light emitting units of the LED chip substrate are the same.
  • the light emitting unit is formed on the upper surface or the lower surface of the LED chip substrate, and may include forming an N-type buffer layer, an N-type layer, an active region quantum well, a P-type layer, a transparent conductive layer, and a positive layer on the substrate. Electrode and negative electrode. That is, in an example, in the LED chip of the embodiment of the present invention, the upper surface or lower surface light emitting unit of the LED chip substrate includes an N-type buffer layer, an N-type layer, an active region quantum well, and a P-type layer formed on the substrate. , a transparent conductive layer, a positive electrode and a negative electrode.
  • FIG. 2 is a schematic structural view of an LED chip according to an embodiment of the present invention.
  • an N-type buffer layer 22, an N-type layer 23, and an active region quantum are disposed on the upper surface of the substrate 21.
  • a well 25, a P-type layer 26, a transparent conductive layer 27, a positive electrode 28, and a negative electrode 24; an N-type buffer layer 29, an N-type layer 30, an active region quantum well 31, and a P-type layer are provided on the lower surface of the substrate 21.
  • the LED chip manufacturing method of the embodiment of the present invention may further include: connecting positive electrodes of two light emitting units on the upper and lower surfaces of the LED chip substrate to each other, and two light emitting units on the upper and lower surfaces of the LED chip substrate The negative electrodes are connected to each other to form a surface patch and are attached to the substrate in a flip chip soldering manner. In this way, the LED chip packaging process of the embodiment of the present invention can be simplified.
  • the positive electrodes of the two light emitting units on the upper and lower surfaces of the LED chip substrate may be connected to each other by gold wires or copper wires, and/or the upper and lower surfaces of the LED chip substrate may be two by gold wires or copper wires.
  • the negative electrodes of the light-emitting units are connected to each other to achieve good electrical conductivity.
  • the LED chip package form of the embodiment of the present invention may be: the positive electrodes of the two light emitting units on the upper and lower surfaces of the LED chip substrate are connected to each other, and the negative electrodes of the two light emitting units on the upper and lower surfaces of the LED chip substrate are connected to each other to form a surface. SMD form and attached to the substrate in flip-chip solder.
  • the positive electrodes of the two light emitting units on the upper and lower surfaces of the LED chip substrate are connected to each other by gold wires or copper wires; and/or the negative electrodes of the two light emitting units on the upper and lower surfaces of the LED chip substrate are gold wires or The copper wires are connected to each other.
  • FIG. 3 is a schematic diagram of an LED chip package form according to an embodiment of the present invention.
  • the positive electrode 28 of the upper surface light emitting unit of the LED chip substrate and the positive electrode 34 of the lower surface light emitting unit of the LED chip substrate are connected to each other.
  • the negative electrode 24 of the upper surface light emitting unit of the LED chip substrate and the negative electrode 35 of the lower surface light emitting unit of the LED chip substrate are connected to each other to form the positive electrode 36 and the negative electrode 37 in the form of surface patches, respectively, and are attached in a flip chip soldering manner.
  • the circle in Fig. 3 represents a connection line structure such as a gold wire or a copper wire for connecting two positive electrodes or two negative electrodes.
  • the structure design of the light emitting unit is formed by the upper and lower surfaces of the LED chip substrate, and the LED chip fabricated under the same size chip area can be compared with the conventional LED chip. Achieve double the number of quantum wells without causing reliability problems.
  • the LED chip of the embodiment of the invention has high luminous efficiency, is brighter than the conventional chip in the same area, has a longer life, good reliability, simple process, low cost, and has greater market value.
  • the LED chip of the embodiment of the invention can also be designed in the form of a surface patch, which makes the packaging process simple.
  • the embodiment of the present invention can design an active area on one side of a very mature LED substrate which has been developed at present, and design an active area on the other side, and the process and conditions can be the same as the conventional LED chip, and the implementation is not realized. difficult.
  • embodiments of the present invention can be provided as a method, system, or computer program product. Accordingly, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment, or a combination of software and hardware. Moreover, the invention can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) including computer usable program code.
  • computer-usable storage media including but not limited to disk storage, CD-ROM, optical storage, etc.
  • the computer program instructions can also be stored in a computer readable memory that can direct a computer or other programmable data processing device to operate in a particular manner, such that the instructions stored in the computer readable memory produce an article of manufacture comprising the instruction device.
  • the apparatus implements the functions specified in one or more blocks of a flow or a flow and/or block diagram of the flowchart.
  • These computer program instructions can also be loaded onto a computer or other programmable data processing device such that a series of operational steps are performed on a computer or other programmable device to produce computer-implemented processing for execution on a computer or other programmable device.
  • the instructions provide steps for implementing the functions specified in one or more of the flow or in a block or blocks of a flow diagram.

Landscapes

  • Led Devices (AREA)
  • Led Device Packages (AREA)

Abstract

一种LED芯片制作方法及LED芯片，其中该LED芯片制作方法在LED芯片制作过程中，在LED芯片衬底（11）的上下表面各制作一个发光单元。该LED芯片衬底（11）的上下表面各有一个发光单元。该LED芯片制作方法，通过LED芯片衬底（11）上下表面均制作发光单元的结构设计，相对于传统LED芯片，所制作的LED芯片在同样大小的芯片面积之下可以实现双倍的量子阱数量，同时不引起可靠性问题。该LED芯片光效高，在相同面积的情况下比传统芯片更亮，寿命更长，可靠性好，并且工艺简单，成本低，具有较大的市场价值。

Description

LED芯片制作方法及LED芯片 技术领域
本发明涉及LED芯片技术领域，尤其涉及LED芯片制作方法及LED芯片。
背景技术
LED灯是目前世界范围市场上广泛使用的照明灯具，具有体积小，亮度高，耗电量低，发热少，使用寿命长，环保等优点，并且具有丰富多彩的颜色种类，深受消费者的喜爱。与此同时，LED芯片作为背光源在手机，电视机等需要显示屏的电子产品中发挥着不可或缺的作用，随着电子产品的尺寸的不断缩小，也要求LED芯片的尺寸能够大幅减小，因此，世界各大LED芯片厂家一直致力于研制高光效的芯片结构。
从LED芯片结构本身来考虑，在争取单位面积发出更多的光子，主流技术是在LED芯片有源区增加量子阱数量，LED芯片发光的机理是电流通过芯片有源区的量子阱时空穴与电子的辐射复合发光，量子阱越多代表着产生辐射发光的机会就越大。
通过增加有源区量子阱数量来获取更高的亮度必将遇到发展的瓶颈，量子阱主要是提高复合效率，量子阱越多复合效率也越高，但是也不能无限多，也受限于量子阱与量子阱之间壁厚，如果量子阱太多，会导致壁很薄，会出现电子隧穿现象，导致量子井电量分布不均匀。另外，一个LED芯片的有源区部分厚度大概就几个微米，在这么薄的区间设计大量量子阱，必将引起热流密度集中，产生一系列可靠性问题，使用寿命大幅度下降。相关资料研究显示，随着阱个数的增加，可以使电子注入到较多的量子阱中，减小活性区载流子的密度，从而减轻俄歇复合效应。而当阱的个数增加时，由于极化的积累，使得能带弯曲和载流子泄露现象严重，导致器件性能下降；此外，增加量子阱数量，在外延生长时不仅浪费原材料，还会增加量子阱的生长难度，难以制备高质量的量子阱。
发明内容
本发明实施例提供一种LED芯片制作方法，用以在同样大小的芯片面积之下实现双倍的量子阱数量，同时不引起可靠性问题，该LED芯片制作方法在LED芯片制作过程中，在LED芯片衬底的上下表面各制作一个发光单元。
本发明实施例还提供一种LED芯片，用以在同样大小的芯片面积之下实现双倍的量子阱数量，同时不引起可靠性问题，该LED芯片衬底的上下表面各有一个发光单元。
本发明实施例的LED芯片制作方法，通过LED芯片衬底上下表面均制作发光单元的结构设计，相对于传统LED芯片，所制作的LED芯片在同样大小的芯片面积之下可以实现双倍的量子阱数量，同时不引起可靠性问题。本发明实施例的LED芯片光效高，在相同面积的情况下比传统芯片更亮，寿命更长，可靠性好，并且工艺简单，成本低，具有较大的市场价值。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。在附图中：
图1为本发明实施例中涉及的传统LED芯片结构示意图；
图2为本发明实施例中LED芯片结构示意图；
图3为本发明实施例中LED芯片封装形式示意图。
具体实施方式
为使本发明实施例的目的、技术方案和优点更加清楚明白，下面结合附图对本发明实施例做进一步详细说明。在此，本发明的示意性实施例及其说明用于解释本发明，但并不作为对本发明的限定。
本发明实施例中提供一种LED芯片制作方法，利用该方法制作出的LED芯片光效高，在相同面积的情况下比传统芯片更亮，寿命更长，可靠性好，并且工艺简单，成本低，具有较大的市场价值。本发明实施例的LED芯片制作方法，可以在不改变现有LED芯片工艺流程的基础上，尽量少增加工序，制作一种衬底双面都有有源区的LED芯片，从而使量子阱数量设计成倍增加。
下面先介绍传统LED芯片结构，图1为本发明实施例中涉及的传统LED芯片结构示意图，如图1所示，在传统的LED芯片中，衬底11上设有N型缓冲层12、N型层13、有源区量子阱15、P型层16、透明导电层17、正电极18和负电极14。传统LED芯片大致工艺流程例如：制作衬底，进行结构设计，缓冲层生长，N型GaN层生长，多 量子阱发光层生长，P型GaN层生长，退火，检测(光荧光、X射线)，外延片，设计、加工掩模版，光刻，离子刻蚀，N型电极(镀膜、退火、刻蚀)，P型电极(镀膜、退火、刻蚀)，划片，芯片分检、分级等。由于传统LED芯片生产工艺已经发展得相当成熟，这里仅举一例说明其大致工艺流程，本领域技术人员熟知，具体生产时工艺过程可能有一些细节的变化。
本发明实施例的LED芯片制作方法，在LED芯片制作过程中，在LED芯片衬底的上下表面各制作一个发光单元。实施例中在同一衬底上下表面各自制作一个发光单元，可以按上述传统LED芯片工艺先后制作上下面发光单元，实现起来较为简单。当然，本领域技术人员也可以理解，具体实施时可以在上述传统LED芯片工艺基础上按需进行工艺流程上的变化，以制作符合需求的LED芯片。即，本发明实施例的LED芯片，LED芯片衬底的上下表面各有一个发光单元。
在具体实例中，在LED芯片衬底的上下表面各制作一个发光单元，可以包括：在LED芯片衬底的上下表面各制作一个尺寸大小一致的发光单元。实施时在同一衬底上下面各自制作一个相同的发光单元，在保持上下表面发光单元尺寸大小一致的情况下，只需重复一遍生产流程，不需额外调整产线配置，适合大规模生产。即在实例中，本发明实施例的LED芯片，LED芯片衬底的上下表面发光单元尺寸大小一致。
具体实施时，在LED芯片衬底的上表面或下表面制作发光单元，可以包括在衬底上形成N型缓冲层、N型层、有源区量子阱、P型层、透明导电层、正电极和负电极。即在实例中，本发明实施例的LED芯片，LED芯片衬底的上表面或下表面发光单元包括在衬底上形成的N型缓冲层、N型层、有源区量子阱、P型层、透明导电层、正电极和负电极。
图2为本发明实施例中LED芯片结构示意图，如图2所示，本发明实施例中LED芯片，在衬底21上表面设有N型缓冲层22、N型层23、有源区量子阱25、P型层26、透明导电层27、正电极28和负电极24；在衬底21下表面设有N型缓冲层29、N型层30、有源区量子阱31、P型层32、透明导电层33、正电极34和负电极35。
在具体的实例中，本发明实施例的LED芯片制作方法还可以包括：将LED芯片衬底的上下表面两个发光单元的正电极相互连接，将LED芯片衬底的上下表面两个发光单元的负电极相互连接，形成表面贴片形式，并以倒装焊接形式贴于基板上。这样，可以使本发明实施例的LED芯片封装工艺简单。
在具体的实例中，可以用金线或铜线将LED芯片衬底的上下表面两个发光单元的正电极相互连接，和/或，用金线或铜线将LED芯片衬底的上下表面两个发光单元的负电极相互连接，以实现良好的导电性。
即，本发明实施例的LED芯片封装形式可以为：LED芯片衬底的上下表面两个发光单元的正电极相互连接，LED芯片衬底的上下表面两个发光单元的负电极相互连接，形成表面贴片形式，并以倒装焊接形式贴于基板上。在一个实例中，LED芯片衬底的上下表面两个发光单元的正电极用金线或铜线相互连接；和/或，LED芯片衬底的上下表面两个发光单元的负电极用金线或铜线相互连接。
图3为本发明实施例中LED芯片封装形式示意图，如图3所示，LED芯片衬底的上表面发光单元的正电极28与LED芯片衬底的下表面发光单元的正电极34相互连接，LED芯片衬底的上表面发光单元的负电极24与LED芯片衬底的下表面发光单元的负电极35相互连接，分别形成表面贴片形式的正极36和负极37，并以倒装焊接形式贴于基板38上。图3中圆圈代表连接两个正电极或两个负电极所用的金线或铜线等连接线结构。
综上所述，本发明实施例的LED芯片制作方法，通过LED芯片衬底上下表面均制作发光单元的结构设计，相对于传统LED芯片，所制作的LED芯片在同样大小的芯片面积之下可以实现双倍的量子阱数量，同时不引起可靠性问题。本发明实施例的LED芯片光效高，在相同面积的情况下比传统芯片更亮，寿命更长，可靠性好，并且工艺简单，成本低，具有较大的市场价值。
本发明实施例的LED芯片也可以设计成表面贴片的形式，使封装工艺简单。本发明实施例可以在目前已经发展的非常成熟的LED衬底单面设计有源区的基础上，再在另一面多设计有源区，工艺和条件均可以与传统LED芯片一样，实现起来没有困难。
本领域内的技术人员应明白，本发明的实施例可提供为方法、系统、或计算机程序产品。因此，本发明可采用完全硬件实施例、完全软件实施例、或结合软件和硬件方面的实施例的形式。而且，本发明可采用在一个或多个其中包含有计算机可用程序代码的计算机可用存储介质(包括但不限于磁盘存储器、CD-ROM、光学存储器等)上实施的计算机程序产品的形式。
本发明是参照根据本发明实施例的方法、设备(系统)、和计算机程序产品的流程图和/或方框图来描述的。应理解可由计算机程序指令实现流程图和/或方框图中的每一流程和/或方框、以及流程图和/或方框图中的流程和/或方框的结合。可提供这些计算机 程序指令到通用计算机、专用计算机、嵌入式处理机或其他可编程数据处理设备的处理器以产生一个机器，使得通过计算机或其他可编程数据处理设备的处理器执行的指令产生用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的装置。
这些计算机程序指令也可存储在能引导计算机或其他可编程数据处理设备以特定方式工作的计算机可读存储器中，使得存储在该计算机可读存储器中的指令产生包括指令装置的制造品，该指令装置实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能。
这些计算机程序指令也可装载到计算机或其他可编程数据处理设备上，使得在计算机或其他可编程设备上执行一系列操作步骤以产生计算机实现的处理，从而在计算机或其他可编程设备上执行的指令提供用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的步骤。
以上所述的具体实施例，对本发明的目的、技术方案和有益效果进行了进一步详细说明，所应理解的是，以上所述仅为本发明的具体实施例而已，并不用于限定本发明的保护范围，凡在本发明的精神和原则之内，所做的任何修改、等同替换、改进等，均应包含在本发明的保护范围之内。

Claims (10)

  1. 一种LED芯片制作方法，其特征在于，在LED芯片制作过程中，在LED芯片衬底的上下表面各制作一个发光单元。
  2. 如权利要求1所述的LED芯片制作方法，其特征在于，所述在LED芯片衬底的上下表面各制作一个发光单元，包括：在LED芯片衬底的上下表面各制作一个尺寸大小一致的发光单元。
  3. 如权利要求1所述的LED芯片制作方法，其特征在于，在LED芯片衬底的上表面或下表面制作发光单元，包括在衬底上形成N型缓冲层、N型层、有源区量子阱、P型层、透明导电层、正电极和负电极。
  4. 如权利要求1所述的LED芯片制作方法，其特征在于，还包括：
    将LED芯片衬底的上下表面两个发光单元的正电极相互连接，将LED芯片衬底的上下表面两个发光单元的负电极相互连接，形成表面贴片形式，并以倒装焊接形式贴于基板上。
  5. 如权利要求4所述的LED芯片制作方法，其特征在于，所述将LED芯片衬底的上下表面两个发光单元的正电极相互连接，包括用金线或铜线将LED芯片衬底的上下表面两个发光单元的正电极相互连接；
    和/或，所述将LED芯片衬底的上下表面两个发光单元的负电极相互连接，包括用金线或铜线将LED芯片衬底的上下表面两个发光单元的负电极相互连接。
  6. 一种LED芯片，其特征在于，所述LED芯片衬底的上下表面各有一个发光单元。
  7. 如权利要求6所述的LED芯片，其特征在于，所述LED芯片衬底的上下表面发光单元尺寸大小一致。
  8. 如权利要求6所述的LED芯片，其特征在于，所述LED芯片衬底的上表面或下表面发光单元包括在衬底上形成的N型缓冲层、N型层、有源区量子阱、P型层、透明导电层、正电极和负电极。
  9. 如权利要求6所述的LED芯片，其特征在于，所述LED芯片衬底的上下表面两个发光单元的正电极相互连接，所述LED芯片衬底的上下表面两个发光单元的负电极相互连接，形成表面贴片形式，并以倒装焊接形式贴于基板上。
  10. 如权利要求9所述的LED芯片，其特征在于，所述LED芯片衬底的上下表面两个发光单元的正电极用金线或铜线相互连接；和/或，所述LED芯片衬底的上下表面两个发光单元的负电极用金线或铜线相互连接。
PCT/CN2016/102301 2016-10-18 2016-10-18 Led芯片制作方法及led芯片 Ceased WO2018072065A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/CN2016/102301 WO2018072065A1 (zh) 2016-10-18 2016-10-18 Led芯片制作方法及led芯片

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2016/102301 WO2018072065A1 (zh) 2016-10-18 2016-10-18 Led芯片制作方法及led芯片

Publications (1)

Publication Number Publication Date
WO2018072065A1 true WO2018072065A1 (zh) 2018-04-26

Family

ID=62018388

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2016/102301 Ceased WO2018072065A1 (zh) 2016-10-18 2016-10-18 Led芯片制作方法及led芯片

Country Status (1)

Country Link
WO (1) WO2018072065A1 (zh)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070170444A1 (en) * 2004-07-07 2007-07-26 Cao Group, Inc. Integrated LED Chip to Emit Multiple Colors and Method of Manufacturing the Same
CN103151447A (zh) * 2013-03-11 2013-06-12 厦门市三安光电科技有限公司 一种双面发光二极管结构及其制作方法
CN103367574A (zh) * 2012-03-30 2013-10-23 华夏光股份有限公司 发光二极管装置
CN103840064A (zh) * 2014-03-06 2014-06-04 晶科电子（广州）有限公司 一种立体式发光的led器件及其制作方法
CN104094426A (zh) * 2012-02-02 2014-10-08 西铁城控股株式会社 半导体发光装置及其制造方法
CN104103659A (zh) * 2013-04-09 2014-10-15 东贝光电科技股份有限公司 单晶双光源发光元件

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070170444A1 (en) * 2004-07-07 2007-07-26 Cao Group, Inc. Integrated LED Chip to Emit Multiple Colors and Method of Manufacturing the Same
CN104094426A (zh) * 2012-02-02 2014-10-08 西铁城控股株式会社 半导体发光装置及其制造方法
CN103367574A (zh) * 2012-03-30 2013-10-23 华夏光股份有限公司 发光二极管装置
CN103151447A (zh) * 2013-03-11 2013-06-12 厦门市三安光电科技有限公司 一种双面发光二极管结构及其制作方法
CN104103659A (zh) * 2013-04-09 2014-10-15 东贝光电科技股份有限公司 单晶双光源发光元件
CN103840064A (zh) * 2014-03-06 2014-06-04 晶科电子（广州）有限公司 一种立体式发光的led器件及其制作方法

Similar Documents

Publication Publication Date Title
JP2012064917A (ja) 発光ダイオード
CN107146840A (zh) 一种倒装led芯片阵列结构及其制备方法
CN104810436B (zh) 一种发光二极管芯片及其制备方法
CN104465895A (zh) Led芯片及其制作方法
CN104037295A (zh) 一种led倒装芯片及其制造方法
CN103618042B (zh) 一种半导体发光二极管芯片
CN103915557A (zh) 一种使用陶瓷散热的高功率led灯具
CN103996755B (zh) 一种氮化物发光二极管组件的制备方法
CN102931297B (zh) 一种led芯片及其制作方法
CN105161587A (zh) 可见光通信led器件
TWI467808B (zh) 發光二極體元件、其製作方法以及發光裝置
CN106848005B (zh) 提升亮度的倒装led芯片及其制备方法
CN104064645B (zh) 一种提升led抗静电能力与亮度的制备方法
CN106252479A (zh) Led芯片制作方法及led芯片
CN105226140A (zh) 倒装led芯片制备方法
CN102544266B (zh) 一种高光效白光led倒装芯片的制作方法
CN104409595B (zh) 具有电流阻挡结构的垂直发光二极管及其制造方法
CN206148462U (zh) Led芯片
CN104659169A (zh) 一种简易倒装led及其制作方法
CN103296046B (zh) 一种led发光器件
CN105826439A (zh) 一种发光二极管芯片及其制备方法
WO2018072065A1 (zh) Led芯片制作方法及led芯片
CN206864498U (zh) 一种倒装led芯片阵列结构
CN102064249B (zh) 一种新型氮化镓led芯片电极结构的制作方法
CN105742418A (zh) 一种发光二极管芯片及其制作方法

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 16919159

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

32PN Ep: public notification in the ep bulletin as address of the adressee cannot be established

Free format text: NOTING OF LOSS OF RIGHTS PURSUANT TO RULE 112(1) EPC (EPO FORM 1205A DATED 22-08-2019)