WO2018068699A1 - 一种通过触发器产生脉冲的半双工rfid振荡维持电路 - Google Patents

一种通过触发器产生脉冲的半双工rfid振荡维持电路 Download PDF

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WO2018068699A1
WO2018068699A1 PCT/CN2017/105531 CN2017105531W WO2018068699A1 WO 2018068699 A1 WO2018068699 A1 WO 2018068699A1 CN 2017105531 W CN2017105531 W CN 2017105531W WO 2018068699 A1 WO2018068699 A1 WO 2018068699A1
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mos transistor
type mos
circuit
drain
terminal
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PCT/CN2017/105531
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English (en)
French (fr)
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张千文
吴边
韩富强
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卓捷创芯科技（深圳）有限公司
无锡智速科技有限公司
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Priority to US16/340,932 priority Critical patent/US10552723B2/en
Publication of WO2018068699A1 publication Critical patent/WO2018068699A1/zh

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • G06K19/07773—Antenna details
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/0723—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
    • H03B5/08—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
    • H03B5/12—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device
    • H03B5/1228—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device the amplifier comprising one or more field effect transistors

Definitions

  • the present invention belongs to the field of Radio Frequency Identification (RFID), and more specifically to a half-duplex RFID oscillation maintaining circuit that generates pulses through a trigger, and a half-duplex passive including the oscillation maintaining circuit RF tag.
  • RFID Radio Frequency Identification
  • Half-duplex (HDX) radio frequency communication is a communication method for radio frequency identification passive tag chips. During the communication process, information can be transmitted from the RFID reader to the tag chip, also known as downlink, or from the chip to the card reader, also known as uplink. The transmission mode in which the uplink and downlink transmissions are not performed at the same time is called "half-duplex transmission".
  • the wireless RF field energy is emitted by the card reader; the passive tag chip receives the wireless RF field energy emitted by the card reader through the LC resonance circuit composed of the inductor antenna L and the resonance capacitor C, and the internal of the chip
  • the rectifier circuit converts the AC RF current signal into a DC current for use in the internal circuit of the chip, and stores the rectified electric energy in the storage capacitor C L ; the information sent from the card reader to the tag is mostly amplitude-modulated.
  • the encoding method that is, the RF current signal with different oscillation amplitude values represents the "0" or "1" code in the digital transmission.
  • the downlink transmitted RF signal contains operation instruction information, such as writing an ID code to the tag chip memory.
  • the tag chip first receives the RF signal, and then performs demodulation, and then performs a corresponding write ID code operation.
  • the response of the tag chip to the card reader is completed by the uplink transmission mode.
  • the card reader stops the transmission of the wireless RF field energy, that is, the field is broken, and the tag chip uses the power in the storage capacitor to work, that is, the response information of the tag is sent back to the card reader through the inductive antenna; some international common standards
  • the response information encoded by the label can be encoded by Frequency Shift Keying (FSK), that is, the information "0" and " The 1" code is represented by a different signal frequency.
  • FSK Frequency Shift Keying
  • the tag can maintain the oscillation of the LC resonant circuit of the antenna end after the field break, and the oscillation frequency is "0", "the oscillation frequency” is required under the premise that the oscillation amplitude is sufficient to meet the sensitivity requirement of the receiver end of the card reader. 1" depends on the data until the uplink data message is sent. Because the energy in the storage capacitor is mainly consumed by the oscillation maintaining circuit in this mode, and other circuit modules are basically in a sleep state that does not consume power, obviously, the design of the oscillation maintaining circuit is the key technology of the HDX passive RFID tag chip. One, in the absence of an external power supply to the RF tag, the technology of charging the LC resonant tank through the storage capacitor to maintain oscillation as much as possible will greatly affect the response distance of the chip.
  • FIG. 1 is a process block diagram of a passive HDX type RFID tag chip communication.
  • the oscillation maintaining circuit shown in the figure is one of the key technologies of the chip, and the patent application of the present invention mainly improves the part of the circuit.
  • the scheme proposes a complex peak detection circuit for detecting the peak value of the AC voltage signal in the oscillating circuit after the break.
  • the oscillation maintaining circuit controls the relevant circuit to cause the electrical energy in the storage capacitor to be injected into the LC resonant circuit, thereby maintaining the resonant circuit in a certain satisfaction
  • the current pulse is generated at a point in time when the peak of the RF signal has just reached a predetermined threshold. This method is called "plucking.”
  • the advantage of fast injection is that the oscillation-maintaining circuit is highly efficient. It injects current into the resonant coil when the oscillating circuit requires energy, and maintains the oscillation of the circuit in the form of a high-energy current pulse.
  • it has two disadvantages:
  • the signal processing process is complicated, resulting in a complicated circuit structure, which requires more analog circuits to be implemented, which makes it consumes a large amount of energy on the storage capacitor, so its application is limited.
  • the frequency of the injected current pulse signal is determined by the attenuation characteristic of the amplitude amplitude of the resonant circuit, and the frequency of resonance with the resonant circuit has a large, non-direct correlation difference, so that in the uplink communication, on the antenna
  • the deviation of the frequency of the oscillating signal affects the recognition and demodulation of the upstream signal of the tag chip by the card reader.
  • the existing oscillation sustaining circuit is Texas Patent's invention patent technology (US 7,667,548).
  • EOB End-of-Burst
  • the oscillation maintaining circuit is composed of a clock generating circuit, a programmable memory, an AND gate circuit, a current limiting resistor, and a switch.
  • the clock generation circuit generates a clock according to the RF signal, and performs a combined logic operation on the response data to be transmitted, that is, a series of “0” and “1” data streams, thereby controlling the on and off of the corresponding current injection switch, thereby
  • the current is smoothly injected into the LC resonant circuit.
  • the current injection occurs in the negative half cycle of the RF signal, and the injected current is a varying current of a non-fixed current value, and the current passes through the current limiting function of the current limiting resistor R, and is related to the inherent quality factor of the resonant circuit, and needs to be carefully designed.
  • control a series of current limiting resistors R and a branch in series with the current injection switch can be used to correct the problem of resistance value deviation due to process variation.
  • the advantage of this method is that it can smoothly inject current without causing the frequency drift of the RF response signal generated by the resonant circuit.
  • the circuit structure is simpler and easier to implement than the first solution. Its shortcomings are reflected in two aspects:
  • the current injection time occurs during the entire negative half cycle of the RF signal, with a relatively long time relative to the current pulse and a large current consumption.
  • the magnitude of the injection current in this method is closely related to the quality factor of the resonant circuit. Therefore, the current limiting resistor R should be carefully designed.
  • the circuit uses multiple current injection branches controlled by the gate circuit. The selection of the current injection branch is Control is a more complicated process.
  • the third is also derived from Texas Instruments' invention patent technology (US 8,629,759).
  • the program proposes amendments to the above two technical solutions.
  • a phase-locked loop PLL composed of a loop filter, a phase detector, a voltage controlled oscillator, and a multiplexer is used to stabilize the frequency of the signal;
  • a method of pulse width control is proposed (ie, current is injected into the resonant circuit every half cycle, and the time of current injection can be controlled as needed).
  • the combination of two correction methods produces a frequency-stable, pulse-width-controllable signal that is used to control the "plucking" current. This solution can solve the problem of current injection efficiency and frequency drift.
  • the above technical solution 3 does not propose a method for realizing the pulse width control circuit.
  • the circuit design PLL stabilizes the frequency of the control signal, which inevitably increases the power consumption of the system circuit, and causes the overall efficiency of the tag chip to decrease.
  • the invention aims at the problem of the efficiency of the oscillation maintaining circuit and the difficulty of the circuit in the process of the half-duplex passive RFID tag chip in the uplink process, and proposes a higher efficiency, low power consumption and easy to implement oscillation maintaining circuit with the injection pulse time controllable.
  • the circuit has certain adaptability, simple structure, low power consumption and high efficiency. It is relatively high, and avoids the frequency drift problem caused by the oscillation signal on the RF tag antenna due to the influence of the oscillation sustain circuit injection current.
  • a half-duplex RFID oscillation maintaining circuit for generating a pulse by a trigger, comprising a resonant inductor and a resonance connected in parallel between the first antenna end and the second antenna end.
  • the resonant inductor and the resonant capacitor form a resonant circuit coupled to the external magnetic field to generate an alternating current, and the alternating current is input to the rectifier circuit, the output of the rectifier circuit is connected to the storage capacitor and the internal circuit, the first antenna end Connected to the trigger circuit as an input end of the trigger circuit, the power terminal of the trigger circuit is connected to the first antenna terminal through a switch unit and a resistor connected in series, and an output end of the trigger circuit is connected to the switch unit a control circuit, the trigger circuit is configured to sample a signal of the antenna end, and generate a rectangular wave signal with a pulse width adaptively adjustable to control the switching unit to be opened or closed to form a charging current from the storage capacitor to the LC resonant circuit. Loop.
  • the trigger circuit includes a fourth P-type MOS transistor, a fifth P-type MOS transistor, a sixth P-type MOS transistor, a fourth N-type MOS transistor, and a fifth N-type MOS.
  • a Schmitt trigger circuit composed of a tube and a sixth N-type MOS transistor, and an inverter composed of a ninth P-type MOS transistor and a ninth N-type MOS transistor, a tenth P-type MOS transistor, and a tenth N-type MOS
  • An inverter composed of a tube, the fourth P-type MOS transistor source is connected to the first threshold unit as an input end of the first threshold unit, and an output end of the first threshold unit is connected to the sixth
  • the drain terminal of the N-type MOS transistor is connected to the second threshold unit as an input terminal of the second threshold unit, and the output end of the second threshold unit is grounded.
  • the Schmitt trigger circuit used in the present invention is equivalent to a pulse generator, and its working principle is as follows: the Schmitt trigger generates a rectangular wave signal by oscillating a voltage signal at the sampling antenna end; rectangular wave signal control The switching unit is opened or closed; when the switching unit is closed, the charging current loop is formed, so that the storage capacitor C L injects charge energy into the LC resonant circuit to maintain the oscillation of the circuit.
  • the invention improves the current injection efficiency of the oscillation maintaining circuit, reduces the power consumption, and improves the response distance of the half-duplex RFID tag chip.
  • the circuit structure of the invention eliminates complex circuit structures such as phase-locked loops and breakage detection circuits, and uses a Schmitt trigger with simple structure and precise control to control the generation of the switching signals, and the Schmitt trigger can be
  • the pulse width generated by the adjustment of the magnitude of the rectified DC output voltage vdda and the magnitude of the voltage amplitude of the sampled RF oscillation signal is adaptively adjusted, that is, the injection current time, which has a simple structure, low power consumption, and is easy to The advantages of implementation.
  • the current injection loop of the present invention is composed of a switching device connected in series with a resistor and an L-C resonant circuit.
  • the period of the control switch conduction signal is the same as the RF signal frequency. Therefore, the current injection mechanism has no obvious influence on the oscillation frequency of the resonant circuit.
  • 1 is a process block diagram of a passive RFID tag chip HDX communication
  • FIG. 2 is a schematic diagram of a signal of a charge injection mechanism of an oscillation maintaining circuit of Comparative Document 1;
  • FIG. 3 is a schematic diagram of an oscillation maintaining circuit system of the present invention.
  • Embodiment 4 is a structural diagram of Embodiment 1 of an oscillation maintaining circuit switching unit of the present invention.
  • Embodiment 2 is a structural diagram of Embodiment 2 of a switching unit of an oscillation maintaining circuit according to the present invention.
  • Embodiment 3 is a structural diagram of Embodiment 3 of a switching unit of an oscillation maintaining circuit according to the present invention.
  • FIG. 7 is a structural diagram of a conventional Schmitt trigger circuit
  • FIG. 8 is a structural diagram of a Schmitt trigger circuit of the present invention.
  • FIG. 9 is a circuit structural diagram of an embodiment of a Schmitt trigger of the present invention.
  • Figure 11 is a diagram showing the correspondence between flip-flop flipping and time of the present invention.
  • FIG. 3 is a schematic diagram of an oscillation maintaining circuit system according to the present invention.
  • the present invention provides a half-duplex RFID oscillation maintaining circuit for generating pulses by a trigger, which is connected in parallel to a first antenna end in1 and a second antenna end in2.
  • the resonant inductor Ls and the resonant capacitor Cs are configured to form a resonant circuit that is capable of receiving an external electromagnetic field and inputting it into a rectifier circuit, the output of the rectifier circuit being coupled to the storage capacitor C L and an internal circuit,
  • the first antenna terminal in1 is connected to the trigger circuit.
  • the power terminal vdda of the trigger circuit is connected to the first antenna terminal in1 through a series connected switch unit and a resistor R, and the output of the trigger circuit Connected to the control end of the switch unit, the trigger circuit is configured to sample the signal of the antenna end, generate a rectangular wave signal with a pulse width adaptively adjustable to control the switch unit to open or close, forming the energy storage from the Capacitor C L to the charging current loop of the LC resonant tank.
  • the Schmitt trigger used in the present invention is equivalent to a hysteresis comparator which generates a rectangular wave signal by oscillating a voltage signal at the sampling antenna end; the rectangular wave signal controls the opening or closing of the switching unit;
  • the switch unit When the switch unit is closed, a current injection loop of the vdda ⁇ switch unit ⁇ R ⁇ LC resonant loop is formed, so that the storage capacitor C L injects charge energy into the LC resonant loop, preventing the amplitude of the coil RF oscillation signal from falling after the breakage, and maintaining The purpose of circuit oscillation.
  • the invention improves the current injection efficiency of the oscillation maintaining circuit and reduces the power consumption, thereby improving the utilization of the chip energy and improving the response distance of the RFID tag chip.
  • the switching unit is configured to control conduction and deactivation of the current injection loop, thereby implementing control of injection energy and energy injection time of the L-C resonant circuit.
  • the switching unit may be a switching device, or a composite switch, or a switching component, and the opening and closing of the switches are controlled by the trigger circuit.
  • the switch unit is a first switch S1, an input end of the first switch S1 is connected to the resistor R, a power terminal of the first switch is connected to a power source vdda, and a control end of the first switch is connected to the trigger circuit
  • the output is shown in Figure 5.
  • the switch unit may also be any one of the first P-type MOS tube PM1 or the first composite switch.
  • the switching unit is the first P-type MOS transistor PM1
  • the source of the first P-type MOS transistor PM1 is connected to the power supply vdda as a power supply terminal of the switching unit, and the drain is connected to the resistor R as the An input end of the switch unit, the gate is connected to the output end of the trigger circuit, as the control end of the switch unit, as shown in FIG. 4;
  • the first composite switch When the switch unit is the first composite switch, the first composite switch includes a second N-type MOS transistor NM2 and a second P-type MOS transistor PM2 connected in parallel, and the second N-type MOS transistor NM2 is connected to the drain a source of the second P-type MOS transistor PM2 connected to the power supply vdda as a power supply end of the first composite switch, and a source of the second N-type MOS transistor NM2 connected to the second P-type MOS transistor PM2 a drain is connected to the resistor R as an input end of the first composite switch, and a gate of the second P-type MOS transistor PM2 is connected to an output end of the trigger circuit as a first control of the first composite switch End, the second N The gate of the MOS transistor NM2 is connected to the output terminal of the flip-flop circuit through an inverter as a second control terminal of the first composite switch, as shown in FIG.
  • the trigger circuit is configured to sample the output signal RF1 of the first antenna terminal i n1, and output a rectangular wave signal with a controllable pulse width to the switch unit according to the signal, the switch unit is under the control of the rectangular wave signal Disconnected or closed to achieve control of the energy and energy injection time of the LC resonant tank.
  • the trigger circuit includes a fourth P-type MOS transistor PM4, a fifth P-type MOS transistor PM5, a sixth P-type MOS transistor PM6 and a fourth N-type MOS transistor NM4, a fifth N-type MOS transistor NM5, and a sixth N-type a Schmitt circuit composed of a MOS transistor NM6, and an inverter composed of a ninth P-type MOS transistor PM9 and a ninth N-type MOS transistor NM9, a tenth P-type MOS transistor PM10, and a tenth N-type MOS transistor NM10
  • the inverter is shown in Figure 7.
  • the trigger circuit of the present invention further includes a first threshold unit connected to the source terminal of the fourth P-type MOS transistor PM4 and the drain terminal of the sixth N-type MOS transistor NM6, and the connection To the second threshold unit between the drain terminal of the sixth P-type MOS transistor PM6 and the ground, as shown in FIG.
  • the first threshold unit is at least one diode connected in series, or at least one P-type MOS transistor connected in series, or at least one N-type MOS transistor connected in series,
  • the cathode end of any diode is connected to the anode end of the adjacent diode to form a series structure, and the first diode anode end is connected to the source of the fourth P-type MOS tube as an input end of the first threshold unit
  • the last diode cathode end is connected to the drain of the sixth N-type MOS transistor as the output end of the first threshold unit;
  • the drain terminal of any P-type MOS transistor is connected to the source terminal of the adjacent P-type MOS transistor to form a series structure, and the source of the first P-type MOS transistor is connected to the fourth P a source of the MOS transistor as an input terminal of the first threshold unit, a drain of the last P-type MOS transistor is connected to a drain of the sixth N-type MOS transistor as an output end of the first threshold unit, P-type MOS tube grid The pole is connected to the drain;
  • a source terminal of any N-type MOS transistor is connected to a drain terminal of an adjacent N-type MOS transistor to form a series structure, and a drain of the first N-type MOS transistor is connected to a fourth P a source of the MOS transistor as an input terminal of the first threshold unit, a source of the last N-type MOS transistor is connected to a drain of the sixth N-type MOS transistor as an output end of the first threshold unit,
  • the gates of the N-type MOS transistors are all connected to the drain.
  • the first threshold unit of the present invention takes an N-type MOS tube NM8, NM7 in the form of two diodes in series as an embodiment.
  • the second threshold unit is at least one diode connected in series, or at least one P-type MOS transistor connected in series, or at least one N-type MOS transistor connected in series,
  • a cathode end of any diode is connected to an anode end of the adjacent diode to form a series structure, and a first diode anode end is connected to a drain of the sixth P-type MOS transistor as an input end of the second threshold unit
  • the last diode cathode terminal is grounded as an output of the second threshold unit;
  • the drain terminal of any P-type MOS transistor is connected to the source terminal of the adjacent P-type MOS transistor to form a series structure, and the source of the first P-type MOS transistor is connected to the sixth P a drain of the MOS transistor, as an input terminal of the second threshold unit, a drain of a last P-type MOS transistor is grounded, and as a output end of the second threshold unit, a gate of each P-type MOS transistor is drained Extremely connected
  • a source terminal of any N-type MOS transistor is connected to a drain terminal of an adjacent N-type MOS transistor to form a series structure, and a drain of the first N-type MOS transistor is connected to a sixth P a drain of the MOS transistor, as an input terminal of the second threshold unit, a source of the last N-type MOS transistor is grounded, and as an output end of the second threshold unit, a gate of each N-type MOS transistor is drained Extremely connected.
  • the second threshold unit of the present invention is implemented by P-type MOS tubes PM7 and PM8 in the form of two diodes in series. example.
  • the Schmitt trigger structure adopted by the present invention increases the first threshold unit and the second threshold unit, and the use of such a structure is greatly reduced by the first threshold unit and the sixth The current of the path formed by the N-type MOS transistor NM6 and the fifth N-type MOS transistor NM5, and the current of the path formed by the fourth P-type MOS transistor PM4, the sixth P-type MOS transistor PM6, and the second threshold unit, thereby reducing The power consumption of the circuit.
  • the up-inversion voltage V H and the down-down voltage V L have a positive correlation with vdda, and are related to the parameter of the device, that is, the width-to-length ratio of the channel size of the MOS transistor.
  • the working principle of the invention is that the Schmitt trigger is equivalent to a pulse generator, sampling the output voltage signal RF1 of the first antenna end in1, and generating a rectangular wave signal whose pulse width can be adaptively adjusted as shown in FIG.
  • the switching unit When the trigger output signal is low level 0, the switching unit is in the on state.
  • the storage capacitor C L injects charge energy into the LC resonant circuit.
  • the waveform of the injected current is shown in Figure 10, and the voltage at RF1 is at At the peak, the injection current is minimal. Due to the hysteresis function of the Schmitt trigger, the time point corresponding to the pulse width is not symmetric with respect to the time of the RF1 voltage peak node, resulting in an asymmetry of the injection current.
  • the on-time of the switching unit ie the pulse width of the trigger output
  • this adaptive adjustment mechanism makes the injected energy of the circuit oscillation after the break after the corresponding adjustment of the amplitude of the vdda power supply voltage and the amplitude of the RF oscillation signal, thereby improving the efficiency of current injection.
  • the energy capacitor C L does not inject energy into the LC resonant circuit, that is, the injection current is 0; when V RF >V H and V RF >V L , the flip-flop flips, the output is 0, the inverter output is 1, the switching unit In the closed state, the storage capacitor C L injects energy into the LC resonant circuit to maintain the oscillation of the circuit; when V RF ⁇ V L , the flip-flop flips again, the switching unit is turned off, and the storage capacitor C L stops energy injection, so Cycle back and forth.
  • the RF voltage waveform can be set to:
  • A is the amplitude of the RF
  • the on-time that is, the width ⁇ t of the pulse is:
  • V RF is the average voltage value of RF during the on time
  • ⁇ t becomes small, that is, the pulse width, and the current injection time becomes small.
  • the pulse width will be adaptively changed according to the magnitude of the RF amplitude change, and an appropriate amount of charge is added in time to maintain the amplitude of the resonant circuit.
  • This adjustment process is called adaptive pulse control.
  • This adaptive adjustment mechanism makes the energy of the circuit oscillation after the break is continuously adjusted according to the change of the amplitude of the vdda and the RF signal, which improves the efficiency of current injection and reduces the power consumption, thereby improving the energy of the chip. Utilization rate increases the response distance of the RFID tag chip.

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Abstract

一种通过触发器产生脉冲的半双工RFID振荡维持电路，包括并联连接于第一天线端与第二天线端之间的谐振电感与谐振电容，谐振电感与谐振电容组成谐振电路耦合外部磁场产生交流电流，并将该交流电流输入至整流电路，所述第一天线端连接至触发电路，作为触发电路的输入端，触发电路的电源端通过串联连接的开关单元和电阻连接至第一天线端，所述触发电路的输出端连接至开关单元的控制端，触发电路用于采样天线端的信号，产生脉宽可自适应调整的矩形波信号以控制开关单元断开或闭合，形成从储能电容至L-C谐振回路的充电电流回路。本电路有一定的自适应性，结构简单，功耗低，充电效率高，且避免了频率漂移问题。

Description

一种通过触发器产生脉冲的半双工RFID振荡维持电路 技术领域
本发明属于无源射频识别(Radio Frequency Identification，RFID)领域，更具体的，是指一种通过触发器产生脉冲的半双工RFID振荡维持电路，以及包含该振荡维持电路的半双工无源射频标签。
背景技术
半双工(Half-duplex，HDX)射频通信是无线射频识别无源标签芯片的一种通信方式。通信过程中，信息可以由RFID读卡器传送到标签芯片,亦被称之为下行传输(downlink)，也可以由芯片传送到读卡器,亦被称之为上行传输(uplink)。上行和下行传输不同时进行的传输方式即所谓“半双工传输”。下行传输模式中，由读卡器发射出无线RF场能量；无源的标签芯片通过电感天线L与谐振电容C组成的L-C谐振电路，接收由读卡器发射的无线RF场能量，芯片内部的整流电路将交流的RF电流信号转换成直流电流，以供芯片内部电路使用，同时将整流得到的电能存储在储能电容CL中；从读卡器下发到标签的信息大都采用幅度调制的编码方式，即用不同振荡幅度值的RF电流信号代表数字传输中的“0”或者“1”代码。下行传输的RF信号中含有操作指令信息，比如写入ID码到标签芯片存储器中，此时，标签芯片首先接收RF信号，然后进行解调，继而进行相应的写入ID码操作。标签芯片对读卡器的应答动作由上行传输模式完成。上行传输模式中，读卡器停止无线RF场能量的发射，即断场，标签芯片利用储能电容中的电能进行工作，即通过电感天线发送标签的应答信息回读卡器；某些国 际通用标准的射频识别通讯协议中，比如ISO11784/11785国际动物识别标签标准通讯协议，由标签发出的应答信息编码可以采用频移键控(Frequency Shift keying，FSK)的方式，即信息的“0”和“1”代码分别由不同的信号频率表示。
射频识别应用中最关键的要求在于识别远距离，即高灵敏度的通讯性能。在上述通讯方式中，关键在于断场后标签能够维持天线端L-C谐振电路的振荡，在振荡幅度足够满足读卡器接收端的灵敏度要求的前提下，其振荡频率由所要发出的“0”、“1”数据而定，直到上行数据信息发送完成。因为此模式下储能电容中的能量主要由振荡维持电路消耗，而其他电路模块基本上处于不消耗电能的休眠状态，显然，振荡维持电路的设计优劣是HDX无源RFID标签芯片的关键技术之一，在无外部电源对射频标签供电的前提下，其通过储能电容给L-C谐振回路充电而尽可能地维持振荡的技术，会大大影响芯片的响应距离。
如图1所示为无源HDX型RFID标签芯片通信的过程框图，图中所示的振荡维持电路是芯片的关键技术之一，本发明专利申请主要是对该部分电路的改良。
一种现有的振荡维持电路的解决方案，是美国德州仪器公司(Texas Instruments，TI)发明的专利技术(US6,806,738)。方案提出一种复杂的峰值检测电路，用来检测断场后振荡电路中交流电压信号的波峰值。当检测到振荡电路中交流电压信号的峰值小于某一个预先设定的阈值电压时，振荡维持电路控制相关电路以使得储能电容中的电能注入到L-C谐振电路中，从而维持谐振电路在满足一定幅度要求的条件下继续振荡。如图2所示，电流脉冲产生在RF信号峰值刚刚到达小于预设阈值的时间点上，这种方法称为“plucking(快速注入)”。
快速注入的优点是振荡维持电路的效率很高，它在振荡电路需要能量的时候给谐振线圈注入电流，以一个高能量的电流脉冲形式维持电路的振荡。然而它有两个方面的缺点：
其一，信号处理过程比较复杂，导致电路结构复杂化，需要较多的模拟电路来实现，这使得它自身会消耗较大的储能电容上的能量，故其应用受到限制。
其二，所注入的电流脉冲信号的频率由谐振电路中振幅幅值的衰减特性决定，与谐振回路发生谐振的频率存在较大的、无直接相关性的差异，使得上行通讯中，天线上的振荡信号出现频率的偏离，影响读卡器对标签芯片上行信号的识别与解调。
再一种现有的振荡维持电路的解决方案，也是德州仪器公司的发明专利技术(US 7,667,548)。本方案中采用一种断场检测电路(End-of-Burst,EOB)，当检测到读卡器断场后，EOB产生一个使能信号，该信号控制振荡维持电路的继续工作。此方案中，振荡维持电路由时钟产生电路、可编程存储器、与门电路、限流电阻和开关等组成。时钟产生电路根据RF信号产生时钟，与所要发送的应答数据，即一连串“0”、“1”数据流，分别做组合逻辑运算，从而控制对应的电流注入开关的导通与关断，从而向L-C谐振电路中平滑地注入电流。其中，电流注入发生在RF信号的负半周期，注入电流大小为非固定电流值的变化电流，该电流经过限流电阻R的限流作用，并与谐振电路内在的品质因数相关，需要仔细设计和控制；其中一系列的限流电阻R与电流注入开关所串联的支路，可用来校正由于工艺偏差引起电阻值偏差的问题。
这种方法的优势在于，它可以平滑地注入电流，不会引起谐振回路产生的RF应答信号的频率漂移，电路结构相对于第一种方案较简单，且容易实现，而 它的缺点体现在两个方面：
其一，效率不高。电流注入时间发生在RF信号的整个负半周期，相对电流脉冲的时间较长，电流消耗大。
其二，这种方法注入电流的大小与谐振电路的品质因数密切相关，因此要仔细设计限流电阻R，电路采用了由门电路控制的多条电流注入支路，电流注入支路的选择与控制，是一个较为复杂的过程。
第三种同样是来源于德州仪器公司的发明专利技术(US8,629,759)。该方案分别对前述两个技术方案提出了修正。其一，对于技术方案一的频率漂移问题，采用由环路滤波器、鉴相器、电压控制振荡器和多路复用器构成的锁相环PLL来稳定信号的频率；其二，针对技术方案二的效率问题，提出了脉宽控制的方法(即每半个周期向谐振电路注入电流，电流注入的时间大小可根据需要进行控制)。两个修正方法的结合，可以产生一个频率稳定，脉宽可控制的信号，用来控制“plucking”电流。这种方案可以很好的解决电流注入效率问题和频率漂移的问题。
但是，上述技术方案三并没有提出实现脉宽控制电路的方法，此外，电路设计PLL稳定控制信号的频率必定会使系统电路的功耗增大，反而会使标签芯片的整体效率下降。
发明内容
本发明针对半双工无源RFID标签芯片上行过程中振荡维持电路效率和电路实现难易程度问题，提出了一种注入脉冲时间可控制的较高效率、低功耗且易于实现的振荡维持电路，本电路有一定的自适应性，结构简单，功耗低，效率 相对较高，且避免了射频标签天线上的振荡信号因为振荡维持电路注入电流的影响而产生的频率漂移问题。
为实现上述目的，本发明所采取的技术方案为：一种通过触发器产生脉冲的半双工RFID振荡维持电路，包括并联连接于第一天线端与第二天线端之间的谐振电感与谐振电容，所述谐振电感与谐振电容组成谐振电路耦合外部磁场产生交流电流，并将该交流电流输入至整流电路，所述整流电路输出端连接至储能电容和内部电路，所述第一天线端连接至触发电路，作为所述触发电路的输入端，触发电路的电源端通过串联连接的开关单元和电阻连接至所述第一天线端，所述触发电路的输出端连接至所述开关单元的控制端，所述触发电路用于采样天线端的信号，产生脉宽可自适应调整的矩形波信号以控制所述开关单元断开或闭合，形成从所述储能电容至L-C谐振回路的充电电流回路。
实现本发明目的的技术方案还进一步包括，所述触发电路包括由第四P型MOS管、第五P型MOS管、第六P型MOS管和第四N型MOS管、第五N型MOS管、第六N型MOS管组成的施密特触发器电路，以及由第九P型MOS管和第九N型MOS管组成的反相器、第十P型MOS管和第十N型MOS管组成的反相器，所述第四P型MOS管源极连接至第一阈值单元，作为所述第一阈值单元的输入端，所述第一阈值单元的输出端连接至所述第六N型MOS管的漏极端，所述第六P型MOS管漏极连接至第二阈值单元，作为所述第二阈值单元的输入端，所述第二阈值单元的输出端接地。
采用上述结构的本发明优点在于：
1、本发明所采用的施密特触发器电路，相当于一个脉冲产生器，其工作原理如下：所述施密特触发器经过采样天线端的振荡电压信号而产生矩形波信号； 矩形波信号控制开关单元的断开或闭合；当开关单元闭合时，充电电流回路形成，从而储能电容CL对L-C谐振回路注入电荷能量，达到维持电路振荡的目的。本发明提高了振荡维持电路的电流注入效率，降低了功耗，提高半双工RFID标签芯片的响应距离。
2、本发明电路中取消了锁相环、断场检测电路等复杂的电路结构，改用结构简单、控制精确的施密特触发器来控制开关信号的产生，并且该施密特触发器可以根据整流后直流输出电压vdda的幅度和所采样的RF振荡信号电压幅度之间的大小关系自适应的调整所产生的脉冲宽度，即注入电流时间，其具有结构简单、功耗较低、和易于实现的优点。
3、本发明的电流注入回路由开关器件与电阻、L-C谐振回路串联构成，控制开关导通信号的周期与RF信号频率相同，因此这种电流注入机制对谐振电路的振荡频率影响不明显。
附图说明
图1为无源RFID标签芯片HDX通信的过程框图；
图2为对比文件1的振荡维持电路电荷注入机制信号示意图；
图3为本发明振荡维持电路系统原理图；
图4为本发明振荡维持电路开关单元实施例一结构图；
图5为本发明振荡维持电路开关单元实施例二结构图；
图6为本发明振荡维持电路开关单元实施例三结构图；
图7为现有的施密特触发器电路结构图；
图8为本发明施密特触发器电路结构图；
图9为本发明施密特触发器的实施例电路结构图；
图10为本发明振荡维持电路信号波形图；
图11为本发明触发器翻转与时间的对应关系图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
如图3所示为本发明振荡维持电路系统原理图，本发明所述一种通过触发器产生脉冲的半双工RFID振荡维持电路，包括并联连接于第一天线端in1与第二天线端in2之间的谐振电感Ls与谐振电容Cs，用于组成谐振电路，使其能够接收外部电磁场并将其输入进整流电路，所述整流电路输出端连接至储能电容CL和内部电路，所述第一天线端in1连接至触发电路，作为所述触发电路的输入端，触发电路的电源端vdda通过串联连接的开关单元和电阻R连接至所述第一天线端in1，所述触发电路的输出端连接至所述开关单元的控制端，所述触发电路用于采样天线端的信号，产生脉宽可自适应调整的矩形波信号以控制所述开关单元断开或闭合，形成从所述储能电容CL至L-C谐振回路的充电电流回路。
本发明所采用的施密特触发器，相当于一个迟滞比较器，所述施密特触发器经过采样天线端的振荡电压信号而产生矩形波信号；矩形波信号控制开关单元的断开或闭合；当开关单元闭合时，形成vdda→开关单元→R→L-C谐振回路的电流注入回路，从而储能电容CL对L-C谐振回路注入电荷能量，阻止断场后线 圈RF振荡信号幅度的下降，达到维持电路振荡的目的。本发明提高了振荡维持电路的电流注入效率，降低了功耗，从而能提高芯片能量的利用率，提高RFID标签芯片的响应距离。
所述开关单元用于控制所述电流注入回路的导通和关闭，从而实现对所述L-C谐振回路注入能量以及能量注入时间的控制。所述开关单元可以为开关器件，或者是复合开关，或是开关型元器件，且这些开关的断开与闭合由所述触发电路来控制。
所述开关单元为第一开关S1，所述第一开关S1的输入端连接至所述电阻R，所述第一开关的电源端接电源vdda，第一开关的控制端连接至所述触发电路的输出端,如图5。
所述开关单元还可以为第一P型MOS管PM1或者是第一复合开关中的任意一种，
当所述开关单元为第一P型MOS管PM1时，所述第一P型MOS管PM1源极连接至电源vdda作为所述开关单元的电源端，漏极连接至所述电阻R作为所述开关单元的输入端，栅极连接至所述触发电路的输出端，作为所述开关单元的控制端,如图4；
当所述开关单元为第一复合开关时，所述第一复合开关包括并联连接的第二N型MOS管NM2和第二P型MOS管PM2，所述第二N型MOS管NM2漏极连接至所述第二P型MOS管PM2源极并连接至电源vdda作为所述第一复合开关的电源端，所述第二N型MOS管NM2源极连接至所述第二P型MOS管PM2漏极并连接至电阻R作为所述第一复合开关的输入端，所述第二P型MOS管PM2栅极连接至所述触发电路的输出端，作为所述第一复合开关的第一控制端，所述第二N 型MOS管NM2栅极通过反相器连接至所述触发电路的输出端，作为所述第一复合开关的第二控制端,如图6所示。
所述触发电路用于采样第一天线端i n1的输出信号RF1，并根据该信号输出脉宽可控的矩形波信号至所述开关单元，所述开关单元在所述矩形波信号的控制下断开或闭合，以实现对所述L-C谐振回路注入能量和能量注入时间的控制。
所述触发电路包括由第四P型MOS管PM4、第五P型MOS管PM5、第六P型MOS管PM6和第四N型MOS管NM4、第五N型MOS管NM5、第六N型MOS管NM6组成的施密特电路，以及由第九P型MOS管PM9和第九N型MOS管NM9组成的反相器、第十P型MOS管PM10和第十N型MOS管NM10组成的反相器，如图7所示。在此施密特电路的基础上，本发明所述的触发电路还包括连接至所述第四P型MOS管PM4源极端和第六N型MOS管NM6漏极端的第一阈值单元，和连接至所述第六P型MOS管PM6漏极端和地之间的第二阈值单元，如图8。
所述第一阈值单元为至少一个串联连接的二极管，或者是至少一个串联连接的P型MOS管，或者是至少一个串联连接的N型MOS管，
所述至少一个二极管中，任一二极管阴极端与相邻二极管阳极端连接形成串联结构，第一个二极管阳极端连接至第四P型MOS管源极，作为所述第一阈值单元的输入端，最后一个二极管阴极端连接至第六N型MOS管的漏极，作为所述第一阈值单元的输出端；
所述至少一个P型MOS管中，任一P型MOS管漏极端与相邻P型MOS管的源极端连接形成串联结构，第一个所述P型MOS管的源极连接至第四P型MOS管源极，作为所述第一阈值单元的输入端，最后一个P型MOS管的漏极连接至第六N型MOS管的漏极，作为所述第一阈值单元的输出端，各P型MOS管的栅 极均与漏极相连；
所述至少一个N型MOS管中，任一N型MOS管源极端与相邻N型MOS管的漏极端连接形成串联结构，第一个所述N型MOS管的漏极连接至第四P型MOS管源极，作为所述第一阈值单元的输入端，最后一个N型MOS管的源极连接至第六N型MOS管的漏极，作为所述第一阈值单元的输出端，各N型MOS管的栅极均与漏极相连。如图9，本发明所述第一阈值单元以串联两个二极管形式的N型MOS管NM8、NM7为实施例。
所述第二阈值单元为至少一个串联连接的二极管，或者是至少一个串联连接的P型MOS管，或者是至少一个串联连接的N型MOS管，
所述至少一个二极管中，任一二极管阴极端与相邻二极管阳极端连接形成串联结构，第一个二极管阳极端连接至第六P型MOS管漏极，作为所述第二阈值单元的输入端，最后一个二极管阴极端接地，作为所述第二阈值单元的输出端；
所述至少一个P型MOS管中，任一P型MOS管漏极端与相邻P型MOS管的源极端连接形成串联结构，第一个所述P型MOS管的源极连接至第六P型MOS管漏极，作为所述第二阈值单元的输入端，最后一个P型MOS管的漏极接地，作为所述第二阈值单元的输出端，各P型MOS管的栅极均与漏极相连；
所述至少一个N型MOS管中，任一N型MOS管源极端与相邻N型MOS管的漏极端连接形成串联结构，第一个所述N型MOS管的漏极连接至第六P型MOS管漏极，作为所述第二阈值单元的输入端，最后一个N型MOS管的源极接地，作为所述第二阈值单元的输出端，各N型MOS管的栅极均与漏极相连。如图9，本发明所述第二阈值单元以串联两个二极管形式的P型MOS管PM7、PM8为实施 例。
与传统的施密特触发器相比，本发明所采用的施密特触发器结构增加了第一阈值单元和第二阈值单元，这种结构的使用大大降低了由第一阈值单元、第六N型MOS管NM6和第五N型MOS管NM5组成的通路的电流，以及由第四P型MOS管PM4、第六P型MOS管PM6和第二阈值单元组成的通路的电流，从而降低了电路的功耗。
根据电路理论分析可以计算，施密特触发器的上翻转和下翻转电压可由下面的公式给出(M.Filanovsky and H.Baltes,"CMOS Schmitt Trigger Design"，IEEE Transactions on Circuits and Systems–Fundamental Theory and Applications,Vol.41,No.1,January 1994,pp47，公式【15】)：
Figure PCTCN2017105531-appb-000001
Figure PCTCN2017105531-appb-000002
公式中：
Figure PCTCN2017105531-appb-000003
根据上述公式可知，上翻转电压VH和下翻转电压VL与vdda呈正相关特性，同时与器件的参数，即MOS管沟道尺寸的宽长比值有关。
本发明的工作原理为：施密特触发器相当于一个脉冲产生器，采样第一天线端in1的输出电压信号RF1，并产生如图10所示的脉冲宽度可自适应调整的矩形波信号。当触发器输出信号为低电平0时，开关单元处于导通状态，这段时间内，储能电容CL向L-C谐振回路注入电荷能量，注入电流的波形图如图10，在RF1电压处于波峰时，注入电流最小。由于施密特触发器的迟滞功能，脉冲宽度所对应的时间点并不是关于RF1电压波峰节点的时刻对称，导致注入电流也不对称。 施密特触发器当所有电路器件参数都已经确定时，开关单元的导通时间，即触发器输出的脉冲宽度会随着整流输出电压vdda的下降以及RF振荡信号电压幅度的下降而自适应的改变，这种自适应调整机制使得断场后维持电路振荡的所被注入的能量在不断跟随vdda电源电压幅度和RF振荡信号幅度的变化而做出相对应的调整，从而提高了电流注入的效率。
如图10，在RF振荡信号的电压幅度变化过程中，当RF信号幅度由0上升至VH的过程中时，VRF<VH，触发器输出为1，开关单元处于断开状态，储能电容CL没有向L-C谐振回路注入能量，即注入电流为0；当VRF>VH且VRF>VL时，触发器发生翻转，输出为0，反相器输出为1，开关单元处于闭合状态，储能电容CL向L-C谐振回路注入能量以维持电路的振荡；当VRF<VL时，触发器再次发生翻转，开关单元断开，储能电容CL停止能量注入，如此循环往复。
上述脉宽自适应控制的原理在于：如图11所示，在一个RF周期内，RF的电压波形可设为：
Figure PCTCN2017105531-appb-000004
式中，A是RF的振幅，
设定触发器翻转点发生在VH,VL，VH,VL分别代表上翻转电压和下翻转电压，在上文中已经定义,因此，
Figure PCTCN2017105531-appb-000005
可解得：
Figure PCTCN2017105531-appb-000006
Figure PCTCN2017105531-appb-000007
因此，导通时间，即脉冲的宽度△t为：
Figure PCTCN2017105531-appb-000008
当RF幅度A减小的时候，首先，根据欧姆定律可知，注入的平均电流：
Figure PCTCN2017105531-appb-000009
(VRF为导通时间内RF的平均电压值)
会变大。
由于A的减小，
Figure PCTCN2017105531-appb-000010
和
Figure PCTCN2017105531-appb-000011
的值变大，根据公式(1)可知，△t变小，即脉冲宽度，电流注入时间变小；反之，当RF幅度A变大，则△I变小，△t变大。即，脉冲宽度会跟随RF幅度变化的大小做出相适应的变化，适时补充适量的电荷以维持谐振回路的振幅，这种调整过程即称之为自适应脉冲控制。这种自适应调整机制使得断场后维持电路振荡的能量不断跟随vdda和RF信号幅度的变化而做出相对应的调整，提高了电流注入的效率，降低了功耗，从而能提高芯片能量的利用率，提高RFID标签芯片的响应距离。

Claims (6)

  1. 一种通过触发器产生脉冲的半双工RFID振荡维持电路，包括并联连接于第一天线端与第二天线端之间的谐振电感与谐振电容，所述谐振电感与谐振电容组成谐振电路耦合外部磁场产生交流电流，并将该交流电流输入至整流电路，所述整流电路输出端连接至储能电容和内部电路，其特征在于，所述第一天线端连接至触发电路，作为所述触发电路的输入端，触发电路的电源端通过串联连接的开关单元和电阻连接至所述第一天线端，所述触发电路的输出端连接至所述开关单元的控制端，所述触发电路用于采样天线端的信号，产生脉宽可自适应调整的矩形波信号以控制所述开关单元断开或闭合，形成从所述储能电容至LC谐振回路的充电电流回路。
  2. 根据权利要求1所述的振荡维持电路，其特征在于，所述开关单元为第一开关，所述第一开关的输入端连接至所述电阻，所述第一开关的电源端接电源，第一开关的控制端连接至所述触发电路的输出端。
  3. 根据权利要求1所述的振荡维持电路，其特征在于，所述开关单元为第一P型MOS管或者是第一复合开关中的任意一种，
    当所述开关单元为第一P型MOS管时，所述第一P型MOS管源极连接至电源作为所述开关单元的电源端，漏极连接至所述电阻作为所述开关单元的输入端，栅极连接至所述触发电路的输出端，作为所述开关单元的控制端；
    当所述开关单元为第一复合开关时，所述第一复合开关包括并联连接的第二N型MOS管和第二P型MOS管，所述第二N型MOS管漏极连接至所述第二P型MOS管源极并连接至电源作为所述第一复合开关的电源端，所述第二N型MOS管源极连接至所述第二P型MOS管漏极并连接至电阻作为所述第一复合开关的输入端，所述第二P型MOS管栅极连接至所述触发电路的输出端，作为所述第 一复合开关的第一控制端，所述第二N型MOS管栅极通过反相器连接至所述触发电路的输出端，作为所述第一复合开关的第二控制端。
  4. 根据权利要求1所述的振荡维持电路，其特征在于，所述触发电路包括由第四P型MOS管、第五P型MOS管、第六P型MOS管和第四N型MOS管、第五N型MOS管、第六N型MOS管组成的施密特电路，以及由第九P型MOS管和第九N型MOS管组成的反相器、第十P型MOS管和第十N型MOS管组成的反相器，所述第四P型MOS管源极连接至第一阈值单元，作为所述第一阈值单元的输入端，所述第一阈值单元的输出端连接至所述第六N型MOS管的漏极端，所述第六P型MOS管漏极连接至第二阈值单元，作为所述第二阈值单元的输入端，所述第二阈值单元的输出端接地。
  5. 根据权利要求4所述的振荡维持电路，其特征在于，所述第一阈值单元为至少一个串联连接的二极管，或者是至少一个串联连接的P型MOS管，或者是至少一个串联连接的N型MOS管，
    所述至少一个二极管中，任一二极管阴极端与相邻二极管阳极端连接形成串联结构，第一个二极管阳极端连接至第四P型MOS管源极，作为所述第一阈值单元的输入端，最后一个二极管阴极端连接至第六N型MOS管的漏极，作为所述第一阈值单元的输出端；
    所述至少一个P型MOS管中，任一P型MOS管漏极端与相邻P型MOS管的源极端连接形成串联结构，第一个所述P型MOS管的源极连接至第四P型MOS管源极，作为所述第一阈值单元的输入端，最后一个P型MOS管的漏极连接至第六N型MOS管的漏极，作为所述第一阈值单元的输出端，各P型MOS管的栅极均与漏极相连；
    所述至少一个N型MOS管中，任一N型MOS管源极端与相邻N型MOS管的漏极端连接形成串联结构，第一个所述N型MOS管的漏极连接至第四P型MOS管源极，作为所述第一阈值单元的输入端，最后一个N型MOS管的源极连接至第六N型MOS管的漏极，作为所述第一阈值单元的输出端，各N型MOS管的栅极均与漏极相连。
  6. 根据权利要求4所述的振荡维持电路，其特征在于，所述第二阈值单元为至少一个串联连接的二极管，或者是至少一个串联连接的P型MOS管，或者是至少一个串联连接的N型MOS管，
    所述至少一个二极管中，任一二极管阴极端与相邻二极管阳极端连接形成串联结构，第一个二极管阳极端连接至第六P型MOS管漏极，作为所述第二阈值单元的输入端，最后一个二极管阴极端接地，作为所述第二阈值单元的输出端；
    所述至少一个P型MOS管中，任一P型MOS管漏极端与相邻P型MOS管的源极端连接形成串联结构，第一个所述P型MOS管的源极连接至第六P型MOS管漏极，作为所述第二阈值单元的输入端，最后一个P型MOS管的漏极接地，作为所述第二阈值单元的输出端，各P型MOS管的栅极均与漏极相连；
    所述至少一个N型MOS管中，任一N型MOS管源极端与相邻N型MOS管的漏极端连接形成串联结构，第一个所述N型MOS管的漏极连接至第六P型MOS管漏极，作为所述第二阈值单元的输入端，最后一个N型MOS管的源极接地，作为所述第二阈值单元的输出端，各N型MOS管的栅极均与漏极相连。
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