WO2018061837A1 - Dispositif et procédé de traitement d'image - Google Patents

Dispositif et procédé de traitement d'image Download PDF

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WO2018061837A1
WO2018061837A1 PCT/JP2017/033527 JP2017033527W WO2018061837A1 WO 2018061837 A1 WO2018061837 A1 WO 2018061837A1 JP 2017033527 W JP2017033527 W JP 2017033527W WO 2018061837 A1 WO2018061837 A1 WO 2018061837A1
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conversion
primary
flag
unit
identifier
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PCT/JP2017/033527
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Japanese (ja)
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健史 筑波
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ソニー株式会社
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Priority to US16/325,312 priority Critical patent/US10728552B2/en
Priority to CN201780058664.5A priority patent/CN109792522B/zh
Priority to EP17855793.0A priority patent/EP3522533A4/fr
Priority to JP2018542403A priority patent/JPWO2018061837A1/ja
Publication of WO2018061837A1 publication Critical patent/WO2018061837A1/fr
Priority to US16/896,910 priority patent/US20200304790A1/en

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/102—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or selection affected or controlled by the adaptive coding
    • H04N19/12—Selection from among a plurality of transforms or standards, e.g. selection between discrete cosine transform [DCT] and sub-band transform or selection between H.263 and H.264
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/134—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or criterion affecting or controlling the adaptive coding
    • H04N19/146—Data rate or code amount at the encoder output
    • H04N19/147—Data rate or code amount at the encoder output according to rate distortion criteria
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/134—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or criterion affecting or controlling the adaptive coding
    • H04N19/157—Assigned coding mode, i.e. the coding mode being predefined or preselected to be further used for selection of another element or parameter
    • H04N19/159—Prediction type, e.g. intra-frame, inter-frame or bidirectional frame prediction
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/169—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding
    • H04N19/17—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object
    • H04N19/176—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object the region being a block, e.g. a macroblock
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/46—Embedding additional information in the video signal during the compression process
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/70—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by syntax aspects related to video coding, e.g. related to compression standards

Definitions

  • the present disclosure relates to an image processing apparatus and method, and more particularly, to an image processing apparatus and method capable of suppressing a reduction in encoding efficiency.
  • AMT “Adaptive Multiple Multiple Core Transforms”
  • Non-Patent Document 1 discloses a transform set TransformSet including orthogonal transforms that are candidates for primary transform for each of the horizontal direction (x direction) and the vertical direction (y direction). It is also disclosed that (uniquely) it is determined (selected) based on (prediction mode information). It is also disclosed that the definition of the transform set is determined based on the transform block size and mode information (see, for example, Non-Patent Document 2).
  • JVET-C1001 Algorithm description of Joint Exploration Test Model 3, 2016/07/02 release, url: http: //phenix.int-evry.fr/jvet/doc_end_user/documents/3_Geneva/wg11/JVET-C1001-v3.
  • zip JVET-C0022 Proposed improvements to the Adaptive multi Core transform, 2016/05 / 16,16url: http: //phenix.int-evry.fr/jvet/doc_end_user/documents/3_Geneva/wg11/JVET-C0022-v4.
  • the conventional method has a limitation that it can be selected only when the one-dimensional conversion skip is a specific conversion block size and an intra prediction mode number. Therefore, from the viewpoint of rate distortion, when it is better to select one-dimensional conversion skip that skips horizontal or vertical orthogonal conversion rather than two-dimensional orthogonal conversion, one-dimensional conversion skip is selected on the encoder side. Therefore, encoding efficiency may be reduced.
  • the present disclosure has been made in view of such a situation, and is intended to suppress a reduction in encoding efficiency.
  • the image processing device includes a decoding unit that decodes encoded data, and image data based on a value of a conversion skip identifier obtained by decoding the encoded data by the decoding unit.
  • An inverse primary vertical transformation control unit that controls execution of inverse primary vertical transformation, which is inverse primary transformation in the vertical direction, on the transformed transformation coefficient data, and coefficient data obtained by transforming image data based on the value of the transformation skip identifier
  • an inverse primary horizontal conversion control unit that controls execution of inverse primary horizontal conversion that is horizontal inverse primary conversion.
  • the inverse primary vertical conversion control unit When the conversion skip identifier indicates that the one-dimensional conversion in the vertical direction is not skipped, the inverse primary vertical conversion control unit performs the reverse primary vertical conversion on the conversion coefficient data, and the conversion skip identifier is set in the vertical direction. When the one-dimensional conversion is indicated to be skipped, the inverse primary vertical conversion for the conversion coefficient data can be omitted.
  • the inverse primary horizontal conversion control unit When the conversion skip identifier indicates that the one-dimensional conversion in the horizontal direction is not skipped, the inverse primary horizontal conversion control unit performs the reverse primary horizontal conversion on the conversion coefficient data, and the conversion skip identifier is set in the horizontal direction. When the one-dimensional conversion is indicated to be skipped, the inverse primary horizontal conversion for the conversion coefficient data can be omitted.
  • the selection unit selects an orthogonal transformation to be applied as the inverse primary vertical transformation based on a vertical transformation set identifier obtained by decoding the encoded data by the decoding unit and a primary vertical transformation designation flag, and the decoding
  • the orthogonal transform to be applied as the inverse primary horizontal transform can be selected based on the horizontal transform set identifier obtained by decoding the encoded data by the unit and the primary horizontal transform designation flag.
  • the decoding unit can derive the primary vertical conversion designation flag and the primary horizontal conversion designation flag from the primary conversion identifier according to the value of the conversion skip identifier.
  • the decoding unit processes the primary conversion identifier as a 2-bit bin string to derive the primary vertical conversion specification flag and the primary horizontal conversion specification flag. If the conversion skip identifier indicates that vertical or horizontal one-dimensional conversion is not skipped, the primary conversion identifier is processed as a 1-bit bin string and the primary vertical conversion specification flag or the primary horizontal conversion specification is processed. A flag can be derived.
  • the decoding unit can decode the primary vertical conversion designation flag and the primary horizontal conversion designation flag included in the encoded data.
  • the decoding unit skips decoding of the secondary conversion identifier, and converts the secondary conversion identifier to secondary conversion. It can be set to a value that indicates not.
  • the image processing method decodes encoded data, and performs transform coefficient data obtained by converting the image data based on the value of the conversion skip identifier obtained by decoding the encoded data.
  • This is an image processing method for controlling execution.
  • the image processing device performs primary horizontal conversion control that controls execution of primary horizontal conversion that is horizontal primary conversion for residual data of an image and a predicted image based on the value of the conversion skip identifier.
  • a primary vertical conversion control unit that controls execution of primary vertical conversion that is a primary conversion in the vertical direction with respect to residual data of an image and a predicted image based on a value of the conversion skip identifier, and a code of the conversion skip identifier
  • An image processing apparatus including an encoding unit for converting the image processing unit.
  • the primary horizontal conversion control unit when the conversion skip identifier indicates that the horizontal one-dimensional conversion is not skipped, causes the primary horizontal conversion to be performed on the residual data, and the conversion skip identifier is a horizontal one-dimensional When indicating that the conversion is to be skipped, the primary horizontal conversion for the residual data can be omitted.
  • the primary vertical conversion control unit When the conversion skip identifier indicates that the vertical one-dimensional conversion is not skipped, the primary vertical conversion control unit performs the primary vertical conversion on the residual data, and the conversion skip identifier is a one-dimensional vertical direction. When indicating that the conversion is to be skipped, the primary vertical conversion for the residual data can be omitted.
  • the selection unit selects an orthogonal transformation to be applied as the primary horizontal transformation based on a horizontal transformation set identifier and a primary horizontal transformation designation flag, and based on the vertical transformation set identifier and the primary vertical transformation designation flag, the primary vertical transformation
  • the orthogonal transform to be applied as can be selected.
  • the encoding unit can derive a primary conversion identifier from the primary horizontal conversion specification flag and the primary vertical conversion specification flag according to the value of the conversion skip identifier.
  • the encoding unit uses the primary horizontal conversion specification flag and the primary vertical conversion specification flag to determine the primary conversion identifier of a 2-bit bin string. And when the conversion skip identifier indicates that horizontal or vertical one-dimensional conversion is not skipped, the primary horizontal conversion specification flag or the primary vertical conversion specification flag is used to specify the primary of the 1-bit bin string.
  • a translation identifier can be derived.
  • the encoding unit can encode the primary horizontal conversion designation flag and the primary vertical conversion designation flag.
  • the encoding unit may omit encoding of the secondary conversion identifier when the conversion skip identifier indicates that horizontal or vertical one-dimensional conversion or two-dimensional conversion is not skipped.
  • the image processing method controls the execution of primary horizontal conversion, which is horizontal primary conversion for residual data of an image and a predicted image, based on the value of the conversion skip identifier, and performs the conversion skip
  • the encoded data is decoded, and the image data is converted based on the value of the conversion skip identifier obtained by decoding the encoded data.
  • Execution of inverse primary vertical transformation which is inverse primary transformation in the vertical direction for the coefficient data, is controlled, and based on the value of the conversion skip identifier, the inverse primary transformation in the horizontal direction for the coefficient data obtained by converting the image data.
  • the execution of inverse primary horizontal conversion is controlled.
  • execution of primary horizontal conversion that is horizontal primary conversion for residual data of an image and a predicted image is controlled based on the value of the conversion skip identifier, Also, based on the value of the conversion skip identifier, execution of primary vertical conversion, which is the primary conversion in the vertical direction, on the residual data of the image and the predicted image is controlled, and the conversion skip identifier is encoded.
  • an image can be processed.
  • a reduction in encoding efficiency can be suppressed.
  • FIG. 20 is a block diagram illustrating a main configuration example of a computer. It is a block diagram which shows an example of a schematic structure of a television apparatus. It is a block diagram which shows an example of a schematic structure of a mobile telephone. It is a block diagram which shows an example of a schematic structure of a recording / reproducing apparatus. It is a block diagram which shows an example of a schematic structure of an imaging device. It is a block diagram which shows an example of a schematic structure of a video set. It is a block diagram which shows an example of a schematic structure of a video processor. It is a block diagram which shows the other example of the schematic structure of a video processor. It is a block diagram which shows an example of a schematic structure of a network system.
  • an adaptive primary conversion flag apt_flag also referred to as amt_flag, cu_pt_flag, or emt_flag
  • amt_flag also referred to as amt_flag, cu_pt_flag, or emt_flag
  • emt_flag indicating whether to perform adaptive primary conversion in units of TU is 0 (false)
  • DCT -II or DST-VII is (uniquely) determined by mode information.
  • the adaptive primary conversion flag apt_flag 1 (true)
  • the primary conversion in each of the horizontal direction (x direction) and the vertical direction (y direction) is performed as shown in the table of FIG.
  • DST Discrete Sine Transform
  • DCT Discrete Cosine Transform
  • FIG. 1 indicate the types of orthogonal transformation, and functions such as the table shown in FIG. 2 are used.
  • the selection (determination) of the transform set TransformSet is performed based on the intra prediction mode (Intra Mode) as shown in the table of FIG. For example, as shown in the following formulas (1) and (2), for each transform set TransformSet ⁇ H, V ⁇ , a transform set identifier TransformSetIdx that specifies the corresponding transform set TransformSet is set. .
  • TransformSetH represents the transformation set of the primary horizontal transformation PThor
  • TransormSetV represents the transformation set of the primary vertical transformation PTver
  • the lookup table LUT_IntraModeToTransformSet represents the correspondence table of FIG.
  • transform set TransformSetH also referred to as a primary horizontal transform set
  • transform set identifier TransformSetIdx 0 shown in the table of FIG. Is selected
  • the primary horizontal transform designation flag pt_hor_flag is selected by the primary horizontal transform designation flag pt_hor_flag.
  • which primary transform of the selected transform set TransformSet is applied to the primary vertical transform is selected by the primary vertical transform designation flag pt_ver_flag.
  • the primary ⁇ horizontal, vertical / vertical ⁇ transform set TransformSet ⁇ H, V ⁇ and the primary ⁇ horizontal, vertical / vertical ⁇ transformation specification flag pt_ ⁇ hor, ver ⁇ _flag As an argument, it is derived from the transformation set definition table (LUT_TransformSetToTransformType) shown in FIG.
  • the primary horizontal transformation is selected (designated) from the transformation set. That is, when the primary horizontal conversion designation flag pt_hor_flag is 0, DST-VII is selected as the primary horizontal conversion PThor, and when the primary horizontal conversion designation flag pt_hor_flag is 1, DCT-VIII is selected as the primary horizontal conversion PThor. .
  • the primary conversion identifier pt_idx is derived from the primary horizontal designation flag pt_hor_flag and the primary vertical conversion designation flag pt_ver_flag based on the following equation (5).
  • pt_idx (pt_ver_flag ⁇ 1) + pt_hor_flag ... (5)
  • the upper 1 bit of the primary conversion identifier pt_idx corresponds to the value of the primary vertical conversion designation flag
  • the lower 1 bit corresponds to the value of the primary horizontal conversion designation flag.
  • Encoding is performed by applying arithmetic coding to the bin string of the derived primary conversion identifier pt_idx to generate a bit string.
  • Non-Patent Document 2 in addition to the orthogonal transform candidates ⁇ DST-VII, DST-I, DCT-V, DCT-VIII ⁇ of Non-Patent Document 1, as orthogonal transforms constituting the transform set of the primary transform, It is disclosed to introduce Identity ⁇ ⁇ Transform (also referred to as IDT or one-dimensional transformation skip (1D Transform Skip)) that skips IV and one-dimensional orthogonal transformation and performs only scaling of coefficients.
  • the definition of the transform set is determined based on the transform block size and mode information.
  • An example of the definition of the transformation set in the 4x4 / 8x8 / 16x16 / 32x32 transformation when the intra prediction mode number is 9 is shown in the table of FIG.
  • the transform block size is 4x4
  • in the transform set with the transform set identifier TrasnformSetIdx 2 IDT is selected as the primary horizontal transform PThor
  • DST-VII is selected as the primary vertical transform PTver. Is done.
  • the first array has the intra prediction mode IntraMode as an argument
  • the second array is the logarithmic value of the transform block size.
  • Non-Patent Document 2 the primary conversion identifier pt_idx corresponds to the conversion set identifier TransfromSetIdx as shown in the following equation (8).
  • Non-Patent Document 2 has a limitation that it can be selected only when one-dimensional conversion skip is a specific conversion block size and intra prediction mode number. Therefore, from the viewpoint of rate distortion, when it is better to select one-dimensional conversion skip that skips horizontal or vertical orthogonal conversion rather than two-dimensional orthogonal conversion, one-dimensional conversion skip is selected on the encoder side. Therefore, the encoding efficiency may be reduced.
  • ⁇ Block division> In conventional image coding methods such as MPEG2 (Moving Picture Experts Group 2 (ISO / IEC 13818-2)) and MPEG-4 Part10 (Advanced Video Coding, hereinafter referred to as AVC), the encoding process is called a macroblock. It is executed in units of processing.
  • the macro block is a block having a uniform size of 16 ⁇ 16 pixels.
  • HEVC High Efficiency Video Coding
  • encoding processing is executed in a processing unit (coding unit) called CU (Coding Unit).
  • the CU is a block having a variable size formed by recursively dividing an LCU (Largest Coding Unit) that is a maximum coding unit.
  • the maximum selectable CU size is 64x64 pixels.
  • the minimum selectable CU size is 8x8 pixels.
  • the minimum size CU is called a SCU (Smallest Coding Unit). Note that the maximum size of the CU is not limited to 64 ⁇ 64 pixels, and may be a larger block size such as 128 ⁇ 128 pixels or 256 ⁇ 256 pixels.
  • Prediction processing for predictive coding is executed in a processing unit (prediction unit) called PU (Prediction Unit).
  • a PU is formed by dividing a CU with one of several division patterns.
  • the PU is composed of processing units (prediction blocks) called PB (Prediction Block) for each luminance (Y) and color difference (Cb, Cr).
  • PB Prediction Block
  • Cb, Cr color difference
  • the orthogonal transformation process is executed in a processing unit (transformation unit) called TU (Transform Unit).
  • a TU is formed by dividing a CU or PU to a certain depth.
  • the TU is composed of processing units (transform blocks) called TB (Transform Block) for each luminance (Y) and color difference (Cb, Cr).
  • FIG. 6 is an explanatory diagram for explaining an outline of recursive block division for a CU in HEVC.
  • An entire quadtree is called a CTB (Coding Tree Block), and a logical unit corresponding to the CTB is called a CTU (Coding Tree Unit).
  • C01 which is a CU having a size of 64 ⁇ 64 pixels
  • the division depth of C01 is equal to zero. This means that C01 is the root of the CTU and corresponds to the LCU.
  • the LCU size can be specified by a parameter encoded in SPS (Sequence Parameter Set) or PPS (Picture Parameter Set).
  • C02 which is a CU is one of four CUs divided from C01 and has a size of 32 ⁇ 32 pixels.
  • the division depth of C02 is equal to 1.
  • C03 which is a CU, is one of four CUs divided from C02 and has a size of 16 ⁇ 16 pixels.
  • the division depth of C03 is equal to 2.
  • C04 which is a CU, is one of the four CUs divided from C03 and has a size of 8 ⁇ 8 pixels.
  • the division depth of C04 is equal to 3.
  • the CU is formed by recursively dividing an image to be encoded.
  • the depth of division is variable. For example, a CU having a larger size (that is, a smaller depth) can be set in a flat image region such as a blue sky. On the other hand, a CU having a smaller size (that is, having a large depth) can be set in a steep image area including many edges.
  • Each set CU is a processing unit of the encoding process.
  • ⁇ Setting of PU to CU> PU is a processing unit of prediction processing including intra prediction and inter prediction.
  • a PU is formed by dividing a CU with one of several division patterns.
  • FIG. 7 is an explanatory diagram for explaining the setting of the PU to the CU shown in FIG.
  • eight types of division patterns 2Nx2N, 2NxN, Nx2N, NxN, 2NxnU, 2NxnD, nLx2N, and nRx2N, are shown.
  • two types of 2Nx2N and NxN can be selected in intra prediction (NxN can be selected only in the SCU).
  • the inter prediction when the asymmetric motion division is enabled, all eight types of division patterns can be selected.
  • TU is a processing unit of orthogonal transform processing.
  • a TU is formed by dividing a CU (for an intra CU, each PU in the CU) to a certain depth.
  • FIG. 8 is an explanatory diagram for explaining the setting of the TU in the CU shown in FIG. The right side of FIG. 8 shows one or more TUs that can be set to C02.
  • T01 which is a TU
  • T02 which is a TU
  • T03 which is a TU, has a size of 8 ⁇ 8 pixels
  • the depth of the TU division is equal to 2.
  • the block division to be performed in order to set the blocks such as CU, PU, and TU described above to an image is typically determined based on a cost comparison that affects coding efficiency. For example, the encoder compares the cost between one 2Mx2M pixel CU and four MxM pixel CUs, and if the encoding efficiency is higher when four MxM pixel CUs are set, the encoder is 2Mx2M pixel CU. Is divided into 4 MxM pixel CUs.
  • FIG. 9 is an explanatory diagram for explaining the scanning order of CU and PU.
  • C10, C11, C12, and C13 which are four CUs that can be included in one CTB, are shown.
  • the numbers in the frame of each CU express the order of processing.
  • the encoding process is executed in the order of C10 which is the upper left CU, C11 which is the upper right CU, C12 which is the lower left CU, and C13 which is the lower right CU.
  • the right side of FIG. 9 shows one or more PUs for inter prediction that can be set to C11 which is a CU.
  • one or more PUs for intra prediction that can be set to C12 which is a CU are shown.
  • the PUs are also scanned from left to right and from top to bottom.
  • block may be used as a partial area or processing unit of an image (picture) (not a block of a processing unit).
  • the “block” in this case indicates an arbitrary partial area in the picture, and its size, shape, characteristics, and the like are not limited.
  • the “block” in this case includes any partial area (processing unit) such as TB, TU, PB, PU, SCU, CU, LCU (CTB), sub-block, macroblock, tile, or slice. Is included.
  • FIG. 10 is a block diagram illustrating an example of a configuration of an image decoding device that is an aspect of an image processing device to which the present technology is applied.
  • An image decoding apparatus 100 illustrated in FIG. 10 is an apparatus that decodes encoded data in which a prediction residual between an image and a predicted image thereof is encoded, such as AVC and HEVC.
  • the image decoding apparatus 100 implements a technique proposed for HEVC and a technique proposed by JVET (Joint Video Exploration Team).
  • the image decoding apparatus 100 includes a decoding unit 111, an inverse quantization unit 112, an inverse conversion unit 113, a calculation unit 114, a frame memory 115, and a prediction unit 116.
  • the prediction unit 116 includes an intra prediction unit (not shown) and an inter prediction unit.
  • the image decoding device 100 is a device for generating moving image # 2 by decoding encoded data # 1 (bitstream).
  • the decoding unit 111 receives the encoded data # 1 as input, and variable-length decodes the syntax value of each syntax element from the bit string of the encoded data # 1 according to the definition of the syntax table. Further, the syntax element includes information such as header information Hinfo, prediction mode information Pinfo, conversion information Tinfo, residual information Rinfo.
  • the header information Hinfo such as VPS / SPS / PPS / slice header SH includes image size (horizontal width PicWidth, vertical width PicHeight), bit depth (brightness bitDepthY, fading difference bitDepthC), maximum value CU size MaxCUSize / minimum value MinCUSize, 4 Maximum depth MaxQTDepth / minimum depth MinQTDepth for binary tree partitioning (also called quad-tree partitioning) MaxBTDepth / minimum depth MinBTDepth for binary tree partitioning (binary-tree partitioning), MaxTSSize (maximum conversion skip block) Information that defines an on / off flag (also referred to as a valid flag) of each encoding tool and the like is included.
  • the on / off flag of the encoding tool included in the header information Hinfo there are on / off flags related to the conversion and quantization processing shown below.
  • the on / off flag of the encoding tool can also be interpreted as a flag indicating whether or not the syntax related to the encoding tool exists in the encoded data. Further, when the value of the on / off flag is 1 (true), this indicates that the encoding tool can be used. When the value of the on / off flag is 0 (false), it indicates that the encoding tool cannot be used. Show. Note that the interpretation of the flag value may be reversed.
  • An adaptive primary conversion enabled flag apt_enabled_flag (also referred to as adaptive_primary_transform_enabled_flag, adaptive_pt_enabled_flag, or amt_enabled_flag) is an encoding tool (also referred to as adaptive primary conversion) capable of selecting an adaptive primary conversion as one of the conversion processing and its inverse processing. It is a flag indicating whether it can be used.
  • the secondary conversion enabled flag st_enabled_flag is a flag indicating whether or not an encoding tool that performs secondary conversion / inverse secondary conversion can be used as one of the conversion process and its reverse process.
  • the transform quantization bypass enabled flag transquant_bypass_enabled_flag is a flag indicating whether or not an encoding tool that skips transform, quantization / inverse quantization, and inverse transform can be used as one of transform / quantization and its inverse processing. is there.
  • the conversion skip flag valid flag ts_enabled_flag is a flag indicating whether two-dimensional conversion skip or one-dimensional conversion skip can be used as one of the conversion process and its reverse process.
  • the two-dimensional transformation skip is an encoding tool that skips orthogonal transformation including primary transformation and secondary transformation and its inverse processing (inverse orthogonal transformation).
  • the one-dimensional conversion skip is an encoding tool that skips the primary conversion in the horizontal direction or the vertical direction and the corresponding inverse conversion (inverse primary conversion), and the secondary conversion and its inverse secondary conversion among the primary conversions. It is.
  • IPinfo for example, prev_intra_luma_pred_flag, mpm_idx, rem_intra_pred_mode in JCTVC-W1005, 7.3.8.5 Coding Unit syntax
  • motion Prediction information MVinfo for example, refer to JCTVC-W
  • the transform information Tinfo includes, for example, the width size TBWidth and the height TBHeight of the transform block to be processed, a transform quantization bypass flag transquant_bypass_flag indicating whether or not to skip the (inverse) transform and (inverse) quantization processing, Conversion skip identifier ts_idx for specifying various conversion skip modes such as two-dimensional conversion skip and one-dimensional conversion skip, adaptive primary conversion flag apt_flag indicating whether adaptive primary conversion is applied to the target TU, and vertical and horizontal (reverse) Primary conversion identifier pt_idx indicating which (reverse) primary conversion is applied to the primary conversion, secondary conversion identifier st_idx indicating which (reverse) secondary conversion is applied (also referred to as dnsst_idx, nsst_idx, or rot_idx), scan identifier scanIdx , Quantization parameter qp, quantization matrix scaling_matrix, etc.
  • log base values log2TBWidth and log2TBHeight of TBWidth and TBHeight each having 2 as a base may be included.
  • the residual information Rinfo includes, for example, the last non-zero coefficient X coordinate (last_sig_coeff_x_pos), the last non-zero coefficient Y coordinate (last_sig_coeff_y_pos), the sub-block non-zero coefficient presence / absence flag (coded_sub_block_flag), the non-zero coefficient presence / absence flag (sig_coeff_flag), non- A flag indicating whether the zero coefficient level is greater than 1 (gr1_flag) (also referred to as GR1 flag), a flag indicating whether the non-zero coefficient level is greater than 2 (gr2_flag) (also referred to as GR2 flag), and the sign of the non-zero coefficient May be included (sign_flag) (also referred to as a sign code), a non-zero coefficient residual level (coeff_abs_level_remaining) (also referred to as a non-zero coefficient residual level), and the like.
  • the decoding unit 111 refers to the residual information Rinfo to derive the quantized transform coefficient level level of each coefficient position in each transform block.
  • the decoding unit 111 supplies the prediction mode information Pinfo, the quantized transform coefficient level level, and the transform information Tinfo obtained by decoding to each block.
  • the decoding unit 111 supplies the prediction mode information Pinfo to the prediction unit 24, supplies the quantized transform coefficient level level to the inverse quantization unit 22, and converts the transform information Tinfo into the inverse transform unit 113 and the inverse quantization unit. 112.
  • the inverse quantization unit 112 receives the transform information Tinfo and the quantized transform coefficient level level, scales (inversely quantizes) the value of the quantized transform coefficient level level based on the transform information Tinfo, and performs inverse quantization
  • the conversion coefficient Coeff_IQ is output to the inverse conversion unit 113.
  • the inverse transform unit 113 receives the transform coefficient Coeff_IQ and the transform information Tinfo, applies the inverse transform to the transform coefficient Coeff_IQ based on the transform information Tinfo, derives a prediction residual D ′, and calculates it as a computation unit To 114. Details of the inverse transform unit 113 will be described later.
  • the calculation unit 114 receives the prediction residual D ′ and the prediction image P supplied from the prediction unit 116, and corresponds to the prediction residual D ′ and the prediction residual D ′ as shown in the following equation (9).
  • the predicted decoded image P (predicted signal) to be added is added to derive a local decoded image Rec, which is supplied to the outside of the frame memory 115 or the image decoding device 100.
  • the frame memory 115 receives the local decoded image Rec supplied from the calculation unit 114, reconstructs a decoded image for each picture unit, and stores it in a buffer in the frame memory 115.
  • the frame memory 115 reads out the decoded image specified by the prediction mode information Pinfo of the prediction unit 116 from the buffer as a reference image, and supplies it to the prediction unit 116. Further, the frame memory 115 may store header information Hinfo, prediction mode information Pinfo, conversion information Tinfo, and the like related to generation of a decoded image in a buffer in the frame memory.
  • the prediction unit 116 receives the prediction mode information Pinfo as an input, and uses the decoded image stored in the frame memory 115 specified by the prediction mode information PInfo as a reference image by the prediction method specified by the prediction mode information Pinfo. Is output to the calculation unit 114.
  • FIG. 11 is a block diagram illustrating a main configuration example of the inverse transform unit 113 included in the image decoding device 100 of FIG.
  • the inverse conversion unit 113 includes a switch 121, an inverse secondary conversion unit 122, and an inverse primary conversion unit 123.
  • the switch 121 receives the conversion coefficient Coeff_IQ and the conversion skip identifier ts_idx.
  • the conversion coefficient Coeff_IQ is output to the inverse secondary conversion unit 122.
  • the inverse secondary transform unit 122 receives the secondary transform identifier st_idx, the scan identifier scanIdx indicating the scan method of the transform coefficient, and the transform coefficient Coeff_IQ, and derives the transform coefficient Coeff_IS (also referred to as a primary transform coefficient) after the inverse secondary transform, This is supplied to the inverse primary conversion unit 123. More specifically, when the secondary conversion identifier st_idx indicates that inverse secondary conversion is to be applied (st_idx> 0), the inverse secondary conversion unit 122 performs the inverse corresponding to the secondary conversion identifier st_idx with respect to the conversion coefficient Coeff_IQ.
  • the inverse primary conversion unit 123 receives the primary horizontal conversion designation flag pt_hor_flag, the primary vertical conversion designation flag pt_ver_flag, the prediction mode information PInfo, the conversion skip identifier ts_idx, and the conversion coefficient Coeff_IS after the inverse secondary conversion.
  • the inverse primary conversion unit 123 includes an inverse primary conversion selection unit 131, a switch 132, an inverse primary vertical conversion unit 133, a switch 134, and an inverse primary horizontal conversion unit 135.
  • the inverse primary conversion selection unit 131 receives the primary horizontal conversion specification flag pt_hor_flag, the primary vertical conversion specification flag pt_ver_flag, the prediction mode information PInfo, and the conversion skip identifier ts_idx, and receives the prediction mode information PInfo, the conversion skip identifier ts_idx, and the primary horizontal conversion specification
  • the data is read from (not shown) and supplied to the inverse primary horizontal conversion unit 135 and the inverse primary vertical conversion unit 133, respectively.
  • the intra prediction mode number 35 may be treated as a mode indicating inter prediction (Inter) or intra block copy (IBC; Intra Block Copy).
  • TransformSetH represents the transformation set of the primary horizontal transformation PThor
  • TransormSetV represents the transformation set of the primary vertical transformation PTver
  • the lookup table LUT_IntraModeToTransformSet is the correspondence table of FIG.
  • the first array of the lookup table LUT_IntraModeToTransformSet [] [] uses the intra prediction mode IntraMode as an argument
  • TransformSetIdx 0 shown in the table of FIG.
  • transform set TransformHSet also called primary horizontal transform set
  • the inverse primary transformation selection unit 131 performs, for each horizontal / vertical direction, the orthogonal transformation used for inverse primary transformation from the selected transformation set TransformSet, respectively, a primary horizontal transformation designation flag pt_hor_flag, and a primary vertical transformation designation flag. Select by pt_ver_flag.
  • 1 may be freely changed within a practicable range.
  • DST-VII is set regardless of the value of the conversion set identifier
  • the conversion set identifier 0 ... DCT-VIII, DST-I, DCT-V, and DST-VII may be set in the order of 3, respectively.
  • the order of the conversion set identifiers 0 ... 2 may be freely changed within a practicable range.
  • the inverse primary transformation selection unit 131 performs the inverse primary horizontal transformation IPThor and the inverse primary according to the motion prediction information MVinfo, the primary horizontal transformation designation flag pt_hor_flag, and the primary vertical transformation designation flag pt_ver_flag instead of the intra prediction mode information IPinfo.
  • Vertical conversion IPTver may be selected.
  • the inverse primary transform selection unit 131 reads out an orthogonal transform matrix corresponding to the inverse primary horizontal transform IPThor and the inverse primary vertical transform IPTver from a buffer (not shown) held by the inverse primary transform unit 123, and performs the inverse primary vertical Supply matrix corresponding to transform, inverse primary horizontal transform.
  • the switch 132 receives as input the conversion coefficient Coeff_IS (also referred to as primary conversion coefficient Coeff_P) after inverse secondary conversion and the conversion skip identifier ts_idx.
  • the switch 132 is Then, the process of the inverse primary vertical conversion unit 133 is skipped, and the primary conversion coefficient Coeff_IS is output to the outside as the conversion coefficient Coeff_IPver after the inverse primary vertical conversion.
  • the switch 132 outputs the primary conversion coefficient Coeff_IS to the outside To do.
  • the inverse primary vertical transform unit 133 receives the matrix of the transform coefficient Coeff_IS after inverse secondary transform and the inverse primary vertical transform IPTver as input, performs a matrix operation as shown in the following equation (13), and outputs the result. Output as transform coefficient Coeff_IPver after inverse primary vertical transform.
  • the inverse primary vertical transformation IPTver is an inverse transformation of the primary vertical transformation PTver having a transformation base as a column vector, and is represented by a matrix PTver T obtained by transposing the primary vertical transformation PTver.
  • the scaling parameter s1 is used to normalize the IPTver ⁇ Coeff_IS matrix calculation result so as to be within the bit depth of the intermediate buffer.
  • the value of the scaling parameter s1 is determined from, for example, the bit depth BitDepthbuff of the intermediate buffer and the worst case MaxBitDepth (IPTver ⁇ Coeff_IS) of the IPTver ⁇ Coeff_IS matrix operation as shown in the following equation (14).
  • the bit depth of MaxBitDepth (IPTver ⁇ Coeff_IS) is 23 bits and the value can be stored in the intermediate buffer.
  • a predetermined offset value o1 may be added for each element after the matrix product in order to reduce the clip error due to the right shift operation.
  • the offset value o1 is expressed by the following equation (15) using the scaling parameter s1.
  • the switch 134 receives the conversion coefficient Coeff_IPver after the reverse primary vertical conversion and the conversion skip identifier ts_idx.
  • the switch 134 The inverse primary horizontal transform unit 135 is skipped, and the transform coefficient Coeff_IPver after the inverse primary vertical transform is output to the outside as the prediction residual D ′.
  • the coefficient Coeff_IPver is output to the inverse primary horizontal conversion unit 135.
  • the inverse primary horizontal transforming unit 135 receives the matrix of the transform coefficient Coeff_IPver after the inverse primary vertical transform and the inverse primary horizontal transform IPThor for each transform block, performs a matrix operation as shown in the following equation (16), and the result Is output as the prediction residual D ′.
  • the inverse primary horizontal transformation IPThor is an inverse transformation of the primary horizontal transformation PThor having a transformation base as a row vector, and is represented by a matrix PThor T obtained by transposing the primary horizontal transformation PThor.
  • the value of the scaling parameter s2 is determined by the following equation (17) from the desired bit depth BitDepthout and the worst case MaxBitDepth (Coeff_IPver ⁇ IPThor) of the Coeff_IPver ⁇ IPThor matrix operation.
  • the scaling parameter s2 is 0, the value of the desired bit depth is sufficiently large, and thus each element value of the matrix product of Coeff_IPver ⁇ IPThor falls within the desired bit depth without being normalized.
  • a predetermined offset value o2 may be added for each element after the matrix product in order to reduce the clipping error due to the right shift operation.
  • the offset value o2 is expressed by the following equation (18) using the scaling parameter s2.
  • the inverse primary conversion unit 123 prevents a reduction in the amount of inverse primary conversion and a reduction in energy compaction for a residual signal for which it is desirable to skip one-dimensional conversion in the horizontal direction or the vertical direction.
  • inverse primary conversion processing with improved coding efficiency can be performed.
  • step S101 the decoding unit 111 decodes the bit stream (encoded data) supplied to the image decoding device 100, and includes header information Hinfo, prediction mode information Pinfo, conversion information Tinfo, Information such as residual information Rinfo and quantized transform coefficient level level is obtained.
  • step S102 the inverse quantization unit 112 dequantizes the quantized transform coefficient level level obtained by the process in step S101 to derive a transform coefficient Coeff_IQ.
  • This inverse quantization is an inverse process of the quantization performed in the image encoding process described later, and is the same process as the inverse quantization performed in the image encoding process.
  • step S103 the inverse transform unit 113 inversely transforms the transform coefficient Coeff_IQ obtained by the process in step S102, and derives a prediction residual D ′.
  • This inverse transform is an inverse process of the transform process performed in the image encoding process described later, and is the same process as the inverse transform performed in the image encode process.
  • step S104 the prediction unit 116 performs prediction in the same prediction mode as the prediction at the time of encoding based on the prediction mode information PInfo, and generates a predicted image.
  • step S105 the calculation unit 114 adds the prediction image obtained by the process of step S104 to the prediction residual D ′ obtained by the process of step S103, and obtains a decoded image.
  • step S106 the calculation unit 114 outputs the decoded image obtained by the process in step S105 to the outside of the image decoding device 100.
  • step S107 the frame memory 115 stores the decoded image obtained by the process in step S105.
  • step S107 When the process of step S107 is completed, the image decoding process is ended.
  • step S121 determines in step S121 that the transform skip identifier ts_idx is 2D_TS (two-dimensional transform skip mode) or the transform quantization bypass flag transquant_bypass_flag is 1 (true). Determine whether.
  • the switch 121 When it is determined that the conversion skip identifier ts_idx is 2D_TS or the conversion quantization bypass flag is 1 (true), the switch 121 outputs the conversion coefficient Coeff_IQ to the outside as the prediction residual D ′ (to the calculation unit 114) Supply), the inverse conversion process is completed, and the process returns to FIG.
  • step S121 If it is determined in step S121 that the conversion skip identifier ts_idx is not 2D_TS (a mode other than two-dimensional conversion skip) and the conversion quantization bypass flag is 0 (false), the switch 121 sets the conversion coefficient Coeff_IQ. The data is supplied to the reverse secondary conversion unit 122, and the process proceeds to step S122.
  • step S122 the inverse secondary transform unit 122 performs inverse secondary transform on the input transform coefficient Coeff_IQ 'based on the secondary transform identifier st_idx, and derives and outputs the primary transform coefficient Coeff_IS.
  • step S123 the inverse primary conversion selection unit 131 performs an inverse primary conversion selection process, and performs reverse processing with reference to the primary horizontal conversion specification flag pt_hor_flag, the primary vertical conversion specification flag pt_ver_flag, the prediction mode information PInfo, and the conversion skip identifier ts_idx. Select primary horizontal conversion IPThor and reverse primary vertical conversion IPTver.
  • step S125 the inverse primary vertical transform unit 133 inputs a matrix of the transform coefficient Coeff_IS after inverse secondary transform and the inverse primary vertical transform IPTver for each transform block, performs a matrix operation, and performs the result after inverse primary vertical transform. Is output as the conversion coefficient Coeff_IPver.
  • step S126 the process proceeds to step S126.
  • step S124 when the conversion skip identifier ts_idx is 1D_V_TS, the process of step S125 is omitted, and the process proceeds to step S126.
  • step S127 the inverse primary horizontal transformation unit 135 receives, for each transformation block, the matrix of the transformation coefficient Coeff_IPver after the inverse primary vertical transformation and the inverse primary horizontal transformation IPThor, performs matrix calculation, and the result is the prediction residual D. Output as'.
  • step S126 If it is determined in step S126 that the conversion skip identifier ts_idx is 1D_H_TS, the process of step S127 is omitted, the inverse conversion process is terminated, and the process returns to FIG.
  • step S124 and step S126 may be omitted, and it may be determined whether or not the conversion skip identifier ts_idx is 1D_V_TS (vertical one-dimensional conversion skip) in step S123. If it is determined in step S123 that the conversion skip identifier ts_idx is 1D_V_TS, the unit matrix may be selected as the inverse primary vertical conversion IPTver, and the process of step S125 may be executed. If it is determined in step S123 that the conversion skip identifier ts_idx is 1D_H_TS, the unit matrix may be selected as the inverse primary horizontal conversion IPThor, and the process of step S127 may be executed.
  • 1D_V_TS vertical one-dimensional conversion skip
  • step S141 the reverse primary conversion selection unit 131 determines whether or not the adaptive primary conversion flag apt_flag is 1 (true). When it is determined that the adaptive primary conversion flag apt_flag is 1 (true), the process proceeds to step S142.
  • step S142 the inverse primary transformation selection unit 131 selects a transformation set according to the above equation (10) for each of the inverse primary vertical transformation and the inverse primary horizontal transformation based on the prediction mode information PInfo.
  • step S144 the process proceeds to step S144.
  • step S141 If it is determined in step S141 that the adaptive primary conversion flag apt_flag is 0 (false), the process proceeds to step S143.
  • step S143 the inverse primary conversion selection unit 131 selects a predetermined conversion set. When the process of step S143 ends, the process proceeds to step S144.
  • step S144 the inverse primary transformation selection unit 131 refers to the horizontal transformation set identifier TransformSetH and the primary horizontal transformation designation flag pt_hor_flag, and selects the orthogonal transformation to be applied as the inverse primary horizontal transformation IPThor according to the above equation (11). To do.
  • step S145 the inverse primary transformation selection unit 131 refers to the vertical transformation set identifier TransformSetV and the primary vertical transformation designation flag pt_ver_flag, and selects the orthogonal transformation to be applied as the inverse primary vertical transformation IPTver according to the above equation (12). To do.
  • step S145 When the process of step S145 is completed, the reverse primary conversion selection process is terminated, and the process returns to FIG.
  • this reverse primary conversion selection process may change the processing order of each step or change the contents of the process within a feasible range.
  • an orthogonal conversion IDT unit matrix that explicitly indicates one-dimensional conversion skip is not selected. It may be.
  • an orthogonal transform IDT unit matrix that explicitly indicates one-dimensional conversion skip is selected. It may not be done.
  • the image decoding apparatus 100 suppresses a reduction in the amount of inverse transformation and a reduction in energy compaction for a residual signal to which transformation skip is preferably applied.
  • the encoding efficiency can be improved.
  • the inverse transformation unit 113 suppresses a reduction in the amount of inverse primary transformation and a reduction in energy compaction for a residual signal for which it is desirable to skip one-dimensional transformation in the horizontal direction or the vertical direction. Therefore, the encoding efficiency can be improved.
  • a residual signal having a step edge characteristic in which the continuity of the signal changes rapidly in the horizontal direction one-dimensional conversion in the horizontal direction is skipped and one-dimensional conversion in the vertical direction is performed.
  • non-zero coefficients can be efficiently concentrated in the low frequency component in the vertical direction. In other words, since the energy compaction can be increased, it is possible to improve the encoding efficiency.
  • Second Embodiment> ⁇ Decryption of primary conversion identifier>
  • the primary conversion identifier pt_idx and the conversion skip flag ts_flag are decoded in units of each conversion block included in the CU.
  • a primary horizontal conversion designation flag pt_hor_flag and a primary vertical conversion designation flag pt_ver_flag are derived from the primary conversion identifier pt_idx by the following equation (19).
  • pt_hor_flag pt_idx & 0x01
  • the primary conversion identifier pt_idx takes a 2-bit value, and the upper 1 bit corresponds to the primary vertical conversion specification flag pt_ver_flag, and the lower 1 bit corresponds to the primary horizontal conversion specification flag pt_hor_flag.
  • the primary conversion identifier pt_idx is derived as shown in the following equation (20).
  • pt_idx ((pt_ver_flag) ⁇ 1) + pt_hor_flag ... (20)
  • the conversion skip identifier ts_idx decoded in units of conversion blocks is 1D_H_TS Since the primary horizontal conversion designation flag pt_hor_flag is not used, it is redundant to encode / decode this information. Further, when the conversion skip identifier ts_idx indicates 1D_V_TS, the primary vertical conversion designation flag pt_ver_flag is not used, and therefore it is redundant to encode / decode this information.
  • the conversion skip flag ts_flag is extended to the conversion skip identifier ts_idx.
  • the conversion skip identifier ts_idx is 1D_H_TS, the reverse secondary conversion and the reverse primary horizontal conversion are skipped.
  • the conversion skip identifier ts_idx is 1D_V_TS, reverse secondary conversion and reverse primary vertical conversion are skipped.
  • the decoding side derives the primary horizontal conversion specification flag pt_hor_flag and the primary vertical conversion specification flag pt_ver_flag from the primary conversion identifier pt_idx as described in the equation (19) above. To do.
  • the primary conversion identifier pt_idx is derived from the primary horizontal conversion specification flag pt_hor_flag and the primary vertical conversion specification flag pt_ver_flag as shown in Expression (20).
  • the primary conversion identifier pt_idx pt_ver_flag is derived as shown in the following equation (22).
  • pt_ver_flag pt_idx
  • pt_hor_flag -1 (predetermined value) ...
  • pt_idx pt_ver_flag
  • the primary conversion identifier pt_idx pt_hor_flag is derived as shown in the following equation (24).
  • pt_hor_flag pt_idx
  • pt_ver_flag -1 (predetermined value)
  • pt_idx pt_hor_flag ...
  • the primary conversion identifier pt_idx is arithmetically decoded / arithmetic encoded as a 1-bit bin string, so it is arithmetically expressed as a 2-bit bin string.
  • bin sequences to be decoded / encoded can be reduced. Therefore, an increase in code amount can be suppressed, and an improvement in encoding efficiency can be realized.
  • the secondary transform is a transform designed to improve the energy compaction of transform coefficients to which the two-dimensional orthogonal transform is applied. Therefore, applying the secondary transform to the transform coefficient to which the two-dimensional transform skip or the one-dimensional transform skip is applied may conversely reduce the coding efficiency. Therefore, when the conversion skip identifier ts_idx is 2D_TS, 1D_H_TS, or 1D_V_TS, the reverse secondary conversion is changed to be skipped. In this case, it is redundant to encode / decode the secondary conversion identifier st_idx, which is a control parameter for (reverse) secondary conversion.
  • the conversion skip identifier ts_idx is 2D_TS, 1D_H_TS, or 1D_V_TS
  • decoding of the secondary conversion identifier st_idx is omitted, and the value of the secondary conversion identifier st_idx is estimated to a value (0) indicating that secondary conversion is not performed. It may be changed as follows. By doing in this way, the increase in the processing amount concerning decoding of the secondary conversion identifier st_idx can be suppressed. Further, since the secondary transform is not applied to the transform coefficient to which the two-dimensional transform skip or the one-dimensional transform skip is applied, it is possible to prevent the encoding efficiency from being lowered.
  • FIG. 15 is a block diagram illustrating a main configuration example of the decoding unit 111 regarding decoding of the conversion skip identifier ts_idx.
  • the decoding unit 111 in this case includes a conversion skip valid flag decoding unit 151, a maximum conversion skip block size decoding unit 152, a conversion quantization bypass flag decoding unit 153, and a conversion skip identifier decoding unit 154.
  • a conversion skip valid flag decoding unit 151 includes a maximum conversion skip block size decoding unit 152, a conversion quantization bypass flag decoding unit 153, and a conversion skip identifier decoding unit 154.
  • the conversion skip valid flag decoding unit 151 performs processing related to the decoding of the conversion skip valid flag ts_enabled_flag.
  • the maximum conversion skip block size decoding unit 152 performs processing related to decoding of the maximum conversion skip block size MaxTSSize.
  • the transform quantization bypass flag decoding unit 153 performs processing related to decoding of the transform quantization bypass flag transquant_bypass_flag.
  • the conversion skip identifier decoding unit 154 performs processing related to decoding of the conversion skip identifier ts_idx.
  • the conversion skip effective flag decoding unit 151 decodes the conversion skip effective flag ts_enabled_flag from the bit string of the encoded data # 1 and outputs it as a part of the header information Hinfo in step S161.
  • step S162 the maximum conversion skip block size decoding unit 152 determines whether or not the conversion skip valid flag ts_enabled_flag included in the header information Hinfo is 1 (true). If it is determined that the conversion skip valid flag ts_enabled_flag is 1, the process proceeds to step S163.
  • step S163 the maximum conversion skip block size decoding unit 152 decodes the maximum conversion skip block size MaxTSSize (or logarithm value log2MaxTSSize with 2 as the base) from the bit string of the encoded data # 1.
  • the process of step S163 ends, the process proceeds to step S164. If it is determined in step S162 that the conversion skip valid flag ts_enabled_flag is 0, the process in step S163 is omitted, and the process proceeds to step S164.
  • step S164 the transform quantization bypass flag decoding unit 153 decodes the transform quantization bypass flag transquant_bypass_flag from the bit string of the encoded data # 1, and outputs it as a part of the transform information Tinfo.
  • step S165 the conversion skip identifier decoding unit 154 determines whether or not the conversion quantization bypass flag transquant_bypass_flag included in the conversion information Tinfo is 1 (true). If it is determined that the transform quantization bypass flag transquant_bypass_flag is 1, the process proceeds to step S169. If it is determined in step S165 that the transform quantization bypass flag transquant_bypass_flag is 0, the process proceeds to step S166.
  • step S166 the conversion skip identifier decoding unit 154 determines whether or not the conversion skip valid flag ts_enabled_flag included in the header information HInfo is 1 (true). If it is determined that the conversion skip valid flag ts_enabled_flag is 0, the process proceeds to step S169. If it is determined in step S166 that the conversion skip valid flag ts_enabled_flag is 1, the process proceeds to step S167.
  • TBSize is derived from the following expression (26). In the case of Expression (26), the larger value of the vertical size TBHSize and the horizontal size TBWSize of the conversion block is set as TBSize.
  • TBSize max (TBWSize, TBHSize) ... (26)
  • Equation (27) may be used instead of equation (26).
  • a value obtained by multiplying the vertical size TBHSize and the horizontal size TBWSize of the conversion block is TBSize.
  • TBSize, TBWSize, and TBHSize may be replaced with logarithmic values log2TBSize, log2TBWSize, and log2TBHSize with 2 as the base.
  • the expression (26) is replaced with the following expression (28)
  • the expression (27) is replaced with the following expression (29).
  • MaxTSSize the maximum conversion skip block size
  • step S168 the conversion skip identifier decoding unit 154 decodes the conversion skip identifier ts_idx from the bit string of the encoded data # 1, and outputs it as a part of the conversion information Tinfo.
  • the decoding process related to the conversion skip identifier ends, and the process returns to FIG.
  • FIG. 17 shows a syntax table in which pseudo codes for each process in steps S165 to S169 are described.
  • the conditional expression (second line from the top) of the if statement with the symbol SYN11 can be expressed as the following conditional expression (30), which is the step described with reference to FIG. This is equivalent to the branch determination in S165 to S167.
  • the process of step S168 in FIG. 16 corresponds to the decoding (encoding) process of the syntax ts_flag with the sign SYN12 in FIG.
  • FIG. 18 is a block diagram illustrating a main configuration example of the decoding unit 111 regarding decoding of the primary conversion identifier pt_idx.
  • the decoding unit 111 in this case includes a primary conversion valid flag decoding unit 161, an adaptive primary conversion flag decoding unit 162, and a primary conversion identifier decoding unit 163.
  • the primary conversion valid flag decoding unit 161 performs processing related to decoding of the primary conversion valid flag pt_enabled_flag.
  • the adaptive primary conversion flag decoding unit 162 performs processing related to decoding of the primary conversion flag pt_enabled_flag.
  • the primary conversion identifier decoding unit 163 performs processing related to decoding of the primary conversion identifier pt_idx.
  • the primary conversion valid flag decoding unit 161 decodes the primary conversion valid flag pt_enabled_flag from the bit string of the encoded data # 1 and outputs it as a part of the header information Hinfo in step S181.
  • step S182 the adaptive primary conversion flag decoding unit 162 determines whether or not the primary conversion enable flag pt_enabled_flag included in the header information Hinfo is 1 (true). If it is determined that the primary conversion valid flag pt_enabled_flag is 0 (false), the process proceeds to step S183.
  • step S183 the adaptive primary conversion flag decoding unit 162 omits the encoding of the adaptive primary conversion flag apt_flag and estimates that the value of this flag is 0.
  • step S183 ends, the process proceeds to step S193.
  • step S182 If it is determined in step S182 that the primary conversion valid flag pt_enabled_flag is 1 (true), the process proceeds to step S184.
  • step S184 adaptive primary conversion flag decoding section 162 decodes adaptive primary conversion flag apt_flag from the bit string of encoded data # 1.
  • step S185 the primary conversion identifier decoding unit 163 determines whether or not the adaptive primary conversion flag apt_flag is 1 (true). If it is determined that the adaptive primary conversion flag apt_flag is 0 (false), the process proceeds to step S193. If it is determined in step S185 that the adaptive primary conversion flag apt_flag is 1 (true), the process proceeds to step S186.
  • step S186 the primary conversion identifier decoding unit 163 determines whether or not the conversion quantization bypass flag transquant_bypass_flag is 1 (true). If it is determined that the transform quantization bypass flag transquant_bypass_flag is 1 (true), the process proceeds to step S193. If it is determined in step S186 that the transform quantization bypass flag transquant_bypass_flag is 0 (false), the process proceeds to step S187.
  • step S187 the primary conversion identifier decoding unit 163 determines whether or not the conversion skip identifier ts_idx is 2D_TS (two-dimensional conversion skip). If it is determined that the conversion skip identifier ts_idx is 2D_TS, the process proceeds to step S193. If it is determined in step S187 that the conversion skip identifier ts_idx is other than 2D_TS, the process proceeds to step S188.
  • 2D_TS two-dimensional conversion skip
  • step S189 the primary conversion identifier decoding unit 163 determines whether or not the conversion block to be decoded is a luminance component. If it is determined that the component is not a luminance component, the process proceeds to step S193. If it is determined in step S189 that the transform block to be decoded is a luminance component, the process proceeds to step S190.
  • step S192 the primary conversion identifier decoding unit 163 decodes the primary conversion identifier pt_idx from the bit string of the encoded data # 1.
  • step S192 ends, the process proceeds to step S193.
  • step S193 the primary conversion identifier decoding unit 163 refers to the conversion skip identifier ts_idx and the decoded primary conversion identifier pt_idx, and derives a primary horizontal conversion specification flag pt_hor_flag and a primary vertical conversion specification flag pt_ver_flag.
  • FIG. 17 shows a syntax table in which the pseudo code of each process in steps S185 to S192 described above is described.
  • conditional expression (31) the conditional expression of the if statement with the symbol SYN13 is equivalent to the branch determination in steps S185 to S192.
  • Step S192 corresponds to the decoding process of the syntax pt_idx given the symbol SYN14 in FIG. Note that in the formula (31), the condition of step S188 is omitted.
  • the equation including the condition of step S188 is represented by equation (32).
  • the primary conversion identifier decoding unit 163 determines whether or not the conversion skip identifier ts_idx is NO_TS (not conversion skip) in step S211. If it is determined that the conversion skip identifier ts_idx is NO_TS, the process proceeds to step S212.
  • step S212 the primary conversion identifier decoding unit 163 derives a primary horizontal conversion designation flag pt_hor_flag and a primary vertical conversion flag pt_ver_flag by the above equation (19). That is, the primary conversion identifier pt_idx is processed as a 2-bit bin string, and the primary horizontal conversion specification flag pt_hor_flag and the primary vertical conversion flag pt_ver_flag are derived from the 2 bits.
  • the primary vertical / horizontal conversion designation flag derivation process ends, and the process returns to FIG.
  • step S212 If it is determined in step S212 that the conversion skip identifier ts_idx is other than NO_TS, the process proceeds to step S213.
  • step S213 the primary conversion identifier decoding unit 163 determines whether or not the conversion skip identifier ts_idx is 2D_ TS (two-dimensional conversion skip). If it is determined that the conversion skip identifier ts_idx is 2D_TS, the process proceeds to step S214.
  • step S214 the primary conversion identifier decoding unit 163 derives the primary horizontal conversion designation flag pt_hor_flag and the primary vertical conversion flag pt_ver_flag by the above equation (25). That is, decoding of the primary conversion identifier pt_idx is omitted, and the primary horizontal conversion specification flag pt_hor_flag and the primary vertical conversion flag pt_ver_flag are set to predetermined values.
  • the primary vertical / horizontal conversion designation flag derivation process ends, and the process returns to FIG.
  • step S213 If it is determined in step S213 that the conversion skip identifier ts_idx is other than 2D_TS, the process proceeds to step S215.
  • step S215 the primary conversion identifier decoding unit 163 determines whether or not the conversion skip identifier ts_idx is 1D_H_TS (horizontal one-dimensional conversion skip). If it is determined that the conversion skip identifier ts_idx is 1D_H_TS, the process proceeds to step S216.
  • step S216 the primary conversion identifier decoding unit 163 derives the primary horizontal conversion designation flag pt_hor_flag and the primary vertical conversion flag pt_ver_flag by the above equation (21). That is, the primary conversion identifier pt_idx is processed as a 1-bit bin string, the primary horizontal conversion designation flag pt_hor_flag is set to a predetermined value, and the primary vertical conversion flag pt_ver_flag is set to the value of the primary conversion identifier pt_idx.
  • the primary vertical / horizontal conversion designation flag derivation process ends, and the process returns to FIG.
  • step S217 the primary conversion identifier decoding unit 163 derives a primary horizontal conversion designation flag pt_hor_flag and a primary vertical conversion flag pt_ver_flag by the above equation (23). That is, the primary conversion identifier pt_idx is processed as a 1-bit bin string, the primary horizontal conversion designation flag pt_hor_flag is set to the value of the primary conversion identifier pt_idx, and the primary vertical conversion flag pt_ver_flag is set to a predetermined value.
  • the primary vertical / horizontal conversion designation flag derivation process ends, and the process returns to FIG.
  • the primary conversion identifier pt_idx when the conversion skip identifier ts_idx is 1D_H_TS or 1D_V_TS, the primary conversion identifier pt_idx can be arithmetically decoded as a 1-bit bin string, and thus decoding is performed more than when arithmetic decoding is performed as a 2-bit bin string.
  • the target bin sequence can be reduced. Therefore, it is possible to reduce the amount of processing related to the decoding of the primary conversion identifier pt_idx. In addition, since the amount of codes can be reduced, it is possible to improve the coding efficiency.
  • FIG. 21 is a block diagram illustrating a main configuration example of the decoding unit 111 regarding decoding of the secondary conversion identifier st_idx.
  • the decoding unit 111 in this case includes a secondary conversion valid flag decoding unit 171 and a secondary conversion identifier decoding unit 172.
  • the secondary conversion effective flag decoding unit 171 performs processing related to decoding of the secondary conversion effective flag st_enabled_flag.
  • the secondary conversion identifier decoding unit 172 performs processing related to decoding of the secondary conversion identifier st_idx.
  • the secondary conversion valid flag decoding unit 171 decodes the secondary conversion valid flag st_enabled_flag from the bit string of the encoded data # 1 and outputs it as a part of the header information Hinfo in step S231.
  • step S232 the secondary conversion identifier decoding unit 172 determines whether or not the secondary conversion valid flag st_enabled_flag included in the header information Hinfo is 1 (true). If it is determined that the secondary conversion valid flag st_enabled_flag is 0 (false), the process proceeds to step S238. If it is determined in step S232 that the secondary conversion valid flag st_enabled_flag is 1 (true), the process proceeds to step S233.
  • step S233 the secondary transform identifier decoding unit 172 determines whether or not the transform quantization bypass flag transquant_bypass_flag is 1 (true). If it is determined that the transform quantization bypass flag transquant_bypass_flag is 1 (true), the process proceeds to step S238. If it is determined in step S233 that the transform quantization bypass flag transquant_bypass_flag is 0 (false), the process proceeds to step S234.
  • step S234 the secondary conversion identifier decoding unit 172 determines whether or not the conversion skip identifier ts_idx is NO_TS (does not perform conversion skip). If it is determined that the conversion skip identifier ts_idx is other than NO_TS, the process proceeds to step S238. If it is determined in step S234 that the conversion skip identifier ts_idx is NO_TS, the process proceeds to step S235.
  • a predetermined threshold TH stNumSigTH
  • step S237 the secondary conversion identifier decoding unit 172 decodes the secondary conversion identifier st_idx from the bit string of the encoded data # 1.
  • the decoding process ends, and the process returns to FIG.
  • FIG. 23 shows a syntax table in which pseudo codes in steps S232 to S238 (excluding steps S235 and S237) are described.
  • conditional expression (33) conditional expression of the if statement with the symbol SYN19 is equivalent to the branch determination in steps S232 to S238.
  • syntax denoted by the symbol SYN20 in FIG. 23 corresponds to the processing in step S237 in FIG.
  • the processing related to the decoding of the secondary conversion identifier st_idx has been described. However, the processing order of each step may be changed and the content of the processing may be changed within a feasible range. In addition, the conditional expression (33) can be changed in calculation within a feasible range.
  • the secondary conversion control parameter is the secondary conversion identifier st_idx, but it may be the secondary conversion flag st_flag.
  • the decoding process of the secondary conversion identifier can be omitted. That is, it is possible to reduce the processing amount related to decoding of the secondary conversion identifier.
  • the primary horizontal conversion designation flag pt_hor_flag and the primary vertical conversion designation flag pt_ver_flag are derived from the decoded primary conversion identifier pt_idx.
  • the present invention is not limited to this.
  • the primary horizontal conversion specification flag pt_hor_flag and the primary vertical conversion specification flag pt_ver_flag may be directly decoded from the encoded data.
  • FIG. 24 is a block diagram illustrating a main configuration example regarding the decoding of the primary horizontal conversion designation flag pt_hor_flag and the primary vertical conversion designation flag pt_ver_flag in the decoding unit 111.
  • the decoding unit 111 in this case includes a primary conversion valid flag decoding unit 161, an adaptive primary conversion flag decoding unit 162, a primary horizontal conversion designation flag decoding unit 181, and a primary vertical conversion designation flag decoding unit 182.
  • the primary horizontal conversion designation flag decoding unit 181 performs processing related to decoding of the primary horizontal conversion designation flag pt_hor_flag.
  • the primary vertical conversion designation flag decoding unit 182 performs processing related to decoding of the primary vertical conversion designation flag pt_ver_flag.
  • Fourth Embodiment> ⁇ Other configuration of inverse conversion unit>
  • the switch 132 of the inverse primary transform unit 123 supplies the primary transform coefficient Coeff_IS to the switch 134 when the inverse primary vertical transform is skipped. For this purpose, scaling may be performed. Further, in the first embodiment, when skipping the reverse primary horizontal conversion, the switch 134 of the reverse primary conversion unit 123 outputs the conversion coefficient Coeff_IPver after the reverse primary vertical conversion to the outside as the prediction residual D ′. In this case, scaling for quantization may be performed.
  • FIG. 26 is a block diagram illustrating a main configuration example of the inverse conversion unit 113 in that case.
  • the inverse transform unit 113 has a configuration basically similar to that in FIG.
  • the inverse primary conversion unit 123 includes a scaling unit 191 and a scaling unit 192.
  • the switch 132 supplies the primary conversion coefficient Coeff_IS to the scaling unit 191 when the inverse primary vertical conversion is skipped.
  • the scaling unit 191 performs scaling on the primary transform coefficient Coeff_IS (transform coefficient Coeff_IPver after inverse primary vertical transform) supplied from the switch 132. For example, the scaling unit 191 performs a bit shift operation of N (N is a natural number) bits for normalizing the supplied transform coefficient so as to have the same norm as when the inverse primary vertical transform is performed. .
  • the scaling unit 191 supplies the scaled conversion coefficient to the switch 134.
  • the switch 134 supplies the transform coefficient Coeff_IPver after the inverse primary vertical conversion to the scaling unit 192 as the prediction residual D ′.
  • the scaling unit 192 performs scaling on the transform coefficient Coeff_IPver (prediction residual D ′) after inverse primary vertical transform supplied from the switch 134.
  • the scaling unit 192 performs a bit shift operation of N (N is a natural number) bits for normalizing the supplied transform coefficient so as to have the same norm as when the inverse primary horizontal transform is performed. .
  • the scaling unit 192 outputs the scaled prediction residual D ′ to the outside.
  • the dynamic range width of the transform coefficient can be suppressed within a predetermined range, so that an increase in decoding load can be suppressed.
  • FIG. 27 is a block diagram illustrating an example of a configuration of an image encoding device that is an aspect of an image processing device to which the present technology is applied.
  • An image encoding device 300 shown in FIG. 27 is an image encoding device corresponding to the image decoding device 100 in FIG. 10, and the encoded data (bit stream) decoded by the image decoding device 100 is converted into the image decoding device 100. It is generated by encoding an image with an encoding method corresponding to the decoding method according to.
  • the image encoding apparatus 300 is implemented with a technique proposed for HEVC and a technique proposed for JVET.
  • FIG. 27 shows main components such as a processing unit and a data flow, and the ones shown in FIG. 27 are not all. That is, in the image coding apparatus 300, there may be a processing unit that is not shown as a block in FIG. 27, or there may be a process or data flow that is not shown as an arrow or the like in FIG.
  • the image encoding device 300 includes a control unit 311, a calculation unit 312, a conversion unit 313, a quantization unit 314, a coding unit 315, an inverse quantization unit 316, an inverse conversion unit 317, and a calculation unit 318.
  • Frame memory 319 and prediction unit 320 As illustrated in FIG. 27, the image encoding device 300 includes a control unit 311, a calculation unit 312, a conversion unit 313, a quantization unit 314, a coding unit 315, an inverse quantization unit 316, an inverse conversion unit 317, and a calculation unit 318.
  • Frame memory 319 and prediction unit 320 As illustrated in FIG. 27, the image encoding device 300 includes a control unit 311, a calculation unit 312, a conversion unit 313, a quantization unit 314, a coding unit 315, an inverse quantization unit 316, an inverse conversion unit 317, and a calculation unit 318.
  • the control unit 311 divides the moving image # 2 into processing unit blocks (CU, PU, conversion block, etc.) based on the block size of the processing unit designated externally or in advance, and corresponds to the divided blocks.
  • the image I is input to the calculation unit 312.
  • the control unit 311 determines encoding parameters (header information Hinfo, prediction mode information Pinfo, conversion information Tinfo, etc.) to be supplied to each block based on, for example, RDO (Rate-Distortion Optimization).
  • the determined encoding parameter is supplied to each block. Specifically, it is as follows.
  • Header information Hinfo is supplied to each block.
  • the prediction mode information Pinfo is supplied to the encoding unit 315 and the prediction unit 320.
  • the transformation information Tinfo is supplied to the encoding unit 315, the transformation unit 313, the quantization unit 314, the inverse quantization unit 316, and the inverse transformation unit 317.
  • the calculation unit 312 receives the image I corresponding to the processing unit block and the predicted image P supplied from the prediction unit 320, and subtracts the predicted image P from the image I as shown in Expression (34) to predict The residual D is derived and supplied to the conversion unit 313.
  • the conversion unit 313 is an inverse process of the inverse conversion unit 317, receives the prediction residual D and the conversion information Tinfo as input, applies the conversion to the prediction residual D based on the conversion information Tinfo, and converts the conversion coefficient Coeff Is supplied to the quantizing unit 314.
  • the quantization unit 314 is an inverse process of the inverse quantization unit 316, receives the transform information Tinfo and the transform coefficient Coeff, scales (quantizes) the transform coefficient Coeff based on the transform information Tinfo, and performs quantization.
  • the transform coefficient that is, the quantized transform coefficient level level is supplied to the encoding unit 315.
  • the encoding unit 315 is an inverse process of the decoding unit 111 (FIG. 10), and encodes parameters (header information, prediction mode information Pinfo, conversion information Tinfo) supplied from the control unit 311 in accordance with the definition of the syntax table. ), And the quantization transform coefficient level level supplied from the quantization unit 314 are converted into syntax values of each syntax element, each syntax value is variable-length encoded (for example, arithmetic code), and a bit string is converted Generate.
  • the encoding unit 315 derives residual information RInfo from the quantized transform coefficient level level, variable-length encodes the residual information RInfo, and generates a bit string. Also, the encoding unit 315 multiplexes the bit string of each syntax element subjected to variable length encoding, generates encoded data # 1, and outputs it.
  • the inverse quantization unit 316 is a processing unit similar to the inverse quantization unit 112 (FIG. 10), and performs the same processing as the inverse quantization unit 112 in the image encoding device 300.
  • the inverse transform unit 317 is a processing unit similar to the inverse transform unit 113 (FIG. 10), and performs the same processing as the inverse transform unit 113 in the image encoding device 300.
  • the frame memory 319 is a processing unit similar to the frame memory 115 (FIG. 10), and performs the same processing as the frame memory 115 in the image encoding device 300.
  • the prediction unit 320 is a processing unit similar to the prediction unit 116 (FIG. 10), and performs the same processing as the prediction unit 116 in the image encoding device 300.
  • FIG. 28 is a block diagram illustrating a main configuration example of the conversion unit 313. As illustrated in FIG. 28, the conversion unit 313 includes a switch 331, a primary conversion unit 332, and a secondary conversion unit 333.
  • the primary conversion unit 332 and the secondary conversion unit 333 are skipped, and the prediction residual D is converted into a conversion coefficient.
  • Coeff is output to the outside (quantization unit 314) of the conversion unit 313.
  • the primary conversion unit 332 receives a primary horizontal conversion specification flag pt_hor_flag, a primary vertical conversion specification flag pt_ver_flag, prediction mode information PInfo, a conversion skip identifier ts_idx, and a prediction residual D.
  • the primary conversion unit 332 selects the prediction mode information PInfo, the conversion skip identifier, the primary horizontal conversion matrix PThor specified by the primary horizontal conversion specification flag pt_hor_flag, and the primary vertical conversion matrix PTver specified by the primary vertical conversion specification flag pt_ver_flag Then, primary horizontal transformation and primary vertical transformation are performed on the prediction residual D using the selected primary transformation matrix in each direction, and the prediction residual D ′ after the primary transformation is derived and output.
  • the secondary conversion unit 333 receives the secondary conversion identifier st_idx, the scan identifier scanIdx indicating the scan method of the transform coefficient, and the transform coefficient Coeff_P after the primary transform, and the transform coefficient Co eff after the secondary transform (also referred to as the secondary transform coefficient Coeff_S). Is derived and output.
  • the primary conversion unit 332 includes a primary conversion selection unit 341, a switch 342, a primary horizontal conversion unit 343, a switch 344, and a primary vertical conversion unit 345.
  • the primary conversion selection unit 341 receives the primary horizontal conversion specification flag pt_hor_flag, the primary vertical conversion specification flag pt_ver_flag, the prediction mode information PInfo, and the conversion skip identifier ts_idx, and receives the prediction mode information PInfo, the conversion skip identifier ts_idx, and the primary horizontal conversion specification flag
  • the primary horizontal transformation matrix PThor designated by pt_hor_flag and the primary vertical transformation matrix PTver designated by the primary vertical transformation designation flag pt_ver_flag are read from the internal memory (not shown) of the primary transformation selection unit 341, The data is output to the horizontal conversion unit 343 and the primary vertical conversion unit 345.
  • the primary transform selection unit 341 selects a transform set TransformSet including orthogonal transforms that are candidates for primary transform in each of the horizontal direction and the vertical direction, as in the case of the inverse primary transform selection unit 131. Since this process is the same as the process of the inverse primary conversion selection unit 131, the description thereof is omitted.
  • the primary transformation selection unit 341 performs orthogonal transformation used for primary transformation in the horizontal direction from the selected transformation set TransformSet.
  • the primary horizontal transformation designation flag pt_hor_flag is selected, and the orthogonal transformation used for the primary transformation in the vertical direction is selected by the primary vertical transformation designation flag pt_ver_flag.
  • the specific processing is to be interpreted by performing the following replacement in the selection processing of the reverse primary horizontal conversion IPThor and the primary vertical conversion IPTver in the reverse primary conversion selection unit 131.
  • the switch 342 receives the prediction residual D and the conversion skip identifier ts_idx.
  • the switch 342 The conversion unit 343 is skipped, and the prediction residual D is output to the switch 344 as the conversion coefficient Coeff_Phor after the primary horizontal conversion.
  • the switch 342 sends the prediction residual D to the primary horizontal conversion unit 343. Output.
  • the primary horizontal transform unit 343 receives the matrix of the prediction residual D and the primary horizontal transform PThor as input for each transform block, performs matrix calculation as shown in the following equation (35), and performs the result of the primary horizontal transform Is output as the conversion coefficient Coeff_Phor.
  • the primary horizontal conversion PThor is a matrix having a conversion base as a column vector.
  • each value of the transform coefficient Coeff_Phor is obtained by performing a right shift operation with a predetermined scaling parameter s3 for each element of the matrix product of the prediction residual D and the primary horizontal transform PThor.
  • the scaling parameter s3 is used to normalize the D / PThor matrix calculation result so that it falls within the bit depth of the intermediate buffer.
  • the value of the scaling parameter s3 is determined from, for example, the bit depth BitDepthbuff of the intermediate buffer and the worst case MaxBitDepth (D ⁇ PThor) of the D ⁇ PThor matrix operation as shown in the following equation (36).
  • the scaling parameter s3 may be a predetermined fixed value on the assumption that the range of D ⁇ PThor is known.
  • a predetermined offset value o3 may be added for each element after the matrix product in order to reduce the clipping error due to the right shift operation.
  • the offset value o3 is expressed by the following equation (37) using the scaling parameter s3.
  • the switch 344 receives the conversion coefficient Coeff_Phor and the conversion skip identifier ts_idx after the primary horizontal conversion.
  • the switch 344 The conversion unit 345 is skipped, and the conversion coefficient Coeff_Phor after the primary horizontal conversion is output to the outside (secondary conversion unit 333) as the conversion coefficient Coeff_P after the primary conversion.
  • the switch 344 sets the conversion coefficient Coeff_Phor after primary horizontal conversion to the primary vertical
  • the data is output to the conversion unit 345.
  • the primary vertical conversion unit 345 receives the matrix of the conversion coefficient Coeff_Phor after the primary horizontal conversion and the primary vertical conversion PTver for each conversion block, performs a matrix operation as shown in the following equation (38), and performs the primary conversion on the result. Output as the later conversion coefficient Coeff_P.
  • the primary vertical conversion PTver is a matrix having a conversion base as a row vector.
  • Coeff_P (PTver ⁇ Coeff_Phor) >> s3 ... (38)
  • each value of the transform coefficient Coeff_P is right-shifted by a predetermined scaling parameter s3 for each element of the matrix product of the transform coefficient Coeff_Phor after the primary horizontal transform and the primary vertical transform matrix PTver. Obtained by calculation.
  • the scaling parameter s4 is used to normalize the PTver ⁇ Coeff_Phor matrix calculation result so as to be within a desired bit depth.
  • the value of the scaling parameter s4 is determined by the following equation (39) from the desired bit depth BitDepthout and the worst case MaxBitDepth (PTver ⁇ Coeff_Phor) of the PTver ⁇ Coeff_Phor matrix operation.
  • the scaling parameter s4 is 0, the value of the desired bit depth is sufficiently large, so that each element value of the PTver ⁇ Coeff_Phor matrix product falls within the desired bit depth without being normalized.
  • a predetermined offset value o4 may be added for each element after the matrix product in order to reduce the clipping error due to the right shift operation.
  • the offset value o3 is expressed by the following equation (40) using the scaling parameter s4.
  • o4 (s4> 0? 1 ⁇ (s4-1): 0) ... (40)
  • the primary conversion unit 332 prevents a reduction in the amount of primary conversion and a decrease in energy compaction for a residual signal for which one-dimensional conversion in the horizontal direction or the vertical direction is desired to be skipped. Improved primary conversion processing.
  • a residual signal having a step edge characteristic in which the continuity of the signal changes rapidly in the horizontal direction one-dimensional conversion in the horizontal direction is skipped and one-dimensional conversion in the vertical direction is performed.
  • non-zero coefficients can be efficiently concentrated in the low frequency component in the vertical direction. That is, since energy compaction can be increased, encoding efficiency can be improved.
  • step S301 the control unit 311 performs the encoding control process, and performs block division, setting of encoding parameters, and the like.
  • the prediction unit 320 performs a prediction process, and generates a prediction image or the like in the optimal prediction mode. For example, in this prediction process, the prediction unit 320 performs intra prediction to generate a prediction image or the like of the optimal intra prediction mode, performs inter prediction to generate a prediction image or the like of the optimal inter prediction mode, and the like.
  • the optimum prediction mode is selected based on the cost function value.
  • step S303 the calculation unit 312 calculates the difference between the input image and the predicted image in the optimal mode selected by the prediction process in step S302. That is, the calculation unit 312 generates a prediction residual D between the input image and the predicted image.
  • the prediction residual D obtained in this way is reduced in data amount compared to the original image data. Therefore, the data amount can be compressed as compared with the case where the image is encoded as it is.
  • step S304 the conversion unit 313 performs a conversion process on the prediction residual D generated by the process in step S303, and derives a conversion coefficient Coeff.
  • This conversion process is the reverse process of the reverse conversion process in step S307, and is the reverse process of the reverse conversion process executed in the above-described image decoding process. Details of the processing in step S304 will be described later.
  • step S305 the quantization unit 314 quantizes the transform coefficient Coeff obtained by the process in step S304 by using the quantization parameter calculated by the control unit 311 and derives the quantized transform coefficient level level. .
  • step S306 the inverse quantization unit 316 inversely quantizes the quantized transform coefficient level level generated by the process in step S305 with a characteristic corresponding to the quantization characteristic in step S305, and derives a transform coefficient Coeff_IQ. .
  • step S307 the inverse transform unit 317 performs inverse transform on the transform coefficient Coeff_IQ obtained by the process in step S306 by a method corresponding to the transform process in step S304, and derives a prediction residual D '.
  • This inverse transformation process is executed in the same manner as the inverse transformation process executed in the above-described image decoding process.
  • step S308 the calculation unit 318 adds the prediction image obtained by the prediction process in step S302 to the prediction residual D ′ derived by the process in step S307, thereby obtaining a locally decoded decoded image. Generate.
  • step S309 the frame memory 319 stores the locally decoded decoded image obtained by the process in step S308.
  • the encoding unit 315 encodes the quantized transform coefficient level level obtained by the process in step S305.
  • the encoding unit 315 encodes a quantized transform coefficient level level, which is information about an image, by arithmetic encoding or the like, and generates encoded data.
  • the encoding unit 315 encodes various encoding parameters (header information Hinfo, prediction mode information Pinfo, conversion information Tinfo). Further, the encoding unit 315 derives the residual information RInfo from the quantized transform coefficient level level and encodes the residual information RInfo.
  • step S311 the encoding unit 315 collects the encoded data of various information generated in this way and outputs the data as a bit stream to the outside of the image encoding device 300.
  • This bit stream is transmitted to the decoding side via a transmission path or a recording medium, for example.
  • the image encoding process ends.
  • processing unit of each of these processes is arbitrary and does not need to be the same. Therefore, the processing of each step can be executed in parallel with the processing of other steps, or the processing order can be changed as appropriate.
  • step S331 determines in step S331 whether the conversion skip identifier ts_idx is 2D_TS (two-dimensional conversion skip mode) or whether the conversion quantization bypass flag transquant_bypass_flag is 1 (true). judge.
  • the switch 331 outputs the prediction residual D as the conversion coefficient Coeff to the outside. That is, the conversion process ends, and the process returns to FIG.
  • step S331 determines the prediction residual D Is output to the primary conversion unit 332. That is, the process proceeds to step S332.
  • the primary conversion selection unit 341 refers to the primary horizontal conversion specification flag pt_hor_flag, the primary vertical conversion specification flag pt_ver_flag, the prediction mode information PInfo, and the conversion skip identifier ts_idx, and determines the primary horizontal conversion PThor and the primary vertical conversion PTver. These are selected and supplied to the primary horizontal conversion unit 343 and the primary vertical conversion unit 345, respectively.
  • step S334 the primary horizontal transform unit 343 receives the matrix of the prediction residual D and the primary horizontal transform PThor for each transform block, performs matrix calculation, and outputs the result as a transform coefficient Coeff_Phor after the primary horizontal transform. .
  • the process of step S334 ends, the process proceeds to step S335.
  • step S333 when it is determined in step S333 that the conversion skip identifier ts_idx is 1D_H_TS, the switch 342 skips the primary horizontal conversion unit 343 and sets the prediction residual D as the conversion coefficient Coeff_Phor after the primary horizontal conversion. Supply to switch 344. That is, the process of step S334 is omitted, and the process proceeds to step S335.
  • step S336 the primary vertical conversion unit 345 performs primary vertical conversion. That is, for each transform block, the primary vertical transform unit 345 receives the matrix of the transform coefficient Coeff_Phor after the primary horizontal transform and the primary vertical transform PTver, performs a matrix operation, and outputs the result as the transform coefficient Coeff_P after the primary transform. To do. When the process of step S336 ends, the process proceeds to step S337.
  • step S335 If it is determined in step S335 that the conversion skip identifier ts_idx is 1D_V_TS, the switch 344 skips input to the primary vertical conversion unit 345 and inputs the conversion coefficient Coeff_Phor after the primary horizontal conversion to the primary vertical conversion unit 345. To be output as the conversion coefficient Coeff_P. That is, the process of step S336 is omitted, and the process proceeds to step S337.
  • step S337 the secondary conversion unit 333 performs secondary conversion on the input primary conversion coefficient Coeff_P based on the secondary conversion identifier st_idx, and derives and outputs the conversion coefficient Coeff.
  • the conversion process ends, and the process returns to FIG.
  • the primary conversion selection unit 341 determines whether or not the adaptive primary conversion flag apt_flag is 1 (true) in step S351. If it is determined that the adaptive primary conversion flag apt_flag is 1 (true), the process proceeds to step S352. In step S352, the primary conversion selection unit 341 selects a conversion set for each of the primary vertical conversion and the primary horizontal conversion based on the prediction mode information PInfo. When the process of step S352 ends, the process proceeds to step S354.
  • step S351 If it is determined in step S351 that the adaptive primary conversion flag apt_flag is 0 (false), the process proceeds to step S353.
  • step S353 the primary conversion selection unit 341 selects a predetermined conversion set. When the process of step S353 ends, the process proceeds to step S354.
  • step S354 the primary transformation selection unit 341 selects an orthogonal transformation to be applied as the primary horizontal transformation PThor with reference to the horizontal transformation set identifier TransformSetH and the primary horizontal transformation designation flag pt_hor_flag.
  • step S355 the inverse primary transformation selection unit 341 selects an orthogonal transformation to be applied as the primary vertical transformation PTver with reference to the vertical transformation set identifier TransformSetV and the primary vertical transformation designation flag pt_ver_flag.
  • step S355 When the process of step S355 is completed, the primary conversion selection process is terminated, and the process returns to FIG.
  • step S333 and step S335 are omitted, and when the conversion skip identifier ts_idx is 1D_H_TS (horizontal one-dimensional conversion skip) in step S331, the unit matrix is selected as the primary horizontal conversion PThor, and the processing of step S334 is performed. May be executed.
  • step S331 when the conversion skip identifier ts_idx is 1D_V_TS (vertical one-dimensional conversion skip), the unit matrix may be selected as the primary vertical conversion PTver, and the process of step S336 may be executed.
  • the conversion unit 313 included in the image encoding device 300 suppresses a reduction in the amount of conversion processing and a reduction in energy compaction for a residual signal to which conversion skip is preferably applied. Inverse transformation processing with improved coding efficiency can be performed. More specifically, the conversion unit 313 suppresses a reduction in the amount of primary conversion and a reduction in energy compaction for a residual signal for which it is desirable to skip one-dimensional conversion in the horizontal direction or the vertical direction. Inverse primary conversion processing with improved coding efficiency can be performed.
  • the conversion skip identifier ts_idx and the primary conversion identifier pt_idx in the image decoding apparatus 100 described above correspond to the reverse process of the decoding process described above. Accordingly, in the image encoding process, as in the case of the image decoding process, the following control is performed based on these parameters. (1) The conversion skip flag ts_flag is extended to the conversion skip identifier ts_idx. (2) When the conversion skip identifier ts_idx is 1D_H_TS, primary horizontal conversion and secondary conversion are skipped. (3) When the conversion skip identifier ts_idx is 1D_V_TS, the primary vertical conversion and the secondary conversion are skipped.
  • the primary horizontal conversion designation flag pt_hor_flag is not used when the conversion skip identifier ts_idx encoded in units of conversion blocks is 1D_H_TS, it is redundant to encode this information. Further, when the conversion skip identifier ts_idx indicates 1D_V_TS, the primary vertical conversion designation flag pt_ver_flag is not used, so that it is redundant to encode this information. Therefore, the following changes are made in order to efficiently encode the primary conversion identifier pt_idx.
  • the primary conversion identifier pt_idx is derived from the primary horizontal conversion specification flag pt_hor_flag and the primary vertical conversion specification flag pt_ver_flag on the encoding side as described in the above equation (20).
  • the conversion skip identifier ts_idx is 1D_H_TS
  • the primary conversion identifier pt_idx is arithmetically encoded as a 1-bit bin string, and is therefore arithmetically encoded as a 2-bit bin string Accordingly, it is possible to reduce the number of bin sequences to be encoded. Therefore, an increase in code amount can be suppressed, and encoding efficiency can be improved.
  • the secondary conversion when the conversion skip identifier ts_idx is 2D_TS, 1D_H_TS, or 1D_V_TS, the secondary conversion is skipped, so that it is redundant to encode the secondary conversion identifier st_idx, which is a control parameter for the secondary conversion. Therefore, when the conversion skip identifier ts_idx is 2D_TS, 1D_H_TS, or 1D_V_TS, the amount of processing related to the encoding of the secondary conversion identifier st_idx is increased by changing the encoding of the secondary conversion identifier st_idx to be omitted. Can be suppressed.
  • FIG. 32 is a block diagram illustrating an exemplary main configuration related to encoding of the conversion skip identifier ts_idx of the encoding unit 315.
  • the encoding unit 315 includes a conversion skip effective flag encoding unit 361, a maximum conversion skip block size encoding unit 362, a conversion quantization bypass flag encoding unit 363, and a conversion skip identifier encoding unit. 364.
  • the conversion skip effective flag encoding unit 361 performs processing related to encoding of the conversion skip effective flag ts_enabled_flag.
  • the maximum conversion skip block size encoding unit 362 performs processing related to encoding of the maximum conversion skip block size MaxTSSize.
  • the transform quantization bypass flag encoding unit 363 performs processing related to encoding of the transform quantization bypass flag transquant_bypass_flag.
  • the conversion skip identifier encoding unit 364 performs processing related to encoding of the conversion skip identifier ts_idx.
  • the conversion skip effective flag encoding unit 361 When the encoding process is started, the conversion skip effective flag encoding unit 361 performs variable length encoding on the conversion skip effective flag ts_enabled_flag included in the header information HInfo in step S371, and generates and outputs a bit string.
  • step S372 the maximum conversion skip block size encoding unit 362 determines whether or not the conversion skip valid flag ts_enabled_flag included in the header information Hinfo is 1 (true). If it is determined that the conversion skip enabled flag ts_enabled_flag is 1 (true), the process proceeds to step S373.
  • step S373 the maximum conversion skip block size encoding unit 362 performs variable-length encoding on the maximum conversion skip block size MaxTSSize (or logarithmic value log2MaxTSSize with 2 as a base) included in the header information HInfo, generates a bit string, and outputs it. To do.
  • step S373 ends, the process proceeds to step S374. If it is determined in step S372 that the conversion skip valid flag ts_enabled_flag is 0 (false), the process in step S373 is omitted, and the process proceeds to step S374.
  • step S374 the transform quantization bypass flag coding unit 363 performs variable length coding on the transform quantization bypass flag transquant_bypass_flag included in the header information HInfo, and generates and outputs a bit string.
  • step S375 the transform skip identifier encoding unit 364 determines whether or not the transform quantization bypass flag transquant_bypass_flag included in the transform information Tinfo is 1 (true). When it is determined that the transform quantization bypass flag transquant_bypass_flag is 1 (true), the coding of the transform skip identifier ts_idx is omitted, the coding process ends, and the process returns to FIG. If it is determined in step S375 that the transform quantization bypass flag transquant_bypass_flag is 0 (false), the process proceeds to step S376.
  • step S376 the conversion skip identifier encoding unit 364 determines whether or not the conversion skip valid flag ts_enabled_flag included in the header information HInfo is 1 (true). When it is determined that the conversion skip valid flag ts_enabled_flag is 0 (false), the encoding of the conversion skip identifier ts_idx is omitted, the encoding process ends, and the process returns to FIG. If it is determined that the conversion skip valid flag ts_enabled_flag is 1 (true), the process proceeds to step S377.
  • TBSize When TBSize is larger than the maximum conversion skip block size MaxTSSize, that is, it is determined that the logical value of the conditional expression is 0, the encoding of the conversion skip identifier ts_idx is omitted, the encoding process ends, and the process is as shown in FIG. Return to. If it is determined that TBSize is equal to or smaller than the maximum conversion skip block size MaxTSSize, that is, the logical value of the conditional expression is 1, the process proceeds to step S378.
  • step S3708 the conversion skip identifier encoding unit 364 performs variable length encoding on the conversion skip identifier ts_idx included in the header information HInfo, and generates and outputs a bit string.
  • step S378 ends, the encoding process ends, and the process returns to FIG.
  • the processing order of each step may be changed or the content of the processing may be changed within a feasible range.
  • the encoding side can adaptively select two-dimensional conversion skip and one-dimensional conversion skip in the horizontal or vertical direction in units of transform blocks. . Therefore, since the residual signal in which the one-dimensional conversion skip is more effective than in the past can be encoded in the one-dimensional conversion skip mode, the encoding efficiency can be improved.
  • FIG. 34 is a block diagram illustrating a main configuration example of the encoding unit 315 regarding encoding of the primary conversion identifier pt_idx.
  • the encoding unit 315 in this case includes a primary conversion valid flag encoding unit 371, an adaptive primary conversion flag encoding unit 372, and a primary conversion identifier encoding unit 373.
  • the primary conversion effective flag encoding unit 371 performs processing related to encoding of the primary conversion effective flag pt_enabled_flag.
  • the adaptive primary conversion flag encoding unit 372 performs processing related to encoding of the primary conversion flag pt_enabled_flag.
  • the primary conversion identifier encoding unit 373 performs processing related to encoding of the primary conversion identifier pt_idx.
  • the primary conversion effective flag encoding unit 371 When the encoding process is started, the primary conversion effective flag encoding unit 371 performs variable length encoding on the primary conversion effective flag pt_enabled_flag included in the header information HInfo in step S391, and generates and outputs a bit string.
  • step S392 the adaptive primary conversion flag encoding unit 372 determines whether or not the primary conversion enable flag pt_enabled_flag included in the header information Hinfo is 1 (true). When it is determined that the primary conversion valid flag pt_enabled_flag is 0, the process for deriving and encoding the primary conversion identifier pt_idx is omitted, the encoding process is terminated, and the process returns to FIG. If it is determined that the primary conversion enable flag pt_enabled_flag is 1, the process proceeds to step S393.
  • step S393 the adaptive primary conversion flag encoding unit 372 performs variable length encoding on the adaptive primary conversion flag apt_flag included in the header information HInfo, and generates and outputs a bit string.
  • step S394 the adaptive primary conversion flag encoding unit 372 determines whether or not the adaptive primary conversion flag apt_flag is 1 (true). When it is determined that the adaptive primary conversion flag apt_flag is 0 (false), the processing relating to the derivation and encoding of the primary conversion identifier pt_idx is omitted, the encoding processing is terminated, and the processing returns to FIG. If it is determined that the adaptive primary conversion flag apt_flag is 1 (true), the process proceeds to step S395.
  • step S395 the primary transform identifier encoding unit 373 determines whether or not the transform quantization bypass flag transquant_bypass_flag is 1 (true). When it is determined that the transform quantization bypass flag transquant_bypass_flag is 1 (true), the processing related to the derivation and encoding of the primary transform identifier pt_idx is omitted, the encoding processing ends, and the processing returns to FIG. If it is determined that the transform quantization bypass flag transquant_bypass_flag is 0 (false), the process proceeds to step S396.
  • step S396 the primary conversion identifier encoding unit 373 determines whether or not the conversion skip identifier ts_idx is 2D_TS (two-dimensional conversion skip). When it is determined that the conversion skip identifier ts_idx is 2D_TS, the process for deriving and encoding the primary conversion identifier pt_idx is omitted, the encoding process ends, and the process returns to FIG. If it is determined that the conversion skip identifier ts_idx is other than 2D_TS, the process proceeds to step S397.
  • 2D_TS two-dimensional conversion skip
  • step S398 the primary conversion identifier encoding unit 398 determines whether or not the conversion block to be encoded is a luminance component. If it is determined that it is not a luminance component, the process for deriving and encoding the primary conversion identifier pt_idx is omitted, the encoding process is terminated, and the process returns to FIG. If it is determined that the component is a luminance component, the process proceeds to step S399.
  • the process of step S399 ends, the process proceeds to step S400.
  • ptNumSigTH a predetermined threshold value
  • the process for deriving and encoding the primary conversion identifier pt_idx is omitted, the encoding process ends, and the process returns to FIG. If it is determined that the total number numSig of the non-zero transform coefficients is equal to or greater than the predetermined threshold value ptNumSigTH, the process proceeds to step S401.
  • step S401 the primary conversion identifier encoding unit 373 derives the primary conversion identifier pt_idx with reference to the conversion skip identifier ts_idx, the primary horizontal conversion specification flag pt_hor_flag, and the primary vertical conversion specification flag pt_ver_flag. Derivation of details of the primary conversion identifier pt_idx will be described later.
  • step S402 the primary conversion identifier encoding unit 373 performs variable length encoding on the primary conversion identifier pt_idx included in the header information HInfo, and generates and outputs a bit string.
  • the conversion skip identifier ts_idx is 1D_H_TS or 1D_V_TS
  • the primary conversion identifier pt_idx can be arithmetically encoded as a 1-bit bin string, it is encoded more than when encoded as a 2-bit bin string.
  • the target bin sequence can be reduced. Therefore, it is possible to reduce the processing amount related to the encoding of the primary conversion identifier pt_idx. In addition, since the amount of codes can be reduced, encoding efficiency can be improved.
  • step S421 the primary conversion identifier encoding unit 373 determines whether or not the conversion skip identifier ts_idx is NO_TS (not conversion skip). If it is determined that the conversion skip identifier ts_idx is NO_TS, the process proceeds to step S422.
  • step S422 the primary conversion identifier encoding unit 373 derives the primary conversion identifier pt_idx from the primary horizontal conversion specification flag pt_hor_flag and the primary vertical conversion flag pt_ver_flag by the above equation (20).
  • the primary conversion identifier derivation process ends, and the process returns to FIG.
  • step S421 If it is determined in step S421 that the conversion skip identifier ts_idx is other than NO_TS, the process proceeds to step S423.
  • step S423 the primary conversion identifier encoding unit 373 determines whether or not the conversion skip identifier ts_idx is 2D_TS (two-dimensional conversion skip). When it is determined that the conversion skip identifier ts_idx is 2D_TS, the primary conversion identifier derivation process ends, and the process returns to FIG.
  • step S423 If it is determined in step S423 that the conversion skip identifier ts_idx is other than 2D_TS, the process proceeds to step S424.
  • step S424 the primary conversion identifier encoding unit 373 determines whether or not the conversion skip identifier ts_idx is 1D_H_TS (one-dimensional conversion skip in the horizontal direction). If it is determined that the conversion skip identifier ts_idx is 1D_H_TS, the process proceeds to step S425.
  • step S425 the primary conversion identifier derivation process ends, and the process returns to FIG.
  • step S424 If it is determined in step S424 that the conversion skip identifier ts_idx is other than 1D_H_TS, the process proceeds to step S426.
  • step S426 the primary conversion identifier derivation process ends, and the process returns to FIG.
  • this processing may be performed within a possible range, and the processing order of each step may be changed or the processing content may be changed.
  • FIG. 37 is a block diagram illustrating a main configuration example of the encoding unit 315 regarding decoding of the secondary conversion identifier st_idx.
  • the encoding unit 315 in this case includes a secondary conversion valid flag encoding unit 381 and a secondary conversion identifier encoding unit 382.
  • the secondary conversion effective flag encoding unit 381 performs processing related to encoding of the secondary conversion effective flag st_enabled_flag.
  • the secondary conversion identifier encoding unit 382 performs processing related to encoding of the secondary conversion identifier st_idx.
  • the secondary conversion effective flag encoding unit 381 When the encoding process is started, the secondary conversion effective flag encoding unit 381 performs variable length encoding on the secondary conversion effective flag st_enabled_flag included in the header information HInfo in step S441, and generates and outputs a bit string.
  • step S442 the secondary conversion identifier encoding unit 382 determines whether or not the secondary conversion enable flag st_enabled_flag included in the header information Hinfo is 1 (true). When it is determined that the secondary conversion valid flag st_enabled_flag is 0 (false), the encoding process ends, and the process returns to FIG.
  • step S442 If it is determined in step S442 that the secondary conversion valid flag st_enabled_flag is 1 (true), the process proceeds to step S443.
  • step S443 the secondary transform identifier encoding unit 382 determines whether or not the transform quantization bypass flag transquant_bypass_flag is 1 (true). When it is determined that the transform quantization bypass flag transquant_bypass_flag is 1 (true), the encoding process ends, and the process returns to FIG. 29. If it is determined that the transform quantization bypass flag transquant_bypass_flag is 0 (false), the process proceeds to step S444.
  • step S444 the secondary conversion identifier encoding unit 382 determines whether or not the conversion skip identifier ts_idx is NO_TS (no conversion skip is performed). When it is determined that the conversion skip identifier ts_idx is other than NO_TS, the encoding process ends, and the process returns to FIG. If it is determined that the conversion skip identifier ts_idx is NO_TS, the process proceeds to step S445.
  • a predetermined threshold TH stNumSigTH
  • step S447 the secondary conversion identifier encoding unit 382 performs variable length encoding on the secondary conversion identifier st_idx included in the header information HInfo, and generates and outputs a bit string.
  • step S447 When the process of step S447 is finished, the encoding process is finished, and the process returns to FIG.
  • the secondary conversion control parameter is the secondary conversion identifier st_idx, but it may be the secondary conversion flag st_flag.
  • the primary conversion identifier pt_idx is derived from the primary horizontal conversion specification flag pt_hor_flag and the primary vertical conversion specification flag pt_ver_flag.
  • the present invention is not limited to this.
  • the primary horizontal conversion specification flag pt_hor_flag and the primary vertical conversion specification flag pt_ver_flag may be encoded.
  • FIG. 39 is a block diagram illustrating a main configuration example of encoding of the primary horizontal conversion designation flag pt_hor_flag and the primary vertical conversion designation flag pt_ver_flag in the encoding unit 315.
  • the encoding unit 315 in this case includes a primary conversion valid flag encoding unit 371, an adaptive primary conversion flag encoding unit 372, a primary horizontal conversion specification flag encoding unit 391, and a primary vertical conversion specification.
  • a flag encoding unit 392 is included.
  • the primary horizontal conversion designation flag encoding unit 391 performs processing related to encoding of the primary horizontal conversion specification flag pt_hor_flag.
  • the primary vertical conversion designation flag encoding unit 392 performs processing related to encoding of the primary vertical conversion specification flag pt_ver_flag.
  • the flag pt_hor_flag is variable-length encoded to generate a bit string.
  • the primary horizontal conversion designation flag encoding unit 391 omits the encoding of the primary horizontal conversion designation flag pt_hor_flag.
  • the switch 342 of the primary conversion unit 332 supplies the prediction residual D to the switch 344 when the primary horizontal conversion is skipped. Scaling may be performed.
  • the switch 344 of the primary conversion unit 332 uses the conversion coefficient Coeff_Phor after the primary horizontal conversion as the conversion coefficient Coeff_P after the primary conversion as an external (secondary conversion unit). 333), the scaling for quantization may be performed at that time.
  • FIG. 40 is a block diagram illustrating a main configuration example of the conversion unit 313 in that case.
  • the conversion unit 313 also has a configuration basically similar to that in FIG.
  • the primary conversion unit 332 includes a scaling unit 401 and a scaling unit 402.
  • the switch 342 supplies the conversion coefficient D to the scaling unit 401 when skipping the primary horizontal conversion.
  • the scaling unit 401 performs scaling on the conversion coefficient D supplied from the switch 342. For example, the scaling unit 401 performs a bit shift operation of N (N is a natural number) bits for normalizing the supplied transform coefficients so as to have the same norm as when the primary horizontal transform is performed.
  • the scaling unit 401 supplies the scaled conversion coefficient to the switch 344.
  • the switch 344 supplies the conversion coefficient Coeff_Phor after the primary horizontal conversion to the scaling unit 402 as the prediction residual D ′. Similar to the scaling unit 401, the scaling unit 402 performs scaling on the transform coefficient Coeff_Phor after primary horizontal conversion supplied from the switch 344. For example, the scaling unit 402 performs a bit shift operation of N (N is a natural number) bits for normalizing the supplied transform coefficients so as to have the same norm as that when the primary vertical transform is performed. The scaling unit 402 outputs the scaled prediction residual D ′ to the outside.
  • N is a natural number
  • the dynamic range width of the transform coefficient can be suppressed within a predetermined range, so that an increase in decoding load can be suppressed.
  • the data units in which the information related to the image and the information related to the encoding / decoding of the image described above are set are arbitrary, and are not limited to the above-described examples.
  • these pieces of information may be set for each TU, TB, PU, PB, CU, LCU, sub-block, block, tile, slice, picture, sequence, or component.
  • Data in data units may be targeted.
  • this data unit is set for each piece of information. That is, all information need not be set (or targeted) for each identical data unit.
  • the storage location of these pieces of information is arbitrary, and the information may be stored in the above-described data unit header, parameter set, or the like. Moreover, you may make it store in multiple places.
  • control information related to the present technology described in each of the above embodiments may be transmitted from the encoding side to the decoding side. For example, you may make it transmit the control information (for example, enabled_flag) which controls whether application (or prohibition) of applying this technique mentioned above is permitted. Further, for example, control information designating an upper limit or a lower limit of the block size permitted (or prohibited) to apply the present technology described above, or both may be transmitted.
  • control information for example, enabled_flag
  • the present technology can be applied to arbitrary image encoding / decoding that performs primary transformation and secondary transformation (inverse secondary transformation and inverse primary transformation). That is, specifications such as transformation (inverse transformation), quantization (inverse quantization), encoding (decoding), and prediction are arbitrary and are not limited to the above-described example. For example, in conversion (inverse conversion), (inverse) conversion other than (inverse) primary conversion and (inverse) secondary conversion (that is, three or more (inverse) conversion) may be performed.
  • the encoding (decoding) may be a reversible method or an irreversible method. Further, quantization (inverse quantization), prediction, and the like may be omitted. Further, processing not described above such as filter processing may be performed.
  • the system, device, processing unit, etc. to which this technology is applied can be used in any field such as traffic, medical care, crime prevention, agriculture, livestock industry, mining, beauty, factory, home appliance, weather, nature monitoring, etc. .
  • the present technology can also be applied to a system or device that transmits an image used for viewing.
  • the present technology can be applied to a system or a device that is used for transportation.
  • the present technology can also be applied to a system or device used for security.
  • the present technology can be applied to a system or a device provided for sports.
  • the present technology can also be applied to a system or a device provided for agriculture.
  • the present technology can also be applied to a system or device used for livestock industry.
  • the present technology can also be applied to systems and devices that monitor natural conditions such as volcanoes, forests, and oceans.
  • the present technology can be applied to, for example, a weather observation system or a weather observation apparatus that observes weather, temperature, humidity, wind speed, sunshine duration, and the like.
  • the present technology can also be applied to systems and devices for observing the ecology of wildlife such as birds, fish, reptiles, amphibians, mammals, insects, and plants.
  • Hierarchical image encoding (scalable encoding) that performs encoding / decoding of hierarchical images that are layered (hierarchized) so as to have a scalability function with respect to predetermined parameters. It can be applied to a decoding system. In this case, the present technology may be applied in encoding / decoding of each layer (layer).
  • ⁇ Computer> The series of processes described above can be executed by hardware or can be executed by software.
  • a program constituting the software is installed in the computer.
  • the computer includes, for example, a general-purpose personal computer that can execute various functions by installing a computer incorporated in dedicated hardware and various programs.
  • FIG. 41 is a block diagram showing an example of a hardware configuration of a computer that executes the above-described series of processing by a program.
  • a CPU Central Processing Unit
  • ROM Read Only Memory
  • RAM Random Access Memory
  • An input / output interface 810 is also connected to the bus 804.
  • An input unit 811, an output unit 812, a storage unit 813, a communication unit 814, and a drive 815 are connected to the input / output interface 810.
  • the input unit 811 includes, for example, a keyboard, a mouse, a microphone, a touch panel, an input terminal, and the like.
  • the output unit 812 includes, for example, a display, a speaker, an output terminal, and the like.
  • the storage unit 813 includes, for example, a hard disk, a RAM disk, a nonvolatile memory, and the like.
  • the communication unit 814 includes a network interface, for example.
  • the drive 815 drives a removable medium 821 such as a magnetic disk, an optical disk, a magneto-optical disk, or a semiconductor memory.
  • the CPU 801 loads the program stored in the storage unit 813 into the RAM 803 via the input / output interface 810 and the bus 804 and executes the program, for example. Is performed.
  • the RAM 803 also appropriately stores data necessary for the CPU 801 to execute various processes.
  • the program executed by the computer (CPU 801) can be recorded and applied to, for example, a removable medium 821 as a package medium or the like.
  • the program can be installed in the storage unit 813 via the input / output interface 810 by attaching the removable medium 821 to the drive 815.
  • This program can also be provided via a wired or wireless transmission medium such as a local area network, the Internet, or digital satellite broadcasting. In that case, the program can be received by the communication unit 814 and installed in the storage unit 813.
  • a wired or wireless transmission medium such as a local area network, the Internet, or digital satellite broadcasting.
  • the program can be received by the communication unit 814 and installed in the storage unit 813.
  • this program can be installed in advance in the ROM 802 or the storage unit 813.
  • the image encoding device 300 and the image decoding device 100 are, for example, a transmitter and a receiver in cable broadcasting such as satellite broadcasting and cable TV, distribution on the Internet, and distribution to terminals by cellular communication.
  • the present invention can be applied to various electronic devices such as a recording apparatus that records an image on a recording medium or a medium such as an optical disk, a magnetic disk, and a flash memory, and a reproducing apparatus that reproduces an image from these storage media.
  • FIG. 42 illustrates an example of a schematic configuration of a television device to which the above-described embodiment is applied.
  • the television apparatus 900 includes an antenna 901, a tuner 902, a demultiplexer 903, a decoder 904, a video signal processing unit 905, a display unit 906, an audio signal processing unit 907, a speaker 908, an external interface (I / F) unit 909, and a control unit. 910, a user interface (I / F) unit 911, and a bus 912.
  • Tuner 902 extracts a signal of a desired channel from a broadcast signal received via antenna 901, and demodulates the extracted signal. Then, the tuner 902 outputs the encoded bit stream obtained by the demodulation to the demultiplexer 903. That is, the tuner 902 has a role as a transmission unit in the television device 900 that receives an encoded stream in which an image is encoded.
  • the demultiplexer 903 separates the video stream and audio stream of the viewing target program from the encoded bit stream, and outputs each separated stream to the decoder 904. Further, the demultiplexer 903 extracts auxiliary data such as EPG (Electronic Program Guide) from the encoded bit stream, and supplies the extracted data to the control unit 910. Note that the demultiplexer 903 may perform descrambling when the encoded bit stream is scrambled.
  • EPG Electronic Program Guide
  • the decoder 904 decodes the video stream and audio stream input from the demultiplexer 903. Then, the decoder 904 outputs the video data generated by the decoding process to the video signal processing unit 905. In addition, the decoder 904 outputs audio data generated by the decoding process to the audio signal processing unit 907.
  • the video signal processing unit 905 reproduces the video data input from the decoder 904 and causes the display unit 906 to display the video.
  • the video signal processing unit 905 may cause the display unit 906 to display an application screen supplied via a network.
  • the video signal processing unit 905 may perform additional processing such as noise removal on the video data according to the setting.
  • the video signal processing unit 905 may generate a GUI (Graphical User Interface) image such as a menu, a button, or a cursor, and superimpose the generated image on the output image.
  • GUI Graphic User Interface
  • the display unit 906 is driven by a drive signal supplied from the video signal processing unit 905, and displays an image on a video screen of a display device (for example, a liquid crystal display, a plasma display, or an OELD (Organic Electro Electronum Display) (organic EL display)). Or an image is displayed.
  • a display device for example, a liquid crystal display, a plasma display, or an OELD (Organic Electro Electronum Display) (organic EL display)). Or an image is displayed.
  • the audio signal processing unit 907 performs reproduction processing such as D / A conversion and amplification on the audio data input from the decoder 904, and outputs audio from the speaker 908.
  • the audio signal processing unit 907 may perform additional processing such as noise removal on the audio data.
  • the external interface unit 909 is an interface for connecting the television device 900 to an external device or a network.
  • a video stream or an audio stream received via the external interface unit 909 may be decoded by the decoder 904. That is, the external interface unit 909 also has a role as a transmission unit in the television apparatus 900 that receives an encoded stream in which an image is encoded.
  • the control unit 910 includes a processor such as a CPU and memories such as a RAM and a ROM.
  • the memory stores a program executed by the CPU, program data, EPG data, data acquired via a network, and the like.
  • the program stored in the memory is read and executed by the CPU when the television apparatus 900 is activated.
  • the CPU controls the operation of the television device 900 according to an operation signal input from the user interface unit 911 by executing the program.
  • the user interface unit 911 is connected to the control unit 910.
  • the user interface unit 911 includes, for example, buttons and switches for the user to operate the television device 900, a remote control signal receiving unit, and the like.
  • the user interface unit 911 detects an operation by the user via these components, generates an operation signal, and outputs the generated operation signal to the control unit 910.
  • the bus 912 connects the tuner 902, the demultiplexer 903, the decoder 904, the video signal processing unit 905, the audio signal processing unit 907, the external interface unit 909, and the control unit 910 to each other.
  • the decoder 904 may have the function of the image decoding apparatus 100 described above. That is, the decoder 904 may decode the encoded data by the method described in each of the above embodiments. In this way, the television device 900 can obtain the same effects as those of the embodiments described above with reference to FIGS.
  • the video signal processing unit 905 encodes image data supplied from the decoder 904, for example, and the obtained encoded data is transmitted via the external interface unit 909. You may enable it to output to the exterior of the television apparatus 900.
  • FIG. The video signal processing unit 905 may have the function of the image encoding device 300 described above. That is, the video signal processing unit 905 may encode the image data supplied from the decoder 904 by the method described in the above embodiments. In this way, the television device 900 can obtain the same effects as those of the embodiments described above with reference to FIGS.
  • FIG. 43 shows an example of a schematic configuration of a mobile phone to which the above-described embodiment is applied.
  • a cellular phone 920 includes an antenna 921, a communication unit 922, an audio codec 923, a speaker 924, a microphone 925, a camera unit 926, an image processing unit 927, a demultiplexing unit 928, a recording / reproducing unit 929, a display unit 930, a control unit 931, an operation A portion 932 and a bus 933.
  • the antenna 921 is connected to the communication unit 922.
  • the speaker 924 and the microphone 925 are connected to the audio codec 923.
  • the operation unit 932 is connected to the control unit 931.
  • the bus 933 connects the communication unit 922, the audio codec 923, the camera unit 926, the image processing unit 927, the demultiplexing unit 928, the recording / reproducing unit 929, the display unit 930, and the control unit 931 to each other.
  • the mobile phone 920 has various operation modes including a voice call mode, a data communication mode, a shooting mode, and a videophone mode, and is used for sending and receiving voice signals, sending and receiving e-mail or image data, taking images, and recording data. Perform the action.
  • the analog voice signal generated by the microphone 925 is supplied to the voice codec 923.
  • the audio codec 923 converts an analog audio signal into audio data, A / D converts the compressed audio data, and compresses it. Then, the audio codec 923 outputs the compressed audio data to the communication unit 922.
  • the communication unit 922 encodes and modulates the audio data and generates a transmission signal. Then, the communication unit 922 transmits the generated transmission signal to a base station (not shown) via the antenna 921. In addition, the communication unit 922 amplifies a radio signal received via the antenna 921 and performs frequency conversion to acquire a received signal.
  • the communication unit 922 demodulates and decodes the received signal to generate audio data, and outputs the generated audio data to the audio codec 923.
  • the audio codec 923 decompresses the audio data and performs D / A conversion to generate an analog audio signal. Then, the audio codec 923 supplies the generated audio signal to the speaker 924 to output audio.
  • the control unit 931 generates character data constituting the e-mail in response to an operation by the user via the operation unit 932.
  • the control unit 931 causes the display unit 930 to display characters.
  • the control unit 931 generates e-mail data in response to a transmission instruction from the user via the operation unit 932, and outputs the generated e-mail data to the communication unit 922.
  • the communication unit 922 encodes and modulates email data and generates a transmission signal. Then, the communication unit 922 transmits the generated transmission signal to a base station (not shown) via the antenna 921.
  • the communication unit 922 amplifies a radio signal received via the antenna 921 and performs frequency conversion to acquire a received signal.
  • the communication unit 922 demodulates and decodes the received signal to restore the email data, and outputs the restored email data to the control unit 931.
  • the control unit 931 displays the content of the electronic mail on the display unit 930, supplies the electronic mail data to the recording / reproducing unit 929, and writes the data in the storage medium.
  • the recording / reproducing unit 929 has an arbitrary readable / writable storage medium.
  • the storage medium may be a built-in storage medium such as a RAM or a flash memory, or an externally mounted type such as a hard disk, magnetic disk, magneto-optical disk, optical disk, USB (Universal Serial Bus) memory, or memory card. It may be a storage medium.
  • the camera unit 926 images a subject to generate image data, and outputs the generated image data to the image processing unit 927.
  • the image processing unit 927 encodes the image data input from the camera unit 926, supplies the encoded stream to the recording / reproducing unit 929, and writes the encoded stream in the storage medium.
  • the recording / reproducing unit 929 reads out the encoded stream recorded in the storage medium and outputs the encoded stream to the image processing unit 927.
  • the image processing unit 927 decodes the encoded stream input from the recording / reproducing unit 929, supplies the image data to the display unit 930, and displays the image.
  • the demultiplexing unit 928 multiplexes the video stream encoded by the image processing unit 927 and the audio stream input from the audio codec 923, and the multiplexed stream is the communication unit 922. Output to.
  • the communication unit 922 encodes and modulates the stream and generates a transmission signal. Then, the communication unit 922 transmits the generated transmission signal to a base station (not shown) via the antenna 921.
  • the communication unit 922 amplifies a radio signal received via the antenna 921 and performs frequency conversion to acquire a received signal.
  • These transmission signal and reception signal may include an encoded bit stream.
  • the communication unit 922 demodulates and decodes the received signal to restore the stream, and outputs the restored stream to the demultiplexing unit 928.
  • the demultiplexing unit 928 separates the video stream and the audio stream from the input stream, and outputs the video stream to the image processing unit 927 and the audio stream to the audio codec 923.
  • the image processing unit 927 decodes the video stream and generates video data.
  • the video data is supplied to the display unit 930, and a series of images is displayed on the display unit 930.
  • the audio codec 923 decompresses the audio stream and performs D / A conversion to generate an analog audio signal. Then, the audio codec 923 supplies the generated audio signal to the speaker 924 to output audio.
  • the image processing unit 927 may have the function of the image encoding device 300 described above. That is, the image processing unit 927 may encode the image data by the method described in each of the above embodiments.
  • the cellular phone 920 can obtain the same effects as those of the embodiments described above with reference to FIGS.
  • the image processing unit 927 may have the function of the image decoding device 100 described above. That is, the image processing unit 927 may decode the encoded data by the method described in each of the above embodiments.
  • the cellular phone 920 can obtain the same effects as those of the embodiments described above with reference to FIGS.
  • FIG. 44 shows an example of a schematic configuration of a recording / reproducing apparatus to which the above-described embodiment is applied.
  • the recording / reproducing device 940 encodes audio data and video data of a received broadcast program and records the encoded data on a recording medium.
  • the recording / reproducing device 940 may encode audio data and video data acquired from another device and record them on a recording medium, for example.
  • the recording / reproducing device 940 reproduces data recorded on the recording medium on a monitor and a speaker, for example, in accordance with a user instruction. At this time, the recording / reproducing device 940 decodes the audio data and the video data.
  • the recording / reproducing apparatus 940 includes a tuner 941, an external interface (I / F) unit 942, an encoder 943, an HDD (Hard Disk Drive) unit 944, a disk drive 945, a selector 946, a decoder 947, and an OSD (On-Screen Display) unit 948.
  • Tuner 941 extracts a signal of a desired channel from a broadcast signal received via an antenna (not shown), and demodulates the extracted signal. Then, the tuner 941 outputs the encoded bit stream obtained by the demodulation to the selector 946. That is, the tuner 941 serves as a transmission unit in the recording / reproducing apparatus 940.
  • the external interface unit 942 is an interface for connecting the recording / reproducing device 940 to an external device or a network.
  • the external interface unit 942 may be, for example, an IEEE (Institute of Electrical and Electronic Engineers) 1394 interface, a network interface, a USB interface, or a flash memory interface.
  • IEEE Institute of Electrical and Electronic Engineers 1394 interface
  • a network interface e.g., a USB interface
  • a flash memory interface e.g., a flash memory interface.
  • video data and audio data received via the external interface unit 942 are input to the encoder 943. That is, the external interface unit 942 has a role as a transmission unit in the recording / reproducing apparatus 940.
  • the encoder 943 encodes video data and audio data when the video data and audio data input from the external interface unit 942 are not encoded. Then, the encoder 943 outputs the encoded bit stream to the selector 946.
  • the HDD unit 944 records an encoded bit stream, various programs, and other data in which content data such as video and audio is compressed in an internal hard disk. Further, the HDD unit 944 reads out these data from the hard disk when reproducing video and audio.
  • the disk drive 945 performs recording and reading of data to and from the mounted recording medium.
  • Recording media mounted on the disk drive 945 are, for example, DVD (Digital Versatile Disc) discs (DVD-Video, DVD-RAM (DVD -Random Access Memory), DVD-R (DVD-Recordable), DVD-RW (DVD-). Rewritable), DVD + R (DVD + Recordable), DVD + RW (DVD + Rewritable), etc.) or Blu-ray (registered trademark) disc.
  • the selector 946 selects an encoded bit stream input from the tuner 941 or the encoder 943 when recording video and audio, and outputs the selected encoded bit stream to the HDD 944 or the disk drive 945. In addition, the selector 946 outputs the encoded bit stream input from the HDD 944 or the disk drive 945 to the decoder 947 during video and audio reproduction.
  • the decoder 947 decodes the encoded bit stream and generates video data and audio data. Then, the decoder 947 outputs the generated video data to the OSD unit 948. The decoder 947 outputs the generated audio data to an external speaker.
  • the OSD unit 948 reproduces the video data input from the decoder 947 and displays the video. Further, the OSD unit 948 may superimpose a GUI image such as a menu, a button, or a cursor on the video to be displayed.
  • a GUI image such as a menu, a button, or a cursor
  • the control unit 949 includes a processor such as a CPU and memories such as a RAM and a ROM.
  • the memory stores a program executed by the CPU, program data, and the like.
  • the program stored in the memory is read and executed by the CPU when the recording / reproducing apparatus 940 is activated, for example.
  • the CPU executes the program to control the operation of the recording / reproducing device 940 in accordance with, for example, an operation signal input from the user interface unit 950.
  • the user interface unit 950 is connected to the control unit 949.
  • the user interface unit 950 includes, for example, buttons and switches for the user to operate the recording / reproducing device 940, a remote control signal receiving unit, and the like.
  • the user interface unit 950 detects an operation by the user via these components, generates an operation signal, and outputs the generated operation signal to the control unit 949.
  • the encoder 943 may have the function of the image encoding apparatus 300 described above. That is, the encoder 943 may encode the image data by the method described in each of the above embodiments. By doing in this way, the recording / reproducing apparatus 940 can acquire the effect similar to each embodiment mentioned above with reference to FIG. 1 thru
  • the decoder 947 may have the function of the image decoding apparatus 100 described above. That is, the decoder 947 may decode the encoded data by the method described in each of the above embodiments. By doing in this way, the recording / reproducing apparatus 940 can acquire the effect similar to each embodiment mentioned above with reference to FIG. 1 thru
  • FIG. 45 illustrates an example of a schematic configuration of an imaging apparatus to which the above-described embodiment is applied.
  • the imaging device 960 images a subject to generate an image, encodes the image data, and records it on a recording medium.
  • the imaging device 960 includes an optical block 961, an imaging unit 962, a signal processing unit 963, an image processing unit 964, a display unit 965, an external interface (I / F) unit 966, a memory unit 967, a media drive 968, an OSD unit 969, and a control.
  • the optical block 961 is connected to the imaging unit 962.
  • the imaging unit 962 is connected to the signal processing unit 963.
  • the display unit 965 is connected to the image processing unit 964.
  • the user interface unit 971 is connected to the control unit 970.
  • the bus 972 connects the image processing unit 964, the external interface unit 966, the memory unit 967, the media drive 968, the OSD unit 969, and the control unit 970 to each other.
  • the optical block 961 includes a focus lens and a diaphragm mechanism.
  • the optical block 961 forms an optical image of the subject on the imaging surface of the imaging unit 962.
  • the imaging unit 962 includes an image sensor such as a CCD (Charge-Coupled Device) or a CMOS (Complementary Metal-Oxide Semiconductor), and converts an optical image formed on the imaging surface into an image signal as an electrical signal by photoelectric conversion. Then, the imaging unit 962 outputs the image signal to the signal processing unit 963.
  • CCD Charge-Coupled Device
  • CMOS Complementary Metal-Oxide Semiconductor
  • the signal processing unit 963 performs various camera signal processing such as knee correction, gamma correction, and color correction on the image signal input from the imaging unit 962.
  • the signal processing unit 963 outputs the image data after the camera signal processing to the image processing unit 964.
  • the image processing unit 964 encodes the image data input from the signal processing unit 963 and generates encoded data. Then, the image processing unit 964 outputs the generated encoded data to the external interface unit 966 or the media drive 968. In addition, the image processing unit 964 decodes encoded data input from the external interface unit 966 or the media drive 968 to generate image data. Then, the image processing unit 964 outputs the generated image data to the display unit 965. In addition, the image processing unit 964 may display the image by outputting the image data input from the signal processing unit 963 to the display unit 965. Further, the image processing unit 964 may superimpose display data acquired from the OSD unit 969 on an image output to the display unit 965.
  • the OSD unit 969 generates a GUI image such as a menu, a button, or a cursor, and outputs the generated image to the image processing unit 964.
  • the external interface unit 966 is configured as a USB input / output terminal, for example.
  • the external interface unit 966 connects the imaging device 960 and a printer, for example, when printing an image.
  • a drive is connected to the external interface unit 966 as necessary.
  • a removable medium such as a magnetic disk or an optical disk is attached to the drive, and a program read from the removable medium can be installed in the imaging device 960.
  • the external interface unit 966 may be configured as a network interface connected to a network such as a LAN or the Internet. That is, the external interface unit 966 has a role as a transmission unit in the imaging device 960.
  • the recording medium mounted on the media drive 968 may be any readable / writable removable medium such as a magnetic disk, a magneto-optical disk, an optical disk, or a semiconductor memory.
  • a recording medium may be fixedly mounted on the media drive 968, and a non-portable storage unit such as an internal hard disk drive or an SSD (Solid State Drive) may be configured.
  • the control unit 970 includes a processor such as a CPU and memories such as a RAM and a ROM.
  • the memory stores a program executed by the CPU, program data, and the like.
  • the program stored in the memory is read and executed by the CPU when the imaging device 960 is activated, for example.
  • the CPU controls the operation of the imaging device 960 according to an operation signal input from the user interface unit 971 by executing the program.
  • the user interface unit 971 is connected to the control unit 970.
  • the user interface unit 971 includes, for example, buttons and switches for the user to operate the imaging device 960.
  • the user interface unit 971 detects an operation by the user via these components, generates an operation signal, and outputs the generated operation signal to the control unit 970.
  • the image processing unit 964 may have the function of the image encoding device 300 described above. That is, the image processing unit 964 may encode the image data by the method described in each of the above embodiments. By doing in this way, the imaging device 960 can obtain the same effect as each embodiment described above with reference to FIGS. 1 to 40.
  • the image processing unit 964 may have the function of the image decoding device 100 described above. That is, the image processing unit 964 may decode the encoded data by the method described in each of the above embodiments. By doing in this way, the imaging device 960 can obtain the same effect as each embodiment described above with reference to FIGS. 1 to 40.
  • the present technology may be any configuration installed in an arbitrary device or a device constituting the system, for example, a processor as a system LSI (Large Scale Integration), a module using a plurality of processors, a unit using a plurality of modules, etc. It can also be implemented as a set in which other functions are further added to the unit (that is, a partial configuration of the apparatus).
  • FIG. 46 illustrates an example of a schematic configuration of a video set to which the present technology is applied.
  • the video set 1300 shown in FIG. 46 has such a multi-functional configuration, and a device having a function relating to image encoding and decoding (either or both of them) can be used for the function. It is a combination of devices having other related functions.
  • the video set 1300 includes a module group such as a video module 1311, an external memory 1312, a power management module 1313, and a front-end module 1314, and an associated module 1321, a camera 1322, a sensor 1323, and the like. And a device having a function.
  • a module is a component that has several functions that are related to each other and that has a coherent function.
  • the specific physical configuration is arbitrary. For example, a plurality of processors each having a function, electronic circuit elements such as resistors and capacitors, and other devices arranged on a wiring board or the like can be considered. . It is also possible to combine the module with another module, a processor, or the like to form a new module.
  • the video module 1311 is a combination of configurations having functions related to image processing, and includes an application processor, a video processor, a broadband modem 1333, and an RF module 1334.
  • a processor is a configuration in which a configuration having a predetermined function is integrated on a semiconductor chip by a SoC (System On a Chip), and for example, there is a system LSI (Large Scale Integration).
  • the configuration having the predetermined function may be a logic circuit (hardware configuration), a CPU, a ROM, a RAM, and the like, and a program (software configuration) executed using them. , Or a combination of both.
  • a processor has a logic circuit and a CPU, ROM, RAM, etc., a part of the function is realized by a logic circuit (hardware configuration), and other functions are executed by the CPU (software configuration) It may be realized by.
  • the 46 is a processor that executes an application related to image processing.
  • the application executed in the application processor 1331 not only performs arithmetic processing to realize a predetermined function, but also can control the internal and external configurations of the video module 1311 such as the video processor 1332 as necessary. .
  • the video processor 1332 is a processor having a function related to image encoding / decoding (one or both of them).
  • the broadband modem 1333 converts the data (digital signal) transmitted by wired or wireless (or both) broadband communication via a broadband line such as the Internet or a public telephone line network into an analog signal by digitally modulating the data.
  • the analog signal received by the broadband communication is demodulated and converted into data (digital signal).
  • the broadband modem 1333 processes arbitrary information such as image data processed by the video processor 1332, a stream obtained by encoding the image data, an application program, setting data, and the like.
  • the RF module 1334 is a module that performs frequency conversion, modulation / demodulation, amplification, filter processing, and the like on an RF (Radio Frequency) signal transmitted / received via an antenna. For example, the RF module 1334 generates an RF signal by performing frequency conversion or the like on the baseband signal generated by the broadband modem 1333. Further, for example, the RF module 1334 generates a baseband signal by performing frequency conversion or the like on the RF signal received via the front end module 1314.
  • RF Radio Frequency
  • the application processor 1331 and the video processor 1332 may be integrated into a single processor.
  • the external memory 1312 is a module that is provided outside the video module 1311 and has a storage device used by the video module 1311.
  • the storage device of the external memory 1312 may be realized by any physical configuration, but is generally used for storing a large amount of data such as image data in units of frames. For example, it is desirable to realize it with a relatively inexpensive and large-capacity semiconductor memory such as DRAM (Dynamic Random Access Memory).
  • the power management module 1313 manages and controls power supply to the video module 1311 (each component in the video module 1311).
  • the front-end module 1314 is a module that provides the RF module 1334 with a front-end function (circuit on the transmitting / receiving end on the antenna side). As illustrated in FIG. 46, the front end module 1314 includes, for example, an antenna unit 1351, a filter 1352, and an amplification unit 1353.
  • the antenna unit 1351 has an antenna for transmitting and receiving a radio signal and its peripheral configuration.
  • the antenna unit 1351 transmits the signal supplied from the amplification unit 1353 as a radio signal, and supplies the received radio signal to the filter 1352 as an electric signal (RF signal).
  • the filter 1352 performs a filtering process on the RF signal received via the antenna unit 1351 and supplies the processed RF signal to the RF module 1334.
  • the amplifying unit 1353 amplifies the RF signal supplied from the RF module 1334 and supplies the amplified RF signal to the antenna unit 1351.
  • Connectivity 1321 is a module having a function related to connection with the outside.
  • the physical configuration of the connectivity 1321 is arbitrary.
  • the connectivity 1321 has a configuration having a communication function other than the communication standard supported by the broadband modem 1333, an external input / output terminal, and the like.
  • the communication 1321 is compliant with wireless communication standards such as Bluetooth (registered trademark), IEEE 802.11 (for example, Wi-Fi (Wireless Fidelity, registered trademark)), NFC (Near Field Communication), IrDA (InfraRed Data Association), etc. You may make it have a module which has a function, an antenna etc. which transmit / receive the signal based on the standard.
  • the connectivity 1321 has a module having a communication function compliant with a wired communication standard such as USB (Universal Serial Bus), HDMI (registered trademark) (High-Definition Multimedia Interface), or a terminal compliant with the standard. You may do it.
  • the connectivity 1321 may have other data (signal) transmission functions such as analog input / output terminals.
  • the connectivity 1321 may include a data (signal) transmission destination device.
  • the drive 1321 reads and writes data to and from a recording medium such as a magnetic disk, an optical disk, a magneto-optical disk, or a semiconductor memory (not only a removable medium drive, but also a hard disk, SSD (Solid State Drive) NAS (including Network Attached Storage) and the like.
  • the connectivity 1321 may include an image or audio output device (a monitor, a speaker, or the like).
  • the camera 1322 is a module having a function of capturing a subject and obtaining image data of the subject.
  • Image data obtained by imaging by the camera 1322 is supplied to, for example, a video processor 1332 and encoded.
  • the sensor 1323 includes, for example, a voice sensor, an ultrasonic sensor, an optical sensor, an illuminance sensor, an infrared sensor, an image sensor, a rotation sensor, an angle sensor, an angular velocity sensor, a velocity sensor, an acceleration sensor, an inclination sensor, a magnetic identification sensor, an impact sensor, It is a module having an arbitrary sensor function such as a temperature sensor.
  • the data detected by the sensor 1323 is supplied to the application processor 1331 and used by an application or the like.
  • the configuration described as a module in the above may be realized as a processor, or conversely, the configuration described as a processor may be realized as a module.
  • the present technology can be applied to the video processor 1332 as described later. Therefore, the video set 1300 can be implemented as a set to which the present technology is applied.
  • FIG. 47 shows an example of a schematic configuration of a video processor 1332 (FIG. 46) to which the present technology is applied.
  • the video processor 1332 receives the video signal and the audio signal, encodes them in a predetermined method, decodes the encoded video data and audio data, A function of reproducing and outputting an audio signal.
  • the video processor 1332 includes a video input processing unit 1401, a first image scaling unit 1402, a second image scaling unit 1403, a video output processing unit 1404, a frame memory 1405, and a memory control unit 1406.
  • the video processor 1332 includes an encoding / decoding engine 1407, video ES (ElementaryElementStream) buffers 1408A and 1408B, and audio ES buffers 1409A and 1409B.
  • the video processor 1332 includes an audio encoder 1410, an audio decoder 1411, a multiplexing unit (MUX (Multiplexer)) 1412, a demultiplexing unit (DMUX (Demultiplexer)) 1413, and a stream buffer 1414.
  • MUX Multiplexing unit
  • DMUX demultiplexing unit
  • the video input processing unit 1401 acquires a video signal input from, for example, the connectivity 1321 (FIG. 46) and converts it into digital image data.
  • the first image enlargement / reduction unit 1402 performs format conversion, image enlargement / reduction processing, and the like on the image data.
  • the second image enlargement / reduction unit 1403 performs image enlargement / reduction processing on the image data in accordance with the format of the output destination via the video output processing unit 1404, or is the same as the first image enlargement / reduction unit 1402. Format conversion and image enlargement / reduction processing.
  • the video output processing unit 1404 performs format conversion, conversion to an analog signal, and the like on the image data and outputs the reproduced video signal to, for example, the connectivity 1321 or the like.
  • the frame memory 1405 is a memory for image data shared by the video input processing unit 1401, the first image scaling unit 1402, the second image scaling unit 1403, the video output processing unit 1404, and the encoding / decoding engine 1407. .
  • the frame memory 1405 is realized as a semiconductor memory such as a DRAM, for example.
  • the memory control unit 1406 receives the synchronization signal from the encoding / decoding engine 1407, and controls the write / read access to the frame memory 1405 according to the access schedule to the frame memory 1405 written in the access management table 1406A.
  • the access management table 1406A is updated by the memory control unit 1406 in accordance with processing executed by the encoding / decoding engine 1407, the first image enlargement / reduction unit 1402, the second image enlargement / reduction unit 1403, and the like.
  • the encoding / decoding engine 1407 performs encoding processing of image data and decoding processing of a video stream that is data obtained by encoding the image data. For example, the encoding / decoding engine 1407 encodes the image data read from the frame memory 1405 and sequentially writes the data as a video stream in the video ES buffer 1408A. Further, for example, the video stream is sequentially read from the video ES buffer 1408B, decoded, and sequentially written in the frame memory 1405 as image data.
  • the encoding / decoding engine 1407 uses the frame memory 1405 as a work area in the encoding and decoding. Also, the encoding / decoding engine 1407 outputs a synchronization signal to the memory control unit 1406, for example, at a timing at which processing for each macroblock is started.
  • the video ES buffer 1408A buffers the video stream generated by the encoding / decoding engine 1407 and supplies the buffered video stream to the multiplexing unit (MUX) 1412.
  • the video ES buffer 1408B buffers the video stream supplied from the demultiplexer (DMUX) 1413 and supplies the buffered video stream to the encoding / decoding engine 1407.
  • the audio ES buffer 1409A buffers the audio stream generated by the audio encoder 1410 and supplies the buffered audio stream to the multiplexing unit (MUX) 1412.
  • the audio ES buffer 1409B buffers the audio stream supplied from the demultiplexer (DMUX) 1413 and supplies the buffered audio stream to the audio decoder 1411.
  • the audio encoder 1410 converts, for example, an audio signal input from the connectivity 1321 or the like, for example, into a digital format, and encodes it using a predetermined method such as an MPEG audio method or an AC3 (Audio Code number 3) method.
  • the audio encoder 1410 sequentially writes an audio stream, which is data obtained by encoding an audio signal, in the audio ES buffer 1409A.
  • the audio decoder 1411 decodes the audio stream supplied from the audio ES buffer 1409B, performs conversion to an analog signal, for example, and supplies the reproduced audio signal to, for example, the connectivity 1321 or the like.
  • the multiplexing unit (MUX) 1412 multiplexes the video stream and the audio stream.
  • the multiplexing method (that is, the format of the bit stream generated by multiplexing) is arbitrary.
  • the multiplexing unit (MUX) 1412 can also add predetermined header information or the like to the bit stream. That is, the multiplexing unit (MUX) 1412 can convert the stream format by multiplexing. For example, the multiplexing unit (MUX) 1412 multiplexes the video stream and the audio stream to convert it into a transport stream that is a bit stream in a transfer format. Further, for example, the multiplexing unit (MUX) 1412 multiplexes the video stream and the audio stream, thereby converting the data into file format data (file data) for recording.
  • the demultiplexing unit (DMUX) 1413 demultiplexes the bit stream in which the video stream and the audio stream are multiplexed by a method corresponding to the multiplexing by the multiplexing unit (MUX) 1412. That is, the demultiplexer (DMUX) 1413 extracts the video stream and the audio stream from the bit stream read from the stream buffer 1414 (separates the video stream and the audio stream). That is, the demultiplexer (DMUX) 1413 can convert the stream format by demultiplexing (inverse conversion of the conversion by the multiplexer (MUX) 1412).
  • the demultiplexing unit (DMUX) 1413 obtains a transport stream supplied from, for example, the connectivity 1321 or the broadband modem 1333 via the stream buffer 1414 and demultiplexes the video stream and the audio stream. And can be converted to Further, for example, the demultiplexer (DMUX) 1413 obtains the file data read from various recording media by the connectivity 1321, for example, via the stream buffer 1414, and demultiplexes the video stream and the audio. Can be converted to a stream.
  • Stream buffer 1414 buffers the bit stream.
  • the stream buffer 1414 buffers the transport stream supplied from the multiplexing unit (MUX) 1412 and, for example, in the connectivity 1321 or the broadband modem 1333 at a predetermined timing or based on an external request or the like. Supply.
  • MUX multiplexing unit
  • the stream buffer 1414 buffers the file data supplied from the multiplexing unit (MUX) 1412 and supplies it to the connectivity 1321 at a predetermined timing or based on an external request, for example. It is recorded on various recording media.
  • MUX multiplexing unit
  • the stream buffer 1414 buffers a transport stream acquired through, for example, the connectivity 1321 or the broadband modem 1333, and performs a demultiplexing unit (DMUX) at a predetermined timing or based on a request from the outside. 1413.
  • DMUX demultiplexing unit
  • the stream buffer 1414 buffers file data read from various recording media in, for example, the connectivity 1321, and the demultiplexer (DMUX) 1413 at a predetermined timing or based on an external request or the like. To supply.
  • DMUX demultiplexer
  • a video signal input to the video processor 1332 from the connectivity 1321 or the like is converted into digital image data of a predetermined format such as 4: 2: 2Y / Cb / Cr format by the video input processing unit 1401 and stored in the frame memory 1405.
  • This digital image data is read by the first image enlargement / reduction unit 1402 or the second image enlargement / reduction unit 1403, and format conversion to a predetermined method such as 4: 2: 0Y / Cb / Cr method and enlargement / reduction processing are performed. Is written again in the frame memory 1405.
  • This image data is encoded by the encoding / decoding engine 1407 and written as a video stream in the video ES buffer 1408A.
  • an audio signal input from the connectivity 1321 or the like to the video processor 1332 is encoded by the audio encoder 1410 and written as an audio stream in the audio ES buffer 1409A.
  • the video stream of the video ES buffer 1408A and the audio stream of the audio ES buffer 1409A are read and multiplexed by the multiplexing unit (MUX) 1412 and converted into a transport stream, file data, or the like.
  • the transport stream generated by the multiplexing unit (MUX) 1412 is buffered in the stream buffer 1414 and then output to the external network via, for example, the connectivity 1321 or the broadband modem 1333.
  • the file data generated by the multiplexing unit (MUX) 1412 is buffered in the stream buffer 1414, and then output to, for example, the connectivity 1321 and recorded on various recording media.
  • a transport stream input from an external network to the video processor 1332 via the connectivity 1321 or the broadband modem 1333 is buffered in the stream buffer 1414 and then demultiplexed by the demultiplexer (DMUX) 1413.
  • DMUX demultiplexer
  • file data read from various recording media by the connectivity 1321 and input to the video processor 1332 is buffered by the stream buffer 1414 and then demultiplexed by the demultiplexer (DMUX) 1413. That is, the transport stream or file data input to the video processor 1332 is separated into a video stream and an audio stream by the demultiplexer (DMUX) 1413.
  • the audio stream is supplied to the audio decoder 1411 via the audio ES buffer 1409B and decoded to reproduce the audio signal.
  • the video stream is written to the video ES buffer 1408B, and then sequentially read and decoded by the encoding / decoding engine 1407, and written to the frame memory 1405.
  • the decoded image data is enlarged / reduced by the second image enlargement / reduction unit 1403 and written to the frame memory 1405.
  • the decoded image data is read out to the video output processing unit 1404, format-converted to a predetermined system such as 4: 2: 2Y / Cb / Cr system, and further converted into an analog signal to be converted into a video signal. Is played out.
  • the present technology when the present technology is applied to the video processor 1332 configured as described above, the present technology according to each embodiment described above may be applied to the encoding / decoding engine 1407. That is, for example, the encoding / decoding engine 1407 may have the function of the image encoding device 300 and / or the function of the image decoding device 100 described above. In this way, the video processor 1332 can obtain the same effects as those of the embodiments described above with reference to FIGS.
  • the present technology (that is, the function of the image encoding device 300 and / or the function of the image decoding device 100) may be realized by hardware such as a logic circuit, It may be realized by software such as an embedded program, or may be realized by both of them.
  • FIG. 48 illustrates another example of a schematic configuration of a video processor 1332 to which the present technology is applied.
  • the video processor 1332 has a function of encoding / decoding video data by a predetermined method.
  • the video processor 1332 includes a control unit 1511, a display interface 1512, a display engine 1513, an image processing engine 1514, and an internal memory 1515.
  • the video processor 1332 includes a codec engine 1516, a memory interface 1517, a multiplexing / demultiplexing unit (MUX DMUX) 1518, a network interface 1519, and a video interface 1520.
  • MUX DMUX multiplexing / demultiplexing unit
  • the control unit 1511 controls the operation of each processing unit in the video processor 1332 such as the display interface 1512, the display engine 1513, the image processing engine 1514, and the codec engine 1516.
  • the control unit 1511 includes, for example, a main CPU 1531, a sub CPU 1532, and a system controller 1533.
  • the main CPU 1531 executes a program and the like for controlling the operation of each processing unit in the video processor 1332.
  • the main CPU 1531 generates a control signal according to the program and supplies it to each processing unit (that is, controls the operation of each processing unit).
  • the sub CPU 1532 plays an auxiliary role of the main CPU 1531.
  • the sub CPU 1532 executes a child process such as a program executed by the main CPU 1531, a subroutine, or the like.
  • the system controller 1533 controls operations of the main CPU 1531 and the sub CPU 1532 such as designating a program to be executed by the main CPU 1531 and the sub CPU 1532.
  • the display interface 1512 outputs the image data to, for example, the connectivity 1321 under the control of the control unit 1511.
  • the display interface 1512 converts image data of digital data into an analog signal, and outputs it to a monitor device or the like of the connectivity 1321 as a reproduced video signal or as image data of the digital data.
  • the display engine 1513 Under the control of the control unit 1511, the display engine 1513 performs various conversion processes such as format conversion, size conversion, color gamut conversion, and the like so as to match the image data with hardware specifications such as a monitor device that displays the image. I do.
  • the image processing engine 1514 performs predetermined image processing such as filter processing for improving image quality on the image data under the control of the control unit 1511.
  • the internal memory 1515 is a memory provided in the video processor 1332 that is shared by the display engine 1513, the image processing engine 1514, and the codec engine 1516.
  • the internal memory 1515 is used, for example, for data exchange performed between the display engine 1513, the image processing engine 1514, and the codec engine 1516.
  • the internal memory 1515 stores data supplied from the display engine 1513, the image processing engine 1514, or the codec engine 1516, and stores the data as needed (eg, upon request). This is supplied to the image processing engine 1514 or the codec engine 1516.
  • the internal memory 1515 may be realized by any storage device, but is generally used for storing a small amount of data such as image data or parameters in units of blocks. It is desirable to realize a semiconductor memory having a relatively small capacity but a high response speed (for example, as compared with the external memory 1312) such as “Static Random Access Memory”.
  • the codec engine 1516 performs processing related to encoding and decoding of image data.
  • the encoding / decoding scheme supported by the codec engine 1516 is arbitrary, and the number thereof may be one or plural.
  • the codec engine 1516 may be provided with codec functions of a plurality of encoding / decoding schemes, and may be configured to perform encoding of image data or decoding of encoded data using one selected from them.
  • the codec engine 1516 includes, for example, MPEG-2 video 1541, AVC / H.2641542, HEVC / H.2651543, HEVC / H.265 (Scalable) 1544, as function blocks for processing related to the codec.
  • HEVC / H.265 (Multi-view) 1545 and MPEG-DASH 1551 are included.
  • MPEG-2 Video1541 is a functional block that encodes and decodes image data in the MPEG-2 format.
  • AVC / H.2641542 is a functional block that encodes and decodes image data using the AVC method.
  • HEVC / H.2651543 is a functional block that encodes and decodes image data using the HEVC method.
  • HEVC / H.265 (Scalable) 1544 is a functional block that performs scalable encoding and scalable decoding of image data using the HEVC method.
  • HEVC / H.265 (Multi-view) 1545 is a functional block that multi-view encodes or multi-view decodes image data using the HEVC method.
  • MPEG-DASH 1551 is a functional block that transmits and receives image data using the MPEG-DASH (MPEG-Dynamic Adaptive Streaming over HTTP) method.
  • MPEG-DASH is a technology for streaming video using HTTP (HyperText Transfer Protocol), and selects and transmits appropriate data from multiple encoded data with different resolutions prepared in advance in segments. This is one of the features.
  • MPEG-DASH 1551 generates a stream compliant with the standard, controls transmission of the stream, and the like.
  • MPEG-2 Video 1541 to HEVC / H.265 (Multi-view) 1545 described above are used. Is used.
  • the memory interface 1517 is an interface for the external memory 1312. Data supplied from the image processing engine 1514 or the codec engine 1516 is supplied to the external memory 1312 via the memory interface 1517. The data read from the external memory 1312 is supplied to the video processor 1332 (the image processing engine 1514 or the codec engine 1516) via the memory interface 1517.
  • a multiplexing / demultiplexing unit (MUX DMUX) 1518 performs multiplexing and demultiplexing of various data related to images such as a bit stream of encoded data, image data, and a video signal.
  • This multiplexing / demultiplexing method is arbitrary.
  • the multiplexing / demultiplexing unit (MUX DMUX) 1518 can not only combine a plurality of data into one but also add predetermined header information or the like to the data.
  • the multiplexing / demultiplexing unit (MUX DMUX) 1518 not only divides one data into a plurality of data but also adds predetermined header information or the like to each divided data. it can.
  • the multiplexing / demultiplexing unit (MUX DMUX) 1518 can convert the data format by multiplexing / demultiplexing.
  • the multiplexing / demultiplexing unit (MUX DMUX) 1518 multiplexes the bitstream, thereby transporting the transport stream, which is a bit stream in a transfer format, or data in a file format for recording (file data).
  • the transport stream which is a bit stream in a transfer format, or data in a file format for recording (file data).
  • file data file format for recording
  • the network interface 1519 is an interface for a broadband modem 1333, connectivity 1321, etc., for example.
  • the video interface 1520 is an interface for the connectivity 1321, the camera 1322, and the like, for example.
  • the transport stream is supplied to the multiplexing / demultiplexing unit (MUX DMUX) 1518 via the network interface 1519.
  • MUX DMUX multiplexing / demultiplexing unit
  • codec engine 1516 the image data obtained by decoding by the codec engine 1516 is subjected to predetermined image processing by the image processing engine 1514, subjected to predetermined conversion by the display engine 1513, and is connected to, for example, the connectivity 1321 through the display interface 1512. And the image is displayed on the monitor.
  • image data obtained by decoding by the codec engine 1516 is re-encoded by the codec engine 1516, multiplexed by a multiplexing / demultiplexing unit (MUX DMUX) 1518, converted into file data, and video
  • MUX DMUX multiplexing / demultiplexing unit
  • encoded data file data obtained by encoding image data read from a recording medium (not shown) by the connectivity 1321 or the like is transmitted through a video interface 1520 via a multiplexing / demultiplexing unit (MUX DMUX). ) 1518 to be demultiplexed and decoded by the codec engine 1516.
  • Image data obtained by decoding by the codec engine 1516 is subjected to predetermined image processing by the image processing engine 1514, subjected to predetermined conversion by the display engine 1513, and supplied to, for example, the connectivity 1321 through the display interface 1512. The image is displayed on the monitor.
  • image data obtained by decoding by the codec engine 1516 is re-encoded by the codec engine 1516, multiplexed by the multiplexing / demultiplexing unit (MUX DMUX) 1518, and converted into a transport stream,
  • the data is supplied to, for example, the connectivity 1321 and the broadband modem 1333 via the network interface 1519 and transmitted to another device (not shown).
  • image data and other data are exchanged between the processing units in the video processor 1332 using, for example, the internal memory 1515 or the external memory 1312.
  • the power management module 1313 controls power supply to the control unit 1511, for example.
  • the present technology when the present technology is applied to the video processor 1332 configured as described above, the present technology according to each embodiment described above may be applied to the codec engine 1516. That is, for example, the codec engine 1516 may have the function of the image encoding device 300 and / or the function of the image decoding device 100 described above. In this way, the video processor 1332 can obtain the same effects as those of the embodiments described above with reference to FIGS.
  • the present technology (that is, the function of the image encoding device 300) may be realized by hardware such as a logic circuit, or may be realized by software such as an embedded program. Alternatively, it may be realized by both of them.
  • the configuration of the video processor 1332 is arbitrary and may be other than the two examples described above.
  • the video processor 1332 may be configured as one semiconductor chip, but may be configured as a plurality of semiconductor chips. For example, a three-dimensional stacked LSI in which a plurality of semiconductors are stacked may be used. Further, it may be realized by a plurality of LSIs.
  • Video set 1300 can be incorporated into various devices that process image data.
  • the video set 1300 can be incorporated into the television device 900 (FIG. 42), the mobile phone 920 (FIG. 43), the recording / reproducing device 940 (FIG. 44), the imaging device 960 (FIG. 45), or the like.
  • the apparatus can obtain the same effects as those of the embodiments described above with reference to FIGS.
  • the video processor 1332 can implement as a structure to which this technique is applied.
  • the video processor 1332 can be implemented as a video processor to which the present technology is applied.
  • the processor or the video module 1311 indicated by the dotted line 1341 can be implemented as a processor or a module to which the present technology is applied.
  • the video module 1311, the external memory 1312, the power management module 1313, and the front end module 1314 can be combined and implemented as a video unit 1361 to which the present technology is applied. Regardless of the configuration, the same effects as those of the embodiments described above with reference to FIGS. 1 to 40 can be obtained.
  • any configuration including the video processor 1332 can be incorporated into various devices that process image data, as in the case of the video set 1300.
  • a video processor 1332 a processor indicated by a dotted line 1341, a video module 1311, or a video unit 1361, a television device 900 (FIG. 42), a mobile phone 920 (FIG. 43), a recording / playback device 940 (FIG. 44), The imaging device 960 (FIG. 45) can be incorporated.
  • the apparatus obtains the same effects as those of the embodiments described above with reference to FIGS. 1 to 40, as in the case of the video set 1300. be able to.
  • FIG. 49 illustrates an example of a schematic configuration of a network system to which the present technology is applied.
  • a network system 1600 shown in FIG. 49 is a system in which devices exchange information about images (moving images) via a network.
  • the cloud service 1601 of the network system 1600 is connected to terminals such as a computer 1611, an AV (Audio Visual) device 1612, a portable information processing terminal 1613, and an IoT (Internet of Things) device 1614 that are communicably connected to the network system 1600.
  • This is a system for providing services related to images (moving images).
  • the cloud service 1601 provides a terminal with a content supply service for images (moving images) such as so-called moving image distribution (on-demand or live distribution).
  • the cloud service 1601 provides a backup service that receives and stores image (moving image) content from a terminal.
  • the cloud service 1601 provides a service that mediates transfer of content of images (moving images) between terminals.
  • the physical configuration of the cloud service 1601 is arbitrary.
  • the cloud service 1601 includes various servers such as a server that stores and manages moving images, a server that distributes moving images to terminals, a server that acquires moving images from terminals, a user (terminal) and a server that manages charging, Any network such as the Internet or a LAN may be provided.
  • the computer 1611 is configured by an information processing apparatus such as a personal computer, a server, a workstation, or the like.
  • the AV device 1612 is configured by an image processing device such as a television receiver, a hard disk recorder, a game device, a camera, or the like.
  • the portable information processing terminal 1613 is configured by a portable information processing device such as a notebook personal computer, a tablet terminal, a mobile phone, a smartphone, or the like.
  • the IoT device 1614 is configured by an arbitrary object that performs processing related to an image, such as a machine, a household appliance, furniture, other objects, an IC tag, a card type device, and the like.
  • Each of these terminals has a communication function, can connect to the cloud service 1601 (establish a session), and exchange information with the cloud service 1601 (that is, perform communication). Each terminal can also communicate with other terminals. Communication between terminals may be performed via the cloud service 1601 or may be performed without using the cloud service 1601.
  • the present technology when the present technology is applied to the network system 1600 as described above, when image (moving image) data is exchanged between terminals or between the terminal and the cloud service 1601, the image data is used in each embodiment.
  • encoding / decoding may be performed. That is, the terminals (computer 1611 to IoT device 1614) and cloud service 1601 may have the functions of the above-described image encoding device 300 and image decoding device 100, respectively. By doing in this way, the terminal (computer 1611 thru
  • the term “associate” means, for example, that one data can be used (linked) when one data is processed. That is, the data associated with each other may be collected as one data, or may be individual data. For example, information associated with encoded data (image) may be transmitted on a different transmission path from the encoded data (image). Further, for example, information associated with encoded data (image) may be recorded on a recording medium different from the encoded data (image) (or another recording area of the same recording medium). Good.
  • the “association” may be a part of the data, not the entire data. For example, an image and information corresponding to the image may be associated with each other in an arbitrary unit such as a plurality of frames, one frame, or a part of the frame.
  • the system means a set of a plurality of components (devices, modules (parts), etc.), and it does not matter whether all the components are in the same housing. Accordingly, a plurality of devices housed in separate housings and connected via a network and a single device housing a plurality of modules in one housing are all systems. .
  • the configuration described as one device (or processing unit) may be divided and configured as a plurality of devices (or processing units).
  • the configurations described above as a plurality of devices (or processing units) may be combined into a single device (or processing unit).
  • a configuration other than that described above may be added to the configuration of each device (or each processing unit).
  • a part of the configuration of a certain device (or processing unit) may be included in the configuration of another device (or other processing unit). .
  • the present technology can take a configuration of cloud computing in which one function is shared and processed by a plurality of devices via a network.
  • the above-described program can be executed in an arbitrary device.
  • the device may have necessary functions (functional blocks and the like) so that necessary information can be obtained.
  • each step described in the above flowchart can be executed by one device or can be executed by a plurality of devices. Further, when a plurality of processes are included in one step, the plurality of processes included in the one step can be executed by being shared by a plurality of apparatuses in addition to being executed by one apparatus.
  • the program executed by the computer may be executed in a time series in the order described in this specification for the processing of the steps describing the program, or in parallel or called. It may be executed individually at a necessary timing. Furthermore, the processing of the steps describing this program may be executed in parallel with the processing of other programs, or may be executed in combination with the processing of other programs.
  • this technique can also take the following structures.
  • a decoding unit for decoding encoded data Based on the value of the conversion skip identifier obtained by decoding the encoded data by the decoding unit, control of execution of inverse primary vertical conversion that is reverse primary conversion in the vertical direction with respect to the transform coefficient data obtained by transforming the image data
  • An inverse primary vertical conversion control unit An image processing apparatus comprising: an inverse primary horizontal conversion control unit that controls execution of an inverse primary horizontal conversion that is an inverse primary conversion in a horizontal direction with respect to coefficient data obtained by converting image data based on a value of the conversion skip identifier.
  • the inverse primary vertical conversion control unit includes: If the conversion skip identifier indicates that vertical one-dimensional conversion is not skipped, the inverse primary vertical conversion is performed on the conversion coefficient data; The image processing apparatus according to (1), wherein when the conversion skip identifier indicates that one-dimensional conversion in the vertical direction is skipped, the inverse primary vertical conversion for the conversion coefficient data is omitted.
  • the inverse primary horizontal conversion control unit includes: If the transform skip identifier indicates that horizontal one-dimensional transform is not skipped, the inverse primary horizontal transform is performed on the transform coefficient data; The image processing apparatus according to (1) or (2), wherein when the conversion skip identifier indicates that one-dimensional conversion in the horizontal direction is skipped, the inverse primary horizontal conversion for the conversion coefficient data is omitted.
  • the image processing device further including a selection unit that selects an orthogonal transformation to be applied to the inverse primary vertical transformation and the inverse primary horizontal transformation.
  • the selection unit includes: Based on a vertical transform set identifier obtained by decoding the encoded data by the decoding unit and a primary vertical transform designation flag, an orthogonal transform to be applied as the inverse primary vertical transform is selected, The image processing according to (4), wherein an orthogonal transformation to be applied as the inverse primary horizontal transformation is selected based on a horizontal transformation set identifier obtained by decoding the encoded data by the decoding unit and a primary horizontal transformation designation flag. apparatus.
  • the image processing device wherein the decoding unit derives the primary vertical conversion designation flag and the primary horizontal conversion designation flag from a primary conversion identifier according to a value of the conversion skip identifier.
  • the decoding unit includes: When the conversion skip identifier indicates that two-dimensional conversion is not skipped, the primary conversion identifier is processed as a 2-bit bin string to derive the primary vertical conversion specification flag and the primary horizontal conversion specification flag, If the conversion skip identifier indicates that vertical or horizontal one-dimensional conversion is not skipped, the primary conversion identifier is processed as a 1-bit bin string, and the primary vertical conversion specification flag or the primary horizontal conversion specification flag is set.
  • the image processing apparatus according to (6).
  • a primary horizontal conversion control unit that controls execution of primary horizontal conversion that is horizontal primary conversion on residual data of an image and a predicted image based on a value of a conversion skip identifier; Based on the value of the conversion skip identifier, a primary vertical conversion control unit that controls execution of a primary vertical conversion that is a primary conversion in the vertical direction with respect to residual data of an image and a predicted image;
  • An image processing apparatus comprising: an encoding unit that encodes the conversion skip identifier.
  • the primary horizontal conversion control unit If the conversion skip identifier indicates that horizontal one-dimensional conversion is not skipped, the primary horizontal conversion is performed on the residual data; The image processing apparatus according to (11), wherein when the conversion skip identifier indicates that one-dimensional conversion in the horizontal direction is skipped, the primary horizontal conversion for the residual data is omitted.
  • the primary vertical conversion control unit If the conversion skip identifier indicates that the vertical one-dimensional conversion is not skipped, the primary vertical conversion is performed on the residual data; The image processing device according to (11) or (12), wherein when the conversion skip identifier indicates that one-dimensional conversion in the vertical direction is skipped, the primary vertical conversion for the residual data is omitted.
  • the image processing device according to any one of (11) to (13), further including a selection unit that selects an orthogonal transformation to be applied to the primary horizontal transformation and the primary vertical transformation.
  • the selection unit includes: Based on a horizontal transformation set identifier and a primary horizontal transformation designation flag, an orthogonal transformation to be applied as the primary horizontal transformation is selected, The image processing apparatus according to (14), wherein an orthogonal transformation to be applied as the primary vertical transformation is selected based on a vertical transformation set identifier and a primary vertical transformation designation flag.
  • the encoding unit derives a primary conversion identifier from the primary horizontal conversion designation flag and the primary vertical conversion designation flag in accordance with a value of the conversion skip identifier.
  • the encoding unit includes: When the conversion skip identifier indicates that two-dimensional conversion is not skipped, the primary conversion identifier of a 2-bit bin string is derived using the primary horizontal conversion specification flag and the primary vertical conversion specification flag, When the conversion skip identifier indicates that horizontal or vertical one-dimensional conversion is not skipped, the primary conversion identifier of a 1-bit bin string is set using the primary horizontal conversion specification flag or the primary vertical conversion specification flag.
  • the image processing apparatus according to (16).
  • (18) The image processing device according to any one of (15) to (17), wherein the encoding unit encodes the primary horizontal conversion designation flag and the primary vertical conversion designation flag.
  • the encoding unit omits encoding of the secondary conversion identifier.
  • the image processing apparatus according to any one of 18). (20) Based on the value of the conversion skip identifier, control execution of primary horizontal conversion that is horizontal primary conversion on residual data of an image and a predicted image; Based on the value of the conversion skip identifier, control execution of primary vertical conversion, which is a primary conversion in the vertical direction for the residual data of the image and the predicted image, An image processing method for encoding the conversion skip identifier.
  • 100 image decoding device 111 decoding unit, 112 inverse quantization unit, 113 inverse conversion unit, 114 operation unit, 115 frame memory, 116 prediction unit, 121 switch, 122 inverse secondary conversion unit, 123 inverse primary conversion unit, 131 inverse primary Conversion selection unit, 132 switch, 133 reverse primary vertical conversion unit, 134 switch, 135 reverse primary horizontal conversion unit, 151 conversion skip valid flag decoding unit, 152 maximum conversion skip block size decoding unit, 153 conversion quantization bypass flag decoding unit, 154 conversion skip identifier decoding unit, 161 primary conversion valid flag decoding unit, 162 adaptive primary conversion flag decoding unit, 163 primary conversion identifier decoding unit, 171 Primary conversion valid flag decoding unit, 172 secondary conversion identifier decoding unit, 181 primary horizontal conversion specification flag decoding unit, 182 primary vertical conversion specification flag decoding unit, 191 and 192 scaling unit, 300 image encoding device, 311 control unit, 312 operation Unit, 313 conversion unit, 314 quantization unit, 315 encoding unit

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Abstract

La présente invention concerne un dispositif et un procédé de traitement d'image qui permettent de supprimer une réduction d'efficacité d'encodage. Selon la présente invention, des données encodées sont décodées, et l'exécution d'une transformation verticale primaire inverse et l'exécution d'une transformation horizontale primaire inverse sont commandées sur la base de la valeur d'un identifiant de saut de transformation résultant. En outre, l'exécution d'une transformation horizontale primaire et l'exécution d'une transformation verticale primaire sont commandées sur la base de la valeur de l'identifiant de saut de transformation, et l'identifiant de saut de transformation est encodé. La présente invention peut être appliquée, par exemple, à des dispositifs de traitement d'image, des dispositifs de codage d'image, des dispositifs de décodage d'image, ou similaires.
PCT/JP2017/033527 2016-09-30 2017-09-15 Dispositif et procédé de traitement d'image WO2018061837A1 (fr)

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EP17855793.0A EP3522533A4 (fr) 2016-09-30 2017-09-15 Dispositif et procédé de traitement d'image
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