WO2018042896A1 - Power conversion device - Google Patents

Power conversion device Download PDF

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Publication number
WO2018042896A1
WO2018042896A1 PCT/JP2017/025354 JP2017025354W WO2018042896A1 WO 2018042896 A1 WO2018042896 A1 WO 2018042896A1 JP 2017025354 W JP2017025354 W JP 2017025354W WO 2018042896 A1 WO2018042896 A1 WO 2018042896A1
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Prior art keywords
current
application period
voltage
difference
transformer
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PCT/JP2017/025354
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French (fr)
Japanese (ja)
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忠彦 千田
信太朗 田中
久保　謙二
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日立オートモティブシステムズ株式会社
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Publication of WO2018042896A1 publication Critical patent/WO2018042896A1/en

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac

Definitions

  • the present invention relates to a power conversion device.
  • Vehicles such as electric vehicles and plug-in hybrid vehicles include an inverter for driving a motor with a high-voltage storage battery for driving power, and a low-voltage storage battery for operating auxiliary equipment such as a vehicle light and a radio. .
  • Such a vehicle is equipped with a DC-DC converter that performs power conversion from a high voltage storage battery to a low voltage storage battery or power conversion from a low voltage storage battery to a high voltage storage battery.
  • the DC-DC converter includes a high-voltage primary circuit that converts a high-voltage direct-current voltage into an alternating-current voltage, a transformer that converts the alternating-current high voltage into an alternating-current low voltage, and a low-voltage second circuit that converts the low-voltage alternating voltage into a direct-current voltage. And a secondary circuit.
  • a high-voltage primary side circuit a circuit configuration in which four switching elements are connected in a full bridge and a smoothing capacitor is connected on the input side is known (see, for example, Patent Document 1).
  • a DC-DC converter feedback control is performed by changing the switching pattern (ON / OFF timing) of the four switching elements so that the output voltage command value matches the detected output voltage value.
  • the output voltage can be kept constant.
  • a positive voltage and a negative voltage are alternately applied to the transformer by a switching operation.
  • the period Ton1 during which the positive voltage is applied is equal to the period Ton2 during which the negative voltage is applied, and that the magnitude of the voltage value is the same when the positive voltage is applied and when the negative voltage is applied.
  • the average value (DC component) of the transformer current is a constant value of zero.
  • the average value of the transformer current does not become zero due to variations in the drive circuit of the switching element and variations in the on-resistance of the switching element, and a DC component (biased current) is generated. There may be a magnetic state. If the bias current continues to increase, the transformer core causes magnetic saturation, causing a problem that overcurrent flows through the transformer and the switching element.
  • the transformer bias is suppressed by detecting the transformer current with a DC line current sensor provided on the primary side and controlling the pulse width of the switching element. Specifically, the current values Idc1 and Idc2 are sampled by the DC line current sensor in each of the period Ton1 and the period Ton2. Then, the corresponding periods Ton1 and Ton2 are individually determined based on the sampled current values Idc1 and Idc2, so that the transformer positive current and the transformer negative current are individually controlled and the bias current is suppressed. Yes.
  • a power converter includes a switching circuit unit, a current detection unit that detects a current flowing on the input side of the switching circuit unit, and a transformer connected to the output side of the switching circuit unit. Controlling the amount of power conversion by controlling a first application period in which a positive voltage is applied to the transformer and a second application period in which a negative voltage is applied by a switching operation of the switching circuit unit. And the control unit is configured to detect a first current detected by the current detection unit during the first application period and a second current detected by the current detection unit during the second application period. Based on the difference, at least one of the first application period and the second application period is corrected so that the first current and the second current are equal.
  • demagnetization can be suppressed while suppressing a decrease in voltage response.
  • FIG. 1 is a diagram illustrating an embodiment of a power converter.
  • FIG. 2 is a diagram showing a timing chart of the gate signal and waveforms of the transformer voltage and the transformer current.
  • FIG. 3 is a diagram showing a transformer current / voltage waveform and a current value detected by a DC line current sensor when there is no bias and when there is no bias.
  • FIG. 4 is a control block diagram of the control unit.
  • FIG. 5 is a timing chart for explaining the demagnetization suppression control.
  • FIG. 6 is a diagram illustrating a comparative example.
  • FIG. 7 is a diagram illustrating a simulation result of response performance.
  • FIG. 8 is a block diagram illustrating a control unit in the first modification.
  • FIG. 9 is a timing chart of the gate signal and the transformer voltage in the first modification.
  • FIG. 10 is a block diagram illustrating a control unit according to the second modification.
  • FIG. 11 is a timing chart of the gate signal and the transformer voltage in the second modification.
  • FIG. 1 is a diagram illustrating an embodiment of a power converter, and is a diagram illustrating a main circuit configuration of a DC-DC converter 1.
  • the DC-DC converter 1 has high voltage side terminals 103 a and 103 b and a low voltage side terminal 112.
  • the high-voltage primary circuit 101 is a circuit in which four switching elements H1, H2, H3, and H4 are connected in a full bridge.
  • MOSFETs are used as the switching elements H1 to H4.
  • the primary winding of the transformer 107 is connected to the output line of the high-voltage primary side circuit 101, and the smoothing capacitor 104 is connected to the input side.
  • a DC line current sensor 301 is provided on the DC line between the high-voltage primary circuit 101 and the smoothing capacitor 104. The current value Idc detected by the DC line current sensor 301 is input to the control unit 120.
  • the low-voltage secondary circuit 102 has a configuration in which a smoothing circuit including a choke coil 108 and a capacitor 110 is connected to a rectifier circuit using diodes 109a and 109b.
  • a rectifier circuit using a diode a rectifier circuit using a MOSFET may be used.
  • the drive circuit 106 drives the switching elements H1 to H4 provided in the high voltage primary circuit 101 on and off based on the on / off command value from the control unit 120.
  • the control unit 120 compares the output voltage command value Vout * with the output voltage value Vout detected by the voltage detection unit 113, and switches the switching elements H1 to H4 so that the command value matches the detection value.
  • Feedback control is performed by changing the pattern (ON / OFF timing). Thereby, the output voltage can be kept constant.
  • FIG. 2 shows a timing chart of the gate signals G1 to G4 which are on / off commands of the switching elements H1 to H4, and waveforms of the transformer voltage Vtr and the transformer current Itr.
  • Ton1 the positive voltage application period in which the switching elements H1 and H4 are simultaneously turned on
  • Ton2 the negative voltage application period in which the switching elements H2 and H3 are simultaneously turned on
  • Ton2 the negative voltage application period in which the switching elements H2 and H3 are simultaneously turned on
  • the negative transformer voltage Vtr2 is applied to the transformer 107, and the transformer current Itr decreases.
  • the positive voltage application period Ton1 and the negative voltage application period Ton2 are repeated in the cycle Tc, and the transformer current Itr has an alternating waveform that alternately repeats the positive value Itr1 and the negative value Itr2.
  • Ton1 ⁇ Ton2 Ton1 ⁇ Ton2 is caused by variations in the drive circuit 106 of the switching elements H1 to H4.
  • Ton1> Ton2 since the positive voltage application period Ton1 in which the positive voltage Vtr1 is applied to the transformer 107 is different from the negative voltage application period Ton2 in which the negative voltage Vtr2 is applied, the current Itr1 is large. Becomes larger than the magnitude of the current Itr2. As a result, the average value (DC component) of the transformer excitation current does not become zero, and the amount of magnetic bias continues to increase with time.
  • the control unit 120 performs a bias suppression control as described below.
  • the current value Idc detected by the DC line current sensor 301 is input to the control unit 120.
  • FIG. 3 is a diagram for explaining the current value Idc detected by the DC line current sensor 301, and shows one cycle Tc.
  • FIG. 3 (a) shows a case where there is no bias
  • FIG. 3 (b) shows a case where there is a bias.
  • the transformer current Itr has an AC waveform close to a sine wave.
  • the waveform of the current value Idc detected by the DC line current sensor 301 is pulsed.
  • Ton1 and the negative voltage application period Ton2 in which voltage is applied to the transformer 107 that is, the period in which power is sent to the secondary side, the absolute value of the transformer current Itr is DC It becomes equal to the current value Idc detected by the line current sensor 301.
  • the pulse waveform of the current value Idc1 and the pulse waveform of the current value Idc2 are the same as shown in FIG.
  • the height of the pulse waveform differs between the current value Idc1 and the current value Idc2 as shown in FIG.
  • FIG. 3B shows a case where Idc1> Idc2. Therefore, in this embodiment, the current value Idc is sampled during the positive voltage application period Ton1 and the negative voltage application period Ton2, and the output voltage command value Vout * and the output voltage value are based on the difference between the sampled current values Idc1 and Idc2. The feedback control based on the difference from Vout is corrected.
  • FIG. 4 is a control block diagram of the control unit 120.
  • the control unit 120 includes a voltage controller 411, a correction voltage controller 412, and a PWM generator 413.
  • the voltage controller 411 receives a difference ⁇ V between the output voltage command value Vout * and the output voltage value Vout.
  • the voltage controller 411 calculates a command value Ton * related to the voltage application period by PI control based on the difference ⁇ V.
  • the calculated command value Ton * is input to the PWM generator 413.
  • the correction value ⁇ Ton * is a positive value.
  • the sum of the correction value ⁇ Ton * and the correction value ⁇ Ton * calculated by the voltage controller 411 is input to the PWM generator 413.
  • the PWM generator 413 receives the gate signal G1, G2, G3, G4 based on the command value Ton * input from the voltage controller 411 and the sum (Ton * + ⁇ Ton *) of the command value Ton * and the correction value ⁇ Ton *. Is generated.
  • FIG. 5 is a timing chart for explaining the demagnetization suppression control in the present embodiment.
  • the transformer is demagnetized and the current value Idc1 detected in the positive voltage application period Ton1 is larger than the current value Idc2 detected in the negative voltage application period Ton2 (when ⁇ I> 0).
  • ⁇ Idc 0 and no demagnetization suppression control is performed, and at t ⁇ t1 where ⁇ I> 0 (Idc1> Idc2), demagnetization suppression control is performed.
  • the gate pulse period is adjusted so that the negative voltage application period Ton2 of the transformer 107 is increased by ⁇ Ton. Specifically, the OFF timing of the gate signal G3 and the ON timing of the gate signal G4 are delayed by the difference ⁇ Ton, respectively.
  • the period during which the gate signal G2 and the gate signal G3 are simultaneously turned on that is, the negative voltage application period Ton2 is increased by ⁇ Ton, and the current value Idc2 during that period increases.
  • the difference ⁇ I between Idc1 and Idc2 is reduced, and demagnetization can be suppressed.
  • the gate pulse period is adjusted so that the positive voltage application period Ton1 of the transformer 107 is increased by ⁇ Ton.
  • the ON timing of the gate signal G3 and the OFF timing of the gate signal G4 are delayed by the difference ⁇ Ton, respectively.
  • FIG. 6A shows a control block in the case where the demagnetization is suppressed by the method described in Patent Document 1 as a comparative example.
  • a minor loop of current control on the primary side of the transformer is incorporated in the conventional output voltage control system shown in FIG. 6B.
  • the output voltage controller 311 outputs a target current Idc * based on the difference ⁇ V.
  • the current values Idc1 and Idc2 are individually controlled so that the target current Idc * calculated by the output voltage controller 311 is obtained.
  • the difference between the target current Idc * and the current value Idc1 detected during the positive voltage application period Ton1 is input to the current controller 312a. Based on this difference, the current controller 312a calculates the target value Ton1 * of the positive voltage application period Ton1 so that the current value Idc1 becomes the target current Idc *. On the other hand, the difference between the target current Idc * and the current value Idc2 detected during the negative voltage application period Ton2 is input to the current controller 312b. Based on this difference, the current controller 312b calculates the target value Ton2 * of the negative voltage application period Ton2 so that the current value Idc2 becomes the target current Idc *.
  • the PWM generator 413 generates the gate signals G1 to G4 based on the periods Ton1 * and Ton2 *. In this case, the current control is performed so that the current value Idc1 and the current value Idc2 have the same target value Idc *, so that the bias current of the transformer 107 can be suppressed.
  • a correction voltage controller 412 is provided in parallel with the conventional configuration shown in FIG. 6B, and the command value Ton * generated by the voltage controller 411 is provided. Is corrected with a correction value ⁇ Ton *.
  • the gate signals G1 and G2 are generated based on the command value Ton *, and the gate signals G3 and G4 are corrected based on (Ton * + ⁇ Ton *) so as to suppress the demagnetization. Generated.
  • the transformer positive current and transformer negative current detected by the DC line current sensor are not individually controlled as in the conventional method, but the output voltage value Vout is controlled to the output voltage command value Vout *.
  • the bias control is suppressed by correcting ⁇ Ton * with respect to the main control using the command value Ton *.
  • the correction voltage controller 412 for suppressing the demagnetization and the normal voltage controller 411 are in parallel, so that the arithmetic processing can be performed quickly and the convergence is also rapid. For this reason, the output voltage response is better than that of the conventional method.
  • FIG. 7 is a diagram showing a result of circuit simulation comparing the responsiveness of the control method of the present invention and the responsiveness of the control method (conventional method) shown in FIG. 6 (a).
  • the conventional control method a large undershoot of the voltage occurs with a sudden change in the load current, the time to settle to a constant value (14V) is long, and the responsiveness is poor.
  • the control method of the present invention it can be seen that the voltage undershoot is small, the time required to settle to a constant value is short, and the responsiveness is good.
  • (Modification 1) 8 and 9 are diagrams for describing a first modification of the above-described embodiment.
  • FIG. 8 is a block diagram of the control unit 120
  • FIG. 9 is a timing chart of the gate signal and the transformer voltage.
  • the gate pulse period is corrected so as to extend the voltage application period (negative voltage application period) of the transformer 107.
  • the gate pulse period is corrected so as to shorten the voltage application period of the transformer 107. That is, as shown in FIG. 8, correction is performed such that the correction value ⁇ Ton * is subtracted from the command value Ton * generated by the voltage controller 411.
  • FIG. 9 shows a timing chart of ⁇ I> 0 as in the case of FIG.
  • the gate pulse period is adjusted so that the positive voltage application period Ton1 of the transformer is shortened by ⁇ Ton. That is, the PWM generator 413 delays the ON timing of the gate signal G1 and the OFF timing of the gate signal G2 by ⁇ Ton so that the positive voltage application period Ton1 becomes equal to the command value (Ton * ⁇ Ton *).
  • the gate signals G3 and G4 are generated based on the command value Ton *, and the negative voltage application period Ton2 is controlled to Ton.
  • Idc1 is reduced, the difference between Idc1 and Idc2 is reduced, and the demagnetization is suppressed.
  • the gate pulse period is adjusted so that the negative voltage application period Ton2 of the transformer 107 is shortened by ⁇ Ton.
  • the OFF timing of the gate signal G1 and the ON timing of the gate signal G2 are delayed by the difference ⁇ Ton, respectively.
  • FIG. 10 and 11 are diagrams illustrating a second modification of the above-described embodiment.
  • FIG. 10 is a block diagram of the control unit 120
  • FIG. 11 is a timing chart of the gate signal and the transformer voltage.
  • the correction voltage controller 412 calculates a correction value ⁇ Ton * necessary for suppressing the demagnetization based on the difference ⁇ I, and outputs ⁇ Ton * / 2 which is a half value thereof.
  • the PWM generator 413 receives the sum (Ton * + ⁇ Ton * / 2) and the difference (Ton * ⁇ Ton * / 2).
  • the PWM generator 413 generates the gate signals G1 to G4 that suppress the demagnetization based on the sum (Ton * + ⁇ Ton * / 2) and the difference (Ton * ⁇ Ton * / 2).
  • FIG. 11 shows a timing chart of ⁇ I> 0 as in the case of FIG.
  • the positive voltage application period Ton1 is shortened by ⁇ Ton / 2 and the negative voltage application period Ton2 is lengthened by ⁇ Ton / 2 to suppress the demagnetization.
  • the on timing of the gate signal G1 and the off timing of the gate signal G2 are delayed by ⁇ Ton / 2
  • the off timing of the gate signal G3 and the on timing of the gate signal G4 are delayed by ⁇ Ton / 2.
  • the difference between the current value Idc1 and the current value Idc2 becomes small, and the bias can be suppressed.
  • the positive voltage application period Ton1 is lengthened by ⁇ Ton / 2 and the negative voltage application period Ton2 is shortened by ⁇ Ton / 2.
  • the on timing of the gate signal G3 and the off timing of the gate signal G4 are delayed by ⁇ Ton / 2
  • the off timing of the gate signal G1 and the on timing of the gate signal G2 are delayed by ⁇ Ton / 2.
  • the DC-DC converter 1 that is a power conversion device uses a high-voltage primary circuit 101 that is a switching circuit unit and a current that flows to the input side of the high-voltage primary circuit 101.
  • DC line current sensor 301 to detect, transformer 107 connected to the output side of high-voltage primary circuit 101, positive voltage application period Ton1 in which a positive voltage is applied to transformer 107, and negative in which a negative voltage is applied
  • a control unit 120 that controls the amount of power conversion by controlling the voltage application period Ton1 by the switching operation of the high-voltage primary side circuit 101.
  • control unit 120 is based on the difference between the current value Idc1 detected by the DC line current sensor 301 in the positive voltage application period Ton1 and the current value Idc2 detected by the DC line current sensor 301 in the negative voltage application period Ton2. At least one of the positive voltage application period Ton1 and the negative voltage application period Ton2 is corrected so that the current value Idc1 and the current value Idc2 are equal. As a result, it is possible to suppress demagnetization while suppressing a decrease in voltage response.
  • the negative voltage application period Ton2 is increased, and when the difference ⁇ I is negative. May be corrected to increase the positive voltage application period Ton1. Further, the correction may be made so that the positive voltage application period Ton1 is decreased when the difference ⁇ I is positive and the negative voltage application period Ton2 is decreased when the difference ⁇ I is negative. Furthermore, when the difference ⁇ I is positive, the positive voltage application period Ton1 is decreased and the negative voltage application period Ton2 is increased. When the difference ⁇ I is negative, the positive voltage application period Ton1 is increased. You may correct
  • the correction value ⁇ Ton for the positive voltage application period Ton1 and the negative voltage application period Ton2 proportional to the magnitude of the difference ⁇ I, it can be quickly suppressed regardless of the degree of demagnetization.
  • the correction value ⁇ Ton may be a constant value regardless of the magnitude of the difference ⁇ I.
  • a DC line current sensor for detecting an overcurrent is conventionally provided in a connection line with the smoothing capacitor 104 connected in parallel to the input side of the high voltage primary circuit 101. Is also used as the DC line current sensor 301 shown in FIG.

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  • Dc-Dc Converters (AREA)

Abstract

Provided is a power conversion device in which biased magnetization can be suppressed while suppressing the lowering of voltage responsiveness. A DC-DC converter 1 is provided with: a high-voltage primary side circuit 101; a DC line current sensor 301 for detecting current flowing on the input side of the high-voltage primary side circuit 101; a transformer 107 connected to the output side of the high-voltage primary side circuit 101; and a control unit 120 for controlling the amount of power conversion by controlling a positive voltage application period Ton1 and a negative voltage application period Ton1 by the switching operation of the high-voltage primary side circuit 101. The control unit 120 corrects, on the basis of the difference between a current value Idc1 detected during the positive voltage application period Ton1 and a current value Idc2 detected during the negative voltage application period Ton2, at least one of the positive voltage application period Ton1 and the negative voltage application period Ton2 so that the current value Idc1 and the current value Idc2 become equal to each other.

Description

電力変換装置Power converter
　本発明は、電力変換装置に関する。 The present invention relates to a power conversion device.
　電気自動車やプラグインハイブリッド車等の車両は、動力駆動用の高電圧蓄電池でモータ駆動するためのインバータと、車両のライトやラジオなどの補機を作動させるための低電圧蓄電池とを備えている。このような車両には、高電圧蓄電池から低電圧蓄電池への電力変換または低電圧蓄電池から高電圧蓄電池への電力変換を行うＤＣ-ＤＣコンバータが搭載されている。 Vehicles such as electric vehicles and plug-in hybrid vehicles include an inverter for driving a motor with a high-voltage storage battery for driving power, and a low-voltage storage battery for operating auxiliary equipment such as a vehicle light and a radio. . Such a vehicle is equipped with a DC-DC converter that performs power conversion from a high voltage storage battery to a low voltage storage battery or power conversion from a low voltage storage battery to a high voltage storage battery.
　ＤＣ-ＤＣコンバータは、高電圧の直流電圧を交流電圧に変換する高電圧一次側回路と、交流高電圧を交流低電圧に変換するトランスと、低電圧交流電圧を直流電圧に変換する低電圧二次側回路とを備えている。高電圧一次側回路の例としては、4つのスイッチング素子をフルブリッジ接続し、その入力側に平滑コンデンサを接続した回路構成が知られている（例えば、特許文献１参照）。 The DC-DC converter includes a high-voltage primary circuit that converts a high-voltage direct-current voltage into an alternating-current voltage, a transformer that converts the alternating-current high voltage into an alternating-current low voltage, and a low-voltage second circuit that converts the low-voltage alternating voltage into a direct-current voltage. And a secondary circuit. As an example of a high-voltage primary side circuit, a circuit configuration in which four switching elements are connected in a full bridge and a smoothing capacitor is connected on the input side is known (see, for example, Patent Document 1).
　一般に、ＤＣ-ＤＣコンバータにおいては、出力電圧指令値と検出される出力電圧値とが一致するように４つのスイッチング素子のスイッチングパターン(ON/OFFタイミング)を変更することでフィードバック制御を行う。これにより、出力電圧を一定に保つことが可能となる。トランスには、スイッチング動作により正電圧と負電圧とが交互に印加される。理想的には、正電圧が印加される期間Ｔon1と負電圧が印加される期間Ｔon2とが等しく、かつ、電圧値の大きさが正電圧印加時と負電圧印加時とで等しいのが好ましい。その場合には、トランス電流の平均値(直流成分)はゼロの一定値となる。 Generally, in a DC-DC converter, feedback control is performed by changing the switching pattern (ON / OFF timing) of the four switching elements so that the output voltage command value matches the detected output voltage value. Thereby, the output voltage can be kept constant. A positive voltage and a negative voltage are alternately applied to the transformer by a switching operation. Ideally, it is preferable that the period Ton1 during which the positive voltage is applied is equal to the period Ton2 during which the negative voltage is applied, and that the magnitude of the voltage value is the same when the positive voltage is applied and when the negative voltage is applied. In that case, the average value (DC component) of the transformer current is a constant value of zero.
　しかしながら、実際には、スイッチング素子のドライブ回路のバラツキや、スイッチング素子のオン抵抗のバラツキなどに起因してトランス電流の平均値がゼロとならず、直流成分（偏磁電流）が発生して偏磁状態となる場合がある。偏磁電流が増加し続けるとトランスのコアが磁気飽和を起こし、トランスおよびスイッチング素子に過電流が流れるという問題が生じる。 However, in practice, the average value of the transformer current does not become zero due to variations in the drive circuit of the switching element and variations in the on-resistance of the switching element, and a DC component (biased current) is generated. There may be a magnetic state. If the bias current continues to increase, the transformer core causes magnetic saturation, causing a problem that overcurrent flows through the transformer and the switching element.
　そこで、特許文献１に記載の発明では、一次側に設けたＤＣライン電流センサによりトランス電流を検知して、スイッチング素子のパルス幅を制御することで、トランス偏磁を抑制するようにしている。具体的には、期間Ｔon1および期間Ｔon2のそれぞれの期間において、ＤＣライン電流センサにより電流値Ｉdc1，Ｉdc2をサンプリングする。そして、サンプリングされた電流値Ｉdc1，Ｉdc2に基づいて対応する期間Ｔon1，Ｔon2を個別に決定することで、トランス正側電流とトランス負側電流を個別に制御、偏磁電流を抑制するようにしている。 Therefore, in the invention described in Patent Document 1, the transformer bias is suppressed by detecting the transformer current with a DC line current sensor provided on the primary side and controlling the pulse width of the switching element. Specifically, the current values Idc1 and Idc2 are sampled by the DC line current sensor in each of the period Ton1 and the period Ton2. Then, the corresponding periods Ton1 and Ton2 are individually determined based on the sampled current values Idc1 and Idc2, so that the transformer positive current and the transformer negative current are individually controlled and the bias current is suppressed. Yes.
特許第５３５１９４４号公報Japanese Patent No. 5351944
　しかしながら、特許文献１に記載の上記制御方法の場合、通常の出力電圧制御系に電流制御のマイナ・ループをシリーズに組み込んでいるために、出力電圧の応答性が悪化するという問題がある。 However, in the case of the above-described control method described in Patent Document 1, there is a problem that the responsiveness of the output voltage deteriorates because the current control minor loop is incorporated in the series in the normal output voltage control system.
　本発明の第１の態様によると、電力変換装置は、スイッチング回路部と、前記スイッチング回路部の入力側に流れる電流を検出する電流検出部と、前記スイッチング回路部の出力側に接続されたトランスと、前記トランスに正の電圧が印加される第１印加期間と負の電圧が印加される第２印加期間とを、前記スイッチング回路部のスイッチング動作により制御することで電力変換量を制御する制御部と、を備え、前記制御部は、前記第１印加期間において前記電流検出部で検出される第１の電流と前記第２印加期間において前記電流検出部で検出される第２の電流との差に基づいて、前記第１の電流と前記第２の電流とが等しくなるように前記第１印加期間および前記第２印加期間の少なくとも一方を補正する。 According to the first aspect of the present invention, a power converter includes a switching circuit unit, a current detection unit that detects a current flowing on the input side of the switching circuit unit, and a transformer connected to the output side of the switching circuit unit. Controlling the amount of power conversion by controlling a first application period in which a positive voltage is applied to the transformer and a second application period in which a negative voltage is applied by a switching operation of the switching circuit unit. And the control unit is configured to detect a first current detected by the current detection unit during the first application period and a second current detected by the current detection unit during the second application period. Based on the difference, at least one of the first application period and the second application period is corrected so that the first current and the second current are equal.
　本発明によれば、電圧応答性の低下を抑えつつ偏磁の抑制を行うことができる。 According to the present invention, demagnetization can be suppressed while suppressing a decrease in voltage response.
図１は電力変換装置の一実施の形態を示す図である。FIG. 1 is a diagram illustrating an embodiment of a power converter. 図２は、ゲート信号のタイミングチャートとトランス電圧およびトランス電流の波形を示す図である。FIG. 2 is a diagram showing a timing chart of the gate signal and waveforms of the transformer voltage and the transformer current. 図３は、偏磁がある場合と無い場合における、トランス電流・電圧波形およびＤＣライン電流センサで検出される電流値を示す図である。FIG. 3 is a diagram showing a transformer current / voltage waveform and a current value detected by a DC line current sensor when there is no bias and when there is no bias. 図４は、制御部の制御ブロック図である。FIG. 4 is a control block diagram of the control unit. 図５は、偏磁抑制制御を説明するためのタイミングチャートである。FIG. 5 is a timing chart for explaining the demagnetization suppression control. 図６は、比較例を説明する図である。FIG. 6 is a diagram illustrating a comparative example. 図７は、応答性能のシミュレーション結果を示す図である。FIG. 7 is a diagram illustrating a simulation result of response performance. 図８は、変形例１における制御部を示すブロック図である。FIG. 8 is a block diagram illustrating a control unit in the first modification. 図９は、変形例１におけるゲート信号およびトランス電圧のタイミングチャートである。FIG. 9 is a timing chart of the gate signal and the transformer voltage in the first modification. 図１０は、変形例２における制御部を示すブロック図である。FIG. 10 is a block diagram illustrating a control unit according to the second modification. 図１１は、変形例２におけるゲート信号およびトランス電圧のタイミングチャートである。FIG. 11 is a timing chart of the gate signal and the transformer voltage in the second modification.
　以下、図を参照して本発明を実施するための形態について説明する。図１は電力変換装置の一実施の形態を示す図であり、ＤＣ-ＤＣコンバータ１の主回路構成を示す図である。ＤＣ-ＤＣコンバータ１は、高電圧側端子１０３ａ，１０３ｂおよび低電圧側端子１１２を有する。高電圧一次側回路１０１は、４つのスイッチング素子Ｈ１，Ｈ２，Ｈ３，Ｈ４をフルブリッジ接続した回路である。ここでは、スイッチング素子Ｈ１～Ｈ４としてＭＯＳＦＥＴが用いられている。 Hereinafter, embodiments for carrying out the present invention will be described with reference to the drawings. FIG. 1 is a diagram illustrating an embodiment of a power converter, and is a diagram illustrating a main circuit configuration of a DC-DC converter 1. The DC-DC converter 1 has high voltage side terminals 103 a and 103 b and a low voltage side terminal 112. The high-voltage primary circuit 101 is a circuit in which four switching elements H1, H2, H3, and H4 are connected in a full bridge. Here, MOSFETs are used as the switching elements H1 to H4.
　高電圧一次側回路１０１の出力線にはトランス１０７の一次巻線が接続され、入力側には平滑コンデンサ１０４が接続されている。高電圧一次側回路１０１と平滑コンデンサ１０４との間のＤＣラインには、ＤＣライン電流センサ３０１が設けられている。ＤＣライン電流センサ３０１で検出された電流値Ｉdcは制御部１２０に入力される。 The primary winding of the transformer 107 is connected to the output line of the high-voltage primary side circuit 101, and the smoothing capacitor 104 is connected to the input side. A DC line current sensor 301 is provided on the DC line between the high-voltage primary circuit 101 and the smoothing capacitor 104. The current value Idc detected by the DC line current sensor 301 is input to the control unit 120.
　トランス１０７には、二次側巻線の中間点を巻線外側に引き出したセンタタップ型トランスが用いられている。低圧二次側回路１０２は、ダイオード１０９ａ，１０９ｂを用いた整流回路にチョークコイル１０８とコンデンサ１１０からなる平滑回路を接続した構成となっている。ダイオードを用いた整流回路に代えて、ＭＯＳＦＥＴを用いた整流回路を用いても良い。 As the transformer 107, a center tap type transformer is used in which the intermediate point of the secondary side winding is drawn to the outside of the winding. The low-voltage secondary circuit 102 has a configuration in which a smoothing circuit including a choke coil 108 and a capacitor 110 is connected to a rectifier circuit using diodes 109a and 109b. Instead of a rectifier circuit using a diode, a rectifier circuit using a MOSFET may be used.
　ドライブ回路１０６は、制御部１２０からのオンオフ指令値に基づいて、高電圧一次側回路１０１に設けられたスイッチング素子Ｈ１～Ｈ４をオンオフ駆動する。制御部１２０は、後述するように出力電圧指令値Ｖout*と電圧検出部１１３で検出した出力電圧値Ｖoutとを比較し、指令値と検出値とが一致するようにスイッチング素子Ｈ１～Ｈ４のスイッチングパターン(ON/OFFタイミング)を変更することで、フィードバック制御を行う。これにより、出力電圧を一定に保つことが可能となる。 The drive circuit 106 drives the switching elements H1 to H4 provided in the high voltage primary circuit 101 on and off based on the on / off command value from the control unit 120. As will be described later, the control unit 120 compares the output voltage command value Vout * with the output voltage value Vout detected by the voltage detection unit 113, and switches the switching elements H1 to H4 so that the command value matches the detection value. Feedback control is performed by changing the pattern (ON / OFF timing). Thereby, the output voltage can be kept constant.
　図２は、スイッチング素子Ｈ１～Ｈ４のオンオフ指令であるゲート信号Ｇ１～Ｇ４のタイミングチャートと、トランス電圧Ｖtrおよびトランス電流Ｉtrの波形を示したものである。スイッチング素子Ｈ１，Ｈ４が同時にオン状態（Ｇ１，Ｇ４が同時オン）となる正電圧印加期間Ｔon1には、トランス１０７に正のトランス電圧Ｖtr1が印加され、トランス電流Ｉtrは増加する。一方、スイッチング素子Ｈ２，Ｈ３が同時にオン状態（Ｇ２，Ｇ３が同時オン）となる負電圧印加期間Ｔon2には、トランス１０７に負のトランス電圧Ｖtr2が印加され、トランス電流Ｉtrは減少する。正電圧印加期間Ｔon1および負電圧印加期間Ｔon2は周期Ｔｃで繰り返され、トランス電流Ｉtrは、正の値Itr1と負の値Itr2を交互に繰り返す交流波形となる。 FIG. 2 shows a timing chart of the gate signals G1 to G4 which are on / off commands of the switching elements H1 to H4, and waveforms of the transformer voltage Vtr and the transformer current Itr. In the positive voltage application period Ton1 in which the switching elements H1 and H4 are simultaneously turned on (G1 and G4 are simultaneously turned on), the positive transformer voltage Vtr1 is applied to the transformer 107, and the transformer current Itr increases. On the other hand, during the negative voltage application period Ton2 in which the switching elements H2 and H3 are simultaneously turned on (G2 and G3 are simultaneously turned on), the negative transformer voltage Vtr2 is applied to the transformer 107, and the transformer current Itr decreases. The positive voltage application period Ton1 and the negative voltage application period Ton2 are repeated in the cycle Tc, and the transformer current Itr has an alternating waveform that alternately repeats the positive value Itr1 and the negative value Itr2.
（偏磁発生の原理説明）
　正の電圧Ｖtr1が印加される正電圧印加期間Ｔon1と負の電圧Ｖtr2が印加される負電圧印加期間Ｔon2とは等しく、かつ、電圧Ｖtr1と電圧Ｖtr2とは大きさも等しい。そのため、正のトランス電流Ｉtr1と負のトランス電流Itr2とは絶対値が等しくなり、トランス電流Ｉtrの平均値(直流成分)はゼロの一定値をとる。しかし、実際には以下の（１）や（２）のような原因によって、トランス電流Ｉtrの平均値はゼロとならず、直流成分が発生して偏磁状態となる。 (Explanation of the principle of generation of bias)
The positive voltage application period Ton1 to which the positive voltage Vtr1 is applied and the negative voltage application period Ton2 to which the negative voltage Vtr2 is applied are equal, and the voltages Vtr1 and Vtr2 are also equal in magnitude. Therefore, the positive transformer current Itr1 and the negative transformer current Itr2 have the same absolute value, and the average value (DC component) of the transformer current Itr takes a constant value of zero. However, in actuality, due to causes such as the following (1) and (2), the average value of the transformer current Itr does not become zero, and a direct current component is generated to cause a biased state.
（１）Ｔon1≠Ｔon2となる場合
　Ｔon1≠Ｔon2は、スイッチング素子Ｈ１～Ｈ４のドライブ回路１０６のバラツキに起因する。例えば、Ｔon1＞Ｔon2となっている場合は、トランス１０７に正電圧Ｖtr1が印加される正電圧印加期間Ｔon1と、負電圧Ｖtr2が印加される負電圧印加期間Ｔon2とが異なるため、電流Ｉtr1の大きさが電流Ｉtr2の大きさよりも大きくなる。その結果、トランス励磁電流の平均値(直流成分)はゼロとならず、時間の経過と共に偏磁量は増加し続ける。 (1) When Ton1 ≠ Ton2 Ton1 ≠ Ton2 is caused by variations in the drive circuit 106 of the switching elements H1 to H4. For example, when Ton1> Ton2, since the positive voltage application period Ton1 in which the positive voltage Vtr1 is applied to the transformer 107 is different from the negative voltage application period Ton2 in which the negative voltage Vtr2 is applied, the current Itr1 is large. Becomes larger than the magnitude of the current Itr2. As a result, the average value (DC component) of the transformer excitation current does not become zero, and the amount of magnetic bias continues to increase with time.
（２）Ｖtr1≠Ｖtr2となる場合
　Ｖtr1≠Ｖtr2は、スイッチング素子のオン抵抗のバラツキに起因する。例えば、Ｖtr1＞Ｖtr2の場合には、トランス１０７に正電圧Ｖtr1が印加される正電圧印加期間Ｔon1における電流変化の傾きが、負電圧Ｖtr2が印加される負電圧印加期間Ｔon2における電流変化の傾きが大きくなる。そのため、Ｔon1＝Ｔon2であっても、期間経過後の電流Ｉtr1の大きさは電流Ｉtr2の大きさよりも大きくなる。その結果、トランス励磁電流の平均値がゼロとならず、時間の経過と共に偏磁量は増加し続ける。 (2) When Vtr1 is not equal to Vtr2 Vtr1 is not equal to Vtr2 due to variations in the on-resistance of the switching elements. For example, when Vtr1> Vtr2, the slope of the current change in the positive voltage application period Ton1 in which the positive voltage Vtr1 is applied to the transformer 107, and the slope of the current change in the negative voltage application period Ton2 in which the negative voltage Vtr2 is applied. growing. Therefore, even when Ton1 = Ton2, the magnitude of the current Itr1 after the lapse of the period is larger than the magnitude of the current Itr2. As a result, the average value of the transformer excitation current does not become zero, and the amount of magnetic bias continues to increase with time.
　いずれの場合も、偏磁電流が増加し続けると、やがてトランス１０７のコアが磁気飽和を起こし、トランス１０７およびスイッチング素子Ｈ１～Ｈ４に過電流が流れて、スイッチング素子の故障を招く。 In either case, if the bias current continues to increase, the core of the transformer 107 will eventually become magnetically saturated, and an overcurrent will flow through the transformer 107 and the switching elements H1 to H4, leading to a failure of the switching element.
　本実施の形態では、そのような偏磁電流の増加を防止するために、制御部１２０は以下に述べるような偏磁抑制制御を行う。図１に示したように、制御部１２０には、ＤＣライン電流センサ３０１で検出された電流値Ｉdcが入力される。図３は、ＤＣライン電流センサ３０１で検出される電流値Ｉdcを説明する図であり、１周期Ｔc分を示したものである。図３（ａ）は偏磁がない場合を示しており、図３（ｂ）は偏磁がある場合を示す。 In the present embodiment, in order to prevent such an increase in the bias current, the control unit 120 performs a bias suppression control as described below. As shown in FIG. 1, the current value Idc detected by the DC line current sensor 301 is input to the control unit 120. FIG. 3 is a diagram for explaining the current value Idc detected by the DC line current sensor 301, and shows one cycle Tc. FIG. 3 (a) shows a case where there is no bias, and FIG. 3 (b) shows a case where there is a bias.
　トランス電流Ｉtrは、正弦波に近い交流波形となる。一方、ＤＣライン電流センサ３０１で検出される電流値Ｉdcの波形はパルス状である。しかし、トランス１０７に電圧が印加されている正電圧印加期間Ｔon1および負電圧印加期間Ｔon2、すなわち二次側に電力が送られている期間に限ってみると、トランス電流Ｉtrの絶対値は、ＤＣライン電流センサ３０１で検出される電流値Ｉdcと等しくなる。 The transformer current Itr has an AC waveform close to a sine wave. On the other hand, the waveform of the current value Idc detected by the DC line current sensor 301 is pulsed. However, only in the positive voltage application period Ton1 and the negative voltage application period Ton2 in which voltage is applied to the transformer 107, that is, the period in which power is sent to the secondary side, the absolute value of the transformer current Itr is DC It becomes equal to the current value Idc detected by the line current sensor 301.
　偏磁がない場合には、図３（ａ）に示すように電流値Ｉdc1のパルス波形と電流値Ｉdc2のパルス波形とは同一波形となる。一方、偏磁がある場合には、図３（ｂ）に示すようにパルス波形の高さが電流値Ｉdc1と電流値Ｉdc2とで異なっている。図３（ｂ）はＩdc1＞Ｉdc2の場合を示している。そこで、本実施形態では、正電圧印加期間Ｔon1および負電圧印加期間Ｔon2に電流値Ｉdcをサンプリングし、サンプリングされた電流値Ｉdc1，Ｉdc2の差分に基づいて、出力電圧指令値Ｖout*と出力電圧値Ｖoutとの差分に基づくフィードバック制御を補正するようにした。 When there is no bias, the pulse waveform of the current value Idc1 and the pulse waveform of the current value Idc2 are the same as shown in FIG. On the other hand, when there is a bias, the height of the pulse waveform differs between the current value Idc1 and the current value Idc2 as shown in FIG. FIG. 3B shows a case where Idc1> Idc2. Therefore, in this embodiment, the current value Idc is sampled during the positive voltage application period Ton1 and the negative voltage application period Ton2, and the output voltage command value Vout * and the output voltage value are based on the difference between the sampled current values Idc1 and Idc2. The feedback control based on the difference from Vout is corrected.
　図４は、制御部１２０の制御ブロック図である。制御部１２０は、電圧制御器４１１，補正電圧制御器４１２およびＰＷＭ生成器４１３を備えている。電圧制御器４１１には、出力電圧指令値Ｖout*と出力電圧値Ｖoutとの差分ΔＶが入力される。電圧制御器４１１は、差分ΔＶに基づくＰＩ制御により電圧印加期間に関する指令値Ｔon*を算出する。算出された指令値Ｔon*はＰＷＭ生成器４１３に入力される。 FIG. 4 is a control block diagram of the control unit 120. The control unit 120 includes a voltage controller 411, a correction voltage controller 412, and a PWM generator 413. The voltage controller 411 receives a difference ΔV between the output voltage command value Vout * and the output voltage value Vout. The voltage controller 411 calculates a command value Ton * related to the voltage application period by PI control based on the difference ΔV. The calculated command value Ton * is input to the PWM generator 413.
　補正電圧制御器４１２には、電流値Ｉdc1と電流値Ｉdc2との差分ΔＩ（＝Ｉdc1－Ｉdc2）が入力される。補正電圧制御器４１２は、偏磁電流に相当する電流差ΔＩ＝Ｉdc1－Ｉdc2から、この値がゼロとなるように電圧印加時間の補正値ΔＴon*を決定する。ここでは、補正値ΔＴon*は正の値とする。そして、この補正値ΔＴon*と電圧制御器４１１で算出された補正値ΔＴon*との和が、ＰＷＭ生成器４１３へ入力される。ＰＷＭ生成器４１３は、電圧制御器４１１から入力される指令値Ｔon*、および指令値Ｔon*と補正値ΔＴon*との和（Ｔon*＋ΔＴon*）に基づいてゲート信号Ｇ１，Ｇ２，Ｇ３，Ｇ４を生成する。本実施の形態では、ΔＩ＝Ｉdc1－Ｉdc2＞０の場合には負電圧印加期間Ｔon2を増加させ、ΔＩ＜０の場合には正電圧印加期間Ｔon1を増加させるようにゲート信号Ｇ１，Ｇ２，Ｇ３，Ｇ４を生成する。 The difference ΔI (= Idc1−Idc2) between the current value Idc1 and the current value Idc2 is input to the correction voltage controller 412. The correction voltage controller 412 determines the correction value ΔTon * of the voltage application time from the current difference ΔI = Idc1−Idc2 corresponding to the bias current so that this value becomes zero. Here, the correction value ΔTon * is a positive value. Then, the sum of the correction value ΔTon * and the correction value ΔTon * calculated by the voltage controller 411 is input to the PWM generator 413. The PWM generator 413 receives the gate signal G1, G2, G3, G4 based on the command value Ton * input from the voltage controller 411 and the sum (Ton * + ΔTon *) of the command value Ton * and the correction value ΔTon *. Is generated. In the present embodiment, the gate signals G1, G2, and G3 are set so that the negative voltage application period Ton2 is increased when ΔI = Idc1−Idc2> 0, and the positive voltage application period Ton1 is increased when ΔI <0. , G4.
　図５は、本実施の形態における偏磁抑制制御を説明するためのタイミングチャートである。図５に示す例は、トランス偏磁が発生して、正電圧印加期間Ｔon1に検出した電流値Ｉdc1が負電圧印加期間Ｔon2に検出した電流値Ｉdc2よりも大きい場合（ΔＩ＞０の場合）を示している。ｔ＜ｔ１ではΔＩdc＝０であって偏磁抑制制御が行われておらず、ΔＩ＞０（Ｉdc1＞Ｉdc2）となっているｔ≧ｔ１では偏磁抑制制御が行われている。 FIG. 5 is a timing chart for explaining the demagnetization suppression control in the present embodiment. In the example shown in FIG. 5, the transformer is demagnetized and the current value Idc1 detected in the positive voltage application period Ton1 is larger than the current value Idc2 detected in the negative voltage application period Ton2 (when ΔI> 0). Show. At t <t1, ΔIdc = 0 and no demagnetization suppression control is performed, and at t ≧ t1 where ΔI> 0 (Idc1> Idc2), demagnetization suppression control is performed.
　Ｉdc1＞Ｉdc2の場合には、トランス１０７の負電圧印加期間Ｔon2がΔＴonだけ長くなるようにゲートパルスの期間を調整する。具体的には、ゲート信号Ｇ３のオフタイミングおよびゲート信号Ｇ４のオンタイミングをそれぞれ差分ΔＴonだけ遅らせる。このように調整することで、ゲート信号Ｇ２とゲート信号Ｇ３とが同時にオン状態となる期間、すなわち負電圧印加期間Ｔon2がΔＴonだけ長くなり、その期間における電流値Ｉdc2が増加する。その結果、Ｉdc1とＩdc2の差ΔＩが小さくり、偏磁を抑制することができる。 When Idc1> Idc2, the gate pulse period is adjusted so that the negative voltage application period Ton2 of the transformer 107 is increased by ΔTon. Specifically, the OFF timing of the gate signal G3 and the ON timing of the gate signal G4 are delayed by the difference ΔTon, respectively. By adjusting in this way, the period during which the gate signal G2 and the gate signal G3 are simultaneously turned on, that is, the negative voltage application period Ton2 is increased by ΔTon, and the current value Idc2 during that period increases. As a result, the difference ΔI between Idc1 and Idc2 is reduced, and demagnetization can be suppressed.
　一方、Ｉdc1＜Ｉdc2の場合には、トランス１０７の正電圧印加期間Ｔon1がΔＴonだけ長くなるようにゲートパルスの期間を調整する。この場合には、例えば、ゲート信号Ｇ３のオンタイミングおよびゲート信号Ｇ４のオフタイミングをそれぞれ差分ΔＴonだけ遅らせる。 On the other hand, if Idc1 <Idc2, the gate pulse period is adjusted so that the positive voltage application period Ton1 of the transformer 107 is increased by ΔTon. In this case, for example, the ON timing of the gate signal G3 and the OFF timing of the gate signal G4 are delayed by the difference ΔTon, respectively.
　図６（ａ）は、比較例として、特許文献１に記載の方法で偏磁抑制を行う場合の制御ブロックを示したものである。この制御方式は、図６（ｂ）に示す従来の出力電圧制御系にトランス１次側の電流制御のマイナ・ループを組込見込んだものである。出力電圧制御器３１１からは差分ΔＶに基づく目標電流Ｉdc*が出力される。この構成では、出力電圧制御器３１１が演算した目標電流Ｉdc*となるように、電流値Ｉdc1，Ｉdc2を個別に制御している。 FIG. 6A shows a control block in the case where the demagnetization is suppressed by the method described in Patent Document 1 as a comparative example. In this control system, a minor loop of current control on the primary side of the transformer is incorporated in the conventional output voltage control system shown in FIG. 6B. The output voltage controller 311 outputs a target current Idc * based on the difference ΔV. In this configuration, the current values Idc1 and Idc2 are individually controlled so that the target current Idc * calculated by the output voltage controller 311 is obtained.
　電流制御器３１２ａには、目標電流Ｉdc*と正電圧印加期間Ｔon1に検出された電流値Ｉdc1との差分が入力される。電流制御器３１２ａは、この差分に基づいて電流値Ｉdc1が目標電流Ｉdc*となるように正電圧印加期間Ｔon1の目標値Ｔon1*を算出する。一方、電流制御器３１２ｂには、目標電流Ｉdc*と負電圧印加期間Ｔon2に検出された電流値Ｉdc2との差分が入力される。電流制御器３１２ｂは、この差分に基づいて電流値Ｉdc2が目標電流Ｉdc*となるように負電圧印加期間Ｔon2の目標値Ｔon2*を算出する。ＰＷＭ生成器４１３は、期間Ｔon1*，Ｔon2*に基づいてゲート信号Ｇ１～Ｇ４を生成する。この場合、電流値Ｉdc1および電流値Ｉdc2に対して、同じ目標値Ｉdc*となるように電流制御が働くために、トランス１０７の偏磁電流を抑制することができる。 The difference between the target current Idc * and the current value Idc1 detected during the positive voltage application period Ton1 is input to the current controller 312a. Based on this difference, the current controller 312a calculates the target value Ton1 * of the positive voltage application period Ton1 so that the current value Idc1 becomes the target current Idc *. On the other hand, the difference between the target current Idc * and the current value Idc2 detected during the negative voltage application period Ton2 is input to the current controller 312b. Based on this difference, the current controller 312b calculates the target value Ton2 * of the negative voltage application period Ton2 so that the current value Idc2 becomes the target current Idc *. The PWM generator 413 generates the gate signals G1 to G4 based on the periods Ton1 * and Ton2 *. In this case, the current control is performed so that the current value Idc1 and the current value Idc2 have the same target value Idc *, so that the bias current of the transformer 107 can be suppressed.
　しかし、この制御方法の場合、通常の出力電圧制御系に電流制御のマイナ・ループをシリーズに組み込んでいるために、出力電圧の応答性が悪化する問題がある。具体的には、負荷電流が急変した時に、出力電圧に大きなアンダーシュートが発生し、出力電圧を一定に保つことができない。この場合、制御のゲインを大きくとることも考えられるが、制御が不安点になり、出力電圧は発振してしまう。 However, in the case of this control method, there is a problem that the output voltage responsiveness deteriorates because the current control minor loop is incorporated in the series in the normal output voltage control system. Specifically, when the load current changes suddenly, a large undershoot occurs in the output voltage, and the output voltage cannot be kept constant. In this case, it is conceivable to increase the control gain, but the control becomes an uneasy point and the output voltage oscillates.
　一方、本実施の形態では、図４に示したように、図６（ｂ）に示す従来の構成に補正電圧制御器４１２をパラレルに設けて、電圧制御器４１１で生成された指令値Ｔon*を補正値ΔＴon*で補正するようにした。そして、図５に示す場合、ゲート信号Ｇ１，Ｇ２は指令値Ｔon*に基づいて生成され、ゲート信号Ｇ３，Ｇ４については偏磁が抑制されるように補正後の（Ｔon*＋ΔＴon*）に基づいて生成される。 On the other hand, in the present embodiment, as shown in FIG. 4, a correction voltage controller 412 is provided in parallel with the conventional configuration shown in FIG. 6B, and the command value Ton * generated by the voltage controller 411 is provided. Is corrected with a correction value ΔTon *. In the case shown in FIG. 5, the gate signals G1 and G2 are generated based on the command value Ton *, and the gate signals G3 and G4 are corrected based on (Ton * + ΔTon *) so as to suppress the demagnetization. Generated.
　本実施の形態では、従来方式のようにＤＣライン電流センサで検出したトランス正側電流とトランス負側電流を個別に制御するのではなく、出力電圧値Ｖoutを出力電圧指令値Ｖout*へ制御する指令値Ｔon*を用いたメインの制御に対して、ΔＴon*の補正をすることで偏磁を抑制している。このように、偏磁抑制のための補正電圧制御器４１２と通常の電圧制御器４１１とがパラレルになっているため、演算処理も早くでき、また収束も早い。このため、従来方式よりも出力電圧の応答性が良い。 In the present embodiment, the transformer positive current and transformer negative current detected by the DC line current sensor are not individually controlled as in the conventional method, but the output voltage value Vout is controlled to the output voltage command value Vout *. The bias control is suppressed by correcting ΔTon * with respect to the main control using the command value Ton *. As described above, the correction voltage controller 412 for suppressing the demagnetization and the normal voltage controller 411 are in parallel, so that the arithmetic processing can be performed quickly and the convergence is also rapid. For this reason, the output voltage response is better than that of the conventional method.
　図７は、本発明の制御方式の応答性と、図６（ａ）に示す制御方式（従来方式）の応答性とを回路シミュレーションにより比較した結果を示す図である。ここでは、負荷電流が急激に増加した場合に、出力電圧がどのように変動するかを評価した。図７の結果を見ると、従来制御方式では、負荷電流の急変に伴って、電圧の大きなアンダーシュートが発生しており、一定値(14V)に落ち着くまでの時間も長く、応答性が悪いことが分かる。一方、本発明の制御方式では、電圧のアンダーシュートは小さく、一定値へ落ち着くまでの時間も短く、応答性が良いことが分かる。 FIG. 7 is a diagram showing a result of circuit simulation comparing the responsiveness of the control method of the present invention and the responsiveness of the control method (conventional method) shown in FIG. 6 (a). Here, it was evaluated how the output voltage fluctuates when the load current increases rapidly. As can be seen from the results in FIG. 7, in the conventional control method, a large undershoot of the voltage occurs with a sudden change in the load current, the time to settle to a constant value (14V) is long, and the responsiveness is poor. I understand. On the other hand, in the control method of the present invention, it can be seen that the voltage undershoot is small, the time required to settle to a constant value is short, and the responsiveness is good.
　なお、上述した制御方式をデジタル制御で実現する場合には、検出電流のＡＤ変換やマイコン・ＤＳＰでの演算時間が必要となるので、リアルタイムでパルス幅を制御することは困難である。そのため、あるキャリア周期において検出した電流値Ｉdc1と電流値Ｉdc2との差に基づくパルス更新は、次のキャリア周期に反映することになる。マイコンの性能などの制約により更新時間をさらに遅らせる場合には、数キャリア周期後のパルスに反映することになる。 Note that, when the above-described control method is realized by digital control, it is difficult to control the pulse width in real time because AD conversion of the detected current and computation time in the microcomputer / DSP are required. Therefore, the pulse update based on the difference between the current value Idc1 and the current value Idc2 detected in a certain carrier cycle is reflected in the next carrier cycle. When the update time is further delayed due to restrictions such as the performance of the microcomputer, it is reflected in the pulse after several carrier cycles.
（変形例１）
　図８，９は、上述した実施の形態の変形例１を説明する図である。図８は制御部１２０のブロック図を示し、図９はゲート信号およびトランス電圧のタイミングチャートである。上述した実施の形態では、図４，５に示したように、トランス１０７の電圧印加期間（負の電圧印加期間）を延ばすようにゲートパルス期間の補正を行った。一方、変形例１では、トランス１０７の電圧印加期間を短くするようにゲートパルス期間の補正を行う。すなわち、図８に示すように、電圧制御器４１１で生成された指令値Ｔon*に対して、補正値ΔＴon*を減算するような補正を行う。 (Modification 1)
8 and 9 are diagrams for describing a first modification of the above-described embodiment. FIG. 8 is a block diagram of the control unit 120, and FIG. 9 is a timing chart of the gate signal and the transformer voltage. In the above-described embodiment, as shown in FIGS. 4 and 5, the gate pulse period is corrected so as to extend the voltage application period (negative voltage application period) of the transformer 107. On the other hand, in Modification 1, the gate pulse period is corrected so as to shorten the voltage application period of the transformer 107. That is, as shown in FIG. 8, correction is performed such that the correction value ΔTon * is subtracted from the command value Ton * generated by the voltage controller 411.
　図９は、図５の場合と同様にΔＩ＞０のタイミングチャートを示したものである。ΔＩ＞０の場合には、トランスの正電圧印加期間Ｔon1がΔＴonだけ短くなるようにゲートパルスの期間を調整する。すなわち、ＰＷＭ生成器４１３は、正電圧印加期間Ｔon1が指令値（Ｔon*－ΔＴon*）と等しくなるように、ゲート信号Ｇ１のオンタイミングおよびゲート信号Ｇ２のオフタイミングをΔＴonだけ遅らせる。ゲート信号Ｇ３，Ｇ４については指令値Ｔon*に基づいて生成され、負電圧印加期間Ｔon2はＴonに制御される。このように調整することでＩdc1が減少し、Ｉdc1とＩdc2の差が小さくなって偏磁が抑制される。 FIG. 9 shows a timing chart of ΔI> 0 as in the case of FIG. When ΔI> 0, the gate pulse period is adjusted so that the positive voltage application period Ton1 of the transformer is shortened by ΔTon. That is, the PWM generator 413 delays the ON timing of the gate signal G1 and the OFF timing of the gate signal G2 by ΔTon so that the positive voltage application period Ton1 becomes equal to the command value (Ton * −ΔTon *). The gate signals G3 and G4 are generated based on the command value Ton *, and the negative voltage application period Ton2 is controlled to Ton. By adjusting in this way, Idc1 is reduced, the difference between Idc1 and Idc2 is reduced, and the demagnetization is suppressed.
　一方、ΔＩ＜０の場合には、トランス１０７の負電圧印加期間Ｔon2がΔＴonだけ短くなるようにゲートパルスの期間を調整する。この場合には、例えば、ゲート信号Ｇ１のオフタイミングおよびゲート信号Ｇ２のオンタイミングをそれぞれ差分ΔＴonだけ遅らせる。 On the other hand, when ΔI <0, the gate pulse period is adjusted so that the negative voltage application period Ton2 of the transformer 107 is shortened by ΔTon. In this case, for example, the OFF timing of the gate signal G1 and the ON timing of the gate signal G2 are delayed by the difference ΔTon, respectively.
（変形例２）
　図１０，１１は、上述した実施の形態の変形例２を説明する図である。図１０は制御部１２０のブロック図を示し、図１１はゲート信号およびトランス電圧のタイミングチャートである。変形例２では、正と負の両方の電圧印加期間を補正するようにした。図１０に示すように、補正電圧制御器４１２は、差分ΔＩに基づいて偏磁抑制に必要な補正値ΔＴon*を算出し、その半分の値であるΔＴon*／２を出力する。ＰＷＭ生成器４１３には、和（Ｔon*＋ΔＴon*／２）および差（Ｔon*－ΔＴon*／２）が入力される。ＰＷＭ生成器４１３は、和（Ｔon*＋ΔＴon*／２）および差（Ｔon*－ΔＴon*／２）に基づいて、偏磁を抑制するようなゲート信号Ｇ１～Ｇ４を生成する。 (Modification 2)
10 and 11 are diagrams illustrating a second modification of the above-described embodiment. FIG. 10 is a block diagram of the control unit 120, and FIG. 11 is a timing chart of the gate signal and the transformer voltage. In the modification 2, both positive and negative voltage application periods are corrected. As shown in FIG. 10, the correction voltage controller 412 calculates a correction value ΔTon * necessary for suppressing the demagnetization based on the difference ΔI, and outputs ΔTon * / 2 which is a half value thereof. The PWM generator 413 receives the sum (Ton * + ΔTon * / 2) and the difference (Ton * −ΔTon * / 2). The PWM generator 413 generates the gate signals G1 to G4 that suppress the demagnetization based on the sum (Ton * + ΔTon * / 2) and the difference (Ton * −ΔTon * / 2).
　図１１は、図５の場合と同様にΔＩ＞０のタイミングチャートを示したものである。ここでは、正電圧印加期間Ｔon1をΔＴon／２だけ短くすると共に、負電圧印加期間Ｔon2をΔＴon／２だけ長くすることにより偏磁を抑制するようにした。図１１に示す例では、ゲート信号Ｇ１のオンタイミングおよびゲート信号Ｇ２のオフタイミングをΔＴon／２だけ遅らせると共に、ゲート信号Ｇ３のオフタイミングおよびゲート信号Ｇ４のオンタイミングをΔＴon／２だけ遅らせるようにした。その結果、電流値Ｉdc1と電流値Ｉdc2との差が小さくなり、偏磁を抑制することができる。 FIG. 11 shows a timing chart of ΔI> 0 as in the case of FIG. Here, the positive voltage application period Ton1 is shortened by ΔTon / 2 and the negative voltage application period Ton2 is lengthened by ΔTon / 2 to suppress the demagnetization. In the example shown in FIG. 11, the on timing of the gate signal G1 and the off timing of the gate signal G2 are delayed by ΔTon / 2, and the off timing of the gate signal G3 and the on timing of the gate signal G4 are delayed by ΔTon / 2. . As a result, the difference between the current value Idc1 and the current value Idc2 becomes small, and the bias can be suppressed.
　一方、ΔＩ＜０の場合には、正電圧印加期間Ｔon1をΔＴon／２だけ長くすると共に、負電圧印加期間Ｔon2をΔＴon／２だけ短くする。この場合には、例えば、ゲート信号Ｇ３のオンタイミングおよびゲート信号Ｇ４のオフタイミングをΔＴon／２だけ遅らせると共に、ゲート信号Ｇ１のオフタイミングおよびゲート信号Ｇ２のオンタイミングをΔＴon／２だけ遅らせる。 On the other hand, when ΔI <0, the positive voltage application period Ton1 is lengthened by ΔTon / 2 and the negative voltage application period Ton2 is shortened by ΔTon / 2. In this case, for example, the on timing of the gate signal G3 and the off timing of the gate signal G4 are delayed by ΔTon / 2, and the off timing of the gate signal G1 and the on timing of the gate signal G2 are delayed by ΔTon / 2.
　以上説明したように、本実施の形態では、電力変換装置であるＤＣ-ＤＣコンバータ１は、スイッチング回路部である高電圧一次側回路１０１と、高電圧一次側回路１０１の入力側に流れる電流を検出するＤＣライン電流センサ３０１と、高電圧一次側回路１０１の出力側に接続されたトランス１０７と、トランス１０７に正の電圧が印加される正電圧印加期間Ｔon1と負の電圧が印加される負電圧印加期間Ｔon1とを、高電圧一次側回路１０１のスイッチング動作により制御することで電力変換量を制御する制御部１２０と、を備える。そして、制御部１２０は、正電圧印加期間Ｔon1においてＤＣライン電流センサ３０１で検出される電流値Ｉdc1と負電圧印加期間Ｔon2においてＤＣライン電流センサ３０１で検出される電流値Ｉdc2との差に基づいて、電流値Ｉdc1と電流値Ｉdc2とが等しくなるように正電圧印加期間Ｔon1および負電圧印加期間Ｔon2の少なくとも一方を補正する。その結果、電圧応答性の低下を抑えつつ偏磁の抑制を行うことができる。 As described above, in the present embodiment, the DC-DC converter 1 that is a power conversion device uses a high-voltage primary circuit 101 that is a switching circuit unit and a current that flows to the input side of the high-voltage primary circuit 101. DC line current sensor 301 to detect, transformer 107 connected to the output side of high-voltage primary circuit 101, positive voltage application period Ton1 in which a positive voltage is applied to transformer 107, and negative in which a negative voltage is applied And a control unit 120 that controls the amount of power conversion by controlling the voltage application period Ton1 by the switching operation of the high-voltage primary side circuit 101. Then, the control unit 120 is based on the difference between the current value Idc1 detected by the DC line current sensor 301 in the positive voltage application period Ton1 and the current value Idc2 detected by the DC line current sensor 301 in the negative voltage application period Ton2. At least one of the positive voltage application period Ton1 and the negative voltage application period Ton2 is corrected so that the current value Idc1 and the current value Idc2 are equal. As a result, it is possible to suppress demagnetization while suppressing a decrease in voltage response.
　補正方法としては、図４，５において説明したように、電流値Ｉdc1と電流値Ｉdc2との差ΔＩが正である場合には負電圧印加期間Ｔon2を増加させ、差ΔＩが負である場合には正電圧印加期間Ｔon1を増加させるように補正しても良い。また、差ΔＩが正である場合には正電圧印加期間Ｔon1を減少させ、差ΔＩが負である場合には負電圧印加期間Ｔon2を減少させるように補正してもよい。さらにまた、差ΔＩが正である場合には、正電圧印加期間Ｔon1を減少させると共に負電圧印加期間Ｔon2を増加させ、差ΔＩが負である場合には、正電圧印加期間Ｔon1を増加させると共に前記負電圧印加期間Ｔon2を減少させるように補正しても良い。 As a correction method, as described in FIGS. 4 and 5, when the difference ΔI between the current value Idc1 and the current value Idc2 is positive, the negative voltage application period Ton2 is increased, and when the difference ΔI is negative. May be corrected to increase the positive voltage application period Ton1. Further, the correction may be made so that the positive voltage application period Ton1 is decreased when the difference ΔI is positive and the negative voltage application period Ton2 is decreased when the difference ΔI is negative. Furthermore, when the difference ΔI is positive, the positive voltage application period Ton1 is decreased and the negative voltage application period Ton2 is increased. When the difference ΔI is negative, the positive voltage application period Ton1 is increased. You may correct | amend so that the said negative voltage application period Ton2 may be decreased.
　また、正電圧印加期間Ｔon1および負電圧印加期間Ｔon2に対する補正値ΔＴonを差ΔＩの大きさに比例させることで、偏磁の程度によらず素早く抑制することができる。もちろん、差ΔＩの大きさに依らず補正値ΔＴonを一定の値としても構わない。 In addition, by making the correction value ΔTon for the positive voltage application period Ton1 and the negative voltage application period Ton2 proportional to the magnitude of the difference ΔI, it can be quickly suppressed regardless of the degree of demagnetization. Of course, the correction value ΔTon may be a constant value regardless of the magnitude of the difference ΔI.
　また、ＤＣ－ＤＣコンバータでは、従来から高電圧一次側回路１０１の入力側に並列接続された平滑コンデンサ１０４との接続ラインに過電流検知のためのＤＣライン電流センサが設けられているが、これを図１に示すＤＣライン電流センサ３０１に兼用することでコストアップを抑制できる。 In the DC-DC converter, a DC line current sensor for detecting an overcurrent is conventionally provided in a connection line with the smoothing capacitor 104 connected in parallel to the input side of the high voltage primary circuit 101. Is also used as the DC line current sensor 301 shown in FIG.
　上記では、種々の実施の形態および変形例を説明したが、本発明はこれらの内容に限定されるものではない。本発明の技術的思想の範囲内で考えられるその他の態様も本発明の範囲内に含まれる。 Although various embodiments and modifications have been described above, the present invention is not limited to these contents. Other embodiments conceivable within the scope of the technical idea of the present invention are also included in the scope of the present invention.
　１…ＤＣ－ＤＣコンバータ、１０１…高電圧一次側回路、１０２…低圧二次側回路、１０４…平滑コンデンサ、１０７…トランス、１２０…制御部、３０１…ＤＣライン電流センサ、３１１，４１１…出力電圧制御器。４１２…補正電圧制御器、４１３…ＰＷＭ生成器、Ｔon1…正電圧印加期間、Ｔon2…負電圧印加期間 DESCRIPTION OF SYMBOLS 1 ... DC-DC converter, 101 ... High voltage primary side circuit, 102 ... Low voltage secondary side circuit, 104 ... Smoothing capacitor, 107 ... Transformer, 120 ... Control part, 301 ... DC line current sensor, 311, 411 ... Output voltage Controller. 412: Correction voltage controller, 413: PWM generator, Ton1: Positive voltage application period, Ton2: Negative voltage application period

Claims (7)

  1. 　スイッチング回路部と、
    　前記スイッチング回路部の入力側に流れる電流を検出する電流検出部と、
    　前記スイッチング回路部の出力側に接続されたトランスと、
    　前記トランスに正の電圧が印加される第１印加期間と負の電圧が印加される第２印加期間とを、前記スイッチング回路部のスイッチング動作により制御することで電力変換量を制御する制御部と、を備え、
    　前記制御部は、前記第１印加期間において前記電流検出部で検出される第１の電流と前記第２印加期間において前記電流検出部で検出される第２の電流との差に基づいて、前記第１の電流と前記第２の電流とが等しくなるように前記第１印加期間および前記第２印加期間の少なくとも一方を補正する、電力変換装置。     A switching circuit section;
    A current detection unit for detecting a current flowing on the input side of the switching circuit unit;
    A transformer connected to the output side of the switching circuit unit;
    A control unit that controls a power conversion amount by controlling a first application period in which a positive voltage is applied to the transformer and a second application period in which a negative voltage is applied by a switching operation of the switching circuit unit; With
    The control unit, based on the difference between the first current detected by the current detection unit in the first application period and the second current detected by the current detection unit in the second application period, A power converter that corrects at least one of the 1st application period and the 2nd application period so that the 1st current and the 2nd current may become equal.
  2. 　請求項１に記載の電力変換装置において、
    　前記制御部は、
    　前記第１の電流と前記第２の電流との差が正である場合には前記第２印加期間を増加させ、前記第１の電流と前記第２の電流との差が負である場合には前記第１印加期間を増加させるように補正する、電力変換装置。     The power conversion device according to claim 1,
    The controller is
    When the difference between the first current and the second current is positive, the second application period is increased, and when the difference between the first current and the second current is negative Correct | amends so that the said 1st application period may be increased.
  3. 　請求項１に記載の電力変換装置において、
    　前記制御部は、
    　前記第１の電流と前記第２の電流との差が正である場合には前記第１印加期間を減少させ、前記第１の電流と前記第２の電流との差が負である場合には前記第２印加期間を減少させるように補正する、電力変換装置。     The power conversion device according to claim 1,
    The controller is
    When the difference between the first current and the second current is positive, the first application period is decreased, and when the difference between the first current and the second current is negative Correct | amends so that the said 2nd application period may be decreased.
  4. 　請求項１に記載の電力変換装置において、
    　前記制御部は、
    　前記第１の電流と前記第２の電流との差が正である場合には、前記第１印加期間を減少させると共に前記第２印加期間を増加させ、
    　前記第１の電流と前記第２の電流との差が負である場合には、前記第１印加期間を増加させると共に前記第２印加期間を減少させるように補正する、電力変換装置。     The power conversion device according to claim 1,
    The controller is
    If the difference between the first current and the second current is positive, decrease the first application period and increase the second application period;
    When the difference between the first current and the second current is negative, the power conversion apparatus corrects the first application period so as to increase and the second application period to decrease.
  5. 　請求項１から請求項４までのいずれか一項に記載の電力変換装置において、
    　前記第１印加期間および前記第２印加期間に対する補正量は、前記第１の電流と前記第２の電流との差の大きさに比例している、電力変換装置。     In the power converter device according to any one of claims 1 to 4,
    The correction amount for the first application period and the second application period is proportional to the magnitude of the difference between the first current and the second current.
  6. 　請求項１から請求項４までのいずれか一項に記載の電力変換装置において、
    　前記スイッチング回路部の入力側に並列接続されたコンデンサを備え、
    　前記電流検出部は、前記スイッチング回路部と前記コンデンサとを接続する配線に流れる電流を検出する、電力変換装置。     In the power converter device according to any one of claims 1 to 4,
    A capacitor connected in parallel on the input side of the switching circuit unit,
    The current detection unit is a power conversion device that detects a current flowing in a wiring connecting the switching circuit unit and the capacitor.
  7. 　請求項１から請求項４までのいずれか一項に記載の電力変換装置において、
    　前記スイッチング回路部は、上アームおよび下アームを構成するスインチング素子からなる第１スイッチング相と、上アームおよび下アームを構成するスインチング素子からなる第２スイッチング相とを備え、
    　前記制御部は、前記スイッチング回路部に設けられた各々のスイッチング素子のオンオフを順次切り替えることで、前記トランスに正の電圧と負の電圧とを交互に印加する、電力変換装置。     In the power converter device according to any one of claims 1 to 4,
    The switching circuit unit includes a first switching phase composed of switching elements constituting the upper arm and the lower arm, and a second switching phase composed of switching elements constituting the upper arm and the lower arm,
    The said control part is a power converter device which alternately applies a positive voltage and a negative voltage to the said transformer by switching on / off of each switching element provided in the said switching circuit part sequentially.
PCT/JP2017/025354 2016-09-02 2017-07-12 Power conversion device WO2018042896A1 (en)

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01171591U (en) * 1988-05-16 1989-12-05
JP2004015900A (en) * 2002-06-05 2004-01-15 Omron Corp Electric power conversion system of push-pull circuit
WO2014077281A1 (en) * 2012-11-15 2014-05-22 日立オートモティブシステムズ株式会社 Power conversion apparatus

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01171591U (en) * 1988-05-16 1989-12-05
JP2004015900A (en) * 2002-06-05 2004-01-15 Omron Corp Electric power conversion system of push-pull circuit
WO2014077281A1 (en) * 2012-11-15 2014-05-22 日立オートモティブシステムズ株式会社 Power conversion apparatus

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