Classifications

• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K1/00—Printed circuits
  • H05K1/02—Details
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K3/00—Apparatus or processes for manufacturing printed circuits
  • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
  • H05K3/42—Plated through-holes or plated via connections
  • H05K3/422—Plated through-holes or plated via connections characterised by electroless plating method; pretreatment therefor
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K1/00—Printed circuits
  • H05K1/02—Details
  • H05K1/03—Use of materials for the substrate
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K1/00—Printed circuits
  • H05K1/02—Details
  • H05K1/03—Use of materials for the substrate
  • H05K1/0313—Organic insulating material
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K3/00—Apparatus or processes for manufacturing printed circuits
  • H05K3/0011—Working of insulating substrates or insulating layers
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K3/00—Apparatus or processes for manufacturing printed circuits
  • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
  • H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
  • H05K3/181—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating
  • H05K3/182—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating characterised by the patterning method
  • H05K3/185—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating characterised by the patterning method by making a catalytic pattern by photo-imaging
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K3/00—Apparatus or processes for manufacturing printed circuits
  • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
  • H05K3/42—Plated through-holes or plated via connections
  • H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
  • H05K3/426—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in substrates without metal
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
  • H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
  • H05K2201/0203—Fillers and particles
  • H05K2201/0206—Materials
  • H05K2201/0236—Plating catalyst as filler in insulating material
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
  • H05K2201/03—Conductive materials
  • H05K2201/0332—Structure of the conductor
  • H05K2201/0335—Layered conductors or foils
  • H05K2201/0344—Electroless sublayer, e.g. Ni, Co, Cd or Ag; Transferred electroless sublayer
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
  • H05K2201/03—Conductive materials
  • H05K2201/0332—Structure of the conductor
  • H05K2201/0364—Conductor shape
  • H05K2201/0376—Flush conductors, i.e. flush with the surface of the printed circuit
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
  • H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
  • H05K2203/025—Abrading, e.g. grinding or sand blasting
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
  • H05K2203/09—Treatments involving charged particles
  • H05K2203/095—Plasma, e.g. for treating a substrate to improve adhesion with a conductor or for cleaning holes
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
  • H05K2203/10—Using electric, magnetic and electromagnetic fields; Using laser light
  • H05K2203/107—Using laser light
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K3/00—Apparatus or processes for manufacturing printed circuits
  • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
  • H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor

Definitions

• the present invention relates to a catalytic laminate and its uses in circuit board fabrication.
• the laminate has properties which provide for fine pitch circuit interconnects which can be formed on the surface of the catalytic laminate or in trenches to form circuit board layers having planar surfaces with embedded or surface conductors.
• PCB printed circuit boards
• traces conductive metal interconnects
• layers conductive metal interconnects
• traces conductive metal interconnects
• Each dielectric core has traces formed on one surface or on both surfaces, and by stacking several such dielectric cores having traces formed in them interspersed with bare
• the dielectric substrate comprises an epoxy resin embedded in a fiber matrix such as glass fiber woven into a cloth.
• copper is laminated onto the outer surfaces of a dielectric layer, the copper surfaces are patterned such as with a
• PCB Printed circuit boards
• One type of electronic component is a through-hole device which is mounted on the PCB by having leads positioned through one or more holes in the PCB, where the PCB hole includes a conductive annular ring pad on each trace connect layer, and the component lead is soldered to the annular ring pad of the PCB hole.
• Through hole components have leads which tend to be
• SMT surface mount technology
• interconnects of conductive traces from one layer to another are accomplished using through-hole vias, where a conductive trace on one trace layer leads to a hole which is typically drilled through one or more dielectric layers of the PCB and plated with copper or other conductive metal to complete the trace layer connection.
• a hole drilled through all dielectric layers is known as a thru-via
• a hole drilled through an outer layer only is known as a micro-via
• a hole drilled through one or more inner layers is known as a blind via.
• the via is
• the thickness of pre-patterned or post- patterned copper on a printed circuit board laminate may be increased using electroplating, where the PCB or dielectric layer with traces is placed in an electrolytic bath, and a DC source is connected between a sacrificial anodic
• a conductor such as a copper rod
• an existing conductive layer of a PCB a pre-existing conductive copper layer is not present on a PCB to facilitate electroplating, such as the case of bare dielectric material or drilled via holes, a seed layer of copper must first be deposited.
• catalytic pre-preg material which provides a blanket etched surface which exposes catalytic particles, thereafter forming traces using a combination of electroless plating to provide a conductive deposition layer, followed by electroless plating for forming traces of desired thickness for fine trace linewidth and trace separation. It is also desired to provide a catalytic pre-preg for use in printed circuit processing, where the catalytic pre-preg has a catalytic- free surface and where removal of the surface of the catalytic pre-preg exposes the catalytic particles for formation of traces in areas where surface material has been removed.
• a first object of the invention is a catalytic pre-preg containing catalytic particles, where the
• catalytic pre-preg conceals the catalytic particles under a resin rich outer surface which does not expose the
• catalytic pre-preg has been removed, where the surface removal may be accomplished using any of laser cutting, mechanical abrasion, mechanical cutting, chemical or plasma etching, or any other means which removes the outer surface of the pre-preg and exposes the underlying catalytic particles below the surface of the pre-preg, thereafter forming traces by drilling holes and performing a blanket etch over the surface, electroplating the entire surfaces, patterning the surface with a photoresist, electroplating the surfaces without photoresist, stripping the photoresist and quick etching long enough to remove the exposed
• a second object of the invention is a method for manufacture of a catalytic pre-preg which has a resin rich outer surface which does not contain exposed catalytic particles and a catalyst rich layer below the resin rich outer surface, where the catalytic pre-preg is formed using a process having the steps:
• a fiber infusion step wherein a fiber cloth is infused with a catalytic resin formed from blending a resin with catalytic particles;
• a dwell temp whereby an elevated temperature is applied to the laminate for a dwell time duration at a gel point temperature
• a catalytic pre-preg is formed by blending a resin, volatile solvent, and catalytic particles to form a catalytic resin mixture, infusing the catalytic resin into a fiber fabric such as woven glass fiber or other fabric to form an "A- Stage" catalytic pre-preg, baking the fiber and resin together at elevated temperature to remove most of the volatile solvent and form a partially cured "B-Stage" catalytic pre-preg such as in sheet form, thereafter placing the B-stage pre-preg into a lamination press, heating the B-stage pre-preg at a gel point such that the pre-preg is in a liquid/solid equilibrium, thereafter curing the pre-preg at an elevated temperature and pressure for a dwell time sufficient for the catalytic particles to migrate away from the outer surfaces of the pre-preg and to form a finished "C-stage” pre-preg with a resin-rich surface which is free from exposed surface catalytic particles.
• a single or multi-layer PCB is formed by patterning an exposed surface onto a catalytic pre-preg having a resin rich surface which excludes catalytic particles from the surface, where the catalytic particles are distributed below the resin rich surface and are not exposed.
• the catalytic particles are exposed by removing the surface of the material using any removal means, including laser ablation, plasma etching, chemical etching, mechanical abrasion or cutting, using any of these
• the catalytic laminate is placed in an electroless plating bath, where the metal of the electroless plating (such as Cu) is attracted to, and bonds to, the exposed catalytic particles (such as Pt) in the patterned regions where the resin rich surface has been removed.
• the second step continues until the electroless plating fills the sides and bottom of the patterned trench with plated metal to the surrounding native surface level of the catalytic laminate.
• the surface of the patterned trench is planarized, such as by polishing, grinding, machining, or etching, to match the level of the electroless plating level to the surrounding native surface of the catalytic laminate.
• soldermask is applied to cover regions of the
• the catalytic pre-preg of the first embodiment has holes formed through drilling or ablation or other means of removing material to create an aperture in the catalytic pre-preg, the aperture adjacent to a pad region where the surface of the catalytic pre-preg is removed adjacent to the aperture, thereby exposing underlying catalytic particles of the catalytic pre-preg in the inner surfaces of the aperture and also the outer surfaces of the catalytic pre-preg, which is next plated into an electroless plating bath.
• the resulting catalytic pre-preg thereafter forms a conductive surface trace which is electrically connected to a
• the via may optionally form a component mounting pad.
• the via may also include a conductive surface trace on the opposite side of the catalytic pre- preg, where the first surface trace, via, and second surface trace were all created in a single electroless plating step. After electroless plating, the outer
• a single or multi- layer PCB is formed by a process having a first step of applying a catalytic adhesive to one or both sides of the non-catalytic pre-preg, where the catalytic adhesive includes a resin mixed with catalytic particles and forms a catalytic adhesive layer over the non-catalytic pre-preg.
• the catalytic pre-preg surface layer is selectively partially removed such as by using a plasma cleaning or plasma etching process for a duration of time sufficient to expose the catalytic particles while leaving the underlying adhesive resin which secures the catalytic particles to the non-catalytic pre-preg.
• the partially removed or etched catalytic adhesive is exposed to electroless plating using metal ions in solution which bind to the catalytic particles, which is performed until a substantially continuous conductive layer of metal is deposited.
• a pattern mask is applied which provides open areas where traces are desired.
• the continuous conductive layer is used as an electrode for electroplating in a metallic bath such that metallic ions in solution electro-deposit onto the
• patterned exposed conductive layers formed in the third step electroless deposition In a sixth step, the pattern mask is stripped, and in a seventh step, a quick etch is performed for a sufficient time to remove the electroless plating in previously unexposed areas under the pattern mask.
• a conductive via is formed in a non-catalytic laminate by forming a first aperture in the non-catalytic laminate, optionally adjacent to a first pad or second pad formed from a conductor on a first surface or second surface of the non-catalytic laminate, filling the first aperture with a catalytic resin or catalytic adhesive, allowing the catalytic resin or adhesive to cure, drilling a second hole in the first aperture which is smaller in diameter than the aperture, and electroless plating the second hole and surrounding pad, thereby forming a connection from the inner surface of the second hole to the first pad or second pad .
• a non- catalytic laminate has a catalytic adhesive applied, the catalytic adhesive comprising a resin and catalytic
• the catalytic adhesive having a thickness of at least two times greater than the largest catalytic
• a catalytic laminate has a catalytic adhesive applied to at least one surface, the catalytic laminate comprising a pre preg with catalytic particles, the adhesive comprising a resin and catalytic particles, the catalytic adhesive and catalytic laminate drilled to form through holes, traces patterned on the surface of the catalytic adhesive by removing the surface layer of the catalytic adhesive, thereafter forming traces by electroless plating on the patterned traces, thereafter planarizing the at least one surface.
• a circuit board is formed by blanket etching a catalytic pre preg to expose catalytic particles below an exclusion depth, drilling via holes, electroless plating the circuit board, patterning the circuit board with a photoresist, electroplating the board to form traces on regions which are not coated with photoresist, thereafter removing the photoresist, and quick etching the exposed electroless plated copper to form a circuit board with traces.
• Figure 1A shows a schematic view of a process for forming a raw catalytic pre-preg.
• Figure IB shows a vacuum lamination press for forming a finished catalytic pre-preg from a raw catalytic pre-preg.
• Figure 1C shows a vacuum lamination stage to for forming multiple layers of catalytic pre-preg during a lamination.
• Figure 2 shows processing times for a vacuum lamination step of figure 1.
• Figure 3 shows process steps for formation of a catalytic pre-preg.
• Figure 4 shows a plot of catalytic particle distribution in a pre-preg material with respect to a section view of the pre-preg material.
• Figure 5A shows a section view of native catalytic pre-preg.
• Figure 5B shows a section view of catalytic pre-preg after a surface removal step.
• Figure 5C shows a section view of catalytic pre-preg during an electroless plating step during a time sequence.
• Figure 5D shows a section view of catalytic pre-preg after a surface smoothing step.
• Figure 5E shows a section view of catalytic pre-preg after a solder mask step.
• Figure 5F shows a section view of a prior art etched copper trace on a non-catalytic pre-preg.
• Figure 6A shows a section view of a catalytic adhesive applied to a non-catalytic pre-preg.
• Figure 6B shows a section view of figure 6A after a plasma etch step.
• Figure 6C shows a section view of electroless plating over a pre-preg substrate.
• Figure 6D shows a section view of masking material patterned over a pre-preg substrate.
• Figure 6E shows a section view of copper electroplate over a pre-preg substrate.
• Figure 6F shows a section view of copper electroplate after stripping a mask.
• Figure 6G shows a section view of a pre-preg substrate after a quick etch to remove surface copper.
• Figure 7A shows a section view of a non- catalytic pre-preg with foil lamination.
• Figure 7B shows a section view of an etched non-catalytic pre-preg after patterning.
• Figure 7C shows a section view of a non- catalytic pre-preg after a hole is drilled.
• Figure 7D shows a section view of a non- catalytic pre-preg after filling a hole with catalytic filler.
• Figure 7E shows a section view of a non- catalytic pre-preg after drilling of a second annular hole.
• Figure 7F shows a section view of a non- catalytic pre-preg after electroless plating of an annular hole.
• Figure 7G shows a perspective transparent view of a via formed using the process of figures 7A to 7F.
• Figure 8A shows a section view of a non- catalytic pre-preg laminate.
• Figure 8B shows figure 8A after application of a catalytic adhesive.
• Figure 8C shows figure 8B after a hole
• Figure 8D shows figure 8C after a surface removal operation.
• Figure 8E shows figure 8D after an electroless plating operation.
• Figures 9A, 9B, 9C, 9D, and 9E show various stages of a section view of a catalytic adhesive applied over a catalytic laminate, which is drilled, etched, electroless plated, and planarized.
• Figures 10A, 10B, IOC, 10D, 10E, 10F, 10G, 10H and 101 show various stages of a section view of a
• catalytic laminate which has traces formed on exposed catalytic surfaces.
• Figure 1A shows an example process for
• pre-preg a matrix of pre-impregnated fibers bound in resin
• many different materials may be used for the fibers of pre-preg, including woven glass-fiber cloth, carbon-fiber, or other fibers, and a variety of different materials may be used for the resin, including epoxy resin, polyimide resin, cyanate ester resin, PTFE (Teflon) blend resin, or other resins.
• One aspect of the invention is a printed circuit board laminate capable of supporting fine pitch conductive traces on the order of 1 mil (25u) , and while the description is drawn to the formation of copper traces using catalysts for electroless copper formation, it is understood that the scope of the invention may be extended to other metals suitable for electroless plating and electro-plating.
• elemental palladium is preferred as the catalyst, although selected periodic table transition metal elements, such as group 9 to 11 platinum (Pt) , rhodium (Rh) , iridium (Ir), nickel (Ni), gold (Au) , silver (Ag) , cobalt (Co) , or copper (Cu) , or other compounds of these, including other metals such as iron (Fe), manganese (Mn) , chromium (Cr) , molybdenum (Mo) , tungsten (W) , titanium (Ti), tin (Sn) , or mixtures or salts of the above, any of which may be used as catalytic particles.
• platinum platinum
• Rh rhodium
• Ir iridium
• Ni nickel
• Au gold
• silver Ag
• cobalt Co
• Cu copper
• other metals such as iron (Fe), manganese (Mn) , chromium (Cr) , molybden
• the present candidate list is intended to be exemplar rather than comprehensive, it is known in the art that other catalysts for attracting copper ions may also be used.
• the catalytic particles are homogeneous catalytic particles.
• the catalytic particles are inorganic particles or high temperature resistant plastic particles which are coated with a few angstrom thickness of catalytic metal, thereby forming heterogeneous catalytic particles having a thin catalytic outer surface encapsulating a non-catalytic inner particle. This formulation may be desirable for larger catalytic particles, such as those on the order of 25u in longest dimension.
• the heterogeneous catalytic particle of this formulation can comprise an inorganic, organic, or inert filler such as silicon dioxide (Si02), an inorganic clay such as Kaolin, or a high temperature plastic filler coated on the surface with a catalyst such as palladium adsorbed onto the surface of the filler, such as by vapor deposition or chemical deposition. Only a few atomic layers of catalyst are required for the catalytic particle to have desirable properties conducive to
• inorganic is sorted by size to include particles less than 25u in size, these sorted inorganic particles are mixed into an aqueous bath in a tank, agitated, and then a palladium salt such as PdCl (or any other catalyst such as a salt of silver of other catalyst) is introduced with an acid such as HC1, and with a reducing agent such as
• Example inorganic fillers include clay minerals such as hydrous aluminum phyllosilicates , which may contain variable amounts of iron, magnesium, alkali
• Example inorganic fillers includes silicon dioxide, aluminum silicate, kaolinite (Al 2 Si 2 05 (OH) ) , polysilicate, or other clay minerals which belong to the kaolin or china clay family.
• Example organic fillers include PTFE (Teflon) and other polymers with high temperature resistance.
• Examples of palladium salts are: BrPd, CL 2 Pd, Pd(CN) 2 , I 2 Pd, Pd (N0 3 ) 2*2H 2 0, Pd(N0 3 ) 2 , PdS0 4 , Pd(NH 3 )4Br 2 , Pd (NH 3 ) 4C1 2 H 2 0.
• inventions may also contain a mixture of heterogeneous catalytic particles (for example, catalytic materials coated over inorganic filler particles), homogeneous catalytic particles (such as elemental palladium), as well as non-catalytic particles (selected from the family of inorganic fillers) .
• heterogeneous catalytic particles for example, catalytic materials coated over inorganic filler particles
• homogeneous catalytic particles such as elemental palladium
• non-catalytic particles selected from the family of inorganic fillers
• Figure 1A shows a roll of fabric cloth 102 such as woven glass fiber is fed through as set of rollers which guide the fabric into tank 108 which is filled with an epoxy resin blended with catalytic particles and mixed with a volatile liquid to reduce the viscosity, thereby forming an A-stage (liquid) pre-preg.
• the resin may be a polyimide resin, a blend of epoxy and cyanide ester (which provides curing at elevated temperatures), or any other suitable resin formulation with selectable viscosity during coating and thermosetting properties after cooling. Fire retardants may be added, for example to comply with a flammability standard, or to be compatible with one of the standard FR series of pre- preg such as FR-4 or FR-10.
• dielectric constant ⁇ permittivity
• loss tangent ⁇ which is measure of frequency-dependent energy absorption over a distance
• the resin is blended with catalytic particles which have been sorted for size.
• the catalytic particles include at least one of: homogeneous catalytic particles (metallic palladium) , or heterogeneous catalytic particles (palladium coated over an inorganic particle or high temperature plastic) , and for either formulation, the catalytic particles preferably having a maximum extent of less than 25u and with 50% of the particles by count sized between 12u and 25u, or the range l-25u, or smaller.
• homogeneous or heterogeneous are in the size range lu-25u.
• homogeneous catalytic particles are formed by grinding metallic palladium into particles and passing the resultant particles through a sieve with a mesh having 25u rectangular openings.
• the catalytic resin mixture 106 is formed by blending homogeneous or heterogeneous catalytic
• the particles into the pre-preg resin by a ratio of weights, such as the ratio of substantially 12% catalytic particles by weight to the weight of resin.
• the ratio by weight of catalytic particles in the resin mixture may alternatively be in the range of 8-16% of catalytic particle weight to the total weight of resin. It is understood that other blending ratios may also be used, and it may be preferable to use smaller particles.
• the catalytic particle density is chosen to provide a mean distance between catalytic particles on the order of 3u-5u.
• the catalytic resin impregnated cloth is guided to rollers 110, which establish the thickness of the uncured liquid A-stage pre-preg 105 which also establishes the percentage of resin in the resin/glass+resin ratio.
• the A-stage pre-preg 105 is then passed through a baking oven 103 which drives out the organics and other volatile compounds of the A-stage pre- preg and greatly reduces the liquid content, forming tack- free B-stage pre-preg 107 delivered by rollers 111.
• oven 103 dries the volatile compounds from an about 80% solvent ratio of A-stage pre-preg to less than about .1% solvent ratio for B-stage pre-preg.
• the resulting B-stage pre-preg 107 is provided to material handling 111 and can be cut into sheets for ease of
• the pre-preg sheets positioned near the outer surfaces are selected to have greater than 65% resin, such as Glass 106 (71% resin), Glass 1067, or Glass 1035 (65% resin), and the inner pre-preg sheets (which are not subject to surface removal) are selected to have less than 65% resin.
• a woven fiberglass may be used with the inner pre-preg layers and a flat unwoven fiberglass may be used in the outer resin rich pre-preg layers.
• the combination of resin-rich pre-preg and flat unwoven fiberglass on the outer surface layer results in an exclusion zone of .7 mil (17u) to .9 mil (23u) between an outer surface and the encapsulated
• Glass styles 106, 1035, and 1067 are preferred for use on the outer resin rich surface since the glass fiber thicknesses are smaller (1.3-1.4 mil / 33-35u) than the glass fiber thickness found in typical pre-preg sheets with greater than 65% resin used in the central regions of the laminate, such as glass style 2116, which has 3.7 mil (94u) fibers. These values are given as examples, the smallest glass fibers which are commercially available are expected to continue to reduce in diameter.
• Step 302 is the blending of catalytic particles into the resin, often with an organic volatile added to lower the mixture viscosity, which forms the catalytic resin 106 placed in reservoir 108.
• Step 304 is the infusion of catalytic resin into the fabric such as rollers 104 of figure 1 may provide to form A-stage pre-preg
• step 306 is the initial rolling of catalytic resin infused fabric into B-stage pre- preg such as by rollers 110
• step 307 is a baking step for removing organic solvents to form B-stage pre-preg
• step 308 is the pressing of catalytic resin infused fabric 130 into sheets of catalytic C-stage pre-preg in lamination press 126, which follows the temperature cycle of plot 202, with vacuum pump 128 evacuating chamber 124 throughout the lamination process to remove air bubbles from the epoxy and reduce any air voids that may form in the epoxy.
• the cooled finished catalytic C-stage pre-preg sheets are cut and stored for later use.
• the figure 2 plot 202 of temperature vs. time shows the temperature profile of the pre-preg in the lamination press 112, which is critical for the formation of a catalytic pre-preg which has surface property of catalytic particles being excluded from the outer resin rich surface, but which are present just below the outer resin rich surface.
• the resin is in liquid state in reservoir 108, and the pre-preg is in in an A-stage after the resin is impregnated into the fiberglass and passes through rollers 110.
• the pre-preg is in a B-stage after baking 103 where the volatile organics are baked off accompanied by an initial resin hardening, which converts the B-stage pre-preg into becomes C-stage pre-preg at the end of the lamination cycle, such as the cooling phase of figure 2.
• the B-stage pre-preg is placed into the
• the dwell temperature and gel point temperature are pressure and resin dependent, in the example range of 120C (for epoxy) to 350C (for
• FIG. 4 shows the resultant catalytic pre-preg 402 formed by the process of figures 1, 2, and 3, where the catalytic particles 414 are distributed uniformly within the central region of pre-preg 402, but are not present below a boundary region 408 below first surface 404, or below boundary region 410 below second surface 406.
• the catalytic particle boundary is typically 10-12u below the surface (on the order of half of the particle size) , accordingly this depth or greater of surface
• Prior art catalytic laminates have activated surfaces that must be masked to prevent unwanted
• the catalytic laminate of the present invention excludes catalytic particles over the thickness extent from first surface 404 to first boundary 408, and from second surface 406 to second boundary 410, providing the benefit that a separate mask layer preventing contact with the catalytic particles is not required for electroless plating as it is in the prior art.
• FIG. 5A shows a magnified cross section view of catalytic pre-preg 508 formed by the process of figures 1, 2, and 3.
• Catalytic particles 502 may be in the size range of 25u and smaller, in the present example they are shown in the range 12u to 25u for clarity.
• the catalytic particles may include heterogeneous catalytic particles (organic or inorganic particles having a catalytic surface coating) or homogeneous particles (catalytic metal particles), as described previously.
• the first boundary 504 is
• Figure 5B shows the laminate of figure 5A with a channel 510 formed by removal of the surface layer 506 in a region where a trace is desired. Pre-preg is also removed in an annular ring 513 of surrounding the via, at the same or different depth as the trace channel 510.
• the removal of surface material may be by laser ablation, where the temperature of the catalytic pre-preg is instantly elevated until the catalytic pre-preg is vaporized, while leaving the surrounding pre-preg structurally unchanged, leaving the catalytic particles exposed. It may be
• a laser with a wavelength with a low reflectivity and high absorption of this optical wavelength for the pre-preg material being ablated such as
• UV wavelengths ultraviolet (UV) wavelengths.
• UV lasers are the UV excimer laser or yttrium-aluminum-garnet (YAG) laser, which are also good choices because of the narrow beam extent and high available power which for forming channels of precise mechanical depth and with well-defined sidewalls.
• YAG yttrium-aluminum-garnet
• An example laser may remove material in a 0.9- 1.1 mil (23u to 28u) diameter width with a depth governed by laser power and speed of movement across the surface.
• Another surface removal technique for forming channel 510 and annular ring 513 is plasma etching, which may be done locally or by preparing the surface with a patterned mask which excludes the plasma from the surface layers 506 or 505, such as a dry film photoresist or other mask material which has a low etch rate compared to the etch rate of catalytic pre-preg.
• the photoresist thickness is typically chosen based on epoxy/photoresist etch selectivity (such that plasma etch to the desired depth of removal of the cured epoxy leaves sufficient photoresist at the end of the etch) , or in the case of photoresist which is used as an electroplate mask, the thickness is chosen according to desired deposition thickness.
• Typical dry film thickness is in the range of 0.8-2.5 mil (20-64u) .
• Plasmas suitable for etching the resin rich surface include mixtures of oxygen (0) and CF plasmas, mixed with inert gasses such as nitrogen (N) , or argon (Ar) may be added as carrier gasses for the reactive gases.
• a mask pattern may also be formed with a dry film mask, metal mask, or any other type of mask having apertures.
• the etch resist may be applied using any of photolithography, screen printing, stenciling, squeegee, or any method of application of etch resist.
• Another method for removal of the surface layer of pre-preg is mechanical grinding, such as a linear or rotational cutting tool.
• the pre-preg may be secured in a vacuum plate chuck, and a rotating cutter (or fixed cutter with movable vacuum plate) may travel a pattern defining the traces such as defined by x,y coordinate pairs of a Gerber format photofile.
• a water cutting tool may be used, where a water jet with abrasive particles entrained in the stream may impinge on the surface, thereby removing material below the first boundary 504. Any of these methods may be used separately or in combination to remove surface material and form channel 510 from pre-preg 508, preferably with the channel extending below the first boundary 504. Accordingly, the minimum channel depth is the depth required to expose the
• Typical channel depths are 1 mil (25u) to 2 mil (70u) .
• FIG. 5C shows contour plots for progress of electroless plating over time, where the catalytic pre-preg of figure 5B is placed into an electroless bath using a dissolved reducing agent to reduce the metal ions to the metallic state on the catalytic pre-preg.
• One example electroless copper bath formulation uses a mixture of Rochelle salt as the complexing agent, copper sulfate as the copper metal source, formaldehyde as the reducing agent, and sodium hydroxide as a reactant. In this
• the tartrate (Rochelle salt) bath is preferred for ease of waste treatment; the Rochelle salt does not chelate as strongly as alternatives such as EDTA or quadrol.
• the tartrate (Rochelle salt) is the completing agent
• copper sulfate is the metal source
• formaldehyde is the reducing agent
• sodium hydroxide is a reactant.
• Other electroless plating formulations are possible, this example is given for reference.
• electroless plating initially forms over the surfaces of the exposed catalytic particles, as shown in the hatch pattern 520 at time tl and the matching hatch patterns in via 535.
• the copper deposition progresses as the
• electroless plating continues to the hashed regions of deposition shown for subsequent times t2 522, t3 524, and t4 526, at which time the deposition 526 may extend above the surface 506 and the via 535 is also filled with copper.
• a key advantage of electroless plating with channels etched in catalytic material is that the
• FIG. 5E shows a soldermask layer 536 which may be silkscreened over the trace 534 for isolation and protection, such as a finished outer layer of a multi-layer board.
• Figure 5F shows a prior art etched copper trace for comparison purposes.
• Trace 554 is formed using a prior art subtractive etching process, where trace 554 is what remains after etching the rest of the copper which was present on a surface layer on non-catalytic pre-preg 550.
• the copper outer layer was patterned with a photoresist such as dry film and subsequently surface etched, which creates the trapezoidal section profile of trace 554 because the top of the trace experiences greater lateral etching than the bottom of the trace adjacent to the non- catalytic pre-preg 550.
• Another advantage of an additive process of the present invention is that for traces formed using a prior art process which etches all of the copper except the desired trace copper, surface contaminates on the surface cause adjacent trace shorting, as a copper bridge remains where the contamination was present on the surface of the copper, which does not occur in additive electroless plating of the present invention.
• FIGS. 6A to 6G show another embodiment of the invention using non-catalyst pre-preg 602, which may be a conventional pre-preg which does not contain catalytic particles.
• via hole 603 is first punched or drilled into the non-catalytic pre-preg 602.
• a catalytic adhesive is formulated by mixing a resin and catalytic particles, which may be in the same
• the catalytic particles are agitated until sufficiently wetted such that the catalytic adhesive 604 ensures that the catalytic particles 606 are not exposed until a subsequent surface coating 604 removal operation such as the plasma clean of figure 6B .
• the catalytic resin is sprayed or squeegeed onto the surface of non-catalytic pre- preg 602 and into the via hole 603, as shown in figure 6A.
• the catalytic adhesive comprises a resin 604 containing a distribution of catalytic particles 604, such as palladium particles smaller than 25u, or, in one example of the invention, with 50% of the particles by number falling in the range of 12-25u in longest particle dimension, or with a range of particles from l-25u as possible examples.
• the catalytic adhesive may be formed as was previously
• the resulting catalytic adhesive may be applied to the non-catalytic substrate and both baked to cure the catalytic adhesive to the non-catalytic pre-preg substrate 602.
• the catalytic adhesive is applied to the leading edge of a mechanized squeegee comprising a flexible blade carrying the catalytic adhesive and passing over the surface of non-catalytic laminate, with the pressure and spacing between the flexible blade and the non-catalytic laminate adjusted such that any drilled holes are filled with catalytic laminate and a desired thickness of catalytic laminate is uniformly disposed on the surface of the non-catalytic laminate in a single pass of the squeegee.
• a typical catalytic adhesive thickness is 12-75u thick.
• FIG. 6A The surface of figure 6A is next subjected to a plasma clean step, which strips the resin from regions above the catalytic particles and the surface of the non- catalytic resin, leaving the catalytic particles 606 adhered to the surface of the non-catalytic pre-preg 602 as shown in figure 6B .
• Figure 6C shows the result of placing the plasma cleaned surface of figure 6B into an electroless plating bath, which is done for a sufficient length of time to form a thin but continuous coat of electroless copper deposition 608, which initially forms over catalytic particles 606 and spreads across the top surface.
• Figure 6D shows the addition of a pattern mask 610 over the electroless layer 608. Since an electroless layer now covers the surface of non-catalytic pre-preg 602, an electroplate operation may occur next to plate additional copper onto the exposed patterned areas, shown as trace 612 of figure 6E, which may deposit copper 612 to a level below or above mask 610. A mask strip operation is shown in figure 6F, which removes pattern mask 610, leaving copper trace 612 and electroless copper layer 608.
• Figure 6G shows the results of a quick etch, which removes the thin layer of electroless copper 608 and an equal amount of the surface of trace 612, leaving behind a trace comprising a homogeneous trace comprising electroplated copper 612 and the underlying electroless copper deposition 608, thereby providing conductive circuit traces.
• Figures 10A, 10B, IOC, 10D, 10D, 10E, 10F, 10G, 10H and 101 show a series of steps which may be performed on the catalytic laminate previously described in figure 4, having catalytic particles 414 distributed throughout the catalytic laminate and having a catalytic particle
• FIG. 10A shows related associated pre-preg 1006 with external surfaces 1004 and 1008 which are free of catalytic particles until the external surfaces are removed to the depth 1002 and 1010, respectively, sufficient to expose the underlying catalytic particles below the
• Figure 10B shows example via or through hole 1012, which, when drilled, expose catalytic particles on inner surfaces 1014 of drilled hole 1012.
• Figure IOC shows the catalytic laminate 1006 after blanket etching the entire outside surfaces of the catalytic laminate 1006 to below the exclusion depth, thereby creating external surfaces 1018 which have
• Original pre-etched catalytic laminate surfaces 1016 are shown for reference.
• the order of operation for drilling of holes/vias 1012 of figure 10B and external surface blanket etch of figure IOC may be performed in any order.
• the blanket etch may preferably be performed using a reactive plasma, a chemical etchant, although laser cutting, water et cutting, mechanical abrasion, mechanical cutting, or any other means which uniformly etches the outer surface of the pre-preg and exposes the underlying catalytic particles below the surface and into the exclusion depth may be used.
• the step of figure IOC is performed without any pattern mask of the previous catalytic laminate etching operations, as the objective is to remove the resin-rich surface to below the exclusion depth to expose catalytic particles throughout the surface of the catalytic laminate 1006.
• Deposition of surface conductors such as copper may be performed on a surface using two different plating techniques.
• a first electroless plating technique a dielectric layer 1006 with exposed catalytic particles such as palladium is immersed into a bath containing metal ions such as copper.
• the rate of electroless deposition of metallic copper onto a catalytic surface is slower than the rate of electro-plating deposition of metallic copper, but the electroless plating occurs on all surfaces which have exposed catalytic particles, and also on surfaces which have copper.
• Electro-plating requires a uniform conductive surface, hence electroless plating is used as a pre-cursor to electro-plating. Electro-plating also requires an external voltage source, resulting in a faster rate of copper deposition than electroless deposition.
• sacrificial copper anode having a positive voltage is placed into an electrolyte bath, with a conductive surface to be plated connected to a negative voltage.
• the anodic copper migrates as metal ions from the anode and pass through the electrolyte to the cathodic surface, where the metal ions deposit.
• the cathodic surface is the PCB needing copper plating. Electroplating requires that all surfaces have a common potential, which is typically accomplished using a copper foil or an
• electroless plating step where the drilled and surface- surface-etched catalytic laminate 1006 is placed in an electroless bath of metal ions (typically copper) , which deposit onto the external surfaces of the laminate 1018 as well as the inside of the drilled holes 1014 of figure IOC to produce the continuously conductive surface 1020, which is required for a subsequent electroplating operation.
• metal ions typically copper
• the thickness of electroless copper 1020 should be the minimal thickness required to assure continuous coverage for successful electroplating, and is typically on the order of .15mil.
• Figure 10E shows the subsequent step of
• FIG. 10F shows the subsequent step of electroplating copper 1022 over the electroless copper 1020, which is used as an electrode in the electroplating operation.
• the electroplating thickness 1022 may be of any thickness, preferably less than the thickness of the resist 1024, and more than lx, or preferably 2x or more of the thickness of the electroless metal deposition 1020.
• Figure 10G shows a subsequent step of stripping the resist 1024 of figure 10F, thereby exposing the
• the thickness of electroplated copper 1022 is greater than the thickness of electroless copper 1020, such that the quick etch step of figure 10H preferentially removes exposed electroless copper regions 1026, and leaves virtually all of the electroplated copper 1022.
• Figure 101 shows the completed process. The boundaries between electroless copper 1020 and
• electroplated copper 1022 were presented previously for clarity in understanding the invention and processing steps. As electroplated copper 1022 deposits on exposed electroless copper 1020 during the step of figure 10F, the resulting through hole plating around hole 1012 and traces 1020/1022 of figure 101 are continuous copper, as shown. [0091]
• the series of figures 7A to 7G show section views for a series of steps for forming a via in a
• FIG. 7G shows a perspective view of the finished via
• figures 7A to 7F are section views through A-A of figure 7G at the end of various intermediate processing steps.
• Figure 7B shows a section view of the upper layer 704 and lower layer 706 after patterning, where the trace 704 is to be connected to trace 706 on the opposite surface of the non-catalyst dielectric 702.
• Figure 7B shows a via hole 708, which may be formed by punching or drilling, the hole 708 is positioned in the center of the annular ring of a pad 716 formed by the upper trace 704 and a pad 718 formed by lower trace 706.
• Figure 7D shows a catalytic filler 710 such as a formulation for plugged vias with catalytic particles.
• the catalytic filler 710 is typically a thick fluid, with a viscosity in the range of 70,000-80,000 centipoise (cP) , which is placed in the via aperture 708 of figure 7C, and figure 7E shows a secondary hole 712 which is drilled in the catalytic filler 710, which exposes the catalytic filler particles which are present in catalytic filler 710, thereby making the
• electroless copper Cu++ forms a conductive deposition layer 714 over the top trace 704, annular ring top pad 716, through secondary hole 712 with catalytic particles
• Figure 8A shows another method for electroless plating of traces onto a laminate, using a non-catalytic substrate or pre-preg 802, with optional hole 804 drilled or punched for layer to layer connectivity.
• Figure 8B shows the application of catalytic adhesive 806, such as with a squeegee, screen printing, a stencil, or any other methods as previously described for figure 6A.
• Hole 804 is also filled with catalytic adhesive 806 in this coating operation.
• Figure 8C shows secondary drilling 808 in the annular ring of hole 804, which activates the catalytic adhesive 806 in the drilled hole 808 by exposing the catalytic particles.
• Figure 8D shows the removal 814 of surface layer 806 sufficient to expose the catalytic particles for forming electroless plated conductive traces, pads, and vias.
• Figure 8E shows the completion of
• Planarization may optionally be
• non-catalytic laminate 802 such as PTFE
• a resin based catalytic laminate it may be desirable to use heterogeneous mixtures of non-catalytic laminate 802, such as PTFE, with a resin based catalytic laminate.
• the PTFE non- catalytic substrate 802 is homogeneous PTFE, in another example it is a laminate, and in either case, the substrate 802 may or may not include fiber (such as glass fiber) reinforcement.
• fiber such as glass fiber
• the electroless plating step can be applied to channels or exposed catalyst on both sides of the board in a single step.
• layers fabricated as in figures 5A to 5E, 6A to 6G, 8A to 8E, 9A to 9E, 10A to 101, and vias of figure 7A to 7F can be formed on individual layers which are subsequently laminated together into a single board with mixed layers of catalytic pre-preg and non-catalytic pre-preg, and the scope of claims related to "multilayer PCB" are to be interpreted to include such constructions.
• Such operations include tin plating for improved solder flow, gold flash for improved conductivity and reduced corrosion, soldermask operations, silkscreening information on the board (part number, reference designators, etc.), scoring the finished board or providing breakaway tabs, etc.
• Certain of these operations may produce improved results when performed on planarized boards of certain aspect of the present invention. For example, silkscreened lettering over traces or vias traditionally breaks up because of trace and via thickness over the board surface, whereas these operations would provide superior results on a planarized surface.

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