WO2018004631A1

WO2018004631A1 - Method for crc ambiguity avoidance in 5g dci decoding

Info

Publication number: WO2018004631A1
Application number: PCT/US2016/040562
Authority: WO
Inventors: Holger Neuhaus; Michael Horvat; Ralf Bendlin
Original assignee: Intel IP Corporation
Priority date: 2016-06-30
Filing date: 2016-06-30
Publication date: 2018-01-04
Also published as: CN109314617A; CN109314617B

Abstract

A Cyclic Redundancy Check (CRC) ambiguity avoidance method is disclosed. The CRC ambiguity avoidance method employs one or both of two techniques, a scrambling initialization function and a hashing function, for avoiding Physical Downlink Control Channel (PDCCH) and Enhanced Physical Downlink Control Channel (ePDCCH) decoding based on aggregation level (AL) assumptions not matching those used for encoding on the transmitter side. A scrambling initialization function scrambles the control information based on the aggregation level of the transmitted PDCCH or ePDCCH. A hashing function changes the Control Channel Element (CCE) or Enhanced Control Channel Element (eCCE) starting index, based on the aggregation level of the PDCCH or ePDCCH, respectively. The CRC ambiguity avoidance method thus avoids false-positive PDCCH or ePDCCH decoding by the terminal.

Description

METHOD FOR CRC AMBIGUITY AVOIDANCE IN 5G DCI DECODING

TECHNICAL FIELD

[0001] This application relates to processing of the Physical Downlink Control Channel (PDCCH) and enhanced PDCCH (ePDCCH) in 3GPP and, more particularly, to avoidance of false-positive ePDCCH decoding at the terminal.

BACKGROUND

[0002] In the 3^rd Generation Partnership Project (3GPP) Long-Term Evolution (LTE) fourth generation mobile communication standard, base station transmitters, known in LTE as enhanced NodeBs or eNodeBs (eNBs), schedule the transmissions of common channels in the physical layer (PHY) via a Physical Downlink Control Channel (PDCCH) to one or more terminals, known in LTE as User Equipment (UE).

[0003] By way of the PDCCH, Downlink Control Information (DCI), such as scheduling and power control commands, is transmitted to a UE or a group of UEs. In Release 1 1 LTE, however, a new control channel, the Enhanced PDCCH (ePDCCH) is defined due to limits on the control channel capacity of the PDCCH, and to support complex operations such as Inter-Cell Interference Coordination (ICIC), Multiple-Input- Multiple-Output (MIMO), beamforming, Coordinated Multi-Point Transmission (CoMP), and so on.

[0004] Where the PDCCH occupies only the control region of a subframe, the ePDCCH occupies the data region. Other differences exist between the two control channels as well.

[0005] In current LTE implementations, the UE may erroneously decode the control region, resulting in a false-positive PDCCH, or the data region, resulting in a false-positive ePDCCH.

[0006] Thus, a mechanism is desired to overcome the shortcomings of the prior art.

BRIEF DESCRIPTION OF THE DRAWINGS

[0007] The foregoing aspects and many of the attendant advantages of this document will become more readily appreciated as the same becomes better understood by reference to the following detailed description, when taken in conjunction with the accompanying drawings, wherein like reference numerals refer to like parts throughout the various views, unless otherwise specified. [0008] Figure 1 is a simplified block diagram of three PHY downlink transmission channels;

[0009] Figure 2 is a diagram of an FDD LTE radio frame;

[0010] Figure 3 illustrates the difference between Release 8 PDCCH and Release 1 1 ePDCCH under LTE;

[0011] Figure 4 is a diagram illustrating PDCCH construction;

[0012] Figure 5 is a diagram illustrating the mapping of two ePDCCH sets;

[0013] Figures 6A and 6B are diagrams illustrating downlink control information processing at the transmitter for PDCCH and ePDCCH, respectively;

[0014] Figure 7 is a diagram illustrating the CCE aggregation and PDCCH multiplexing operations of Figure 6A for PDCCH;

[0015] Figure 8 is a diagram illustrating the logical and subsequent physical RE allocation of ePDCCH;

[0016] Figure 9 is an exemplary diagram illustrating a pattern of identical content allocated to different eCCE start indices and encoded with different aggregation levels;

[0017] Figure 10 is a diagram illustrating how current state-of-the-art LTE scrambling sequences encoded with different aggregation levels share identical initial scrambling sequences;

[0018] Figure 1 1 is a simplified block diagram of a CRC ambiguity avoidance method, according to some embodiments;

[0019] Figure 12 is a diagram illustrating the scrambling initialization function of the CRC ambiguity avoidance method of Figure 1 1 , according to some embodiments;

[0020] Figure 13 is a diagram illustrating a hashing function implementation of the CRC ambiguity avoidance method of Figure 1 1 , according to some embodiments;

[0021] Figure 14 is a diagram illustrating a second hashing function implementation of the CRC ambiguity avoidance method of Figure 1 1 , according to some embodiments; and

[0022] Figure 15 is a simplified block diagram of a UE capable of implementing the CRC ambiguity avoidance method of Figure 1 1 , according to some embodiments.

DETAILED DESCRIPTION [0023] In accordance with the embodiments described herein, a Cyclic Redundancy Check (CRC) ambiguity avoidance method is disclosed. The CRC ambiguity avoidance method employs one or both of two techniques, a scrambling initialization function and a hashing function, for avoiding Physical Downlink Control Channel (PDCCH) and Enhanced Physical Downlink Control Channel (ePDCCH) decoding based on aggregation level (AL) assumptions not matching those used for encoding on the transmitter side. The scrambling initialization function scrambles the control information based on the aggregation level of the transmitted PDCCH or ePDCCH. The hashing function changes the Control Channel Element (CCE) or Enhanced Control Channel Element (eCCE) starting index, based on the aggregation level of the PDCCH or ePDCCH, respectively. The CRC ambiguity avoidance method thus avoids false-positive PDCCH or ePDCCH decoding by the terminal.

[0024] In the following detailed description, reference is made to the accompanying drawings, which show by way of illustration specific embodiments in which the subject matter described herein may be practiced. However, it is to be understood that other embodiments will become apparent to those of ordinary skill in the art upon reading this disclosure. In other instances, well-known structures, materials, or operations are not shown or described in detail to avoid obscuring aspects of the disclosure. The following detailed description is, therefore, not to be construed in a limiting sense, as the scope of the subject matter is defined by the claims.

[0025] Among other tasks, uplink and downlink scheduling are managed at the Medium -access control (MAC) layer. The MAC is organized into logical channels, which include control channels for transmission of control and configuration information, and traffic channels for transmission of data. Transport channels map the logical and traffic channels of the MAC to the physical channels of the PHY layer. At the PHY layer, a physical channel is used to describe a set of time-frequency resources used for transmission of a transport channel.

[0026] In other cases, the transport channel is not mapped to any physical channel. These channels are known as Layer 1 /Layer 2 (L1/L2) control channels, since information originates from both the physical layer (L1 ) and the MAC layer (L2). Examples of L1/L2 channels include the Physical Downlink Control Channel (PDCCH), the Enhanced PDCCH (ePDCCH), and the Physical Control Format Indicator Channel (PCFICH). In the downlink, the L1/L2 control channels are used for downlink control information (DCI), such as downlink scheduling assignments, uplink scheduling grants, and power control commands, which enables terminals (UEs) to properly decode subsequent downlink transmissions. Different DCI message sizes, known as DCI formats, correspond to different types of control information being transmitted. DCI format 1 C, for example, is a downlink DCI format of 31 bytes, which is used for special purpose compact assignment. Factors such as cell bandwidth affect which DCI format is used.

[0027] The following LTE PHY channels occupy the transmission band of the air interface between the eNB and the UE. The PCFICH provides information to the UEs to enable decoding of the set of PDCCHs. Before receiving one or more PDCCHs, the UE obtains the PCFICH configuration. The PDCCHs are, in turn, obtained both before reception of the Physical Downlink Shared Channel (PDSCH) from the eNB and for scheduling grants that enable the UE to transmit to the eNB using the Physical Uplink Shared Channel (PUSCH). The PDSCH and PUSCH are used for downlink and uplink transmission of data, respectively, between the UE and the eNB. The relationship between the PCFICH, the PDCCH, and the PDSCH for LTE downlink operations is depicted in the simplified drawing of Figure 1 .

[0028] In 3GPP LTE, both downlink and uplink transmissions employ an Orthogonal Frequency Division Multiplexing (OFDM) transmission scheme. Within the OFDM scheme, transmissions may employ either Frequency Division Duplex (FDD) or Time Division Duplex (TDD) modes of operation and different Orthogonal Frequency Division Multiple Access (OFDMA) technology in the downlink and Single Carrier Frequency Division Multiple Access (SC-FDMA) technology in the uplink.

[0029] A resource block is a time/frequency/space construct used to illustrate the "physical resource" of an OFDM transmission. Each row corresponds to one OFDM subcarrier and each column corresponds to an OFDM symbol. The spatial dimension is indicated using two or more antenna ports, one for each "layer" of the resource block. In Figure 2, an FDD LTE radio frame for a 1 .4 MHz transmission is illustrated. A single radio frame (10 ms in duration) is subdivided into ten subframes (1 ms duration) in the time domain and six subframes in the frequency domain. Each subframe is further subdivided into two slots (.5 ms in duration), also known as a resource blocks (RBs). Each RB consists of twelve subcarriers by, in this example, seven OFDM symbols.

[0030] The smallest unit of the subframe is a resource element (RE) having a dimension of one subcarrier (frequency) for a duration of one symbol (time). In the example of Figure 2, each subframe RB thus consists of 84 REs. In the spatial dimension, the number of subframes is further increased, based on the number of antenna ports.

[0031] As explained above, ePDCCH is a new control channel introduced in Release 1 1 of LTE. Although some aspects of ePDCCH are similar to PDCCH, they are two different channels. Figure 3 illustrates the difference between LTE Release 8 (legacy) PDCCH and Release 1 1 ePDCCH. While the PDCCH occupies the control region, the ePDCCH shares the data region with the PDSCH. The channel bandwidth spans from 0 to N_RB - 1 resource blocks. For a 20 MHz channel, N_RB = 100.

[0032] The size of the control region varies and is specified by the PCFICH. The PCFICH is mapped to known locations in the first OFDM symbol, as indicated. Except for mapping the Physical Hybrid Automatic Repeat Request Indicator Channel (PHICH) (not shown) the remainder of the control region is reserved for PDCCH mapping. The PDCCH is located in the control region of each subframe and spans the entire available bandwidth. In contrast, the ePDCCH occupies the data region and spans a small portion of the bandwidth.

[0033] Each UE can be configured with a UE-specific assignment of the ePDCCH, which consists of up to two sets of 2, 4, or 8 RB pairs. Figure 3_.shows_.an EPDCCH with four RB pairs. For a Release 1 1 -capable eNB, the same downlink subframe can support PDCCH decoding by legacy UEs and ePDCCH decoding by Release 1 1 -capable UEs. Once the PDCCHs and ePDCCHs are decoded, the UE knows which RBs in the data region correspond to PDSCHs intended for the UE.

[0034] The mapping of legacy PDCCHs to resource elements follows a predefined structure so as to simplify processing at the UE. Control Channel Elements (CCEs) consist of nine sets of resource element groups (REGs), where a REG consists of either four consecutive REs or four REs separated by a reference signal within the same OFDM symbol and the same resource block. The mapping of PDCCHs to resource elements uses the CCEs.

[0035] The number of CCEs used for a given PDCCH is called its Aggregation Level (AL). For PDCCH, there are four ALs, denoted AL1 , AL2, AL4, and AL8. AL1 uses one CCE; AL2 uses two CCEs; AL4 uses four CCEs; and AL8 uses eight CCEs. The number of CCEs for each PDCCH depends on the DCI format (as the payloads differ), the channel coding rate, and the UE channel conditions. The eNB decides which AL to use for a given UE, so if the PDCCH intended for a UE has a poor downlink channel quality, a larger number of CCEs (e.g., AL4 or AL8) may be used as compared to a PDCCH intended for a UE with good channel quality. [0036] Figure 4 is a PDCCH construction map, in which the CCE logical mapping is assigned to the control region of the downlink subframe. In Figure 4, six PDCCHs, denoted 0 - 5, are indicated in the CCE logical map. The first PDCCH is an AL1 PDCCH; the second and sixth PDCCHs are from AL2; the third and fifth PDCCHs are from AL4; and the fourth PDCCH is an AL8 PDCCH.

[0037] An exploded view of one of the CCEs shows that the CCE is to be mapped to the control region of the subframe. The REGs making up the CCE share space in the control region with PCFICH and PHICH channels and are distributed so as to reduce interference.

[0038] Figure 5 illustrates ePDCCH mapping in the data region of the downlink subframe. Each UE using ePDCCH is configured with one or two sets of resource blocks where ePDCCH transmission to the UE may occur. Each set can have two, four, or eight RB pairs. In Figure 5, ePDCCH set 1 consists of four RB pairs while ePDCCH set 2 consists of two RB pairs. An ePDCCH set is configured as being either localized or distributed. Thus, a UE may be provided with two ePDCCH sets, one configured for localized transmission and the other for distributed transmission.

[0039] Similar to PDCCH, ePDCCH is divided into Enhanced Control Channel Elements (eCCE). In the typical case, each eCCE consists of four Enhanced Resource Element Groups (eREGs), with each eREG consisting of nine REs in one RB pair. The number of eCCEs in the ePDCCH is given by its Aggregation Level (AL), which may be 1 , 2, 4, 8, 16, or 32 (whereas PDCCH is limited to four aggregation levels). An ePDCCH uses a consecutive set of (logical) eCCEs.

[0040] Figures 6A and 6B illustrate differences in processing of DCI for PDCCH and ePDCCH, respectively. For legacy PDCCH (Figure 6A), a 16-bit Cyclic Redundancy Check (CRC) is attached to each DCI message payload (e.g., 31 bits). For some DCI message types, a Radio-Network Temporary Identifier (RNTI) identifies the UE or UEs being addressed by means of CRC parity bit masking. This implicit encoding of the UE identity/identities ensures that only the intended UE(s) successfully decode(s) the DCI message.

[0041] The CRC-attached bits are next coded with a Tail-Biting

Convolution Encoder (TBCE) with a fixed code rate of 1/3 to three encoded DCI streams, e.g., 3 ^* (31 + 16). The circular buffer is cyclically read out until the available bit payload for E/PDCCH transmission is reached. If the bit payload is less than the circular buffer size, the code rate is greater than 1/3; if the circular buffer is read more than once, the code rate is lower than 1/3. The streams are also rate-matched to fit the amount of resources used for PDCCH transmission. In PDCCH processing, the CCEs from each encoded PDCCH are concatenated and allotted to specific REs in the CCE aggregation and PDCCH multiplexing unit 30, which generates what are known herein as composite CCEs 80, as described further below.

[0042] In the scrambling unit 40, the composite CCEs 80 are scrambled using a cell- and subframe-specific scrambling sequence to randomize intercell interference (ICI). The scrambling is followed by Quadrature Phase-Shift Keying (QPSK) modulation and mapping to the REs. During the interleaving and cell-specific cyclic shift stages, the cell-specific mapping of the PDCCHs takes place.

[0043] In contrast to PDCCH processing illustrated in Figure 8A, the eCCEs from each encoded ePDCCH in Figure 6B are not concatenated. Instead, each ePDCCH set and their corresponding eCCEs are handled individually. The eCCE to RE mapping is pre-determined within the set of ePDCCH resources as soon as the eCCE index is known. Hence, interleaving does not take place with multiple ePDCCH transmissions.

[0044] False-positive PDCCHs

[0045] The UE performs what is known as blind decoding of the PDCCH. This is because the UE does not know the aggregation level used by the eNB, the starting index/position of the CCE addressed to the UE, and the DCI format used by the eNB. To reduce the complexity of PDCCH decoding, there are limitations on the aggregation of contiguous CCEs. For example, a PDCCH with a format of n CCEs may only start with a CCE with a number equal to a multiple of n. Thus, an AL1 PDCCH could start at any CCE starting location (index); an AL4 PDCCH starts at a CCE index that is a multiple of four (e.g., 0, 4, 8, 12, ... ), etc.

[0046] Thus, the different aggregation levels exist to support different DCI formats and channel bandwidths, as well as providing a possibility to adjust the amount of decoding error protection according to the channel quality between the UE and the eNB. Figure 7 illustrates one example of how the CCE aggregation and PDCCH multiplexing unit 30 of Figure 6A may operate. Four rows of aggregation levels are depicted, each featuring CCEs, and a fifth row is the logical mapping of the PDCCHs generated at each aggregation level, addressed using a CCE index (starting at 0).

[0047] A first PDCCH, PDCCH_A, is made up of a single CCE. PDCCH_A is thus an AL1 PDCCH, which means that the DCI in the PDCCH_A can be conveyed using no more than nine REGs (36 REs). Second and third AL2 PDCCHs, denoted PDCCH_B and PDCCH_C, are made up of two CCEs each and start on even-numbered CCE indexes. An AL4 PDCCH, PDCCH_D, has four CCEs and an AL8 PDCCH, PDCCH_E, employs eight CCEs. A PDCCH of a higher AL (e.g., PDCCH_E) may be used, for example, where the UE is at the cell edge and thus has compromised channel quality, or, in another example, where the DCI being conveyed to the UE is highly complex.

[0048] The composite CCEs 80 generated in the CCE aggregation and

PDCCH multiplexing unit 30 are, as shown in Figure 6A, scrambled and QPSK modified before being ultimately mapped to the control region of the downlink subframe. Each PDCCH is assigned a unique CCE index, shown at the bottom of Figure 7.

[0049] To facilitate the blind decoding, both common and UE-specific search spaces are defined. This limits the number of PDCCH candidates (from all possible combinations of CCEs) to sixteen for UE-specific search spaces and six for common search spaces. Due to circular buffer-based rate matching, coded bits start to repeat themselves after the first CCE. This, along with search space overlapping between different aggregation levels, means that multiple aggregation sizes may pass the CRC check. The blind decoding candidates producing a successful CRC check but have not been transmitted by the eNB are known as false-positive PDCCH candidates, false-positive PDCCHs, or false-positive candidates.

[0050] False-positive ePDCCHs

[0051] In contrast to PDCCH, which occupies the control region, ePDCCH is multiplexed in the frequency domain with PDSCH in the data region of the subframe. As illustrated in Figure 8, the ePDCCH is mapped to a consecutive number of eCCEs based on the aggregation level, each eCCE (in the typical case) consisting of four eREGs (where a single eREG consists of 9 REs in one physical resource block pair). To define an eREG, ail REs in the RBs are numbered cyclically in a frequency-first manner from 0 to 15, not including DM-RS REs. eREGj consists of ail REs with number i in the resource block pair. Although there may be as many as sixteen eCCEs, there are likely fewer as the first OFDM symbols are used for control information (including PDCCHs).

[0052] In Figure 8, the ePDCCH mapping starts with the logical RE mapping and ends with physical RE allocation in the subframe. eREGs, each consisting of nine numbered REs, are first allocated. Each RE making up each eREG is then mapped to the subframe in predefined locations. eCCEs each consist of four eREGs and are shaded to distinguish from other eCCEs. eCCEi consists of eREGo, eREG₄, eREG₈, and eREGi₂; eCCE₂ consists of eREG-i, eREGs, eREGg, and eREGi₃; eCCE₃ consists of eREG2, eREG6, eREGio, and eREGu; and eCCE₄ consists of eREG₃, eREG₇, eREGu, and eREGi₅.

[0053] If the eNB-designated aggregation level is AL 2, then the ePDCCH is defined using two eCCE (of four eREG each). Thus, eCCEi and eCCE₂ could be used. For an aggregation level of 4, the ePDCCH is defined using four eCCE and eCCE-i , eCCE₂, eCCE₃, and eCCE₄ could be used. In contrast to PDCCH, the resource allocation for ePDCCH is semi-static and configured by higher layers, such as Radio Resource Control (RRC). This means that, in contrast to how PDCCH is organized, the eCCE index is the same for all ePDCCH candidates.

[0054] Hashing functions are specified for PDCCH and ePDCCH in LTE to organize the order and distribution of PDCCH and ePDCCH candidates for different aggregation levels (AL) within the search space, e.g., all available CCE or eCCE (referred to herein as e/CCE). A hashing function is an algorithm that takes a string of any length and reduces it to a unique fixed length string. Hashing functions are used for password validity, data and message integrity, and cryptography.

[0055] Before being mapped to the resource elements of the subframe, the CCEs for PDCCH are organized in a logical mapping, with each CCE identified by CCE index (Figure 7). eCCEs for ePDCCH are organized as illustrated in Figure 8.

[0056] In LTE, the index of the starting e/CCE is used for Physical Uplink Control Channel (PUCCH) resource allocation. This means that if the index of the starting e/CCE changes in some new implementation, the PUCCH resource allocation would be changed accordingly.

[0057] In the case of LTE PDCCH, an error-free detection of PCFICH supplies the resource allocation (control region size) for PDCCH. Also the allocation of PDCCH is blindly estimated by the UE, e.g., checking all valid allocations. Thus, the CCE start index is not the same for multiple ePDCCH candidates that pass the CRC check.

[0058] To identify the most likely candidate, the receiver could re-encode the detected DCI message and calculate the bit error ratio (BER) for all ePDCCH candidates that passed the CRC check. The ePDCCH candidate with the lowest BER would then be selected by the UE.

[0059] The bit payload size for ePDCCH transmission is determined by the product of the aggregation level multiplied by the bit size of the e/CCE. If the same single or multiple subsequent e/CCE are shared as leading e/CCE by multiple ePDCCH candidates of different aggregation levels, then, depending on the code rate and the Signal to Noise Ratio (SNR), due to the decoding robustness from the added redundancy, all or a subset of these candidates may pass the CRC check. As used herein, the blind decoding candidates producing a successful CRC check but assuming parameters not used in the transmitter are known as false-positive EPDCCH candidates, false-positive EPDCCHs, or false-positive candidates.

[0060] Figure 9 illustrates the false-positive candidate phenomenon. Again, a logical arrangement of eCCEs (numbered squares), with the eCCE index indicating the starting position of each eCCE. Four aggregation level candidate indexes are shown, AL2, AL4, AL8, and AL16. Each aggregation level relates to the length of the received data corresponding to one specific code block, the code block that the UE decodes and tests for correctness using CRC blocks. The UE does not know the size of the code block or the starting position of the code block (the eCCE index).

[0061] In AL 2, nine eCCE candidate pairs, denoted 0 - 8 are shown. In AL 4, four eCCE candidate groupings of four eCCEs each, are shown, denoted 0 - 3. AL 8 features two eCCE candidate groupings, each consisting of eight eCCEs. AL 16 features one e/CCE candidate grouping consisting of sixteen eCCEs.

[0062] If a PDCCH is to be transmitted at AL8, the total received data is longer than if the PDCCH is to be transmitted at aggregation level 2, but there are no more information bits for the AL2 transmission than the AL8 transmission. The AL8 transmission has more robustness or more redundancy than the AL2 transmission. Such robustness and redundancy benefits a UE having poor signal quality, for example.

[0063] The grayed areas show where the AL candidates share the same starting eCCE index. The top of Figure 9 also shows where the indicated eCCE bit sequences are scrambled identically. eCCEs starting at eCCE index 0 are scrambled identically, no matter the aggregation level. AL2, AL4, and AL8 candidates starting at eCCE index 8 are also scrambled identically. Because the eCCEs are scrambled identically and different aggregation levels candidates employ identical eCCE starting indexes, this means that, during the blind decoding, the UE could decode the first two eCCEs at eCCE index 0 and decode the first four eCCEs at eCCE index 0. If one gives a successful CRC check, the other one will as well.

[0064] Put another way, this means that not only does a decoding attempt with parameters as used in the transmitter (that is, having the intended aggregation level) result in a successful CRC check, but also decoding attempts for candidates assuming other ALs produce success, with each successful decode containing the same DCI message. [0065] Since only the leading eCCE causes the ambiguity, the absolute eCCE start index of the ePDCCH candidates with CRC passed is the same, given that the starting point for eCCE indexing is the same for all aggregation levels.

[0066] However, the ePDCCH candidate index and the aggregation level are different for the ePDCCH candidates that pass CRC and have an identical eCCE start index. For a control channel design such as defined by LTE ePDCCH, blind detection performed by the UE based on CRC verification will lead to a correct message detection and a correct eCCE starting index detection, but is potentially ambiguous in terms of the AL that the UE assumes was used by the transmitter. If the ePDCCH candidate index or the AL is used in a future 5G specification for any further processing at the receiver, the ambiguity may cause an issue.

[0067] Figure 10 illustrates a scrambling sequence from 3GPP TS 36.21 1 applied to multiple ePDCCH candidates of different aggregation levels. In this example, 60 bits per eCCE is assumed.

[0068] Control channel design such as that as defined for LTE ePDCCH, for example, does not use scrambling sequences unique for each AL. The signal after scrambling for one AL thus is identical to the leading part of the scrambled signal generated with a higher AL. The higher AL provides, for the same message content, a longer output signal with more redundancy, as shown in Figure 10. This additional robustness may be avoided where sufficiently good signal conditions on the receiver side exist. The receiver can thus potentially successfully decode the longer sequence by just using the leading part of it. Thus, a control message sent with a high AL can potentially be decoded by the receiver assuming a lower AL.

[0069] Figure 1 1 is a simplified block diagram of a CRC ambiguity avoidance method 100, according to some embodiments. The CRC ambiguity avoidance method 100 employs one or both of two techniques, a scrambling initialization function and a hashing function, for avoiding the false-positive ePDCCH candidates described above. A scrambling initialization function 50 scrambles the control information based on the aggregation level of the transmitted ePDCCH. This ensures that eCCEs of different aggregation levels are not identically scrambled and thus avoids the ambiguity at the UE. A hashing function 150 also changes the eCCE starting index based on the aggregation level of the ePDCCH. Thus, the aggregation level of the ePDCCH impacts both the scrambling of the composite eCCEs making up the ePDCCH and the starting eCCE index. Each of these functions is described below. [0070] In some embodiments, the CRC ambiguity avoidance method 100 systematically removes any CRC-pass ambiguity for a ePDCCH, such as a 5G ePDCCH, by a AL-specific initialization of the LTE scrambling sequence generation. The CRC ambiguity avoidance method 100 works for any integer aggregation level.

[0071] Scrambling Initialization Function 50

[0072] According to LTE TS 36.21 1 , section 6.8A2, the block of bits b(0),..., b(M_bit -i) to be transmitted on an ePDCCH (candidate) in a subframe [«_S/2J , with n_s being the slot number, are scrambled, resulting in a block of scrambled bits *(0),...,*( _Wt -l) according to

£(7) = (*(7) + c(/))mod 2.

An example for a UE-specific scrambling sequence, c(i), is given in the 3GPP Technical Specification, 36.21 1 , Section 7.2.

[0073] Recall that the UE can be configured with two sets of ePDCCHs. An ePDCCH set number thus indicates the ePDCCH set. The scrambling sequence generator shall be initialized with:

cimt = \ Ln s / /2 JI - 2⁹ + « ^rtT^ED^P,^Dq,^Cf^Cor^HmatEPDCCH ( -| ) where q is the ePDCCH set number and formatePDCCH is the index representation of the AL of the scrambled ePDCCH candidate, or more generally:

EPDCCH _ EPDCCH _{f( A J} ,

†D,q,formatEPDCCH ~ ⁿlD,q J \^^) (2)

[0074] In some embodiments, the AL index representation is defined as formatEPDCCH = \og2(AL) .

[0075] In some embodiments, the CRC ambiguity avoidance method 100 utilizes AL-specific initialization of the scrambling sequence generation, such that n is unique for any valid combination of the ePDCCH set q and the AL or formatePDCCH, respectively. Thus, using the scrambling initialization function 50, the resulting scrambling code sequence is unique for each AL.

[0076] Although equations (1 ) and (2) specify parameters for ePDCCH, the scrambling initialization function 50 may similarly be applied to PDCCHs in situations where false-positive PDCCHs are to be avoided.

[0077] Figure 12 is a simplified diagram illustrating the scrambling initialization function 50 of the CRC ambiguity avoidance method 100 of Figure 1 1 , according to some embodiments. The scrambling initialization function 50 includes an aggregation level encoding unit 60, a RRC unit 62, a combine unit 64, an initialization value calculation unit 66, a scrambling sequence generator 68, and a scrambling function unit 70. In the transmission circuitry of the eNB, the AL encoding unit 60 converts the aggregation level into a function, nAL. In some embodiments, the AL encoding unit 60 employs a logarithmic function to convert the AL to nAL, such as nAL = log₂(AL). The RRC unit 62 takes the ePDCCH set numbers and generates a configuration parameter, nID. The two parameters, nAL and nID, are combined in the combine unit 64, resulting in a parameter, nIDAL. In some embodiments, the parameter, nIDAL, is unique for each combination of nAL and nID.

[0078] The slot number, n_s, is fed into the initialization value calculation unit 66, along with the nIDAL parameter, resulting in cINIT. In some embodiments, the formula, cINIT = floor (n_s/2)^*2⁹ + nIDAL is used by the unit 66. cINIT is fed into the scrambling sequence generator 68, and the result, c, is combined with a message bit (b) in the scrambling function unit 70. A scrambled bit sequence, b_ScR, is the final output of the scrambling initialization function 50. In some embodiments, the formula, bscR - (b + c) mod 2 is executed by the scrambling function unit 70 to produce the final result.

[0079] In some embodiments, the scrambling initialization function 50 replaces the scrambling unit 40 in Figure 6A or the scrambling unit 80 in Figure 6B. The CRC ambiguity avoidance method 100 thus ensures that multiple ePDCCH candidates with the same leading eCCE but different AL do not pass CRC. In some embodiments, only the true ePDCCH candidate will pass the CRC test using the scrambling initialization function 50. In some embodiments, the scrambling initialization function 50 is part of an Outer Control-Channel Receiver (OCRX) of both the base station and the UE.

[0080] Hashing Function 150

[0081] Recall that hashing functions are specified for PDSCH and ePDCCH to organize the order and distribution of e/PDCCH candidates for different aggregation levels within the search space. Returning to Figure 1 1 , the CRC ambiguity avoidance method 100 is also able to avoid the false-positive ePDCCH candidates using a hashing function 150. The hashing function 150 is described in more detail below.

[0082] In some embodiments, the hashing function 150 operates with an AL of size 2 or greater. Using either equation (3) or equation (4), below, the hashing function 150 is designed to associate the eCCE index of an ePDCCH with the aggregation level of the ePDCCH such that, for each AL, there will be a unique eCCE index. Notice that both equations include the AL as a parameter.

I = [AL {(Y_p>k + b + m)mod (3) l = [AL {{Y_p + b + m)mod (4)

where I is the resulting eCCE index in the search space and ranges from 0 to ^NEccE,_P,k - 1- Yp,k is ^an index offset, which is static for the subframe and depends on the ePDCCH set p, e.g. if more than one E/PDCCH is configured for the transmission, which is a function of the Radio Network Temporary Identifier (RNTI) and the slot number, n_s. Parameter k is defined as [n_s/2\ and corresponds to the subframe number. Parameter b is the carrier frequency indicator, e.g. , if the E/PDCCH on one component carrier transports DCI for the remaining component carriers associated with the transmission in case of carrier aggregation. Parameter m specifies the ePDCCH candidate index for the actual aggregation level. N_{ECCE p k} is the total number of E/CCE available for the actual ePDCCH set p and subframe k. Finally, i is the relative index of the E/CCE associated to the actual ePDCCH candidate, e.g. , limited by the aggregation level.

[0083] In some embodiments, equations (3) and (4) constitute the search space for the blind decoding at the UE receiver. In some embodiments, equations (3) and (4) prevent the same E/CCE content from being captured by multiple ePDCCH candidates of different aggregation levels.

[0084] Although equations (3) and (4) specify parameters for ePDCCH, the hashing function 150 may similarly be applied to PDCCHs in situations where false- positive PDCCHs are to be avoided.

[0085] Figures 13 and 14 are two examples of how the hashing function

150 of the CRC ambiguity avoidance method 100 solves the problem of false-positive ePDCCH.

[0086] Figure 13 is an example using equation (3), with Y_{p k} = b=0 and N_{ECCE p k} =16. In Figure 13, the AL2 candidate starting index is shifted from E/CCE index 0 to 1 , the AL4 candidate starting index is shifted from E/CCE index 0 to 2, the AL8 candidate index is shifted from e/CCE index 0 to 4, and the AL16 candidate index is shifted from e/CCE index 0 to 8. The gray vertical shading shows that only one AL candidate occupies each eCCE starting index. eCCE starting index 1 is the starting eCCE for AL2 candidate only; eCCE starting index 2 is the starting eCCE for AL candidate AL4 only, and so on.

[0087] Figure 14 is an example using equation (4), with Y_{p k} = b=0 and ^NEccE,_P,k =16- 'ⁿ Figure 14, the AL2 candidate starting index is not shifted from e/CCE index 0, the AL 4 candidate starting index is shifted from E/CCE index 0 to 1 , the AL8 candidate index is shifted from E/CCE index 0 to 3, and the AL16 candidate index is shifted from E/CCE index 0 to 7. Again, the gray vertical shading illustrates that only one AL candidate occupies each starting index.

[0088] In some embodiments, the hashing function 150 is part of an Outer Control-Channel Receiver (OCRX) of both the base station and the UE.

[0089] Operating Environment

[0090] As used herein, the term "circuitry" may refer to, be part of, or include an ASIC, an electronic circuit, a processor (shared, dedicated, or group), and/or memory (shared, dedicated, or group) that execute one or more software or firmware programs, a combinational logic circuit, and/or other suitable hardware components that provide the described functionality. In some embodiments, the circuitry may be implemented in, or functions associated with the circuitry may be implemented by, one or more software or firmware modules. In some embodiments, circuitry may include logic, at least partially operable in hardware.

[0091] Embodiments of the CRC ambiguity avoidance method 100 described herein may be implemented into a system using any suitably configured hardware and/or software. Figure 15 illustrates, for one embodiment, example components of an enhanced NodeB (eNB) base station device 800. A combination of the illustrated components of the eNB 800 may also be found in an UE. In some embodiments, the eNB device 800 may include application circuitry 802, baseband circuitry 804, Radio Frequency (RF) circuitry 806, front-end module (FEM) circuitry 808 and one or more antennas 810, coupled together at least as shown.

[0092] The application circuitry 802 may include one or more application processors. For example, the application circuitry 802 may include circuitry such as, but not limited to, one or more single-core or multi-core processors. The processor(s) may include any combination of general-purpose processors and dedicated processors (e.g. , graphics processors, application processors, etc.). The processors may be coupled with and/or may include a storage medium 812 or other type of memory/storage and may be configured to execute instructions stored in the memory/storage to enable various applications and/or operating systems to run on the system.

[0093] The baseband circuitry 804 may include circuitry such as, but not limited to, one or more single-core or multi-core processors. The baseband circuitry 804 may include one or more baseband processors and/or control logic to process baseband signals received from a receive signal path of the RF circuitry 806 and to generate baseband signals for a transmit signal path of the RF circuitry 806. Baseband processing circuitry 804 may interface with the application circuitry 802 for generation and processing of the baseband signals and for controlling operations of the RF circuitry 806. For example, in some embodiments, the baseband circuitry 804 may include a second generation (2G) baseband processor 804A, third generation (3G) baseband processor 804B, fourth generation (4G) baseband processor 804C, and/or other baseband processor(s) 804D for other existing generations, generations in development, or to be developed in the future (e.g., fifth generation (5G), 6G, etc.).

[0094] The baseband circuitry 804 (e.g., one or more of baseband processors 804A - D) may handle various radio control functions that enable communication with one or more radio networks via the RF circuitry 806. In some embodiments, the scrambling initialization function 50 is part of an Outer Control- Channel Receiver (OCRX) located in the baseband processor(s) 804D. The radio control functions may include, but are not limited to, signal modulation/demodulation, encoding/decoding, radio frequency shifting, etc. In some embodiments, modulation/demodulation circuitry of the baseband circuitry 804 may include Fast- Fourier Transform (FFT), precoding, and/or constellation mapping/demapping functionality. In some embodiments, encoding/decoding circuitry of the baseband circuitry 804 may include convolution, tail-biting convolution, turbo, Viterbi, and/or Low Density Parity Check (LDPC) encoder/decoder functionality. Embodiments of modulation/demodulation and encoder/decoder functionality are not limited to these examples and may include other suitable functionality in other embodiments.

[0095] In some embodiments, the baseband circuitry 804 may include elements of a protocol stack such as, for example, elements of an EUTRAN protocol including, for example, physical (PHY), media access control (MAC), radio link control (RLC), packet data convergence protocol (PDCP), and/or radio resource control (RRC) elements. A central processing unit (CPU) 804E of the baseband circuitry 804 may be configured to run elements of the protocol stack for signaling of the PHY, MAC, RLC, PDCP, and/or RRC layers. In some embodiments, the baseband circuitry may include one or more audio digital signal processor(s) (DSP) 804F. The audio DSP(s) 804F may include elements for compression/decompression and echo cancellation and may include other suitable processing elements in other embodiments. Components of the baseband circuitry may be suitably combined in a single chip, a single chipset, or disposed on a same circuit board in some embodiments. In some embodiments, some or all of the constituent components of the baseband circuitry 804 and the application circuitry 802 may be implemented together such as, for example, on a system on a chip (SOC).

[0096] In some embodiments, the baseband circuitry 804 may provide for communication compatible with one or more radio technologies. For example, in some embodiments, the baseband circuitry 804 may support communication with an EUTRAN and/or other wireless metropolitan area networks (WMAN), a wireless local area network (WLAN), or a wireless personal area network (WPAN). Embodiments in which the baseband circuitry 804 is configured to support radio communications of more than one wireless protocol may be referred to as multi-mode baseband circuitry.

[0097] RF circuitry 806 may enable communication with wireless networks using modulated electromagnetic radiation through a non-solid medium. In various embodiments, the RF circuitry 806 may include switches, filters, amplifiers, etc., to facilitate the communication with the wireless network. RF circuitry 806 may include a receive signal path which may include circuitry to down-convert RF signals received from the FEM circuitry 808 and provide baseband signals to the baseband circuitry 804. RF circuitry 806 may also include a transmit signal path which may include circuitry to up-convert baseband signals provided by the baseband circuitry 804 and provide RF output signals to the FEM circuitry 808 for transmission.

[0098] In some embodiments, the RF circuitry 806 may include a receive signal path and a transmit signal path. The receive signal path of the RF circuitry 806 may include mixer circuitry 806A, amplifier circuitry 806B and filter circuitry 806C. The transmit signal path of the RF circuitry 806 may include filter circuitry 806C and mixer circuitry 806A. RF circuitry 806 may also include synthesizer circuitry 806D for synthesizing a frequency for use by the mixer circuitry 806A of the receive signal path and the transmit signal path. In some embodiments, the mixer circuitry 806A of the receive signal path may be configured to down-convert RF signals received from the FEM circuitry 808 based on the synthesized frequency provided by synthesizer circuitry 806D. The amplifier circuitry 806B may be configured to amplify the down-converted signals and the filter circuitry 806C may be a low-pass filter (LPF) or band-pass filter (BPF) configured to remove unwanted signals from the down-converted signals to generate output baseband signals. Output baseband signals may be provided to the baseband circuitry 804 for further processing. In some embodiments, the output baseband signals may be zero-frequency baseband signals, although this is not a requirement. In some embodiments, mixer circuitry 806A of the receive signal path may comprise passive mixers, although the scope of the embodiments is not limited in this respect.

[0099] In some embodiments, the mixer circuitry 806A of the transmit signal path may be configured to up-convert input baseband signals based on the synthesized frequency provided by the synthesizer circuitry 806D to generate RF output signals for the FEM circuitry 808. The baseband signals may be provided by the baseband circuitry 804 and may be filtered by filter circuitry 806C. The filter circuitry 806C may include a low-pass filter (LPF), although the scope of the embodiments is not limited in this respect.

[00100] In some embodiments, the mixer circuitry 806A of the receive signal path and the mixer circuitry 806A of the transmit signal path may include two or more mixers and may be arranged for quadrature down-conversion and/or up- conversion, respectively. In some embodiments, the mixer circuitry 806A of the receive signal path and the mixer circuitry 806A of the transmit signal path may include two or more mixers and may be arranged for image rejection (e.g., Hartley image rejection). In some embodiments, the mixer circuitry 806A of the receive signal path and the mixer circuitry may be arranged for direct down-conversion and/or direct up-conversion, respectively. In some embodiments, the mixer circuitry 806A of the receive signal path and the mixer circuitry of the transmit signal path may be configured for super- heterodyne operation.

[00101] In some embodiments, the output baseband signals and the input baseband signals may be analog baseband signals, although the scope of the embodiments is not limited in this respect. In some alternate embodiments, the output baseband signals and the input baseband signals may be digital baseband signals. In these alternate embodiments, the RF circuitry 806 may include analog-to-digital converter (ADC) and digital-to-analog converter (DAC) circuitry and the baseband circuitry 804 may include a digital baseband interface to communicate with the RF circuitry 806. [00102] In some dual-mode embodiments, a separate radio IC circuitry may be provided for processing signals for each spectrum, although the scope of the embodiments is not limited in this respect.

[00103] In some embodiments, the synthesizer circuitry 806D may be a fractional-N synthesizer or a fractional N/N+1 synthesizer, although the scope of the embodiments is not limited in this respect as other types of frequency synthesizers may be suitable. For example, synthesizer circuitry 806D may be a delta-sigma synthesizer, a frequency multiplier, or a synthesizer comprising a phase-locked loop with a frequency divider.

[00104] The synthesizer circuitry 806D may be configured to synthesize an output frequency for use by the mixer circuitry 806A of the RF circuitry 806 based on a frequency input and a divider control input. In some embodiments, the synthesizer circuitry 806D may be a fractional N/N+1 synthesizer.

[00105] In some embodiments, frequency input may be provided by a voltage controlled oscillator (VCO), although that is not a requirement. Divider control input may be provided by either the baseband circuitry 804 or the applications processor 802, depending on the desired output frequency. In some embodiments, a divider control input (e.g., N) may be determined from a look-up table based on a channel indicated by the applications processor 802.

[00106] Synthesizer circuitry 806D of the RF circuitry 806 may include a divider, a delay-locked loop (DLL), a multiplexer, and a phase accumulator. In some embodiments, the divider may be a dual modulus divider (DMD) and the phase accumulator may be a digital phase accumulator (DPA). In some embodiments, the DMD may be configured to divide the input signal by either N or N+1 (e.g., based on a carry out) to provide a fractional division ratio. In some example embodiments, the DLL may include a set of cascaded, tunable, delay elements, a phase detector, a charge pump, and a D-type flip-flop. In these embodiments, the delay elements may be configured to break a VCO period up into N_d equal packets of phase, where N_d is the number of delay elements in the delay line. In this way, the DLL provides negative feedback to help ensure that the total delay through the delay line is one VCO cycle.

[00107] In some embodiments, synthesizer circuitry 806D may be configured to generate a carrier frequency as the output frequency, while in other embodiments, the output frequency may be a multiple of the carrier frequency (e.g., twice the carrier frequency, four times the carrier frequency), and used in conjunction with quadrature generator and divider circuitry to generate multiple signals at the carrier frequency with multiple different phases with respect to each other. In some embodiments, the output frequency may be a LO frequency (f_Lo). In some embodiments, the RF circuitry 806 may include an IQ/polar converter.

[00108] FEM circuitry 808 may include a receive signal path which may include circuitry configured to operate on RF signals received from one or more antennas 810, amplify the received signals and provide the amplified versions of the received signals to the RF circuitry 806 for further processing. FEM circuitry 808 may also include a transmit signal path which may include circuitry configured to amplify signals for transmission provided by the RF circuitry 806 for transmission by one or more of the one or more antennas 810.

[00109] In some embodiments, the FEM circuitry 808 may include a TX/RX switch to switch between transmit mode and receive mode operation. The FEM circuitry may include a receive signal path and a transmit signal path. The receive signal path of the FEM circuitry may include a low-noise amplifier (LNA) to amplify received RF signals and provide the amplified received RF signals as an output (e.g., to the RF circuitry 806). The transmit signal path of the FEM circuitry 808 may include a power amplifier (PA) to amplify input RF signals (e.g., provided by RF circuitry 806), and one or more filters to generate RF signals for subsequent transmission (e.g., by one or more of the one or more antennas 810.

[00110] In some embodiments, the eNB device 800 may include additional elements such as, for example, memory/storage, display, camera, sensor, and/or input/output (I/O) interface.

[00111] Various techniques, or certain aspects or portions thereof, may take the form of program code (i.e., instructions) embodied in tangible media, such as floppy diskettes, CD-ROMs, hard drives, non-transitory computer readable storage medium, or any other machine-readable storage medium wherein, when the program code is loaded into and executed by a machine, such as a computer, the machine becomes an apparatus for practicing the various techniques. A non-transitory computer-readable storage medium can be a computer-readable storage medium that does not include a signal. In the case of program code execution on programmable computers, the computing device may include a processor, a storage medium readable by the processor (including volatile and non-volatile memory and/or storage elements), at least one input device, and at least one output device. The volatile and non-volatile memory and/or storage elements may be a RAM, EPROM, flash drive, optical drive, magnetic hard drive, solid-state drive, or other medium for storing electronic data. The node and wireless device may also include a transceiver module, a computer module, a processing module, and/or a clock module or timer module. One or more programs that may implement or utilize the various techniques described herein may use an application programming interface (API), reusable controls, and the like. Such programs may be implemented in a high-level procedure or object-oriented programming language to communicate with a computer system. However, the program(s) may be implemented in assembly or machine language, if desired. In any case, the language may be a compiled or interpreted language, and combined with hardware implementations.

[00112] It should be understood that many of the functional units described in the specification have been labeled as modules, in order to more particularly emphasize their implementation independence. For example, a module may be implemented as a hardware circuit comprising custom VLSI circuits or gate arrays, off- the-shelf semiconductors such as logic chips, transistors, or other discrete components. A module may also be implemented in programmable hardware devices such as field programmable gate arrays, programmable array logic, programmable logic devices, or the like.

[00113] Modules may also be implemented in software for execution by various types of processors. An identified module of executable code may, for instance, comprise one or more physical or logical blocks of computer instructions, which may, for instance, be organized as an object, procedure, or function. Nevertheless, the executables of an identified module may be not physically located together, but may comprise disparate instructions stored in different locations which, when joined logically together, comprise the module and achieve the stated purpose for the module.

[00114] Indeed, a module of executable code may be a single instruction, or many instructions, and may even be distributed over several different code segments, among different programs, and across several memory devices. Similarly, operational data may be identified and illustrated herein within modules, and may be embodied in any suitable form and organized within any suitable type of data structure. The operational data may be collected as a single data set, or may be distributed over different locations including over different storage devices, and may exist, at least partially, merely as electronic signals on a system or network. The modules may be passive or active, including agents operable to perform desired functions.

[00115] Reference throughout this specification to "an example" or means that a particular feature, structure, or characteristic described in connection with the example is included in at least one embodiment. Thus, appearances of the phrases, "in an example" or "in some embodiments" in various places throughout this specification are not necessarily all referring to the same embodiment.

[00116] As used herein, a plurality of items, structural elements, compositional elements, and/or materials may be presented in a common list for convenience. However, these lists should be construed as though each member of the list is individually identified as a separate and unique member. Thus, no individual member of such list should be construed as a de facto equivalent of any other member of the same list solely based on their presentation in a common group without indications to the contrary. In addition, various embodiments and examples may be referred to herein along with alternatives for the various components thereof. It is understood that such embodiments, examples, and alternatives are not to be construed as de facto equivalents of one another, but are to be considered as separate and autonomous representations. Furthermore, the described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.

[00117] In summary, the CRC ambiguity avoidance method may be implemented in an apparatus of an enhanced nodeB (eNB) comprising radio frequency circuitry coupled to one or more antennas, the antennas to transmit signals over a cellular network, one or more processors to execute instructions, the instructions, once executed by the one or more processors, to cause the eNB to associate an aggregation level of an Enhanced Physical Downlink Control Channel (ePDCCH) to an index of Control Channel Elements (CCEs), the aggregation level indicating a number of CCEs making up the ePDCCH, the CCEs being addressed using the index, wherein the index is unique for the ePDCCH.

[00118] Further to the first example or any other example discussed herein, in a second example, the apparatus of the eNB further uses a hashing function comprising the aggregation level of the ePDCCH to generate the index.

[00119] Further to the first or second example or any other example discussed herein, in a third example, the apparatus of the eNB further generate the index using the following function:

I = [AL {{Y_Pik + b + m)mod p¾^]} + AL/2 + i] mod(N_ECCEiPik)

wherein AL is the aggregation level, n_s is the slot number, I is the index and ranges from 0 to N_{ECCE p k} - 1, Y_{p k} is an index offset, which depends on an ePDCCH set p, k is defined as [n_s/2\ and corresponds to a subframe number, b is a carrier frequency indicator, m specifies an ePDCCH candidate index for the actual aggregation level, ^NEccE,_P,k is ^a total number of CCE available for the actual ePDCCH set p and subframe k, and i is a relative index of the CCE associated to the ePDCCH candidate.

[00120] Further to the second example or any other example discussed herein, in a fourth example, the apparatus of the eNB further generates the index using the following function:

I = [AL [(Y_pJl + b + m)mod

wherein AL is the aggregation level, n_s is the slot number, I is the index and ranges from 0 to N_{ECCE p k} - 1, Y_{p k} is an index offset, which depends on an ePDCCH set p, k is defined as [n_s/2\ and corresponds to a subframe number, b is a carrier frequency indicator, m specifies an ePDCCH candidate index for the actual aggregation level, ^NEccE,_P,k is ^{a tota}l number of CCE available for the actual ePDCCH set p and subframe k, and i is a relative index of the CCE associated to the ePDCCH candidate.

[00121] Further, the CRC ambiguity avoidance method may be implemented to scramble enhanced control channel elements (eCCEs), the method comprising encoding an aggregation level of one or more Enhanced Physical Downlink Control Channels (ePDCCHs), the ePDCCHs comprising Downlink Control Information (DCI), the one or more ePDCCHs to be decoded by one or more terminals occupying an air interface, the DCI having been CRC-attached, encoded, rate-matched, resulting in the eCCEs, and scrambling the eCCEs using the encoded aggregation level.

[00122] Further to the fifth example or any other example discussed herein, in a sixth example, the method generates an initialization value to be received into a scrambling sequence generator, wherein the initialization value is based on the aggregation level of the ePDCCH.

[00123] Further to the fifth or sixth example or any other example discussed herein, in a seventh example, the method manipulates the aggregation level of the ePDCCH using a function.

[00124] Further to the seventh example or any other example discussed herein, in an eighth example, the function is a logarithmic function.

[00125] Further to the sixth or seventh example or any other example discussed herein, in a ninth example, the method generates a configuration parameter from a set of the ePDCCH, wherein the configuration parameter is combined with the manipulated aggregation level to form a new parameter. [00126] Further to the ninth example or any other example discussed herein, in a tenth example, the new parameter is unique for each combination of configuration parameter and manipulated aggregation level.

[00127] Further to the tenth example or any other example discussed herein, in an eleventh example, the method calculates the initialization value using the new parameter and a slot number of a downlink subframe to include the one or more ePDCCHs.

[00128] Further to the fifth example or any other example discussed herein, in a twelfth example, the method performs the encoding and scrambling operations in an outer control channel receiver of a transmitter.

[00129] Further to the twelfth example or any other example discussed herein, in a thirteenth example, the method performs the encoding and scrambling operations in a Long-term Evolution capable transmitter.

[00130] Further, the CRC ambiguity avoidance method may encode Downlink Control Information (DCI) in a downlink subframe by using a hashing function comprising the aggregation level of an Enhanced Physical Downlink Control Channel (ePDCCH), the ePDCCH comprising a plurality of Enhanced Control Channel Elements (eCCEs), the start of the plurality of eCCEs to be identified with an eCCE index, the number of eCCEs in the ePDCCH corresponding to an aggregation level of the ePDCCH to generate the eCCE index, wherein the eCCE index is unique to the ePDCCH.

[00131] Further to the fourteenth example or any other example discussed herein, in a fifteenth example, the method generates the eCCE index using the following function:

I = [AL {{Y_Pik + b + m)mod p¾^]} + AL/2 + i] mod(N_ECCEiPik)

wherein AL is the aggregation level, n_s is the slot number, I is the eCCE index and ranges from 0 to N_{ECCE p k} - 1, Y_{p k} is an index offset, which depends on an ePDCCH set p, k is defined as [n_s/2\ and corresponds to a subframe number, b is a carrier frequency indicator, m specifies an ePDCCH candidate index for the actual aggregation level, N_{ECCE p k} is a total number of eCCE available for the actual ePDCCH set p and subframe k, and i is a relative index of the eCCE associated to the ePDCCH candidate. [00132] Further to the fifteenth example or any other example discussed herein, in a sixteenth example, the method generates the eCCE index using the following function:

I = [AL [(Y_pJl + b + m)mod

wherein AL is the aggregation level, n_s is the slot number, I is the eCCE index and ranges from 0 to N_{ECCE p k} - 1, Y_{p k} is an index offset, which depends on an ePDCCH set p, k is defined as [n_s/2\ and corresponds to a subframe number, b is a carrier frequency indicator, m specifies an ePDCCH candidate index for the actual aggregation level, N_{ECCE p k} is a total number of eCCE available for the actual ePDCCH set p and subframe k, and i is a relative index of the eCCE associated to the ePDCCH candidate.

[00133] Further, the CRC ambiguity avoidance method may encode an aggregation level of an PDCCH of one or more Physical Downlink Control Channels (PDCCHs) comprising Downlink Control Information (DCI), the one or more PDCCHs to be decoded by one or more terminals occupying an air interface, the DCI having been CRC-attached, encoded, rate-matched, and aggregated, resulting in the CCEs, and scramble the CCEs using the encoded aggregation level.

[00134] Further to the seventeenth example or any other example discussed herein, in an eighteenth example, the method generates an initialization value to be received into a scrambling sequence generator, wherein the initialization value is based on the aggregation level of the PDCCH.

[00135] Further to the eighteenth example or any other example discussed herein, in a nineteenth example, the method manipulates the aggregation level of the PDCCH using a function.

[00136] Further, the CRC ambiguity avoidance method may be implemented in an apparatus comprising means for executing any of the fifth through the nineteenth examples, as described above.

[00137] Further, the CRC ambiguity avoidance method may be implemented in an article comprising a computer-readable medium comprising instructions to cause an electronic device, upon execution of instructions by one or more processors of the electronic device, to execute any of the fifth through the nineteenth examples, as described above.

[00138] Further, the CRC ambiguity avoidance method may be implemented in a computer-readable medium comprising instructions to cause an electronic device, upon execution of instructions by one or more processors of the electronic device, to employ a hashing function comprising an aggregation level of an Enhanced Physical Downlink Control Channel (ePDCCH) to generate an enhanced Control Channel Element (eCCE) index, the ePDCCH comprising a plurality of eCCEs, the start of the plurality of eCCEs to be identified with the eCCE index, wherein the hashing function is one of the following:

l = [AL {{Y_t p,k + b + m)mod + AL/2 + i] mod(N_ECCEiPik) or

I = [AL {{Y_p,k + b + m)mod + y - 1 + i] mod(N_ECCE,p,fc)

wherein AL is the aggregation level, n_s is the slot number, I is the eCCE index and ranges from 0 to N_{ECCE p k} - 1, Y_{p k} is an index offset, which depends on an ePDCCH set p, k is defined as [n_s/2\ and corresponds to a subframe number, b is a carrier frequency indicator, m specifies an ePDCCH candidate index for the actual aggregation level, N_{ECCE p k} is a total number of eCCE available for the actual ePDCCH set p and subframe k, and/ is a relative index of the eCCE associated to the ePDCCH candidate.

[00139] In summary, the CRC ambiguity avoidance method may be implemented in an apparatus of an enhanced nodeB (eNB) comprising radio frequency circuitry coupled to one or more antennas, the antennas to transmit signals over a cellular network, one or more processors to execute instructions, the instructions, once executed by the one or more processors, to cause the eNB to associate an aggregation level of an Enhanced Physical Downlink Control Channel (ePDCCH) to an index of Control Channel Elements (CCEs), the aggregation level indicating a number of CCEs making up the ePDCCH, the CCEs being addressed using the index, wherein the index is unique for the ePDCCH.

[00140] Further to the first example or any other example discussed herein, in a second example, the apparatus of the eNB further uses a hashing function comprising the aggregation level of the ePDCCH to generate the index.

[00141] Further to the first or second example or any other example discussed herein, in a third example, the apparatus of the eNB further generates the index using the following function:

I = [AL {{Y_Pik + b + m)mod p¾^]} + AL/2 + i] mod(N_ECCEiPik)

wherein AL is the aggregation level, n_s is the slot number, I is the index and ranges from 0 to N_{ECCE p k} - 1, Y_{p k} is an index offset, which depends on an ePDCCH set p, k is defined as \n_s/2\ and corresponds to a subframe number, b is a carrier frequency indicator, m specifies an ePDCCH candidate index for the actual aggregation level, ^NEccE,_P,k is ^a total number of CCE available for the actual ePDCCH set p and subframe k, and i is a relative index of the CCE associated to the ePDCCH candidate.

[00142] Further to the second example or any other example discussed herein, in a fourth example, the apparatus of the eNB further generates the index using the following function:

I = [AL [(Y_pJl + b + m)mod

[00143] Further, in a fifth example, the CRC ambiguity avoidance method scrambles enhanced control channel elements (eCCEs) by encoding an aggregation level of one or more Enhanced Physical Downlink Control Channels (ePDCCHs), the ePDCCHs comprising Downlink Control Information (DCI), the one or more ePDCCHs to be decoded by one or more terminals occupying an air interface, the DCI having been CRC-attached, encoded, rate-matched, resulting in the eCCEs, and scrambling the eCCEs using the encoded aggregation level.

[00144] Further to the fifth example or any other example discussed herein, in a sixth example, the method further generates an initialization value to be received into a scrambling sequence generator, wherein the initialization value is based on the aggregation level of the ePDCCH.

[00145] Further to the fifth or sixth example or any other example discussed herein, in a seventh example, the method further manipulates the aggregation level of the ePDCCH using a function.

[00146] Further to the seventh example or any other example discussed herein, in an eighth example, the function is a logarithmic function.

[00147] Further to the sixth or seventh example or any other example discussed herein, in a ninth example, the method further generates a configuration parameter from a set of the ePDCCH, wherein the configuration parameter is combined with the manipulated aggregation level to form a new parameter. [00148] Further to the ninth example or any other example discussed herein, in a tenth example, the new parameter is unique for each combination of configuration parameter and manipulated aggregation level.

[00149] Further to the tenth example or any other example discussed herein, in an eleventh example, the method further calculates the initialization value using the new parameter and a slot number of a downlink subframe to include the one or more ePDCCHs.

[00150] Further to the fifth example or any other example discussed herein, in a twelfth example, the method performs the encoding and scrambling operations in an outer control channel receiver of a transmitter.

[00151] Further to the twelfth example or any other example discussed herein, in a thirteenth example, the method further performs the encoding and scrambling operations in a Long-term Evolution capable transmitter.

[00152] Further, in a fourteenth example, the CRC ambiguity avoidance method encodes Downlink Control Information (DCI) in a downlink subframe by using a hashing function comprising the aggregation level of an Enhanced Physical Downlink Control Channel (ePDCCH), the ePDCCH comprising a plurality of Enhanced Control Channel Elements (eCCEs), the start of the plurality of eCCEs to be identified with an eCCE index, the number of eCCEs in the ePDCCH corresponding to an aggregation level of the ePDCCH to generate the eCCE index, wherein the eCCE index is unique to the ePDCCH.

[00153] Further to the fourteenth example or any other example discussed herein, in a fifteenth example, the method generates the eCCE index using the following function: I = [AL {{Y_PIK + b + m)mod p¾^]} + AL/2 + i] mod(N_ECCEiPik)

[00154] Further to the fourteenth example or any other example discussed herein, in a sixteenth example, the method generates the eCCE index using the following function: I = [AL + y - 1 + i] mod(N_ECCE;P;FC)

[00155] Further, in a seventeenth example, the CRC ambiguity avoidance method scrambles control channel elements (CCEs) by encoding an aggregation level of an PDCCH of one or more Physical Downlink Control Channels (PDCCHs) comprising Downlink Control Information (DCI), the one or more PDCCHs to be decoded by one or more terminals occupying an air interface, the DCI having been CRC-attached, encoded, rate-matched, and aggregated, resulting in the CCEs, and scrambles the CCEs using the encoded aggregation level.

[00156] Further to the seventeenth example or any other example discussed herein, in an eighteenth example, the method generates an initialization value to be received into a scrambling sequence generator, wherein the initialization value is based on the aggregation level of the PDCCH.

[00157] Further to the eighteenth example or any other example discussed herein, in a nineteenth example, the method manipulates the aggregation level of the PDCCH using a function.

[00158] Further, in a twentieth example, the CRC ambiguity avoidance method operates in an apparatus comprising means for executing any of the fifth through the nineteenth examples.

[00159] Further, in a twenty-first example, the CRC ambiguity avoidance method operates in an article comprising a computer-readable medium comprising instructions to cause an electronic device, upon execution of instructions by one or more processors of the electronic device, to execute any of the fifth through the nineteenth examples.

[00160] Further, in a twenty-second example, the CRC ambiguity avoidance method operates in a computer-readable medium comprising instructions to cause an electronic device, upon execution of instructions by one or more processors of the electronic device, to employ a hashing function comprising an aggregation level of an Enhanced Physical Downlink Control Channel (ePDCCH) to generate an enhanced Control Channel Element (eCCE) index, the ePDCCH comprising a plurality of eCCEs, the start of the plurality of eCCEs to be identified with the eCCE index, wherein the hashing function is one of the following:

I = [AL {{Y_Pik + b + m)mod p¾^]} + AL/2 + i] mod(N_ECCEiPik) or

l = [AL [(Y_pJl + b + m)mod

[00161] While the foregoing examples are illustrative of the principles in one or more particular applications, it will be apparent to those of ordinary skill in the art that numerous modifications in form, usage, and details of implementation can be made without the exercise of inventive faculty, and without departing from the principles and concepts herein and will appreciate numerous modifications and variations therefrom. It is intended that the appended claims cover all such modifications and variations as fall within the true spirit and scope of the disclosed embodiments.

Claims

We claim: 1 . An apparatus of an enhanced nodeB (eNB) comprising:

radio frequency circuitry coupled to one or more antennas, the antennas to transmit signals over a cellular network;

one or more processors to execute instructions, the instructions, once executed by the one or more processors, to cause the eNB to:

associate an aggregation level of an Enhanced Physical Downlink Control Channel (ePDCCH) to an index of Control Channel Elements (CCEs), the aggregation level indicating a number of CCEs making up the ePDCCH, the CCEs being addressed using the index;

wherein the index is unique for the ePDCCH. 2. The apparatus of the eNB of claim 1 , the eNB to further:

use a hashing function comprising the aggregation level of the ePDCCH to generate the index. 3. The apparatus of the eNB of claim 1 or 2, the eNB to further:

generate the index using the following function: l = [AL {{Y_Pik + b + m)mod p¾^]} + AL/2 + i] mod(N_ECCEiPik)

wherein AL is the aggregation level, n_s is the slot number, I is the index and ranges from 0 to N_{ECCE p k} - 1, Y_{p k} is an index offset, which depends on an ePDCCH set p, k is defined as [n_s/2\ and corresponds to a subframe number, b is a carrier frequency indicator, m specifies an ePDCCH candidate index for the actual aggregation level, N_{ECCE p k} is a total number of CCE available for the actual ePDCCH set p and subframe k, and i is a relative index of the CCE associated to the ePDCCH candidate. 4. The apparatus of the eNB of claim 2, the eNB to further:

generate the index using the following function:

wherein AL is the aggregation level, n_s is the slot number, I is the index and ranges from 0 to N_{ECCE p k} - 1, Y_{p k} is an index offset, which depends on an ePDCCH set p, k is defined as [n_s/2\ and corresponds to a subframe number, b is a carrier frequency indicator, m specifies an ePDCCH candidate index for the actual aggregation level, ^NEccE,p,k is ^{a tota}l number of CCE available for the actual ePDCCH set p and subframe k, and i is a relative index of the CCE associated to the ePDCCH candidate. 5. A method to scramble enhanced control channel elements (eCCEs), the method comprising:

encoding an aggregation level of one or more Enhanced Physical Downlink Control Channels (ePDCCHs), the ePDCCHs comprising Downlink Control Information (DCI), the one or more ePDCCHs to be decoded by one or more terminals occupying an air interface, the DCI having been CRC-attached, encoded, rate-matched, resulting in the eCCEs; and

scrambling the eCCEs using the encoded aggregation level. 6. The method of claim 5, further comprising:

generating an initialization value to be received into a scrambling sequence generator, wherein the initialization value is based on the aggregation level of the ePDCCH. 7. The method of claim 5 or 6, further comprising:

manipulating the aggregation level of the ePDCCH using a function. 8. The method of claim 7, wherein the function is a logarithmic function. 9. The method of claim 6 or 7, further comprising:

generating a configuration parameter from a set of the ePDCCH;

wherein the configuration parameter is combined with the manipulated aggregation level to form a new parameter. 10. The method of claim 9, wherein the new parameter is unique for each combination of configuration parameter and manipulated aggregation level. 1 1 . The method of claim 10, further comprising:

calculating the initialization value using the new parameter and a slot number of a downlink subframe to include the one or more ePDCCHs. 12. The method of claim 5, further comprising: performing the encoding and scrambling operations in an outer control channel receiver of a transmitter. 13. The method of claim 12, further comprising:

performing the encoding and scrambling operations in a Long-term Evolution capable transmitter. 14. A method to encode Downlink Control Information (DCI) in a downlink subframe, the method comprising:

using a hashing function comprising the aggregation level of an Enhanced Physical Downlink Control Channel (ePDCCH), the ePDCCH comprising a plurality of Enhanced Control Channel Elements (eCCEs), the start of the plurality of eCCEs to be identified with an eCCE index, the number of eCCEs in the ePDCCH corresponding to an aggregation level of the ePDCCH to generate the eCCE index;

wherein the eCCE index is unique to the ePDCCH. 15. The method of claim 14, further comprising:

generating the eCCE index using the following function: l = [AL {{Y_Pik + b + m)mod p¾^]} + AL/2 + i] mod(N_ECCEiPik)

wherein AL is the aggregation level, n_s is the slot number, I is the eCCE index and ranges from 0 to N_{ECCE p k} - 1, Y_{p k} is an index offset, which depends on an ePDCCH set p, k is defined as [n_s/2\ and corresponds to a subframe number, b is a carrier frequency indicator, m specifies an ePDCCH candidate index for the actual aggregation level, N_{ECCE p k} is a total number of eCCE available for the actual ePDCCH set p and subframe k, and i is a relative index of the eCCE associated to the ePDCCH candidate. 16. The method of claim 14, further comprising:

generating the eCCE index using the following function:

wherein AL is the aggregation level, n_s is the slot number, I is the eCCE index and ranges from 0 to N_{ECCE p k} - 1, Y_{p k} is an index offset, which depends on an ePDCCH set p, k is defined as [n_s/2\ and corresponds to a subframe number, b is a carrier frequency indicator, m specifies an ePDCCH candidate index for the actual aggregation level, N_{ECCE p k} is a total number of eCCE available for the actual ePDCCH set p and subframe k, and i is a relative index of the eCCE associated to the ePDCCH candidate. 17. A method to scramble control channel elements (CCEs), the method comprising: encoding an aggregation level of an PDCCH of one or more Physical Downlink Control Channels (PDCCHs) comprising Downlink Control Information (DCI), the one or more PDCCHs to be decoded by one or more terminals occupying an air interface, the DCI having been CRC-attached, encoded, rate-matched, and aggregated, resulting in the CCEs; and

scrambling the CCEs using the encoded aggregation level. 18. The method of claim 17, further comprising:

generating an initialization value to be received into a scrambling sequence generator, wherein the initialization value is based on the aggregation level of the PDCCH. 19. The method of claim 18, further comprising:

manipulating the aggregation level of the PDCCH using a function. 20. An apparatus comprising means for executing any of claims 5 - 19. 21 . An article comprising a computer-readable medium comprising instructions to cause an electronic device, upon execution of instructions by one or more processors of the electronic device, to execute any of claims 5 - 19. 22. A computer-readable medium comprising instructions to cause an electronic device, upon execution of instructions by one or more processors of the electronic device, to:

employ a hashing function comprising an aggregation level of an Enhanced Physical Downlink Control Channel (ePDCCH) to generate an enhanced Control Channel Element (eCCE) index, the ePDCCH comprising a plurality of eCCEs, the start of the plurality of eCCEs to be identified with the eCCE index;

wherein the hashing function is one of the following:

l = [AL {{Y_Pik + b + m)mod p¾_^]} + AL/2 + i] mod(N_ECCEiPik) or