CN109314617B - Method for CRC ambiguity avoidance in 5G DCI decoding - Google Patents

Method for CRC ambiguity avoidance in 5G DCI decoding Download PDF

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CN109314617B
CN109314617B CN201680086363.9A CN201680086363A CN109314617B CN 109314617 B CN109314617 B CN 109314617B CN 201680086363 A CN201680086363 A CN 201680086363A CN 109314617 B CN109314617 B CN 109314617B
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epdcch
index
ecce
pdcch
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CN109314617A (en
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霍尔格·诺伊豪斯
迈克尔·霍瓦特
拉尔夫·本德林
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00Arrangements affording multiple use of the transmission path
    • H04L5/003Arrangements for allocating sub-channels of the transmission path
    • H04L5/0053Allocation of signaling, i.e. of overhead other than pilot signals
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
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    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0061Error detection codes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
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Abstract

A Cyclic Redundancy Check (CRC) ambiguity avoidance method is disclosed. The CRC ambiguity avoidance method employs one or both of scrambling initialization function and hash function techniques for avoiding mismatches between Physical Downlink Control Channel (PDCCH) and enhanced physical downlink control channel (ePDCCH) decoding based on Aggregation Level (AL) hypotheses and those used for coding at the transmitter side. The scrambling initialization function scrambles the control information based on the aggregation level of the transmitted PDCCH or ePDCCH. The hash function changes a Control Channel Element (CCE) or enhanced control channel element (eCCE) starting index based on an aggregation level of PDCCH or ePDCCH, respectively. The CRC ambiguity avoidance method thus avoids misjudging PDCCH or ePDCCH decoding by the terminal.

Description

Method for CRC ambiguity avoidance in 5G DCI decoding
Technical Field
The present application relates to processing of Physical Downlink Control Channel (PDCCH) and enhanced PDCCH (ePDCCH) in 3GPP, and more particularly to avoiding false-positive (false-positive) ePDCCH decoding at a terminal.
Background
In the third generation partnership project (3 GPP) Long Term Evolution (LTE) fourth generation mobile communication standard, a base station transmitter, referred to in LTE as an enhanced node B or eNodeB (eNB), schedules transmissions of common channels in the physical layer (PHY) to one or more terminals, referred to in LTE as User Equipment (UE), via a Physical Downlink Control Channel (PDCCH).
Downlink Control Information (DCI) such as scheduling and power control commands is transmitted to a UE or a group of UEs through the PDCCH. However, due to the limitation of the control channel capacity of the PDCCH, in LTE release 11, a new control channel, i.e., enhanced PDCCH (ePDCCH), is defined to support complex operations such as inter-cell interference coordination (ICIC), multiple-input multiple-output (MIMO), beamforming, coordinated multipoint transmission (CoMP), and the like.
And in the case that the PDCCH only occupies the control region of the subframe, the ePDCCH occupies the data region. Other differences exist between the two control channels.
In current LTE implementations, the UE may decode the control region incorrectly, which results in a misjudged PDCCH, or may decode the data region incorrectly, which results in a misjudged ePDCCH.
Therefore, a mechanism is needed to overcome the disadvantages of the prior art.
Drawings
The foregoing aspects and many of the attendant advantages of this document will become more readily appreciated as the same become better understood by reference to the following detailed description, when taken in conjunction with the accompanying drawings, wherein like reference numerals designate like parts in the various views unless otherwise specified.
FIG. 1 is a simplified block diagram of three PHY downlink transport channels;
fig. 2 is a diagram of an FDD LTE radio frame;
fig. 3 shows the difference between release 8PDCCH and release 11ePDCCH in LTE;
fig. 4 is a diagram showing a PDCCH configuration;
fig. 5 is a diagram showing the mapping of two ePDCCH sets;
fig. 6A and 6B are diagrams illustrating downlink control information processing for PDCCH and ePDCCH, respectively, at a transmitter;
FIG. 7 is a diagram illustrating CCE aggregation and PDCCH multiplexing operations for the PDCCH of FIG. 6A;
fig. 8 is a diagram illustrating logical and subsequent physical RE allocation for ePDCCH;
fig. 9 is an exemplary diagram illustrating a mode of the same content allocated to different eCCE start indexes and encoded with different aggregation levels;
fig. 10 is a diagram showing how current prior art LTE scrambling sequences with different aggregation level coding share the same initial scrambling sequence;
FIG. 11 is a simplified block diagram of a CRC ambiguity avoidance method according to some embodiments;
FIG. 12 is a diagram illustrating a scrambling initialization function of the CRC ambiguity avoidance method of FIG. 11, in accordance with some embodiments;
FIG. 13 is a diagram illustrating a hash function implementation of the CRC ambiguity avoidance method of FIG. 11, according to some embodiments;
FIG. 14 is a diagram illustrating a second hash function implementation of the CRC ambiguity avoidance method of FIG. 11, in accordance with some embodiments; and
fig. 15 is a simplified block diagram of a UE capable of implementing the CRC ambiguity avoidance method of fig. 11, in accordance with some embodiments.
Detailed Description
According to embodiments described herein, a Cyclic Redundancy Check (CRC) ambiguity avoidance method is disclosed. The CRC ambiguity avoidance method employs one or both of scrambling initialization function and hash function techniques for avoiding mismatches between Physical Downlink Control Channel (PDCCH) and enhanced physical downlink control channel (ePDCCH) decoding based on Aggregation Level (AL) hypotheses and those used for coding at the transmitter side. The scrambling initialization function scrambles the control information based on the aggregation level of the transmitted PDCCH or ePDCCH. The hash function changes a Control Channel Element (CCE) or enhanced control channel element (eCCE) starting index based on an aggregation level of PDCCH or ePDCCH, respectively. The CRC ambiguity avoidance method thus avoids misjudging PDCCH or ePDCCH decoding by the terminal.
In the following detailed description, reference is made to the accompanying drawings that show, by way of illustration, specific embodiments in which the subject matter described herein may be practiced. However, it is to be understood that other embodiments will become apparent to those of ordinary skill in the art upon reading this disclosure. In other instances, well-known structures, materials, or operations are not shown or described in detail to avoid obscuring aspects of the disclosure. The following detailed description is, therefore, not to be taken in a limiting sense, because the scope of the subject matter is defined by the appended claims.
Among other tasks, uplink and downlink scheduling is managed at the Medium Access Control (MAC) layer. The MAC is organized into logical channels including control channels for transmitting control and configuration information and traffic channels for transmitting data. The transport channel maps logical channels and traffic channels of the MAC to physical channels of the PHY layer. At the PHY layer, physical channels are used to describe a set of time-frequency resources used for transmission of transport channels.
In other cases, the transport channels are not mapped to any physical channels. These channels are referred to as layer 1/layer 2 (L1/L2) control channels because the information originates from both the physical layer (L1) and the MAC layer (L2). Examples of L1/L2 channels include a Physical Downlink Control Channel (PDCCH), an enhanced PDCCH (ePDCCH), and a Physical Control Format Indicator Channel (PCFICH). In the downlink, the L1/L2 control channel is used for Downlink Control Information (DCI) such as downlink scheduling assignments, uplink scheduling grants, and power control commands, which enable a terminal (UE) to correctly decode subsequent downlink transmissions. Different DCI message sizes (referred to as DCI formats) correspond to different types of control information transmitted. For example, DCI format 1C is a 31-byte downlink DCI format, which is used for special-purpose compact allocation. Factors such as cell bandwidth affect which DCI format is used.
The following LTE PHY channels occupy the transmission band of the air interface between the eNB and the UE. The PCFICH provides information to the UE to enable decoding of the PDCCH set. Before receiving one or more PDCCHs, the UE obtains a PCFICH configuration. Further, the PDCCH is obtained prior to receiving a Physical Downlink Shared Channel (PDSCH) from the eNB and is used to schedule a grant that enables the UE to transmit to the eNB using a Physical Uplink Shared Channel (PUSCH). The PDSCH and PUSCH are used for downlink transmission and uplink transmission of data between the UE and the eNB, respectively. The relationship between PCFICH, PDCCH and PDSCH for LTE downlink operation is depicted in the simplified diagram of fig. 1.
In 3GPP LTE, both downlink transmission and uplink transmission employ an Orthogonal Frequency Division Multiplexing (OFDM) transmission scheme. Within the OFDM scheme, transmissions may employ Frequency Division Duplex (FDD) or Time Division Duplex (TDD) modes of operation, and different Orthogonal Frequency Division Multiple Access (OFDMA) techniques in the downlink and single carrier frequency division multiple access (SC-FDMA) techniques in the uplink.
A resource block is a time/frequency/space construct that is used to describe the "physical resources" of an OFDM transmission. Each row corresponds to one OFDM subcarrier and each column corresponds to an OFDM symbol. The spatial dimension is indicated using two or more antenna ports, each antenna port corresponding to each "layer" of the resource block. In fig. 2, an FDD LTE radio frame for 1.4MHz transmission is shown. A single radio frame (10 ms in duration) is subdivided into 10 subframes (1 ms in duration) in the time domain and 6 subframes in the frequency domain. Each subframe is further subdivided into two slots (0.5 ms in duration), also called Resource Blocks (RBs). In this example, each RB consists of twelve subcarriers by seven OFDM symbols.
The minimum unit of a subframe is a Resource Element (RE) having a dimension of one subcarrier (frequency) and a duration of one symbol (time). In the example of fig. 2, each subframe RB thus consists of 84 REs. In the spatial dimension, the number of subframes is further increased based on the number of antenna ports.
As described above, ePDCCH is a new control channel introduced in release 11 of LTE. Although some aspects of epdcchs are similar to PDCCHs, they are two different channels. Fig. 3 shows the difference between LTE release 8 (legacy) PDCCH and release 11 ePDCCH. When the PDCCH occupies the control region, the ePDCCH shares the data region with the PDSCH. Channel bandwidth ranging from 0 to N RB -1 resource block. For 20MHz channel, N RB =100。
The size of the control region is varied and is specified by the PCFICH. As indicated, the PCFICH is mapped to a known position in the first OFDM symbol. In addition to mapping a physical hybrid automatic repeat request indicator channel (PHICH) (not shown), the remainder of the control region is reserved for PDCCH mapping. The PDCCH is located in the control region of each subframe and spans the entire available bandwidth. Instead, ePDCCH occupies the data region and spans a small portion of the bandwidth.
Each UE may be configured with a UE-specific ePDCCH allocation consisting of at most two sets of 2, 4, or 8 RB pairs. Fig. 3 shows an EPDCCH having four RB pairs. For release 11 capable enbs, the same downlink subframe may support PDCCH decoding for legacy UEs and ePDCCH decoding for release 11 capable UEs. Once the PDCCH and ePDCCH are decoded, the UE knows which RBs in the data region correspond to PDSCH intended for the UE.
The legacy PDCCH to resource element mapping follows a predefined structure in order to simplify processing at the UE. A Control Channel Element (CCE) consists of nine sets of Resource Element Groups (REGs), where a REG consists of four consecutive REs or four REs separated by the same OFDM symbol and reference signals within the same resource block. The PDCCH to resource element mapping uses CCEs.
The number of CCEs used for a given PDCCH is referred to as its Aggregation Level (AL). For the PDCCH, there are four AL, denoted AL1, AL2, AL4 and AL8.AL1 uses one CCE; AL2 uses two CCEs; AL4 uses four CCEs; and AL8 uses eight CCEs. The number of CCEs per PDCCH depends on the DCI format (because the payloads are different), the channel coding rate and the UE channel conditions. The eNB decides which AL to use for a given UE, so if the PDCCH for the UE has poor downlink channel quality, a larger number of CCEs (e.g., AL4 or AL 8) may be used than the PDCCH for the UE with good channel quality.
Fig. 4 is a PDCCH configuration diagram in which CCE logical mapping is allocated to a control region of a downlink subframe. In fig. 4, six PDCCHs are indicated in the CCE logical mapping, denoted 0-5. The first PDCCH is an AL1PDCCH; the second and sixth PDCCHs are from AL2; the third and fifth PDCCHs are from AL4; the fourth PDCCH is an AL8PDCCH.
An exploded view of one of the CCEs shows that the CCE is to be mapped to the control region of the subframe. The REGs constituting the CCE share a space in the control region with the PCFICH and PHICH channels and are separated in order to reduce interference.
Fig. 5 shows ePDCCH mapping in the data region of a downlink subframe. Each UE using ePDCCH is configured with one or two resource block sets, where ePDCCH transmission to the UE may occur. There may be two, four or eight RB pairs per set. In fig. 5, ePDCCH set 1 consists of four RB pairs, and ePDCCH set 2 consists of two RB pairs. The ePDCCH set is configured as localized or distributed. Thus, a UE may be provided with two ePDCCH sets, one configured for localized transmission and the other configured for distributed transmission.
Similar to PDCCH, ePDCCH is divided into enhanced control channel elements (ecces). Typically, each eCCE consists of four enhanced resource element groups (eregs), where each eREG consists of nine REs in one RB pair. The number of ecces in ePDCCH is given by its Aggregation Level (AL), which may be 1, 2, 4, 8, 16 or 32 (while PDCCH is limited to four aggregation levels). The ePDCCH uses a set of consecutive (logical) ecces.
Fig. 6A and 6B show the difference in DCI processing for PDCCH and ePDCCH, respectively. For legacy PDCCH (fig. 6A), 16 bits of Cyclic Redundancy Check (CRC) are attached to each DCI message payload (e.g., 31 bits). For some DCI message types, a Radio Network Temporary Identifier (RNTI) identifies one or more UEs addressed by a CRC parity bit mask. This implicit encoding of the UE identifier/identifiers ensures that only the intended UE(s) successfully decode the DCI message.
The CRC-attached bits are then encoded with a tail-biting convolutional encoder (TBCE) into three coded DCI streams, e.g., 3 +16, at a fixed code rate of 1/3. The circular buffer is periodically read out until the available bit payload for E/PDCCH transmission is reached. If the bit effective load is smaller than the size of the circular buffer area, the code rate is larger than 1/3; if the circular buffer is read more than once, the code rate is below 1/3. The streams are also rate matched to fit the amount of resources used for PDCCH transmission. In PDCCH processing, CCEs from each encoded PDCCH are concatenated and allocated to specific REs in a CCE aggregation and PDCCH multiplexing unit 30, which CCE aggregation and PDCCH multiplexing unit 30 generates a composite CCE 80 as known herein, as described further below.
In the scrambling unit 40, the composite CCE 80 is scrambled using a cell and subframe specific scrambling sequence to randomize inter-cell interference (ICI). The scrambling is followed by Quadrature Phase Shift Keying (QPSK) modulation and mapping to REs. During the interleaving and cell-specific cyclic shift phase, cell-specific mapping of the PDCCH occurs.
In contrast to the PDCCH processing shown in fig. 6A, ecces from each coded ePDCCH in fig. 6B are not concatenated. Instead, each ePDCCH set and its corresponding eCCE are handled separately. Once the eCCE index is known, the mapping of ecces to REs is predetermined within the ePDCCH resource set. Therefore, interleaving of multiple ePDCCH transmissions is not performed.
Misjudgment PDCCH
The UE performs so-called blind decoding of the PDCCH. This is because the UE does not know the aggregation level used by the eNB, the starting index/position of the CCE addressed to the UE, and the DCI format used by the eNB. In order to reduce the complexity of PDCCH decoding, there is a limit to the aggregation of consecutive CCEs. For example, a PDCCH formatted as n CCEs may start only with CCEs numbered equal to multiples of n. Thus, the AL1PDCCH may start at any CCE starting position (index); the AL4PDCCH starts with a CCE index numbered a multiple of four (e.g., 0, 4, 8, 12 \8230;), and so on.
Thus, there are different aggregation levels to support different DCI formats and channel bandwidths, as well as providing the possibility to adjust the amount of decoding error protection depending on the channel quality between the UE and the eNB. Fig. 7 shows one example of how the CCE aggregation and PDCCH multiplexing unit 30 of fig. 6A operates. Four rows of aggregation levels are depicted, each row featuring CCEs, and the fifth row is a logical mapping of PDCCHs generated at each aggregation level, addressed using CCE indices (starting from 0).
First PDCCH (PDCCH) A ) Consisting of a single CCE. Thus, PDCCH A Is AL1PDCCH, which means that PDCCH can be transmitted using not more than 9 REGs (36 REs) A The DCI of (1). Denoted as PDCCH B And PDCCH C Each consists of two CCEs and starts with an even-numbered CCE index. AL4PDCCH (PDCCH) D ) Has four CCEs, and AL8PDCCH (PDCCH) E ) Eight CCEs are used. For example, where the UE is at the cell edge and thus has impaired channel quality, or in another example, where the DCI being transmitted to the UE is very complex, a PDCCH with a higher AL (e.g., PDCCH) may be used E )。
As shown in fig. 6A, the composite CCE 80 generated in the CCE aggregation and PDCCH multiplexing unit 30 is scrambled and QPSK modified before being finally mapped to the control region of the downlink subframe. Each PDCCH is allocated a unique CCE index as shown in the bottom of fig. 7.
To assist blind decoding, a common and UE-specific search space is defined. This limits the number of PDCCH candidates (from all possible combinations of CCEs), 16 for UE-specific search spaces and 6 for common search spaces. Due to circular buffer based rate matching, the coded bits start repeating after the first CCE. This, together with the search space overlap between different aggregation levels, means that multiple aggregation sizes can pass the CRC check. Blind decoding candidates that result in a successful CRC check but have not yet been transmitted by the eNB are referred to as false positive PDCCH candidates, false positive PDCCHs, or false positive candidates.
Misjudgment ePDCCH
In contrast to PDCCH occupying the control region, ePDCCH is multiplexed in the frequency domain with PDSCH in the data region of the subframe. As shown in fig. 8, ePDCCH is mapped to a consecutive number of ecces based on aggregation level, each eCCE (typically) consisting of four eregs (where a single eREG consists of 9 REs in one physical resource block pair). To define the eREG, all REs in the RB (excluding DM-RS REs) are cyclically numbered from 0 to 15 in a frequency-first manner. eREG i Consisting of all REs numbered i in the resource block pair. Although there may be up to sixteen ecces, there may be less when the first OFDM symbol is used for control information (including PDCCH).
In fig. 8, ePDCCH mapping starts with logical RE mapping and ends with physical RE allocation in a subframe. First, eregs are allocated, each composed of 9 numbered REs. Then, each RE constituting each eREG is mapped to a subframe in a predefined position. Each eCCE consists of four eregs and is shaded to distinguish it from other ecces. eCCE 1 By eREG 0 、eREG 4 、eREG 8 And eREG 12 Composition is carried out; eCCE 2 By eREG 1 、eREG 5 、eREG 9 And eREG 13 Composition is carried out; eCCE 3 By eREG 2 、eREG 6 、eREG 10 And eREG 14 Composition is carried out; and eCCE 4 By eREG 3 、eREG 7 、eREG 11 And eREG 15 And (4) forming.
If the eNB specified aggregation level is AL2, then the ePDCCH is defined using two ecces (each with four eregs). Thus, eCCE may be used 1 And eCCE 2 . For aggregation level 4, ePDCCH is defined using four ecces, and an eCCE may be used 1 、eCCE 2 、eCCE 3 And eCCE 4 . In contrast to PDCCH, resource allocation for ePDCCH is semi-static and configured by higher layers such as Radio Resource Control (RRC). This means that the eCCE index is the same for all ePDCCH candidates, contrary to the organization of the PDCCH.
A hash function is specified for PDCCH and ePDCCH in LTE to organize the order and distribution of PDCCH and ePDCCH candidates (e.g., all available CCEs or ecces (referred to herein as e/CCEs)) for different Aggregation Levels (ALs) within a search space. A hash function is an algorithm that takes a string of arbitrary length and reduces it to a unique fixed length string. Hash functions are used for cryptographic validity, data and message integrity, and cryptography.
CCEs for PDCCH are organized in a logical mapping manner before mapping to resource elements of a subframe, where each CCE is identified by a CCE index (fig. 7). The eCCE organization for ePDCCH is as shown in fig. 8.
In LTE, the index of the starting e/CCE is used for Physical Uplink Control Channel (PUCCH) resource allocation. This means that if the index of the starting e/CCE changes in some new implementations, the PUCCH resource allocation will change accordingly.
In the case of LTE PDCCH, error-free detection of PCFICH provides resource allocation (control region size) for PDCCH. Furthermore, the UE performs blind estimation of the PDCCH allocation, e.g. checking all valid allocations. Therefore, the CCE starting index is not the same for a plurality of ePDCCH candidates that pass the CRC check.
To identify the most likely candidate, the receiver may re-encode the detected DCI message and calculate the Bit Error Rate (BER) of all ePDCCH candidates that pass the CRC check. The UE will then select the ePDCCH candidate with the lowest BER.
The bit payload size for ePDCCH transmission is determined by the product of the aggregation level times the bit size of the e/CCE. If the same single or multiple subsequent e/CCEs are shared as the preamble e/CCE by multiple ePDCCH candidates of different aggregation levels, all or a subset of these candidates may pass the CRC check depending on the code rate and signal-to-noise ratio (SNR) (which comes from increasing redundancy due to robustness of decoding). As used herein, blind decoding candidates that yield a successful CRC check but employ parameters not used in the transmitter are referred to as misjudged EPDCCH candidates, misjudged EPDCCH, or misjudged candidates.
Fig. 9 shows a false positive candidate phenomenon. Likewise, a logical arrangement of ecces (numbered squares), the eCCE index indicates the starting location of each eCCE. Four aggregation level candidate indices, AL2, AL4, AL8, and AL16 are shown. Each aggregation level relates to the length of received data corresponding to a particular code block that is decoded by the UE and tested for correctness using a CRC block. The UE does not know the size of the code block or the starting position of the code block (eCCE index).
In AL2, 9 eCCE candidate pairs are shown, denoted 0-8. In AL4, four eCCE candidate groups, denoted 0-3, are shown, with four eCCEs per eCCE candidate group. The AL8 has two eCCE candidate groups, each consisting of eight ecces. The AL16 has an e/CCE candidate set of 16 eCCEs.
If the PDCCH is to be transmitted at AL8, the total data received is longer than if the PDCCH was transmitted at aggregation level 2, but the information bits transmitted at AL2 are not more than AL8.AL 8 transmissions are more robust or more redundant than AL2 transmissions. For example, such robustness and redundancy is beneficial for UEs with poor signal quality.
The grey area shows where the AL candidates share the same starting eCCE index. The top of fig. 9 also shows where the indicated eCCE bit sequence is identically scrambled. Ecces starting from eCCE index 0 are equally scrambled regardless of the aggregation level. The AL2, AL4 and AL8 candidates starting from the eCCE index 8 are also scrambled identically. Since ecces are identically scrambled and different aggregation level candidates use the same eCCE start index, this means that during blind decoding, the UE may decode the first two ecces at eCCE index 0 and the first four ecces at eCCE index 0. If one succeeds in CRC checking, the other will also succeed.
In other words, this means that not only decoding attempts with parameters used in the transmitter (i.e. with the expected aggregation level) result in a successful CRC check, but also decoding attempts for candidates employing other ALs will succeed, with each successful decoding comprising the same DCI message.
Since only the preamble eCCE causes ambiguity, the absolute eCCE start index of the ePDCCH candidate by CRC is the same, since the start point of the eCCE index is the same for all aggregation levels.
However, the ePDCCH candidate index and the aggregation level are different for ePDCCH candidates that pass CRC and have the same eCCE start index. For control channel designs such as defined by LTE ePDCCH, blind detection based on CRC validation performed by the UE will result in correct message detection and correct eCCE starting index detection, but may be ambiguous in terms of the AL assumed by the UE to be used by the transmitter. Ambiguity may lead to problems if the ePDCCH candidate index or AL is used in future 5G specifications for any further processing at the receiver.
Fig. 10 shows scrambling sequences from 3gpp TS 36.211 applied to multiple ePDCCH candidates with different aggregation levels. In this example, 60 bits per eCCE are assumed.
For example, the control channel design as defined for LTE ePDCCH does not use a scrambling sequence that is unique for each AL. Thus, the signal after scrambling for one AL is the same as the preamble of the scrambled signal generated with the higher AL. For the same message content, a higher AL provides a longer output signal with more redundancy, as shown in fig. 10. This extra robustness can be avoided when there are sufficiently good signal conditions on the receiver side. Therefore, the receiver can successfully decode the sequence by using only the preamble of the longer sequence. Thus, control messages sent with a high AL can potentially be decoded by receivers with a lower AL.
Fig. 11 is a simplified block diagram of a CRC ambiguity avoidance method 100 according to some embodiments. The CRC ambiguity avoidance method 100 employs one or both of scrambling initialization function and hash function techniques to avoid the above-mentioned erroneous judgment of ePDCCH candidates. The scrambling initialization function 50 scrambles the control information based on the aggregation level of the transmitted ePDCCH. This ensures that ecces with different aggregation levels are not scrambled identically, avoiding ambiguity at the UE. The hash function 150 also changes the eCCE start index based on the aggregation level of the ePDCCH. Thus, the aggregation level of the ePDCCH affects the scrambling and starting eCCE index of the composite ecces that make up the ePDCCH. Each of these functions is described below.
In some embodiments, the CRC ambiguity avoidance method 100 systematically removes any CRC pass ambiguity for epdcchs (e.g., 5G epdcchs) through AL-specific initialization generated by LTE scrambling sequences. The CRC ambiguity avoidance method 100 is applicable to any integer aggregation level.
Scrambling initialization function 50
According to LTE TS 36.211 section 6.8A2, the subframe pair is to be in
Figure BDA0001888045170000111
Bit b (0) sent on ePDCCH (candidate) in (where ns is the slot number) bit -1) scrambling the block to produce scrambled bits according to
Figure BDA0001888045170000112
The block (2) is as follows:
Figure BDA0001888045170000113
an example of a UE-specific scrambling sequence c (i) is given in section 7.2 of 3GPP technical specification 36.211.
Recall that a UE may be configured with two sets of epdcchs. Thus, the ePDCCH set number indicates the ePDCCH set. The scrambling sequence generator is initialized using:
Figure BDA0001888045170000114
where q is the ePDCCH set number and format ePDCCH is an indexed representation of the AL of the scrambled ePDCCH candidate, or more generally:
Figure BDA0001888045170000115
in some embodiments, the AL index representation is defined as format epdcch = log2 (AL).
In some embodiments, the CRC ambiguity avoidance method 100 utilizes an AL-specific initialization generated by the scrambling sequence such that n is unique for ePDCCH sets q and AL or any valid combination of format epdcchs, respectively. Thus, the scrambling sequence obtained using the scrambling initialisation function 50 is unique for each AL.
While equations (1) and (2) specify parameters for ePDCCH, scrambling initialization function 50 may be similarly applied to PDCCH in case misjudging PDCCH is to be avoided.
Fig. 12 is a simplified diagram illustrating the scrambling initialization function 50 of the CRC ambiguity avoidance method 100 of fig. 11, in accordance with some embodiments. The scrambling initialization function 50 includes an aggregation level encoding unit 60, an RRC unit 62, a combining unit 64, an initialization value calculating unit 66, a scrambling sequence generator 68, and a scrambling function unit 70. In the transmission circuit of the eNB, the AL encoding unit 60 converts the aggregation level into a function nAL. In some embodiments, AL encoding unit 60 converts AL to nAL using a logarithmic function, e.g., nAL = log 2 (AL). The RRC unit 62 obtains an ePDCCH set number and generates a configuration parameter nID. The two parameters nAL and nID are combined in a combination unit 64, resulting in a parameter nIDAL. In some embodiments, the parameter ndinal is unique for each combination of nAL and nID.
Time slot number n s Is fed to the initialization value calculation unit 66 together with the ndinal parameter, thereby generating the crinit.In some embodiments, cell 66 uses the formula cINIT = floor (n) s /2)*2 9 + nIDAL. The crinit is fed to a scrambling sequence generator 68 and the result c is combined with the message bits (b) in the scrambling function 70. Scrambled bit sequence b SCR Is the final output of the scrambling initialization function 50. In some embodiments, formula b SCR = (b + c) mod 2 is performed by the scrambling function 70 to produce the final result.
In some embodiments, scrambling initialization function 50 replaces scrambling unit 40 in fig. 6A or scrambling unit 80 in fig. 6B. Thus, the CRC ambiguity avoidance method 100 ensures that multiple ePDCCH candidates with the same preamble eCCE but with different ALs do not pass the CRC. In some embodiments, by using the scrambling initialization function 50, only true ePDCCH candidates will pass the CRC test. In some embodiments, the scrambling initialization function 50 is part of the external control channel receiver (OCRX) of both the base station and the UE.
Hash function 150
Recall that hash functions are specified for PDSCH and ePDCCH to organize the order and distribution of e/PDCCH candidates for different aggregation levels within the search space. Returning to fig. 11, the crc ambiguity avoidance method 100 can also use a hash function 150 to avoid misjudging ePDCCH candidates. The hash function 150 is described in more detail below.
In some embodiments, the hash function 150 operates with an AL of size 2 or greater. Using equation (3) or equation (4) below, the hash function 150 is designed to associate the eCCE index of the ePDCCH with the aggregation level of the ePDCCH, such that for each AL there will be a unique eCCE index. Note that both equations include AL as a parameter.
Figure BDA0001888045170000121
Where l is the eCCE index obtained in the search space and ranges from 0 to N ECCE,p,k -1。Y p,k Is an index offset that is static for the subframe and depends on the ePDCCH set p (e.g., if more than oneEach E/PDCCH is configured for transmission), which is a Radio Network Temporary Identifier (RNTI) and a slot number n s As a function of (c). The parameter k is defined as
Figure BDA0001888045170000131
And corresponds to the subframe number. Parameter b is a carrier frequency indicator, e.g., if in case of carrier aggregation, E/PDCCH on one component carrier conveys DCI for the remaining component carriers associated with the transmission. The parameter m specifies the ePDCCH candidate index of the actual aggregation level. N is a radical of ECCE,p,k Is the actual ePDCCH set p and the total number of E/CCEs available for subframe k. Finally, i is the relative index of the E/CCE associated with the actual ePDCCH candidate (e.g., limited by the aggregation level).
In some embodiments, equations (3) and (4) constitute a search space for blind decoding at the UE receiver. In some embodiments, equations (3) and (4) prevent the same E/CCE content from being captured by multiple ePDCCH candidates with different aggregation levels.
Although equations (3) and (4) specify parameters for ePDCCH, the hash function 150 may be similarly applied to PDCCH in cases where misjudging PDCCH is to be avoided.
Fig. 13 and 14 are two examples of how the hash function 150 of the CRC ambiguity avoidance method 100 solves the problem of misjudging ePDCCH.
FIG. 13 is an example using equation (3), where Y p,k = b =0 and N ECCE,p,k =16. In fig. 13, the AL2 candidate start index is shifted from E/CCE index 0 to 1, the al4 candidate start index is shifted from E/CCE index 0 to 2, the al8 candidate index is shifted from E/CCE index 0 to 4, and the AL16 candidate index is shifted from E/CCE index 0 to 8. The grey vertical shading indicates that only one AL candidate occupies each eCCE starting index. The eCCE start index 1 is only the start eCCE of the AL2 candidate; the eCCE start index 2 is only the start eCCE for the AL candidate AL4, and so on.
FIG. 14 is an example using equation (4), where Y p,k =0 and N ECCE,p,k =16. In FIG. 14, the AL2 candidate start index is not shifted from the E/CCE index 0, and the AL4 candidate start index is shifted from the E/CCE index 0 to 1,AL8The candidate indices are shifted from E/CCE index 0 to 3, and the AL16 candidate indices are shifted from E/CCE index 0 to 7. Likewise, the gray vertical shading indicates that only one AL candidate occupies each starting index.
In some embodiments, the hash function 150 is part of an external control channel receiver (OCRX) of both the base station and the UE.
Operating environment
As used herein, the term "circuitry" may refer to, be part of, or include the following: ASICs, electronic circuits, processors (shared, dedicated, or group) and/or memory (shared, dedicated, or group) executing one or more software or firmware programs, combinational logic circuits, and/or other suitable hardware components that provide the described functionality. In some embodiments, the circuitry may be implemented in, or functions associated with, one or more software or firmware modules. In some embodiments, the circuitry may comprise logic operable, at least in part, in hardware.
Embodiments of CRC ambiguity avoidance method 100 described herein may be implemented into a system using any suitably configured hardware and/or software. Fig. 15 shows, for one embodiment, example components of an enhanced NodeB (eNB) base station apparatus 800. Combinations of the illustrated components of eNB 800 may also be found in a UE. In some embodiments, the eNB apparatus 800 may include application circuitry 802, baseband circuitry 804, radio Frequency (RF) circuitry 806, front End Module (FEM) circuitry 808, and one or more antennas 810 coupled together at least as shown.
The application circuitry 802 may include one or more application processors. For example, the application circuitry 802 may include circuitry such as (but not limited to) one or more single-core or multi-core processors. The processor(s) may include any combination of general-purpose processors and special-purpose processors (e.g., graphics processors, application processors, etc.). The processor may be coupled to and/or may include storage medium 812 or other types of memory/storage, and may be configured to execute instructions stored in the memory/storage to enable various applications and/or operating systems to run on the system.
The baseband circuitry 804 may include circuitry such as, but not limited to, one or more single-core or multi-core processors. Baseband circuitry 804 may include one or more baseband processors and/or control logic to process baseband signals received from the receive signal path of RF circuitry 806 and to generate baseband signals for the transmit signal path of RF circuitry 806. Baseband processing circuitry 804 may interface with application circuitry 802 for generating and processing baseband signals, and for controlling the operation of RF circuitry 806. For example, in some embodiments, the baseband circuitry 804 may include a second generation (2G) baseband processor 804A, a third generation (3G) baseband processor 804B, a fourth generation (4G) baseband processor 804C, and/or other baseband processor(s) 804D for other existing generations, generations under development or to be developed in the future (e.g., fifth generation (5G), 6G, etc.).
The baseband circuitry 804 (e.g., one or more of the baseband processors 804A-D) may handle various radio control functions that enable communication with one or more radio networks via the RF circuitry 806. In some embodiments, the scrambling initialization function 50 is part of an external control channel receiver (OCRX) located in the baseband processor(s) 804D. The radio control functions may include, but are not limited to, signal modulation/demodulation, encoding/decoding, radio frequency shifting, and the like. In some embodiments, the modulation/demodulation circuitry of baseband circuitry 804 may include Fast Fourier Transform (FFT), precoding, and/or constellation mapping/demapping functionality. In some embodiments, the encoding/decoding circuitry of baseband circuitry 804 may include convolution, tail-biting convolution, turbo, viterbi, and/or Low Density Parity Check (LDPC) encoder/decoder functionality. Embodiments of modulation/demodulation and encoder/decoder functions are not limited to these examples, and other suitable functions may be included in other embodiments.
In some embodiments, the baseband circuitry 804 may include elements of a protocol stack, such as elements of the EUTRAN protocol, including, for example, physical (PHY), medium Access Control (MAC), radio Link Control (RLC), packet Data Convergence Protocol (PDCP), and/or Radio Resource Control (RRC) elements. A Central Processing Unit (CPU) 804E of the baseband circuitry 804 may be configured to run elements of a protocol stack for signaling of the PHY, MAC, RLC, PDCP, and/or RRC layers. In some embodiments, the baseband circuitry may include one or more audio Digital Signal Processors (DSPs) 804F. The audio DSP(s) 804F may include elements for compression/decompression and echo cancellation, and may include other suitable processing elements in other embodiments. In some embodiments, the components of the baseband circuitry may be combined as appropriate in a single chip, a single chipset, or disposed on the same circuit board. In some embodiments, some or all of the constituent components of the baseband circuitry 804 and the application circuitry 802 may be implemented together, for example, on a system on a chip (SOC).
In some embodiments, the baseband circuitry 804 may provide communications compatible with one or more radio technologies. For example, in some embodiments, baseband circuitry 804 may support communication with EUTRAN and/or other Wireless Metropolitan Area Networks (WMANs), wireless Local Area Networks (WLANs), or Wireless Personal Area Networks (WPANs). Embodiments in which the baseband circuitry 804 is configured to support radio communications of more than one wireless protocol may be referred to as multi-mode baseband circuitry.
The RF circuitry 806 may use modulated electromagnetic radiation through a non-solid medium to enable communication with a wireless network. In various embodiments, the RF circuitry 806 may include switches, filters, amplifiers, and the like to facilitate communication with the wireless network. RF circuitry 806 may include a receive signal path, which may include circuitry to down-convert RF signals received from FEM circuitry 808 and provide baseband signals to baseband circuitry 804. RF circuitry 806 may also include a transmit signal path that may include circuitry to up-convert baseband signals provided by baseband circuitry 804 and provide RF output signals to FEM circuitry 808 for transmission.
In some embodiments, RF circuitry 806 may include a receive signal path and a transmit signal path. The receive signal path of the RF circuitry 806 may include a mixer circuit 806A, an amplifier circuit 806B, and a filter circuit 806C. The transmit signal path of the RF circuitry 806 may include a filter circuit 806C and a mixer circuit 806A. RF circuitry 806 may also include synthesizer circuitry 806D to synthesize the frequencies used by mixer circuitry 806A of the receive signal path and the transmit signal path. In some embodiments, mixer circuitry 806A of the receive signal path may be configured to down-convert RF signals received from FEM circuitry 808 based on a synthesis frequency provided by synthesizer circuitry 806D. The amplifier circuit 806B may be configured to amplify the downconverted signal, and the filter circuit 806C may be a Low Pass Filter (LPF) or a Band Pass Filter (BPF) configured to remove unwanted signals from the downconverted signal to generate an output baseband signal. The output baseband signal may be provided to baseband circuitry 804 for further processing. In some embodiments, the output baseband signal may be a zero frequency baseband signal, but this is not required. In some embodiments, mixer circuit 806A of the receive signal path may comprise a passive mixer, although the scope of the embodiments is not limited in this respect.
In some embodiments, mixer circuitry 806A of the transmit signal path may be configured to upconvert the input baseband signal based on a synthesis frequency provided by synthesizer circuitry 806D to generate an RF output signal for FEM circuitry 808. The baseband signal may be provided by baseband circuitry 804 and may be filtered by filter circuitry 806C. Filter circuit 806C may include a Low Pass Filter (LPF), although the scope of the embodiments is not limited in this respect.
In some embodiments, mixer circuitry 806A of the receive signal path and mixer circuitry 806A of the transmit signal path may comprise two or more mixers and may be arranged for quadrature down-conversion and/or up-conversion, respectively. In some embodiments, mixer circuit 806A of the receive signal path and mixer circuit 806A of the transmit signal path may include two or more mixers and may be arranged for image rejection (e.g., hartley image rejection). In some embodiments, the mixer circuitry 806A of the receive signal path and the mixer circuitry 806A of the transmit signal path may be arranged for direct down-conversion and/or direct up-conversion, respectively. In some embodiments, mixer circuit 806A of the receive signal path and the mixer circuit of the transmit signal path may be configured for superheterodyne operation.
In some embodiments, the output baseband signal and the input baseband signal may be analog baseband signals, although the scope of the embodiments is not limited in this respect. In some alternative embodiments, the output baseband signal and the input baseband signal may be digital baseband signals. In these alternative embodiments, the RF circuitry 806 may include analog-to-digital converter (ADC) and digital-to-analog converter (DAC) circuitry, and the baseband circuitry 804 may include a digital baseband interface to communicate with the RF circuitry 806.
In some dual-mode embodiments, separate radio IC circuits may be provided for processing signals for each spectrum, although the scope of the embodiments is not limited in this respect.
In some embodiments, synthesizer circuit 806D may be a fractional-N synthesizer or a fractional-N/N +1 synthesizer, although the scope of the embodiments is not limited in this respect as other types of frequency synthesizers may be suitable. For example, synthesizer circuit 806D may be a delta-sigma (delta-sigma) synthesizer, a frequency multiplier, or a synthesizer including a phase locked loop with a frequency divider.
The synthesizer circuit 806D may be configured to synthesize an output frequency based on the frequency input and the divider control input for use by the mixer circuit 806A of the RF circuit 806. In some embodiments, synthesizer circuit 806D may be a fractional N/N +1 synthesizer.
In some embodiments, the frequency input may be provided by a Voltage Controlled Oscillator (VCO), but this is not required. The divider control input may be provided by the baseband circuitry 804 or the application processor 802, depending on the desired output frequency. In some embodiments, the divider control input (e.g., N) may be determined from a look-up table based on the channel indicated by the application processor 802.
Synthesizer circuit 806D of RF circuit 806 may include a frequency divider, a Delay Locked Loop (DLL), a multiplexer, and a phase accumulator. In some embodimentsThe divider may be a dual-mode divider (DMD) and the phase accumulator may be a Digital Phase Accumulator (DPA). In some embodiments, the DMD may be configured to divide the input signal by N or N +1 (e.g., based on a carry bit) to provide a fractional division ratio. In some example embodiments, a DLL may include a set of cascaded adjustable delay elements, a phase detector, a charge pump, and a D-type flip-flop. In these embodiments, the delay element may be configured to decompose the VCO period into N d An equal phase grouping, wherein N d Is the number of delay elements in the delay line. Thus, the DLL provides negative feedback to help ensure that the total delay through the delay line is one VCO cycle.
In some embodiments, synthesizer circuit 806D may be configured to generate a carrier frequency as the output frequency, while in other embodiments the output frequency may be a multiple of the carrier frequency (e.g., twice the carrier frequency, four times the carrier frequency) and used in conjunction with a quadrature generator and divider circuit to generate multiple signals having multiple phases at the carrier frequency that are different from one another. In some embodiments, the output frequency may be the LO frequency (f) LO ). In some embodiments, the RF circuitry 806 may include an IQ/polarity converter.
FEM circuitry 808 may include a receive signal path that may include circuitry configured to: operates on RF signals received from one or more antennas 810, amplifies the received signals, and provides an amplified version of the received signals to RF circuitry 806 for further processing. FEM circuitry 808 may also include a transmit signal path, which may include circuitry configured to: signals provided for transmission by RF circuitry 806 are amplified for transmission by one or more of one or more antennas 810.
In some embodiments, FEM circuitry 808 may include TX/RX switches to switch between transmit mode and receive mode operation. The FEM circuitry may include a receive signal path and a transmit signal path. The receive signal path of the FEM circuitry may include a Low Noise Amplifier (LNA) to amplify the received RF signal and provide the amplified received RF signal as an output (e.g., to RF circuitry 806). The transmit signal path of FEM circuitry 808 may include a Power Amplifier (PA) to amplify an input RF signal (e.g., provided by RF circuitry 806), and one or more filters to generate an RF signal for subsequent transmission (e.g., by one or more of the one or more antennas 810).
In some embodiments, the eNB apparatus 800 may include additional elements, such as memory/storage, a display, a camera, a sensor, and/or an input/output (I/O) interface.
Various techniques, or certain aspects or portions thereof, may take the form of program code (i.e., instructions) embodied in tangible media, such as floppy diskettes, CD-ROMs, hard drives, non-transitory computer-readable storage medium, or any other machine-readable storage medium, wherein, when the program code is loaded into and executed by a machine, such as a computer, the machine becomes an apparatus for practicing the various techniques. The non-transitory computer readable storage medium may be a computer readable storage medium that does not include a signal. In the case of program code execution on programmable computers, the computing device may include a processor, a storage medium readable by the processor (including volatile and non-volatile memory and/or storage elements), at least one input device, and at least one output device. The volatile and non-volatile memory and/or storage elements can be RAM, EPROM, flash drives, optical drives, magnetic hard drives, solid state drives, or other media for storing electronic data. The nodes and wireless devices may also include transceiver modules, computer modules, processing modules, and/or clock modules or timer modules. One or more programs that may implement or utilize the various techniques described herein may use an Application Programming Interface (API), reusable controls, and the like. These programs may be implemented in a high level procedural or object oriented programming language to communicate with a computer system. However, the programs may be implemented in assembly or machine language, if desired. In any case, the language may be a compiled or interpreted language, and combined with hardware implementations.
It should be appreciated that many of the functional units described in this specification have been labeled as modules, in order to more particularly emphasize their implementation independence. For example, a module may be implemented as a hardware circuit comprising custom VLSI circuits or gate arrays, off-the-shelf semiconductors such as logic chips, transistors, or other discrete components. A module may also be implemented in programmable hardware devices such as field programmable gate arrays, programmable array logic, programmable logic devices or the like.
Modules may also be implemented in software for execution by various types of processors. An identified module of executable code may, for instance, comprise one or more physical or logical blocks of computer instructions which may, for instance, be organized as an object, procedure, or function. Nevertheless, the executables of an identified module may not be physically located together, but may comprise disparate instructions stored in different locations which, when joined logically together, comprise the module and achieve the stated purpose for the module.
Indeed, a module of executable code may be a single instruction, or many instructions, and may even be distributed over several different code segments, among different programs, and across several memory devices. Similarly, operational data may be identified and illustrated herein within modules, and may be embodied in any suitable form and organized within any suitable type of data structure. The operational data may be collected as a single data set, or may be distributed over different locations including over different storage devices, and may exist, at least partially, merely as electronic signals on a system or network. A module may be passive or active, including an agent operable to perform a desired function.
Reference throughout this specification to "an example" means that a particular feature, structure, or characteristic described in connection with the example is included in at least one embodiment. Thus, the appearances of the phrases "in one example" or "in some embodiments" in various places throughout this specification are not necessarily all referring to the same embodiment.
As used herein, a plurality of items, structural elements, compositional elements, and/or materials may be presented in a common list for convenience. However, these lists should be construed as though each member of the list is individually identified as a separate and unique member. Thus, no individual member of such list should be construed as a de facto equivalent of any other member of the same list solely based on their presentation in a common group with such other member in the absence of an indication to the contrary. In addition, various embodiments and examples may be referred to herein, as well as alternatives to the various components thereof. It should be understood that these embodiments, examples, and alternatives are not to be construed as actual equivalents of each other, but are to be considered as separate and autonomous representations. Furthermore, the described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.
In general, a CRC ambiguity avoidance method may be implemented in an apparatus of an enhanced node B (eNB), the apparatus of the eNB comprising: radio frequency circuitry coupled to one or more antennas that transmit signals over a cellular network; one or more processors to execute instructions that, when executed by the one or more processors, cause the eNB to: associating an aggregation level of an enhanced physical downlink control channel (ePDCCH) with an index of a Control Channel Element (CCE), the aggregation level indicating a number of CCEs making up the ePDCCH, the CCEs being addressed by using the index, wherein the index is unique to the ePDCCH.
In a second example, in addition to the first example or any other example discussed herein, the apparatus of the eNB further generates the index using a hash function that includes an aggregation level of the ePDCCH.
In a third example, in addition to the first or second example or any other example discussed herein, the apparatus of the eNB further generates the index using a function:
Figure BDA0001888045170000201
where AL is the polymerization degree, n s Is the slot number, l is the index and ranges from 0 to N ECCE,p,k -1,Y p,k Is an index offset, defined as k depending on the ePDCCH set p, k
Figure BDA0001888045170000211
And corresponding to the subframe number, b is a carrier frequency indicator, m specifies the ePDCCH candidate index of the actual aggregation level, N ECCE,p,k Is the total number of CCEs available for the actual ePDCCH set p and subframe k, and i is the relative index of CCEs associated with the ePDCCH candidate.
In a fourth example, in addition to the second example or any other example discussed herein, the apparatus of the eNB further generates the index using a function:
Figure BDA0001888045170000212
where AL is the polymerization degree, n s Is the slot number, l is the index and ranges from 0 to N ECCE,p,k -1,Y p,k Is an index offset, defined as k depending on the ePDCCH set p, k
Figure BDA0001888045170000213
And corresponding to the subframe number, b is a carrier frequency indicator, m specifies the ePDCCH candidate index of the actual aggregation level, N ECCE,p,k Is the total number of CCEs available for the actual ePDCCH set p and subframe k, and i is the relative index of CCEs associated with the ePDCCH candidate.
Further, the CRC ambiguity avoidance method may be implemented to scramble an enhanced control channel element (eCCE), the method comprising: encoding an aggregation level of one or more enhanced physical downlink control channels (ePDCCHs), the ePDCCHs including Downlink Control Information (DCI), the one or more ePDCCHs being decoded by one or more terminals occupying an air interface, the DCI being CRC attached, encoded, rate matched, resulting in the eCCEs; and scrambling the eCCE using the encoded aggregation level.
In a sixth example, in addition to the fifth example or any other example discussed herein, the method generates an initialization value to be received to a scrambling sequence generator, wherein the initialization value is based on the aggregation level of the ePDCCH.
In addition to the fifth or sixth examples, or any other example discussed herein, in a seventh example, the method uses a function to manipulate the aggregation level of the ePDCCH.
In an eighth example, in addition to the seventh example or any other example discussed herein, the function is a logarithmic function.
In addition to the sixth or seventh examples, or any other example discussed herein, in a ninth example, the method generates configuration parameters from the set of epdcchs, wherein the configuration parameters are combined with the steered aggregation levels to form new parameters.
In addition to the ninth example or any other example discussed herein, in a tenth example, the new parameters are unique to each combination of configuration parameters and manipulated aggregation levels.
In addition to the tenth example or any other example discussed herein, in an eleventh example, the method calculates the initialization value using the new parameters and a slot number of a downlink subframe including the one or more epdcchs.
In addition to the fifth example or any other example discussed herein, in a twelfth example, the method performs the encoding and scrambling operations in an external control channel receiver of the transmitter.
In addition to the twelfth example or any other example discussed herein, in a thirteenth example, the method performs the encoding and scrambling operations in a long term evolution capable transmitter.
Further, the CRC ambiguity avoidance method may encode Downlink Control Information (DCI) in a downlink subframe by: generating an enhanced control channel element (eCCE) index using a hash function comprising an aggregation level of an enhanced physical downlink control channel (ePDCCH), the ePDCCH comprising a plurality of eCCEs, a start of the plurality of eCCEs identified by the eCCE index, a number of eCCEs in the ePDCCH corresponding to the aggregation level of the ePDCCH, wherein the eCCE index is unique to the ePDCCH.
In a fifteenth example, in addition to the fourteenth example or any other example discussed herein, the method generates the eCCE index using a function that:
Figure BDA0001888045170000221
wherein AL is the polymerization grade, n s Is the slot number, l is the eCCE index and ranges from 0 to N ECCE,p,k -1,Y p,k Is an index offset, defined as k depending on the ePDCCH set p, k
Figure BDA0001888045170000222
And corresponding to the subframe number, b is a carrier frequency indicator, m specifies the ePDCCH candidate index of the actual aggregation level, N ECCE,p,k Is the total number of ecces available for the actual ePDCCH set p and subframe k, and i is the relative index of the ecces associated with the ePDCCH candidates.
In a sixteenth example, in addition to the fifteenth example or any other example discussed herein, the method generates the eCCE index using a function that:
Figure BDA0001888045170000223
where AL is the polymerization degree, n s Is the slot number, l is the eCCE index and ranges from 0 to N ECCE,p,k -1,Y p,k Is an index offset, defined as k depending on the ePDCCH set p, k
Figure BDA0001888045170000231
And corresponding to the subframe number, b is a carrier frequency indicator, m specifies the ePDCCH candidate index of the actual aggregation level, N ECCE,p,k Is the total number of ecces available for the actual ePDCCH set p and subframe k, and i is the relative index of the ecces associated with the ePDCCH candidates.
Further, the CRC ambiguity avoidance method can encode an aggregation level of a PDCCH of one or more Physical Downlink Control Channels (PDCCHs), the PDCCH including Downlink Control Information (DCI), the one or more PDCCHs decoded by one or more terminals occupying an air interface, the DCI being CRC-attached, encoded, rate-matched, and aggregated to produce the CCE; and scrambling the CCE with the encoded aggregation level.
In an eighteenth example, in addition to the seventeenth example or any other example discussed herein, the method generates an initialization value to be received to a scrambling sequence generator, wherein the initialization value is based on the aggregation level of the PDCCH.
In addition to the eighteenth example or any other example discussed herein, in a nineteenth example, the method uses a function to manipulate the aggregation level of the PDCCH.
Furthermore, the CRC ambiguity avoidance method may be implemented in an apparatus comprising means for performing any of the fifth through nineteenth examples described above.
Further, the CRC ambiguity avoidance method may be implemented in an article of manufacture comprising a computer-readable medium comprising instructions that, when executed by one or more processors of an electronic device, cause the electronic device to perform any of the fifth through nineteenth examples described above.
Further, the CRC ambiguity avoidance method may be implemented in a computer-readable medium comprising instructions that, when executed by one or more processors of an electronic device, cause the electronic device to: generating an enhanced control channel element (eCCE) index using a hash function comprising an aggregation level of an enhanced physical downlink control channel (ePDCCH), the ePDCCH comprising a plurality of eCCEs, a start of the plurality of eCCEs being identified by the eCCE index; wherein the hash function is one of:
Figure BDA0001888045170000232
or
Figure BDA0001888045170000241
Wherein AL is the polymerization degree, n s Is the slot number, l is the eCCE index and ranges from 0 to N ECCE,p,k -1,Y p,k Is an index offset, defined as k depending on the ePDCCH set p, k
Figure BDA0001888045170000242
And corresponding to the subframe number, b is a carrier frequency indicator, m specifies the ePDCCH candidate index of the actual aggregation level, N ECCE,p,k Is the total number of ecces available for the actual ePDCCH set p and subframe k, and i is the relative index of the ecces associated with the ePDCCH candidates.
In general, a CRC ambiguity avoidance method may be implemented in an apparatus of an enhanced node B (eNB), the apparatus of the eNB comprising: radio frequency circuitry coupled to one or more antennas that transmit signals over a cellular network; one or more processors to execute instructions that, when executed by the one or more processors, cause the eNB to: associating an aggregation level of an enhanced physical downlink control channel (ePDCCH) with an index of a Control Channel Element (CCE), the aggregation level indicating a number of CCEs making up the ePDCCH, the CCE being addressed by using the index, wherein the index is unique to the ePDCCH.
In a second example, in addition to the first example or any other example discussed herein, the apparatus of the eNB further generates the index using a hash function that includes an aggregation level of the ePDCCH.
In a third example, in addition to the first or second example or any other example discussed herein, the apparatus of the eNB further generates the index using a function:
Figure BDA0001888045170000243
where AL is the polymerization degree, n s Is the slot number, l is the index and ranges from 0 to N ECCE,p,k -1,Y p,k Is an index offset, defined as k depending on the ePDCCH set p, k
Figure BDA0001888045170000244
And corresponding to the subframe number, b is a carrier frequency indicator, m specifies the ePDCCH candidate index of the actual aggregation level, N ECCE,p,k Is the total number of CCEs available for the actual ePDCCH set p and subframe k, and i is the relative index of CCEs associated with the ePDCCH candidate.
In a fourth example, in addition to the second example or any other example discussed herein, the apparatus of the eNB further generates the index using a function:
Figure BDA0001888045170000251
where AL is the polymerization degree, n s Is the slot number, l is the index and ranges from 0 to N ECCE,p,k -1,Y p,k Is an index offset, defined as k depending on the ePDCCH set p, k
Figure BDA0001888045170000252
And corresponding to the subframe number, b is a carrier frequency indicator, m specifies the ePDCCH candidate index of the actual aggregation level, N ECCE,p,k Is the total number of CCEs available for the actual ePDCCH set p and subframe k, and i is the relative index of the CCEs associated with the ePDCCH candidates.
Further, in a fifth example, the CRC ambiguity avoidance method scrambles an enhanced control channel element (eCCE) by: encoding an aggregation level of one or more enhanced physical downlink control channels (ePDCCHs), the ePDCCHs including Downlink Control Information (DCI), the one or more ePDCCHs being decoded by one or more terminals occupying an air interface, the DCI being CRC attached, encoded, rate matched, resulting in the eCCEs; and scrambling the ecces using the encoded aggregation level.
In a sixth example, in addition to the fifth example or any other example discussed herein, the method further generates an initialization value to be received to a scrambling sequence generator, wherein the initialization value is based on the aggregation level of the ePDCCH.
In a seventh example, in addition to the fifth or sixth example, or any other example discussed herein, the method further uses a function to manipulate the aggregation level of the ePDCCH.
In an eighth example, in addition to the seventh example or any other example discussed herein, the function is a logarithmic function.
In a ninth example, in addition to the sixth or seventh example, or any other example discussed herein, the method further generates configuration parameters from the set of epdcchs, wherein the configuration parameters are combined with the steered aggregation levels to form new parameters.
In addition to the ninth example or any other example discussed herein, in a tenth example, the new parameters are unique to each combination of configuration parameters and manipulated aggregation levels.
In addition to the tenth example or any other example discussed herein, in an eleventh example, the method further calculates the initialization value using the new parameters and a slot number of a downlink subframe including the one or more epdcchs.
In addition to the fifth example or any other example discussed herein, in a twelfth example, the method performs the encoding and scrambling operations in an external control channel receiver of the transmitter.
In addition to the twelfth example or any other example discussed herein, in a thirteenth example, the method further performs the encoding and scrambling operations in a long term evolution capable transmitter.
Further, in a fourteenth example, the CRC ambiguity avoidance method encodes Downlink Control Information (DCI) in a downlink subframe by: generating an enhanced control channel element (eCCE) index using a hash function comprising an aggregation level of an enhanced physical downlink control channel (ePDCCH), the ePDCCH comprising a plurality of eCCEs, a start of the plurality of eCCEs identified by the eCCE index, a number of eCCEs in the ePDCCH corresponding to the aggregation level of the ePDCCH, wherein the eCCE index is unique to the ePDCCH.
In a fifteenth example, in addition to the fourteenth example or any other example discussed herein, the method generates the eCCE index using a function that:
Figure BDA0001888045170000261
where AL is the polymerization degree, n s Is the slot number, l is the eCCE index and ranges from 0 to N ECCE,p,k -1,Y p,k Is an index offset, defined as k depending on the ePDCCH set p, k
Figure BDA0001888045170000262
And corresponding to the subframe number, b is a carrier frequency indicator, m specifies the ePDCCH candidate index of the actual aggregation level, N ECCE,p,k Is the total number of ecces available for the actual ePDCCH set p and subframe k, and i is the relative index of the ecces associated with the ePDCCH candidates.
In a sixteenth example, in addition to the fourteenth example or any other example discussed herein, the method generates the eCCE index using the following function:
Figure BDA0001888045170000263
wherein AL is the polymerization grade, n s Is the slot number, l is the eCCE index and ranges from 0 to N ECCE,p,k -1,Y p,k Is an index offset, defined as k depending on the ePDCCH set p, k
Figure BDA0001888045170000264
And corresponding to the subframe number, b is a carrier frequency indicator, m specifies the ePDCCH candidate index of the actual aggregation level, N ECCE,p,k Is the total number of ecces available for the actual ePDCCH set p and subframe k, and i is the relative index of the ecces associated with the ePDCCH candidates.
Further, in a seventeenth example, the CRC ambiguity avoidance method scrambles Control Channel Elements (CCEs) by: encoding an aggregation level of a Physical Downlink Control Channel (PDCCH) of one or more PDCCHs that include Downlink Control Information (DCI) decoded by one or more terminals occupying an air interface, the DCI being CRC-attached, encoded, rate-matched, and aggregated, yielding the CCE; and scrambling the CCE with the encoded aggregation level.
In an eighteenth example, in addition to the seventeenth example or any other example discussed herein, the method generates an initialization value to be received to a scrambling sequence generator, wherein the initialization value is based on the aggregation level of the PDCCH.
In addition to the eighteenth example or any other example discussed herein, in a nineteenth example, the method uses a function to manipulate the aggregation level of the PDCCH.
Further, in a twentieth example, the CRC ambiguity avoidance method operates in an apparatus comprising means for performing any of the fifth through nineteenth examples.
Further, in a twenty-first example, the CRC ambiguity avoidance method is operated in an article comprising a computer-readable medium comprising instructions that, when executed by one or more processors of an electronic device, cause the electronic device to perform any of the fifth through nineteenth examples.
Further, in a twenty-second example, the CRC ambiguity avoidance method operates in a computer-readable medium comprising instructions that, when executed by one or more processors of an electronic device, cause the electronic device to: generating an enhanced control channel element (eCCE) index using a hash function comprising an aggregation level of an enhanced physical downlink control channel (ePDCCH), the ePDCCH comprising a plurality of eCCEs, a start of the plurality of eCCEs being identified by the eCCE index; wherein the hash function is one of:
Figure BDA0001888045170000271
or
Figure BDA0001888045170000272
Wherein AL is the polymerization degree, n s Is the slot number, l is the eCCE index and ranges from 0 to N ECCE,p,k -1,Y p,k Is an index offset, defined as k depending on the ePDCCH set p, k
Figure BDA0001888045170000273
And corresponding to the subframe number, b is a carrier frequency indicator, m specifies the ePDCCH candidate index of the actual aggregation level, N ECCE,p,k Is the total number of ecces available for the actual ePDCCH set p and subframe k, and i is the relative index of the ecces associated with the ePDCCH candidates.
While the foregoing examples are illustrative of the principles in one or more particular applications, it will be apparent to those of ordinary skill in the art that various modifications in form, usage and details of implementation can be made without the exercise of inventive faculty, and that numerous modifications and variations will be apparent therefrom without departing from the principles and concepts herein. It is intended that the appended claims cover all such modifications and variations as fall within the true spirit and scope of the disclosed embodiments.

Claims (4)

1. An apparatus of a base station, comprising:
one or more processors configured to cause the base station to:
generating an index of a control channel element, CCE, using a hash function comprising an aggregation level of an enhanced physical downlink control channel, ePDCCH, the aggregation level indicating a number of CCEs constituting the ePDCCH, the CCEs being addressed using the index;
wherein the hash function comprises one of the following functions:
Figure FDF0000018656210000011
wherein AL is the polymerization grade, n s Is the slot number, l is the index and ranges from 0 to N ECCE,p,k -1,Y p,k Is an index offset, defined as k depending on the ePDCCH set p, k
Figure FDF0000018656210000012
And corresponding to the subframe number, b is a carrier frequency indicator, m specifies the ePDCCH candidate index of the actual aggregation level, N ECCE,p,k Is the total number of CCEs available for the actual ePDCCH set p and subframe k, and i is the relative index of CCEs associated with the ePDCCH candidate; and is provided with
Wherein the index is unique to the ePDCCH.
2. A method of encoding downlink control information, DCI, in a downlink subframe, the method comprising:
generating an enhanced control channel element, eCCE, index using a hash function comprising an aggregation level of an enhanced physical downlink control channel, ePDCCH, the ePDCCH comprising a plurality of eCCEs, a start of the plurality of eCCEs identified by the eCCE index, a number of eCCEs in the ePDCCH corresponding to the aggregation level of the ePDCCH;
wherein the hash function comprises one of the following functions:
Figure FDF0000018656210000013
where AL is the polymerization degree, n s Is the slot number, l is the eCCE index and ranges from 0 to N ECCE,p,k -1,Y p,k Is an index offset, defined as k depending on the ePDCCH set p, k
Figure FDF0000018656210000014
And corresponding to the subframe number, b is a carrier frequency indicator, m specifies the ePDCCH candidate index of the actual aggregation level, N ECCE,p,k Is the total number of ecces available for the actual ePDCCH set p and subframe k, and i is the relative index of the ecces associated with the ePDCCH candidates; and is
Wherein the eCCE index is unique to the ePDCCH.
3. An electronic device comprising means for performing the method of claim 2.
4. A computer-readable medium comprising instructions that, when executed by one or more processors of an electronic device, cause the electronic device to perform the method of claim 2.
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