WO2017220020A1 - 存储资源分配方法和装置 - Google Patents

存储资源分配方法和装置 Download PDF

Info

Publication number
WO2017220020A1
WO2017220020A1 PCT/CN2017/089761 CN2017089761W WO2017220020A1 WO 2017220020 A1 WO2017220020 A1 WO 2017220020A1 CN 2017089761 W CN2017089761 W CN 2017089761W WO 2017220020 A1 WO2017220020 A1 WO 2017220020A1
Authority
WO
WIPO (PCT)
Prior art keywords
storage unit
port
last
shared
level
Prior art date
Application number
PCT/CN2017/089761
Other languages
English (en)
French (fr)
Inventor
王寅
Original Assignee
中兴通讯股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 中兴通讯股份有限公司 filed Critical 中兴通讯股份有限公司
Publication of WO2017220020A1 publication Critical patent/WO2017220020A1/zh

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806Multiuser, multiprocessor or multiprocessing cache systems

Definitions

  • the present disclosure relates to storage resource allocation techniques, for example, to a storage resource allocation method and apparatus.
  • a method for buffering data packets transmitted in a port of a Field-Programmable Gate Array (FPGA) chip includes the following two methods: one is to allocate a fixed-size storage to a port.
  • the resource caches the data packet, and the allocated storage resource enables the port to not overflow when encountering a data packet burst; the other is to centrally manage the entire storage resource and the port by using a queue scheduling method, thereby The data packet is cached.
  • This method ensures that the port provides the storage resources required by the port when the data packet is cached.
  • the entire storage resource and each port need to maintain their own complex scheduling lists.
  • RTL Register Transfer Level
  • the present disclosure provides a storage resource allocation method and apparatus, which can meet the port requirements for storage resources and improve storage resource utilization.
  • the present disclosure provides a storage resource allocation method, the method comprising:
  • the unused shared storage unit is cascaded behind the last-level storage unit of the port.
  • the method before the cascading the unused shared storage unit behind the last-level storage unit of the port, the method further includes:
  • the method further includes:
  • the method further includes:
  • the method further includes:
  • the storage resource includes a fixed storage unit fixedly allocated to each port and a shared storage unit shared by multiple ports.
  • the port is a port in an FPGA
  • the unused shared memory unit is a shared memory unit that is not used in the FPGA.
  • the embodiment further provides a storage resource allocation device, where the device includes: a detection module and a processing module; wherein
  • the detecting module is configured to detect whether a storage unit of the port is about to overflow
  • the processing module is configured to, when the detecting module detects that a storage unit of the port is about to overflow, concatenate unused shared storage units behind a last-level storage unit of the port.
  • the detecting module is further configured to detect whether there is an unused shared storage unit before cascading the unused shared storage unit behind the last-level storage unit of the port;
  • the processing module is further configured to detect, when the shared memory unit that is not to be used is cascaded behind the last-level storage unit of the port, when the detecting module detects that there is an unused shared storage unit The unused shared storage unit is allocated to the port.
  • the detecting module is further configured to detect whether a last-level storage unit of the port is idle and is a shared storage unit;
  • the processing module is further configured to release the last-level storage unit of the port when the detecting module detects that the last-level storage unit of the port is idle and is a shared storage unit.
  • the processing module is further configured to: when the detecting module detects that there is no shared storage that is not used When storing a unit, releasing a last-level storage unit of a port having a lower priority than the port; the last-level storage unit of the port having a lower priority than the port is a shared storage unit;
  • the detecting module is further configured to detect whether the last-level storage unit of the port is idle and is a shared storage unit, and after detecting that the last-level storage unit of the port is idle and is a shared storage unit, detecting the port Whether the penultimate storage unit is about to overflow;
  • the processing module is further configured to release the last-level storage unit of the port when the detecting module detects that the penultimate-level storage unit of the port does not overflow.
  • the storage resource includes a fixed storage unit fixedly allocated to each port and a shared storage unit shared by multiple ports.
  • the storage resource allocation method and apparatus detects whether a storage unit of a port is about to overflow, and concatenates unused shared storage units in a last-level storage unit of the port in a case where the storage unit is about to overflow. After the storage resources of the port are insufficient, the storage resources are allocated to the port in time to meet the requirements of the port for the storage resource, so that the port can process the data packet normally.
  • the embodiment further provides a computer readable storage medium storing computer executable instructions for performing the above method.
  • the embodiment also provides an electronic device including one or more processors, a memory, and one or more programs, the one or more programs being stored in the memory when executed by one or more processors When performing the above method.
  • the embodiment further provides a computer program product comprising a computer program stored on a non-transitory computer readable storage medium, the computer program comprising program instructions, when the program instructions are executed by a computer Having the computer perform any of the methods described above.
  • FIG. 1 is a schematic flowchart of an implementation process of a storage resource sharing method according to Embodiment 1;
  • FIG. 2 is a schematic flowchart of an implementation process of a storage resource sharing method according to Embodiment 2;
  • FIG. 3 is a schematic structural diagram of a storage resource sharing apparatus according to Embodiment 3;
  • FIG. 4 is a schematic diagram showing the hardware structure of an electronic device according to Embodiment 4.
  • each FPGA chip has found that the storage resources and RTL resources contained in each FPGA chip are fixed. If a fixed-size storage resource is allocated to each port, the storage resource size required for each port is inconsistent, which reduces the utilization of storage resources and expands the required storage resources. Once the required storage resources exceed the maximum value of the inherent storage resources of the FPGA chip, an FPGA chip with more storage resources will be required to meet the requirements. If the queue scheduling method is used to schedule storage resources, since the size of the RTL resources included in the FPGA chip is fixed, the required RTL resources are expanded, and the required RTL resources exceed the inherent RTL of the FPGA chip of the model. The maximum value of the resource will also require an FPGA chip with larger RTL resources to meet the requirements.
  • FIG. 1 is a schematic diagram of an implementation process of a storage resource sharing method according to Embodiment 1, as shown in FIG. 1 , including steps 110 and 120 .
  • step 110 it is detected whether the storage unit of the port is about to overflow
  • the storage resources included in the FPGA chip may be composed of a plurality of block RAMs (BRAMs), and a BRAM is usually 18 KB or 36 KB in size.
  • BRAMs block RAMs
  • the storage resources inside the FPGA chip are divided into a certain number of storage units, each storage unit contains a certain amount of BRAM; some storage units in all storage units are allocated to each port inside the FPGA chip, and The storage units allocated to the same port are respectively cascaded, and the remaining storage units are used for subsequent dynamic allocation.
  • each storage unit represents a storage resource, and each storage unit is composed of at least one BRAM; each storage unit may have the same number of BRAMs, or may be different, that is, the size of each storage unit may be The same or different; the number of storage units of each port may be the same or different, that is, the storage resources obtained by each port may be the same or different; the port may be multiple specific physical ports. , may also be a plurality of different sub-ports, or multiple queues in a certain port; in order to distinguish the storage unit allocated to the port from the remaining storage units, the storage unit allocated to the port is a fixed storage unit, Identify the remaining storage units as Shared storage unit.
  • the storage resource includes a fixed storage unit fixedly allocated to each port and a shared storage unit shared by a plurality of ports.
  • the limited storage resources are utilized reasonably, and all storage resources are not required to be uniformly scheduled, and the RTL resources are reduced. Demand.
  • the working state of the port is detected by the FPGA chip. If it is detected that the storage unit of the port is to be overflowed, the shared storage unit needs to be allocated to the port, so that the port can satisfy the buffer processing of the data packet. If necessary, step 120 is performed; if it is detected that the storage unit of the port does not overflow, step 110 is continued.
  • Whether the storage unit of the above detection port is about to overflow may be detecting whether the last-level storage unit of the port is about to overflow, detecting whether the penultimate storage unit of the port is about to overflow, or detecting the last-level storage unit of the port and the countdown Whether the storage unit other than the secondary storage unit is about to overflow or the like.
  • the last-level storage unit of the port may be a fixed storage unit or a shared storage unit. When a fixed storage unit of the port is not cascaded with a shared storage unit, the last-level storage unit of the port is a fixed storage unit. When the fixed storage unit of the port is cascaded with a shared storage unit, the last-level storage unit of the port is a shared storage unit.
  • step 120 if the storage unit is about to overflow, the unused shared storage unit is cascaded behind the last level of storage of the port.
  • the unused shared storage unit is cascaded behind the last-level storage unit of the port to satisfy The port needs to cache data packets.
  • the unused shared storage unit may mean that the shared storage unit is not currently allocated for use by any port; according to the need of the storage resource for the port, at least one unused shared storage unit may be cascaded at The rear of the last-level storage unit of the port; after cascading unused shared storage units behind the last-level storage unit of the port, the last-level storage unit of the port is shared storage unit.
  • the method before cascading the unused shared storage unit behind the last-level storage unit of the port, the method further comprises: detecting whether there is an unused shared storage unit, in the presence of not being In the case of a shared memory unit used, the unused shared memory unit is assigned to the port.
  • the unit in the case where there is a shared memory unit that is not in use, allocates the unused shared memory unit to the port.
  • any at least one unused shared memory cell may be allocated to the port; the last-level memory cells of all ports included in the FPGA chip are not In the case where an overflow occurs, it is not necessary to detect whether there is an unused shared memory unit when it is detected that the last-level memory cell of a certain port is about to overflow.
  • the last-level storage unit of the port lower than the priority of the port may be released according to the priority of each port set, and the last level is A storage unit is allocated to the port; and the last level storage unit is a shared storage unit.
  • the priority is set for the port to solve the problem that the port is in the event of a data packet burst, and the free shared storage unit is allocated.
  • the priority is to ensure that some ports obtain the shared storage unit; when there are multiple ports, the priority is
  • the priority of the port is lower, and the last-level storage unit of the plurality of ports is a shared storage unit, the last-level storage unit of the port with the lowest priority among the plurality of ports may be released. It is also possible to release the last-level storage unit of any one of the plurality of ports.
  • the method further includes: detecting whether the last-level storage unit of the port is idle and is a shared storage unit, and releasing the port if the last-level storage unit is idle and is a shared storage unit The last level of storage unit.
  • the last-level storage unit of the port When it is detected that the last-level storage unit of the port is idle, and the last-level storage unit of the port is a shared storage unit, the last-level storage unit of the port is released; if the last-level storage unit of the port is detected is not If it is idle, the last-level storage unit of the port is not released.
  • the storage unit is idle, that is, the storage unit does not currently cache the data packet, or the data packet is not cached; when the last-level storage unit of the port is idle, the port is idle and redundant.
  • the last-level storage unit of the port may be released, causing the state of the last-level storage unit to be changed to an unused shared storage unit.
  • the method further includes: detecting whether the last-level storage unit of the port is idle and is a shared storage unit, and detecting that the last-level storage unit of the port is idle and is a shared storage unit, detecting the location Whether the last-stage storage unit of the port is about to overflow, and in the case that the penultimate-level storage unit is not about to overflow, releasing the last-level storage unit of the port, where the penultimate-level storage unit is to be In case of overflow, no operation is performed.
  • the last-level storage unit of the port When it is detected that the last-level storage unit of the port is idle, and the penultimate-level storage unit is about to When overflowing, the last-level storage unit of the port is not released; if it is detected that the last-level storage unit of the port is idle and the penultimate-level storage unit does not overflow, releasing the last-level storage of the port unit.
  • the port is a port in an FPGA
  • the unused shared memory unit is a shared memory unit that is not used in the FPGA.
  • the penultimate level storage unit of the port is a fixed storage unit or a shared storage unit, and the last stage storage unit of the port is a shared storage unit; if the penultimate storage unit of the port is to be overflowed, The state directly releases the last-level storage unit of the port. If it is detected that the penultimate-level storage unit of the port is about to overflow, it is necessary to acquire the unused shared storage unit according to step 110 and step 120 again. And assigned to the port, this will generate frequent scheduling operations, which is not conducive to improving efficiency.
  • each port is assigned a fixed storage unit, in addition to 10 shared memory units for dynamic allocation.
  • attribute parameters are set for the fixed storage unit and the shared storage unit respectively: for each fixed storage unit, marked as Port_RAM, and the set attribute parameters include R_Port, F_last, F_almost_full, etc.; For each shared storage unit, marked as Dyn_RAM, the set attribute parameters include F_Used, R_Port, F_last, R_RAM_Before, F_empty, and F_almost_full.
  • the R_Port indicates the port where the storage unit is located, 1 indicates port 1, 2 indicates port 2, 3 indicates port 3, 4 indicates port 4, and 5 indicates that it does not belong to any port; At the last stage of the port, a value of 1 indicates that the storage unit is at the last level of the port, a value of 0 indicates that the storage unit is at a non-final level of the port; the F_almost_full indicates whether the storage unit is about to overflow, and 1 indicates a storage unit.
  • Will overflow 0 means that the storage unit will not overflow, for example, the size of the storage unit is 1000KB, F_almost_full is set to 1 when the storage unit has been used 900KB, or F_almost_full when the storage unit has been used 950KB Set to 1 to indicate that the memory cell is about to overflow; F_Used indicates whether the memory cell has been used, 0 means that the memory cell is not used, 1 means that the memory cell has been used; and R_RAM_Before is a memory cell The label of the storage unit of the previous stage of the port is used to indicate the data packet transmission direction; and the F_empty indicates whether the storage unit is idle or not. Shown idle, 0 indicates non-idle.
  • Port_RAM_1, Dyn_RAM_1, Dyn_RAM_2 Three storage units cascaded on port 1, which are respectively Port_RAM_1, Dyn_RAM_1, Dyn_RAM_2; wherein the data message is sequentially from Dyn_RAM_2 Flows to Dyn_RAM_1 and then to Port_RAM_1, and the value of F_last of Dyn_RAM_2 is 1.
  • the value is equal to 5 Dyn_RAM; if there is unused Dyn_RAM, the unused Dyn_RAM is cascaded after Dyn_RAM_2 of port 1; and the value of F_Used of the Dyn_RAM is changed to 1, R_Port Changed to 1, the value of F_last is changed to 1, the label of the previous stage RAM corresponding to R_RAM_Before is marked as Dyn_RAM_2, and the value of F_last of Dyn_RAM_2 is changed to 0.
  • FIG. 2 is a schematic diagram of an implementation process of a storage resource sharing method according to Embodiment 2, as shown in FIG. 2, the method includes Step 210 and Step 220.
  • step 210 it is detected whether the last level of the storage unit of the port is free and is a shared storage unit.
  • the storage resources included in the FPGA chip are composed of a plurality of BRAMs, and one BRAM is usually 18 KB or 36 KB in size.
  • the storage resources inside the FPGA chip are first divided into a certain number of storage units, and each storage unit includes a certain amount of BRAM; then, some storage units in all the storage units are allocated to the FPGA chip.
  • Each port, and the storage units allocated to the same port are respectively cascaded, and the remaining storage units are used for subsequent dynamic allocation.
  • each storage unit represents a storage resource, and each storage unit is composed of one or more BRAMs; each storage unit may have the same amount of BRAM or may be different, that is, each storage unit. May be the same size or different; each port gets The number of storage units may be the same or different, that is, the storage resources obtained by each port may be the same or different; the port may be multiple specific physical ports or multiple different sub-ports. Or a plurality of queues in a port; distinguishing between the storage unit allocated to the port and the remaining storage unit, identifying that the storage unit allocated to the port is a fixed storage unit, and identifying the remaining storage The unit is a shared storage unit.
  • the FPGA chip can periodically or randomly detect the working state of the port. If the last-level storage unit of the port is detected to be idle, it indicates that the last-level storage unit of the port does not currently cache the data packet. Or the data packet is not cached, the last-level storage unit of the port is idle and redundant with respect to the port, and step 220 is performed; if it is detected that the last-level storage unit of the port is not idle, continue Go to step 210.
  • the last-level storage unit of the port is a shared storage unit, that is, when the port is cascaded with a shared storage unit, step 220 is performed.
  • step 220 in the event that the last level of memory cells of the port are free and are shared memory locations, the last level of memory cells of the port is released.
  • the last-level storage unit of the port is idle, and the last-level storage unit of the port is a shared storage unit, the last-level storage unit of the port is released, and the state of the storage unit is changed again. Is a shared storage unit that is not being used.
  • the unused shared storage unit means that the state of the shared storage unit is unused and is not assigned to any port.
  • the method further includes: detecting whether the last-level storage unit of the port is idle and is a shared storage unit, and detecting that the last-level storage unit of the port is idle and is a shared storage unit, detecting the location Whether the penultimate level storage unit of the port is about to overflow, and in the case where the penultimate level storage unit is not about to overflow, the last-level storage unit of the port is released.
  • the last-level storage unit of the port is not released; if the last-level storage unit of the port is detected to be idle And the last-level storage unit of the port is released when the penultimate-level storage unit does not overflow.
  • the penultimate level storage unit of the port is a fixed storage unit or a shared storage unit, and the last stage storage unit of the port is a shared storage unit; if the penultimate storage unit of the port is to be overflowed, State, and directly release the last-level storage unit of the port. If it is detected that the penultimate-level storage unit of the port is about to overflow, it needs to be acquired again.
  • the shared storage unit is allocated to the port, which will result in frequent scheduling operations, which is not conducive to improving efficiency.
  • each port is assigned a fixed storage unit, in addition to 10 shared memory units for dynamic allocation.
  • attribute parameters are set for the fixed storage unit and the shared storage unit respectively: for each fixed storage unit, marked as Port_RAM, and the set attribute parameters include R_Port, F_last, F_almost_full, etc.; For each shared storage unit, marked as Dyn_RAM, the set attribute parameters include F_Used, R_Port, F_last, R_RAM_Before, F_empty, and F_almost_full.
  • the R_Port indicates the port where the storage unit is located, 1 indicates that the port 1, 2 indicates that the port 2, 3 indicates that the port 3, 4 indicates that the port 4, 5 indicates that it does not belong to any one port, and the F_last indicates whether it is at the end of the port.
  • Level 1, 1 means that the memory unit is at the last stage of the port, 0 means that the memory unit is at the non-last stage of the port; F_almost_full indicates whether the memory unit is about to overflow, and 1 means the memory unit is about to overflow, 0 Indicates that the storage unit does not overflow; the F_Used indicates whether the storage unit has been used, 0 indicates that the storage unit is not used, and 1 indicates that the storage unit has been used; the R_RAM_Before is the previous level storage of the port where the storage unit is located The label of the unit is used to indicate the data packet transmission direction; the F_empty indicates whether the storage unit is idle, 1 indicates idle, and 0 indicates non-idle.
  • the embodiment further provides a storage resource sharing device
  • the device may be disposed in an FPGA chip, as shown in FIG. 3, the device includes: a detection module 31, a processing module 32; among them,
  • the detecting module 31 is configured to detect whether a storage unit of the port is about to overflow
  • the processing module 32 is configured to cascade the idle shared storage unit behind the last-level storage unit of the port when the detecting module 31 detects that the storage unit of the port is about to overflow.
  • the size of one BRAM is usually 18 KB or 36 KB.
  • the storage resources inside the FPGA chip are first divided into a certain number of storage units, and each storage unit includes a certain amount of BRAM; then, some storage units in all the storage units are allocated to the FPGA chip.
  • Each port, and the storage units allocated to the same port are respectively cascaded, and the remaining storage units are used for subsequent dynamic allocation.
  • each storage unit represents a storage resource, and each storage unit is composed of one or more BRAMs; each storage unit may have the same amount of BRAM or may be different, that is, each storage unit.
  • the size of the storage units may be the same or different.
  • the storage resources obtained by each port may be the same or different.
  • the ports may be multiple. a specific physical port, which may be a plurality of different sub-ports, or a plurality of queues in a certain port; distinguishing between the storage unit allocated to the port and the remaining storage unit, and identifying the allocation to the
  • the storage unit of the port is a fixed storage unit, and the remaining storage units are identified as shared storage units.
  • the detecting module 31 When the detecting module 31 detects that the storage unit of the port is about to overflow, it indicates that the shared storage unit needs to be re-allocated for the port, so that the port can meet the requirement of performing buffer processing on the data packet, that is, the processing module 32 is notified to execute. Corresponding operation; when the detecting module 31 detects that the storage unit of the port does not overflow, the detecting operation is continued.
  • the detecting module 31 detects whether the storage unit of the port is about to overflow, whether it is detecting whether the last-level storage unit of the port is about to overflow, or detecting whether the penultimate-level storage unit of the port is about to overflow, or detecting the last of the port.
  • the detection module 31 detects whether the last-level storage unit of the port is to be overflowed as an example; the port The last-level storage unit is a fixed storage unit or a shared storage unit, that is, when a fixed storage unit of the port is not cascaded with a shared storage unit, the last-level storage unit of the port is a fixed storage unit; When a fixed storage unit of a port is cascaded with a shared storage unit, the last-level storage unit of the port is a shared storage unit.
  • the processing module 32 is configured to: when the detecting module 31 detects that the storage unit of the port is about to overflow, that is, the detecting module 31 in the embodiment detects that the last-level storage unit of the port is about to overflow, and will not be
  • the shared storage unit is cascaded behind the last-level storage unit of the port to meet the need for the port to perform buffer processing on the data packet.
  • the unused shared storage unit means that the shared storage unit is not currently allocated to any port; according to the need of the port for storage resources, one or more unused shared storage units may be cascaded. After the last-level storage unit of the port; after cascading the unused shared storage unit behind the last-level storage unit of the port, the last-level storage unit of the port is Shared storage unit.
  • the detecting module 31 is further configured to detect whether there is an unused shared storage unit before the cascading shared storage unit is cascaded behind the last-level storage unit of the port. ;
  • the processing module 32 is further configured to detect, when the shared memory unit that is not to be used is cascaded behind the last-level storage unit of the port, when the detecting module 31 detects that there is an unused share. When the unit is stored, the unused shared storage unit is allocated to the port.
  • any one or more unused shared memory cells may be allocated to the port; if the last-level memory cells of all ports included in the FPGA chip There has not been a situation in which it is detected that it will overflow, and when it is detected that the last stage of the storage unit of a certain port is about to overflow, it is not necessary to detect whether there is an unused shared memory unit.
  • the processing module 32 is further configured to: when the detecting module 31 detects that there is no unused shared storage unit, release a priority than the port according to the set priority of each port. a last-level storage unit of the low port, and assigning the last-level storage unit released by the port having a lower priority than the port to the port; the port having a lower priority than the port
  • the last level of storage unit is a shared storage unit;
  • the priority of the port is that the user needs to allocate the shared storage unit after the data packet burst is encountered, and the shared storage unit needs to be preferentially ensured that some ports obtain the shared storage unit;
  • the priority of the plurality of ports is lower than the priority of the port, and the last level of the storage units of the plurality of ports are shared storage units, and the last of the ports with the lowest priority among the plurality of ports may be
  • the primary storage unit is released, or the last-level storage unit of any one of the plurality of ports may be released.
  • the detecting module 31 further detects whether the last-level storage unit of the port is idle and is a shared storage unit.
  • the processing module 32 is further configured to release the last-level storage unit of the port when the detecting module 31 detects that the last-level storage unit of the port is idle and is a shared storage unit.
  • the processing module 32 releases the last-level storage unit of the port; The detecting module 31 detects that the last-level storage unit of the port is not idle, and the processing module 32 does not release the last-level storage unit of the port.
  • the storage unit is idle, that is, the storage unit does not currently cache the data packet, or does not cache the data packet; if the last-level storage unit of the port is idle, it is idle and redundant with respect to the port.
  • the last level of memory cells of the port may be released, causing the state of the memory unit to become an unused shared memory unit.
  • the detecting module 31 is further configured to detect whether the last-level storage unit of the port is idle and is a shared storage unit, and after detecting that the last-level storage unit of the port is idle, detecting the penultimate storage of the port. Whether the unit is about to overflow;
  • the processing module 32 is further configured to release the last-level storage unit of the port when the detecting module 31 detects that the penultimate-level storage unit of the port does not overflow.
  • the processing module 32 does not release the last-level storage unit of the port;
  • the processing module 32 releases the last-level storage unit of the port.
  • the penultimate level storage unit of the port is a fixed storage unit or a shared storage unit, and the last stage storage unit of the port is a shared storage unit; if the penultimate storage unit of the port is to be overflowed, The state directly releases the last-level storage unit of the port. If it is detected that the penultimate-level storage unit of the port is about to overflow, it is necessary to acquire the unused share according to the detecting module 31 and the processing module 32 again. The storage unit is allocated to the port, which will result in frequent scheduling operations, which is not conducive to improving efficiency.
  • the storage resource includes a fixed storage unit fixedly allocated to each port and a shared storage unit shared by a plurality of ports.
  • each port is assigned a fixed storage unit, in addition
  • attribute parameters are set for the fixed storage unit and the shared storage unit respectively: for each fixed storage unit, marked as Port_RAM, and the set attribute parameters include R_Port, F_last, F_almost_full, etc.; For each shared storage unit, marked as Dyn_RAM, the set attribute parameters include F_Used, R_Port, F_last, R_RAM_Before, F_empty, and F_almost_full.
  • the R_Port indicates the port where the storage unit is located, 1 indicates that the port 1, 2 indicates that the port 2, 3 indicates that the port 3, 4 indicates that the port 4, 5 indicates that it does not belong to any one port, and the F_last indicates whether it is at the end of the port.
  • Level 1, 1 means that the memory unit is at the last stage of the port, 0 means that the memory unit is at the non-last stage of the port; F_almost_full indicates whether the memory unit is about to overflow, and 1 means the memory unit is about to overflow, 0 Indicates that the storage unit does not overflow; the F_Used indicates whether the storage unit has been used, 0 indicates that the storage unit is not used, and 1 indicates that the storage unit has been used; the R_RAM_Before is the previous level storage of the port where the storage unit is located The label of the unit is used to indicate the data packet transmission direction; the F_empty indicates whether the storage unit is idle, 1 indicates idle, and 0 indicates non-idle.
  • the detecting module 31 detects the state of the port 1, and detects that three storage units are cascaded on the port 1, which are Port_RAM_1, Dyn_RAM_1, and Dyn_RAM_2, respectively, wherein the data message flows from Dyn_RAM_2 to Dyn_RAM_1 and then to Port_RAM_1, and Dyn_RAM_2 at this time.
  • the value of F_last is 1.
  • the detection module 31 detects that the value of F_almost_full corresponding to Dyn_RAM_2 is equal to 1, that is, the buffer resource of Dyn_RAM_2 is insufficient and the data message is about to overflow; then the detecting module 31 continues to detect whether there is any unused Dyn_RAM, that is, whether F_Used exists.
  • the value is equal to 0, and the value of R_Port is equal to 5 Dyn_RAM; if there is unused Dyn_RAM, the processing module 32 cascades the unused Dyn_RAM behind the Dyn_RAM_2 of port 1, and the Dyn_RAM is The value of F_Used is changed to 1, the value of R_Port is changed to 1, the value of F_last is changed to 1, the label of the previous stage RAM corresponding to R_RAM_Before is marked as Dyn_RAM_2, and the value of F_last of Dyn_RAM_2 is changed to 0.
  • the detection module 31 detects that the value of F_empty corresponding to Dyn_RAM_2 is equal to 1, indicating that Dyn_RAM_2 is idle, the detection module 31 continues to detect the F_almost_full corresponding to the Dyn_RAM_1 according to the Dyn_RAM_1, which is the label of the previous stage RAM corresponding to the R_RAM_Before of the Dyn_RAM_2. Whether the value is equal to 0; if equal to 0, the processing module 32 releases the Dyn_RAM_2, and changes the value of the R_Port of the Dyn_RAM_2 to 5, and the value of F_last is changed.
  • the label of the previous stage RAM corresponding to R_RAM_Before is marked as none, the value of F_Used is changed to 0, and the value of F_last of Dyn_RAM_1 is changed to 1; if it is equal to 1, the Dyn_RAM_2 is not released.
  • the embodiment further provides a computer readable storage medium storing computer executable instructions for performing any of the above methods.
  • FIG. 4 is a schematic diagram showing the hardware structure of an electronic device according to the embodiment. As shown in FIG. 4, the electronic device includes: one or more processors 410 and a memory 420. One processor 410 is taken as an example in FIG.
  • the electronic device may further include an input device 430 and an output device 440.
  • the processor 410, the memory 420, the input device 430, and the output device 440 in the electronic device may be connected by a bus or other means, and the connection through the bus is taken as an example in FIG.
  • the input device 430 can receive input numeric or character information
  • the output device 440 can include a display device such as a display screen.
  • the memory 420 is a computer readable storage medium that can be used to store software programs, computer executable programs, and modules.
  • the processor 410 executes various functional applications and data processing by executing software programs, instructions, and modules stored in the memory 420 to implement any of the above-described embodiments.
  • the memory 420 may include a storage program area and an storage data area, wherein the storage program area may store an operating system, an application required for at least one function; the storage data area may store data created according to usage of the electronic device, and the like.
  • the memory may include volatile memory such as random access memory (RAM), and may also include non-volatile memory such as at least one magnetic disk storage device, flash memory device, or other non-transitory solid state storage device.
  • Memory 420 can be a non-transitory computer storage medium or a transitory computer storage medium.
  • the non-transitory computer storage medium such as at least one magnetic disk storage device, flash memory device, or other non-volatile solid state storage device.
  • memory 420 can optionally include memory remotely located relative to processor 410, which can be connected to the electronic device over a network. Examples of the above networks may include the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.
  • Input device 430 can be used to receive input digital or character information and to generate key signal inputs related to user settings and function control of the electronic device.
  • Output device 440 can include a display device such as a display screen.
  • the electronic device of the present embodiment may further include a communication device 450 that transmits and/or receives information over a communication network.
  • a person skilled in the art can understand that all or part of the process of implementing the above embodiment method can be completed by executing related hardware by a computer program, and the program can be stored in a non-transitory computer readable storage medium.
  • the program when executed, may include the flow of an embodiment of the method as described above, wherein the non-transitory computer readable storage medium may be a magnetic disk, an optical disk, a read only memory (ROM), or a random access memory (RAM). Wait.
  • the present disclosure provides a method and an apparatus for allocating storage resources, which can be used to allocate a storage resource to the port when the required storage resources of the port are insufficient, and meet the requirement of the port for the storage resource, thereby ensuring that the port can correctly access the data packet. Process it.

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
  • Memory System (AREA)

Abstract

一种存储资源分配方法及分配装置,该方法包括:检测端口的存储单元是否将要溢出(110),在存储单元将要溢出的情况下,将未被使用的共享存储单元级联在所述端口的最后一级存储单元的后面(120)。

Description

存储资源分配方法和装置 技术领域
本公开涉及存储资源分配技术,例如涉及一种存储资源分配方法和装置。
背景技术
相关技术中,对现场可编程门阵列(Field-Programmable Gate Array,FPGA)芯片的端口中所传输的数据报文进行缓存处理的方法包括以下两种:一种是通过给端口分配固定大小的存储资源对数据报文进行缓存,所述分配的存储资源能够使端口在遇到数据报文突发时不会溢出;另一种是通过采用队列调度方法对整个存储资源以及端口进行集中管理,从而对数据报文进行缓存,该方法能够保证端口在对数据报文进行缓存处理时,提供端口所需要的存储资源,但是对整个存储资源和每个端口都需要维护各自复杂的调度列表,并且需要具有较大的寄存器转换级电路(Register Transport Level,RTL)资源。
发明内容
有鉴于此,本公开提供一种存储资源分配方法和装置,能够满足端口对存储资源的需求,并提高存储资源利用率。
本公开提供了一种存储资源分配方法,所述方法包括:
检测端口的存储单元是否将要溢出,在所述存储单元将要溢出的情况下,将未被使用的共享存储单元级联在所述端口的最后一级存储单元的后面。
可选地,所述将未被使用的共享存储单元级联在所述端口的最后一级存储单元的后面之前,所述方法还包括:
检测是否存在未被使用的共享存储单元,在存在有未被使用的共享存储单元的情况下,将所述未被使用的共享存储单元分配给所述端口。
可选地,所述方法还包括:
检测所述端口的最后一级存储单元是否空闲且是否为共享存储单元,在所述端口的最后一级存储单元空闲且为共享存储单元的情况下,释放所述端口的最后一级存储单元。
可选地,所述方法还包括:
当检测出不存在未被使用的共享存储单元时,释放比所述端口的优先级低的端口的最后一级存储单元,并将所述比所述端口的优先级低的端口所释放的最后一级存储单元分配给所述端口;且所述比所述端口的优先级低的端口的最后一级存储单元是共享存储单元。
可选地,所述方法还包括:
检测所述端口的最后一级存储单元是否空闲且是否为共享存储单元,检测出所述端口的最后一级存储单元空闲且为共享存储单元之后,检测所述端口的倒数第二级存储单元是否将要溢出,在所述倒数第二级存储单元没有将要溢出的情况下,释放所述端口的最后一级存储单元。
可选地,在上述方法中,所述存储资源包括固定分配给每个端口的固定存储单元和多个端口共享的共享存储单元。
可选地,所述端口为FPGA中的一个端口,所述未被使用的共享存储单元为FPGA中未被使用的共享存储单元。
本实施例还提供了一种存储资源分配装置,所述装置包括:检测模块、处理模块;其中,
所述检测模块,设置为检测端口的存储单元是否将要溢出;
所述处理模块,设置为当所述检测模块检测出所述端口的存储单元将要溢出时,将未被使用的共享存储单元级联在所述端口的最后一级存储单元的后面。
可选地,
所述检测模块,还设置为在所述将未被使用的共享存储单元级联在所述端口的最后一级存储单元的后面之前,检测是否存在未被使用的共享存储单元;
所述处理模块,还设置为在所述将未被使用的共享存储单元级联在所述端口的最后一级存储单元的后面之前,当所述检测模块检测出存在未被使用的共享存储单元时,将所述未被使用的共享存储单元分配给所述端口。
可选地,
所述检测模块,还设置为检测所述端口的最后一级存储单元是否空闲且是否为共享存储单元;
所述处理模块,还设置为当所述检测模块检测出所述端口的最后一级存储单元空闲且为共享存储单元时,释放所述端口的最后一级存储单元。
可选地,
所述处理模块,还设置为当所述检测模块检测出不存在未被使用的共享存 储单元时,释放比所述端口的优先级低的端口的最后一级存储单元;所述比所述端口的优先级低的端口的最后一级存储单元是共享存储单元;
并设置为将所述比所述端口的优先级低的端口所释放的最后一级存储单元分配给所述端口。
可选地,
所述检测模块,还设置为检测所述端口的最后一级存储单元是否空闲且是否为共享存储单元,检测出所述端口的最后一级存储单元空闲且为共享存储单元之后,检测所述端口的倒数第二级存储单元是否将要溢出;
所述处理模块,还设置为当所述检测模块检测出所述端口的倒数第二级存储单元不会溢出时,释放所述端口的最后一级存储单元。
可选地,在上述装置中,所述存储资源包括固定分配给每个端口的固定存储单元和多个端口共享的共享存储单元。
本实施例提供的存储资源分配方法和装置,检测端口的存储单元是否将要溢出,在存储单元将要溢出的情况下,将未被使用的共享存储单元级联在所述端口的最后一级存储单元的后面;如此,在端口所需的存储资源不足时,及时分配存储资源至所述端口,满足端口对存储资源的需求,从而确保端口能够正常的对数据报文进行处理。
可选地,检测端口的最后一级存储单元是否空闲且是否为共享存储单元,若所述端口的最后一级存储单元空闲且为共享存储单元,则释放所述端口的最后一级存储单元;如此,当检测出端口不再需要已分配的共享存储单元时,及时释放所述共享存储单元,确保每个共享存储单元的使用效率最大化,从而提高存储资源利用率。
本实施例还提供一种计算机可读存储介质,存储有计算机可执行指令,所述计算机可执行指令用于执行上述方法。
本实施例还提供一种电子设备,该电子设备包括一个或多个处理器、存储器以及一个或多个程序,所述一个或多个程序存储在存储器中,当被一个或多个处理器执行时,执行上述方法。
本实施例还提供了一种计算机程序产品,所述计算机程序产品包括存储在非暂态计算机可读存储介质上的计算机程序,所述计算机程序包括程序指令,当所述程序指令被计算机执行时,使所述计算机执行上述任意一种方法。
附图说明
图1为实施例一提供的一种存储资源共享方法的实现流程示意图;
图2为实施例二提供的一种存储资源共享方法的实现流程示意图;
图3为实施例三提供的一种存储资源共享装置的组成结构示意图;
图4为实施例四提供的一种电子设备的硬件结构示意图。
具体实施方式
在不冲突的情况下,以下实施例和实施例中的特征可以相互组合。申请人发现每个FPGA芯片所包含的存储资源以及RTL资源的大小都是固定的。若给每个端口分配固定大小的存储资源,由于每个端口所需要的存储资源大小是不一致的,这会降低存储资源的利用率且扩大了所需要的存储资源。一旦所需要的存储资源超过了该型号FPGA芯片的固有存储资源的最大值,会需要具有更大存储资源的FPGA芯片才能满足要求。若采用队列调度方法对存储资源进行调度使用,由于FPGA芯片所包含的RTL资源的大小是固定的,则扩大了所需要的RTL资源,一旦所需要的RTL资源超过了该型号FPGA芯片的固有RTL资源的最大值,同样会需要具有更大RTL资源的FPGA芯片才能满足要求。
实施例一
图1为实施例一提供的一种存储资源共享方法的实现流程示意图,如图1所示,包括步骤110和120。
在步骤110中,检测端口的存储单元是否将要溢出;
FPGA芯片内部所包含的存储资源可以是由多个随机存储块(Block RAM,BRAM)所组成的,且一个BRAM的大小通常为18KB或36KB。在FPGA芯片启动后,将FPGA芯片内部的存储资源划分为一定数量的存储单元,每个存储单元包含一定数量的BRAM;将全部存储单元中的一部分存储单元分配给FPGA芯片内部的各端口,并使分配给相同端口的存储单元分别级联起来,而剩余的存储单元用于后续的动态分配。
需要说明的是,所述存储单元代表一种存储资源,每个存储单元由至少一个BRAM组成;每个存储单元所包含的BRAM数量可以相同,也可以不相同,即每个存储单元的大小可以相同,也可以不相同;每个端口的存储单元数量可以相同,也可以不相同,即每个端口所获得的存储资源可以相同,也可以不相同;所述端口可以是多个具体的物理端口,也可以是多个不同的子端口,或者是某个端口中的多个队列;为了将分配给端口的存储单元与剩余的存储单元进行区分,标识分配给端口的存储单元为固定存储单元,标识剩余的存储单元为 共享存储单元。可选地,存储资源包括固定分配给每个端口的固定存储单元和多个端口共享的共享存储单元。通过将存储资源分为每个端口的固定存储单元,以及用于机动分配的共享存储单元,合理的利用了有限的存储资源,不需要对所有的存储资源进行统筹调度,减小了RTL资源的需求量。
FPGA芯片在工作过程中对端口的工作状态进行检测,若检测出该端口的存储单元将要溢出,则需要为该端口再分配共享存储单元,使得所述端口能够满足对数据报文进行缓存处理的需要,即执行步骤120;若检测出该端口的存储单元不会溢出,则继续执行步骤110。
上述检测端口的存储单元是否将要溢出,可以是检测端口的最后一级存储单元是否将要溢出、检测端口的倒数第二级存储单元是否将要溢出、或检测端口的除最后一级存储单元和倒数第二级存储单元之外的存储单元是否将要溢出等。在本实施例中,以检测端口的最后一级存储单元是否将要溢出为例进行说明。所述端口的最后一级存储单元可以是固定存储单元或共享存储单元,当所述端口的固定存储单元后面未级联有共享存储单元时,所述端口的最后一级存储单元是固定存储单元;当所述端口的固定存储单元后面级联有共享存储单元时,所述端口的最后一级存储单元是共享存储单元。
在步骤120中,在存储单元将要溢出的情况下,将未被使用的共享存储单元级联在所述端口的最后一级存储单元的后面。
当检测出端口的存储单元将要溢出时,即检测出端口的最后一级存储单元将要溢出时,将未被使用的共享存储单元级联在所述端口的最后一级存储单元的后面,以满足所述端口对数据报文进行缓存处理的需要。
所述未被使用的共享存储单元可以是指该共享存储单元当前没有被分配给任意端口使用;根据所述端口对存储资源的需要情况,可将至少一个未被使用的共享存储单元级联在所述端口的最后一级存储单元的后面;在将未被使用的共享存储单元级联在所述端口的最后一级存储单元的后面之后,所述端口的最后一级存储单元便是共享存储单元。
可选地,在将未被使用的共享存储单元级联在所述端口的最后一级存储单元的后面之前,所述方法还包括:检测是否存在未被使用的共享存储单元,在存在未被使用的共享存储单元的情况下,将所述未被使用的共享存储单元分配给所述端口。
当检测出端口的存储单元将要溢出时,检测是否存在未被使用的共享存储 单元,在存在未被使用的共享存储单元的情况下,将所述未被使用的共享存储单元分配给所述端口。
当检测出未被使用的共享存储单元有多个时,可将任意至少一个未被使用的共享存储单元分配给所述端口;在FPGA芯片内部所包含的所有端口的最后一级存储单元都未出现将要溢出的情况下,在第一次检测出某一个端口的最后一级存储单元将要溢出时,可不用检测是否存在未被使用的共享存储单元。
当检测出不存在未被使用的共享存储单元时,还可根据设置的每个端口的优先级,释放比所述端口的优先级低的端口的最后一级存储单元,并将该最后一级存储单元分配给所述端口;且该最后一级存储单元是共享存储单元。
为端口设置优先级是为了解决端口在遇到数据报文突发等情况时,且空闲的共享存储单元都已分配完,优先保证某些端口获得共享存储单元;当存在多个端口的优先级比所述端口的优先级低、且所述多个端口的最后一级存储单元都是共享存储单元时,可以将所述多个端口中具有最低优先级的端口的最后一级存储单元释放,也可以将所述多个端口中任意一个端口的最后一级存储单元释放。
可选地,所述方法还包括:检测端口的最后一级存储单元是否空闲且是否为共享存储单元,在所述最后一级存储单元空闲且为共享存储单元的情况下,释放所述端口的最后一级存储单元。
当检测出端口的最后一级存储单元空闲、且所述端口的最后一级存储单元是共享存储单元时,释放所述端口的最后一级存储单元;若检测出端口的最后一级存储单元不是空闲的,则不释放所述端口的最后一级存储单元。
所述存储单元空闲是指该存储单元当前未对数据报文进行缓存处理,或未缓存有数据报文;当端口的最后一级存储单元空闲时,则对于所述端口是空闲的、多余的,可释放所述端口的最后一级存储单元,使所述最后一级存储单元的状态重新变为未被使用的共享存储单元。
可选地,所述方法还包括:检测所述端口的最后一级存储单元是否空闲且是否为共享存储单元,检测出所述端口的最后一级存储单元空闲且为共享存储单元之后,检测所述端口的倒数第二级存储单元是否将要溢出,在所述倒数第二级存储单元没有将要溢出的情况下,释放所述端口的最后一级存储单元,在所述倒数第二级存储单元将要溢出的情况下,不进行操作。
当检测出所述端口的最后一级存储单元空闲、且倒数第二级存储单元将要 溢出时,不释放所述端口的最后一级存储单元;若检测出所述端口的最后一级存储单元空闲、且倒数第二级存储单元不会溢出时,释放所述端口的最后一级存储单元。
可选地,所述端口为FPGA中的一个端口,所述未被使用的共享存储单元为FPGA中未被使用的共享存储单元。
所述端口的倒数第二级存储单元是固定存储单元或共享存储单元,所述端口的最后一级存储单元是共享存储单元;若不考虑所述端口的倒数第二级存储单元是否将要溢出的状态,而直接释放所述端口的最后一级存储单元,如果此时检测出所述端口的倒数第二级存储单元将要溢出,则需要再次根据步骤110和步骤120获取未被使用的共享存储单元并分配给所述端口,这样将产生频繁的调度操作,不利于提高效率。
下面结合附图和实施例说明本实施例的实现过程,描述如下:
假设,FPGA芯片共有4个端口,每个端口分配有一个固定存储单元,此外还有10个用于动态分配的共享存储单元。为了标识每个存储单元所在的端口以及相应的状态,分别对固定存储单元和共享存储单元设置属性参数:对于每个固定存储单元,标记为Port_RAM,设置的属性参数包括R_Port、F_last、F_almost_full等;对于每个共享存储单元,标记为Dyn_RAM,设置的属性参数包括F_Used、R_Port、F_last、R_RAM_Before、F_empty和F_almost_full。其中,所述R_Port表示存储单元所在的端口,为1表示端口1、为2表示端口2、为3表示端口3、为4表示端口4、为5表示不属于任意一个端口;所述F_last表示是否处在端口的最后一级,为1表示存储单元处在端口的最后一级、为0表示存储单元处在端口的非最后一级;所述F_almost_full表示存储单元是否将要溢出,为1表示存储单元将要溢出、为0表示存储单元不会溢出,例如,存储单元的大小为1000KB,当该存储单元已被使用900KB时,将F_almost_full设置为1,或者当该存储单元已被使用950KB时,将F_almost_full设置为1,以此来表示该存储单元将要溢出;所述F_Used表示存储单元是否已被使用,为0表示存储单元未被使用、为1表示存储单元已被使用;所述R_RAM_Before为存储单元所处端口的前一级存储单元的标号,用于指示数据报文传输方向;所述F_empty表示存储单元是否空闲,为1表示空闲、为0表示非空闲。
对端口1的状态进行检测,检测到端口1上级联有3个存储单元,分别为Port_RAM_1、Dyn_RAM_1、Dyn_RAM_2;其中,数据报文依次从Dyn_RAM_2 流向Dyn_RAM_1、再流向Port_RAM_1,且此时Dyn_RAM_2的F_last的数值为1。
若检测出Dyn_RAM_2所对应的F_almost_full的数值等于1,即表示Dyn_RAM_2的缓存资源不足而导致数据报文将要溢出;则检测是否存在未被使用的Dyn_RAM,即检测是否存在F_Used的数值等于0、且R_Port的数值等于5的Dyn_RAM;若存在未被使用的Dyn_RAM,则将所述未被使用的Dyn_RAM级联在端口1的Dyn_RAM_2的后面;并将所述Dyn_RAM的F_Used的数值改为1、R_Port的数值改为1、F_last的数值改为1、R_RAM_Before中所对应的前一级RAM的标号标记为Dyn_RAM_2,以及将Dyn_RAM_2的F_last的数值改为0。
若检测出Dyn_RAM_2所对应的F_empty的数值等于1,表示Dyn_RAM_2处于空闲时,则根据Dyn_RAM_2的R_RAM_Before中所对应的前一级RAM的标号即Dyn_RAM_1,检测Dyn_RAM_1所对应的F_almost_full的数值是否等于0;若等于0,则释放所述Dyn_RAM_2,并将所述Dyn_RAM_2的R_Port的数值改为5、F_last的数值改为0、R_RAM_Before中所对应的前一级RAM的标号标记为无、F_Used的数值改为0,以及将Dyn_RAM_1的F_last的数值改为1;若等于1,则不释放所述Dyn_RAM_2。
实施例二
图2是实施例二提供的一种存储资源共享方法的实现流程示意图,如图2所示,该方法包括步骤210和步骤220。
在步骤210中,检测端口的最后一级存储单元是否空闲且是否为共享存储单元。
通常,由于FPGA芯片内部所包含的存储资源都是由多个BRAM所组成的,且一个BRAM的大小通常为18KB或36KB。在FPGA芯片启动后,首先将FPGA芯片内部的存储资源划分为一定数量的存储单元,每个存储单元包含一定数量的BRAM;然后,将所述全部存储单元中的一部分存储单元分配给FPGA芯片内部的各端口,并使分配给相同端口的存储单元分别级联起来,而剩余的存储单元用于后续的动态分配。
需要说明的是,所述存储单元是代表一种存储资源,每个存储单元由一个或一个以上BRAM组成;每个存储单元所包含的BRAM数量可以相同,也可以不相同,即每个存储单元的大小可能相同,也可能不相同;每个端口所获得的 存储单元数量可以相同,也可以不相同,即每个端口所获得的存储资源可能相同,也可能不相同;所述端口可以是多个具体的物理端口,也可以是多个不同的子端口,或者是某个端口中的多个队列;为对分配给端口的存储单元与所述剩余的存储单元进行区分,标识所述分配给端口的存储单元为固定存储单元,而标识所述剩余的存储单元为共享存储单元。
FPGA芯片在工作过程中可以定期或随机对端口的工作状态进行检测,若检测出端口的最后一级存储单元空闲,则表明所述端口的最后一级存储单元当前未对数据报文进行缓存处理或未缓存有数据报文,所述端口的最后一级存储单元相对于所述端口是空闲的、多余的,则执行步骤220;若检测出端口的最后一级存储单元不是空闲的,则继续执行步骤210。
所述端口的最后一级存储单元是共享存储单元,即当所述端口级联有共享存储单元时,才执行步骤220。
在步骤220中,在所述端口的最后一级存储单元空闲且为共享存储单元的情况下,释放所述端口的最后一级存储单元。
若检测出端口的最后一级存储单元空闲、且所述端口的最后一级存储单元是共享存储单元时,则将所述端口的最后一级存储单元释放,使所述存储单元的状态重新变为未被使用的共享存储单元。
所述未被使用的共享存储单元是指该共享存储单元的状态是未被使用的、没有被分配给任意端口。
可选地,所述方法还包括:检测所述端口的最后一级存储单元是否空闲且是否为共享存储单元,检测出所述端口的最后一级存储单元空闲且为共享存储单元之后,检测所述端口的倒数第二级存储单元是否将要溢出,在倒数第二级存储单元没有将要溢出的情况下,则释放所述端口的最后一级存储单元。
若检测出所述端口的最后一级存储单元空闲、且倒数第二级存储单元将要溢出时,不释放所述端口的最后一级存储单元;若检测出所述端口的最后一级存储单元空闲、且倒数第二级存储单元不会溢出时,释放所述端口的最后一级存储单元。
所述端口的倒数第二级存储单元是固定存储单元或共享存储单元,所述端口的最后一级存储单元是共享存储单元;若不考虑所述端口的倒数第二级存储单元是否将要溢出的状态,而直接释放所述端口的最后一级存储单元,如果此时检测出所述端口的倒数第二级存储单元将要溢出,则需要再次获取未被使用 的共享存储单元并分配给所述端口,这样将产生频繁的调度操作,不利于提高效率。
下面结合附图和实施例说明本实施例的实现过程,描述如下:
假设,FPGA芯片共有4个端口,每个端口分配有一个固定存储单元,此外还有10个用于动态分配的共享存储单元。为了标识每个存储单元所在的端口以及相应的状态,分别对固定存储单元和共享存储单元设置属性参数:对于每个固定存储单元,标记为Port_RAM,设置的属性参数包括R_Port、F_last、F_almost_full等;对于每个共享存储单元,标记为Dyn_RAM,设置的属性参数包括F_Used、R_Port、F_last、R_RAM_Before、F_empty和F_almost_full。其中,所述R_Port表示存储单元所在的端口,1表示端口1、2表示端口2、3表示端口3、4表示端口4、5表示不属于任意一个端口;所述F_last表示是否处在端口的最后一级,为1表示存储单元处在端口的最后一级、为0表示存储单元处在端口的非最后一级;所述F_almost_full表示存储单元是否将要溢出,为1表示存储单元将要溢出、为0表示存储单元不会溢出;所述F_Used表示存储单元是否已被使用,为0表示存储单元未被使用、为1表示存储单元已被使用;所述R_RAM_Before为存储单元所处端口的前一级存储单元的标号,用于指示数据报文传输方向;所述F_empty表示存储单元是否空闲,1表示空闲、0表示非空闲。
对端口1的状态进行检测,检测到端口1上级联有3个存储单元,分别为Port_RAM_1、Dyn_RAM_1、Dyn_RAM_2;其中,数据报文依次从Dyn_RAM_2流向Dyn_RAM_1、再流向Port_RAM_1,且此时Dyn_RAM_2的F_last的数值为1。当检测出Dyn_RAM_2所对应的F_empty的数值等于1,表示Dyn_RAM_2处于空闲时,则根据Dyn_RAM_2的R_RAM_Before中所对应的前一级RAM的标号即Dyn_RAM_1,检测Dyn_RAM_1所对应的F_almost_full的数值是否等于0;若等于0,则释放所述Dyn_RAM_2,并将所述Dyn_RAM_2的R_Port的数值改为5、F_last的数值改为0、R_RAM_Before中所对应的前一级RAM的标号标记为无、F_Used的数值改为0,以及将Dyn_RAM_1的F_last的数值改为1;若等于1,则不释放所述Dyn_RAM_2。
实施例三
为实现上述方法,本实施例还提供了一种存储资源共享装置,所述装置可设置于FPGA芯片中,如图3所示,所述装置包括:检测模块31、处理模块32; 其中,
所述检测模块31,设置为检测端口的存储单元是否将要溢出;
所述处理模块32,设置为当所述检测模块31检测出所述端口的存储单元将要溢出时,将空闲的共享存储单元级联在所述端口的最后一级存储单元的后面。
由于FPGA芯片内部所包含的存储资源都是由多个BRAM所组成的,且一个BRAM的大小通常为18KB或36KB。在FPGA芯片启动后,首先将FPGA芯片内部的存储资源划分为一定数量的存储单元,每个存储单元包含一定数量的BRAM;然后,将所述全部存储单元中的一部分存储单元分配给FPGA芯片内部的各端口,并使分配给相同端口的存储单元分别级联起来,而剩余的存储单元用于后续的动态分配。
需要说明的是,所述存储单元是代表一种存储资源,每个存储单元由一个或一个以上BRAM组成;每个存储单元所包含的BRAM数量可以相同,也可以不相同,即每个存储单元的大小可能相同,也可能不相同;每个端口所获得的存储单元数量可以相同,也可以不相同,即每个端口所获得的存储资源可能相同,也可能不相同;所述端口可以是多个具体的物理端口,也可以是多个不同的子端口,或者是某个端口中的多个队列;为对分配给端口的存储单元与所述剩余的存储单元进行区分,标识所述分配给端口的存储单元为固定存储单元,而标识所述剩余的存储单元为共享存储单元。
当所述检测模块31检测出端口的存储单元将要溢出时,表明需要为所述端口再分配共享存储单元,使得所述端口能够满足对数据报文进行缓存处理的需要,即告知处理模块32执行相应的操作;当所述检测模块31检测出端口的存储单元不会溢出时,继续执行检测操作。
这里,所述检测模块31检测端口的存储单元是否将要溢出,可以是检测端口的最后一级存储单元是否将要溢出、或检测端口的倒数第二级存储单元是否将要溢出、或检测端口的除最后一级存储单元和倒数第二级存储单元之外的存储单元是否将要溢出等,本实施例中以所述检测模块31检测端口的最后一级存储单元是否将要溢出为例进行说明;所述端口的最后一级存储单元是固定存储单元或共享存储单元,即当所述端口的固定存储单元后面未级联有共享存储单元时,所述端口的最后一级存储单元是固定存储单元;当所述端口的固定存储单元后面级联有共享存储单元时,所述端口的最后一级存储单元是共享存储单元。
所述处理模块32,设置为:当所述检测模块31检测出端口的存储单元将要溢出时,即本实施例中所述检测模块31检测出端口的最后一级存储单元将要溢出,将未被使用的共享存储单元级联在所述端口的最后一级存储单元的后面,满足所述端口对数据报文进行缓存处理的需要。
所述未被使用的共享存储单元是指该共享存储单元当前没有被分配给任意端口使用;根据所述端口对存储资源的需要情况,可将一个或一个以上未被使用的共享存储单元级联在所述端口的最后一级存储单元的后面;所述将未被使用的共享存储单元级联在所述端口的最后一级存储单元的后面之后,所述端口的最后一级存储单元便是共享存储单元。
可选地,所述检测模块31,还设置为在所述将未被使用的共享存储单元级联在所述端口的最后一级存储单元的后面之前,检测是否存在未被使用的共享存储单元;
所述处理模块32,还设置为在所述将未被使用的共享存储单元级联在所述端口的最后一级存储单元的后面之前,当所述检测模块31检测出存在未被使用的共享存储单元时,将所述未被使用的共享存储单元分配给所述端口。
若检测出未被使用的共享存储单元有多个时,可将任意一个或一个以上未被使用的共享存储单元分配给所述端口;若FPGA芯片内部所包含的所有端口的最后一级存储单元都未出现过检测出将要溢出的情形,则在第一次检测出某一个端口的最后一级存储单元将要溢出时,可不用检测是否存在未被使用的共享存储单元。
可选地,所述处理模块32,还设置为当所述检测模块31检测出不存在未被使用的共享存储单元时,根据设置的每个端口的优先级,释放比所述端口的优先级低的端口的最后一级存储单元,并将所述比所述端口的优先级低的端口所释放的最后一级存储单元分配给所述端口;所述比所述端口的优先级低的端口的最后一级存储单元是共享存储单元;
所述端口的优先级是用户为解决端口在遇到数据报文突发等情况,导致空闲的共享存储单元都已分配完,而需要优先保证某些端口获得共享存储单元所设置的;若存在多个端口的优先级比所述端口的优先级低、且所述多个端口的最后一级存储单元都是共享存储单元,则可以将所述多个端口中具有最低优先级的端口的最后一级存储单元释放,也可以是将所述多个端口中任意一个端口的最后一级存储单元释放。
可选地,所述检测模块31,还检测端口的最后一级存储单元是否空闲且是否为共享存储单元;
所述处理模块32,还设置为当所述检测模块31检测出所述端口的最后一级存储单元空闲且为共享存储单元时,释放所述端口的最后一级存储单元。
若所述检测模块31检测出端口的最后一级存储单元空闲、且所述端口的最后一级存储单元是共享存储单元时,所述处理模块32释放所述端口的最后一级存储单元;若所述检测模块31检测出端口的最后一级存储单元不是空闲的,所述处理模块32不释放所述端口的最后一级存储单元。
所述存储单元空闲是指该存储单元当前未对数据报文进行缓存处理,或未缓存有数据报文;若端口的最后一级存储单元空闲,则相对于所述端口是空闲的、多余的,可释放所述端口的最后一级存储单元,使所述存储单元的状态重新变为未被使用的共享存储单元。
所述检测模块31,还设置为检测所述端口的最后一级存储单元是否空闲且是否为共享存储单元,检测出端口的最后一级存储单元空闲之后,检测所述端口的倒数第二级存储单元是否将要溢出;
所述处理模块32,还设置为当所述检测模块31检测出所述端口的倒数第二级存储单元不会溢出时,释放所述端口的最后一级存储单元。
若所述检测模块31检测出所述端口的最后一级存储单元空闲、且倒数第二级存储单元将要溢出时,所述处理模块32不释放所述端口的最后一级存储单元;若所述检测模块31检测出所述端口的最后一级存储单元空闲、且倒数第二级存储单元不会溢出时,所述处理模块32释放所述端口的最后一级存储单元。
所述端口的倒数第二级存储单元是固定存储单元或共享存储单元,所述端口的最后一级存储单元是共享存储单元;若不考虑所述端口的倒数第二级存储单元是否将要溢出的状态,而直接释放所述端口的最后一级存储单元,如果此时检测出所述端口的倒数第二级存储单元将要溢出,则需要再次根据检测模块31和处理模块32获取未被使用的共享存储单元并分配给所述端口,这样将产生频繁的调度操作,不利于提高效率。
可选地,存储资源包括固定分配给每个端口的固定存储单元和多个端口共享的共享存储单元。
下面结合附图和具体实施例说明本实施例的实现过程,描述如下:
假设,FPGA芯片共有4个端口,每个端口分配有一个固定存储单元,此外 还有10个用于动态分配的共享存储单元。为了标识每个存储单元所在的端口以及相应的状态,分别对固定存储单元和共享存储单元设置属性参数:对于每个固定存储单元,标记为Port_RAM,设置的属性参数包括R_Port、F_last、F_almost_full等;对于每个共享存储单元,标记为Dyn_RAM,设置的属性参数包括F_Used、R_Port、F_last、R_RAM_Before、F_empty和F_almost_full。其中,所述R_Port表示存储单元所在的端口,1表示端口1、2表示端口2、3表示端口3、4表示端口4、5表示不属于任意一个端口;所述F_last表示是否处在端口的最后一级,为1表示存储单元处在端口的最后一级、为0表示存储单元处在端口的非最后一级;所述F_almost_full表示存储单元是否将要溢出,为1表示存储单元将要溢出、为0表示存储单元不会溢出;所述F_Used表示存储单元是否已被使用,为0表示存储单元未被使用、为1表示存储单元已被使用;所述R_RAM_Before为存储单元所处端口的前一级存储单元的标号,用于指示数据报文传输方向;所述F_empty表示存储单元是否空闲,1表示空闲、0表示非空闲。
检测模块31对端口1的状态进行检测,检测到端口1上级联有3个存储单元,分别为Port_RAM_1、Dyn_RAM_1、Dyn_RAM_2;其中,数据报文依次从Dyn_RAM_2流向Dyn_RAM_1、再流向Port_RAM_1,且此时Dyn_RAM_2的F_last的数值为1。
若检测模块31检测出Dyn_RAM_2所对应的F_almost_full的数值等于1,即表示Dyn_RAM_2的缓存资源不足而导致数据报文将要溢出;则检测模块31继续检测是否存在未被使用的Dyn_RAM,即检测是否存在F_Used的数值等于0、且R_Port的数值等于5的Dyn_RAM;若存在未被使用的Dyn_RAM,则处理模块32将所述未被使用的Dyn_RAM级联在端口1的Dyn_RAM_2的后面,并将所述Dyn_RAM的F_Used的数值改为1、R_Port的数值改为1、F_last的数值改为1、R_RAM_Before中所对应的前一级RAM的标号标记为Dyn_RAM_2,以及将Dyn_RAM_2的F_last的数值改为0。
若检测模块31检测出Dyn_RAM_2所对应的F_empty的数值等于1,表示Dyn_RAM_2处于空闲时,则根据Dyn_RAM_2的R_RAM_Before中所对应的前一级RAM的标号即Dyn_RAM_1,检测模块31继续检测Dyn_RAM_1所对应的F_almost_full的数值是否等于0;若等于0,则处理模块32释放所述Dyn_RAM_2,并将所述Dyn_RAM_2的R_Port的数值改为5、F_last的数值改 为0、R_RAM_Before中所对应的前一级RAM的标号标记为无、F_Used的数值改为0,以及将Dyn_RAM_1的F_last的数值改为1;若等于1,则不释放所述Dyn_RAM_2。
实施例四
本实施例还提供一种计算机可读存储介质,存储有计算机可执行指令,所述计算机可执行指令用于执行上述任一方法。
图4是本实施例提供的一种电子设备的硬件结构示意图,如图4所示,该电子设备包括:一个或多个处理器410和存储器420。图4中以一个处理器410为例。
所述电子设备还可以包括:输入装置430和输出装置440。
所述电子设备中的处理器410、存储器420、输入装置430和输出装置440可以通过总线或者其他方式连接,图4中以通过总线连接为例。
输入装置430可以接收输入的数字或字符信息,输出装置440可以包括显示屏等显示设备。
存储器420作为一种计算机可读存储介质,可用于存储软件程序、计算机可执行程序以及模块。处理器410通过运行存储在存储器420中的软件程序、指令以及模块,从而执行多种功能应用以及数据处理,以实现上述实施例中的任意一种方法。
存储器420可以包括存储程序区和存储数据区,其中,存储程序区可存储操作系统、至少一个功能所需要的应用程序;存储数据区可存储根据电子设备的使用所创建的数据等。此外,存储器可以包括随机存取存储器(Random Access Memory,RAM)等易失性存储器,还可以包括非易失性存储器,例如至少一个磁盘存储器件、闪存器件或者其他非暂态固态存储器件。
存储器420可以是非暂态计算机存储介质或暂态计算机存储介质。该非暂态计算机存储介质,例如至少一个磁盘存储器件、闪存器件、或其他非易失性固态存储器件。在一些实施例中,存储器420可选包括相对于处理器410远程设置的存储器,这些远程存储器可以通过网络连接至电子设备。上述网络的实例可以包括互联网、企业内部网、局域网、移动通信网及其组合。
输入装置430可用于接收输入的数字或字符信息,以及产生与电子设备的用户设置以及功能控制有关的键信号输入。输出装置440可包括显示屏等显示设备。
本实施例的电子设备还可以包括通信装置450,通过通信网络传输和/或接收信息。
本领域普通技术人员可理解实现上述实施例方法中的全部或部分流程,是可以通过计算机程序来执行相关的硬件来完成的,该程序可存储于一个非暂态计算机可读存储介质中,该程序在执行时,可包括如上述方法的实施例的流程,其中,该非暂态计算机可读存储介质可以为磁碟、光盘、只读存储记忆体(ROM)或随机存储记忆体(RAM)等。
工业实用性
本公开提供一种存储资源分配方法和装置,可以解决在端口所需的存储资源不足时,分配存储资源至所述端口,满足端口对存储资源的需求,从而确保端口能够正常的对数据报文进行处理。

Claims (14)

  1. 一种存储资源分配方法,包括:
    检测端口的存储单元是否将要溢出,在所述存储单元将要溢出的情况下,将未被使用的共享存储单元级联在所述端口的最后一级存储单元的后面。
  2. 根据权利要求1所述的方法,其中,所述将未被使用的共享存储单元级联在所述端口的最后一级存储单元的后面之前,所述方法还包括:
    检测是否存在未被使用的共享存储单元,在存在有未被使用的共享存储单元的情况下,将所述未被使用的共享存储单元分配给所述端口。
  3. 根据权利要求1所述的方法,所述方法还包括:
    检测所述端口的最后一级存储单元是否空闲且是否为共享存储单元,在所述端口的最后一级存储单元空闲且为共享存储单元的情况下,释放所述端口的最后一级存储单元。
  4. 根据权利要求2所述的方法,所述方法还包括:
    当检测出不存在未被使用的共享存储单元时,释放比所述端口的优先级低的端口的最后一级存储单元,并将所述比所述端口的优先级低的端口所释放的最后一级存储单元分配给所述端口;且所述比所述端口的优先级低的端口的最后一级存储单元是共享存储单元。
  5. 根据权利要求1所述的方法,所述方法还包括:
    检测所述端口的最后一级存储单元是否空闲且是否为共享存储单元,检测出所述端口的最后一级存储单元空闲且为共享存储单元之后,检测所述端口的倒数第二级存储单元是否将要溢出,在所述倒数第二级存储单元没有将要溢出的情况下,释放所述端口的最后一级存储单元。
  6. 根据权利要求1所述的方法,其中,所述存储资源包括固定分配给每个端口的固定存储单元和多个端口共享的共享存储单元。
  7. 根据权利要求1所述的方法,其中,所述端口为现场可编程门阵列(Field-Programmable Gate Array,FPGA)中的一个端口,所述未被使用的共享存储单元为FPGA中未被使用的共享存储单元。
  8. 一种存储资源分配装置,所述装置包括:检测模块、处理模块;其中,
    所述检测模块,设置为检测端口的存储单元是否将要溢出;
    所述处理模块,设置为当所述检测模块检测出所述端口的存储单元将要溢出时,将未被使用的共享存储单元级联在所述端口的最后一级存储单元的后面。
  9. 根据权利要求8所述的装置,其中,
    所述检测模块,还设置为在所述将未被使用的共享存储单元级联在所述端口的最后一级存储单元的后面之前,检测是否存在未被使用的共享存储单元;
    所述处理模块,还设置为,在所述将未被使用的共享存储单元级联在所述端口的最后一级存储单元的后面之前,当所述检测模块检测出存在未被使用的共享存储单元时,将所述未被使用的共享存储单元分配给所述端口。
  10. 根据权利要求8所述的装置,其中,
    所述检测模块,还设置为检测所述端口的最后一级存储单元是否空闲且是否为共享存储单元;
    所述处理模块,还设置为当所述检测模块检测出所述端口的最后一级存储单元空闲且为共享存储单元时,释放所述端口的最后一级存储单元。
  11. 根据权利要求9所述的装置,其中,
    所述处理模块,还设置为当所述检测模块检测出不存在未被使用的共享存储单元时,释放比所述端口的优先级低的端口的最后一级存储单元;所述比所述端口的优先级低的端口的最后一级存储单元是共享存储单元;
    并将所述比所述端口的优先级低的端口所释放的最后一级存储单元分配给所述端口。
  12. 根据权利要求8所述的装置,其中,
    所述检测模块,还设置为检测所述端口的最后一级存储单元是否空闲且是否为共享存储单元,检测出所述端口的最后一级存储单元空闲且为共享存储单元之后,检测所述端口的倒数第二级存储单元是否将要溢出;
    所述处理模块,还设置为当所述检测模块检测出所述端口的倒数第二级存储单元不会溢出时,释放所述端口的最后一级存储单元。
  13. 根据权利要求8所述的装置,所述存储资源包括固定分配给每个端口的固定存储单元和多个端口共享的共享存储单元。
  14. 一种计算机可读存储介质,存储有计算机可执行指令,所述计算机可执行指令用于执行权利要求1-7任一项的方法。
PCT/CN2017/089761 2016-06-24 2017-06-23 存储资源分配方法和装置 WO2017220020A1 (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201610474784.0A CN107544917A (zh) 2016-06-24 2016-06-24 一种存储资源共享方法和装置
CN201610474784.0 2016-06-24

Publications (1)

Publication Number Publication Date
WO2017220020A1 true WO2017220020A1 (zh) 2017-12-28

Family

ID=60784279

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2017/089761 WO2017220020A1 (zh) 2016-06-24 2017-06-23 存储资源分配方法和装置

Country Status (2)

Country Link
CN (1) CN107544917A (zh)
WO (1) WO2017220020A1 (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109688070A (zh) * 2018-12-13 2019-04-26 迈普通信技术股份有限公司 一种数据调度方法、网络设备及转发单元

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101692655A (zh) * 2009-10-23 2010-04-07 烽火通信科技股份有限公司 一种数据帧存储管理装置
CN102866865A (zh) * 2012-09-07 2013-01-09 北京时代民芯科技有限公司 一种fpga专用配置存储器多版本码流存储电路架构
CN104158706A (zh) * 2014-08-26 2014-11-19 杭州华三通信技术有限公司 环回检测方法及装置
CN104572573A (zh) * 2014-12-26 2015-04-29 深圳市国微电子有限公司 数据存储方法、存储模块和可编程逻辑器件

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2382554B1 (en) * 2009-01-23 2018-03-07 Hewlett-Packard Enterprise Development LP System and methods for allocating shared storage resources
CN102025631B (zh) * 2010-12-15 2017-03-29 中兴通讯股份有限公司 一种动态调整出端口缓存的方法及交换机
CN102801778A (zh) * 2012-06-21 2012-11-28 中兴通讯股份有限公司 一种实现资源共享的装置及资源共享方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101692655A (zh) * 2009-10-23 2010-04-07 烽火通信科技股份有限公司 一种数据帧存储管理装置
CN102866865A (zh) * 2012-09-07 2013-01-09 北京时代民芯科技有限公司 一种fpga专用配置存储器多版本码流存储电路架构
CN104158706A (zh) * 2014-08-26 2014-11-19 杭州华三通信技术有限公司 环回检测方法及装置
CN104572573A (zh) * 2014-12-26 2015-04-29 深圳市国微电子有限公司 数据存储方法、存储模块和可编程逻辑器件

Also Published As

Publication number Publication date
CN107544917A (zh) 2018-01-05

Similar Documents

Publication Publication Date Title
US9495206B2 (en) Scheduling and execution of tasks based on resource availability
US8325603B2 (en) Method and apparatus for dequeuing data
US20180018197A1 (en) Virtual Machine Resource Allocation Method and Apparatus
WO2019223596A1 (zh) 事件处理方法、装置、设备及存储介质
US9396154B2 (en) Multi-core processor for managing data packets in communication network
EP2657836A1 (en) Acceleration method, device and system for co-processing
WO2022247105A1 (zh) 一种任务调度方法、装置、计算机设备和存储介质
WO2016145904A1 (zh) 一种资源管理方法、装置和系统
CN112148468B (zh) 一种资源调度方法、装置、电子设备及存储介质
US10049035B1 (en) Stream memory management unit (SMMU)
WO2020125396A1 (zh) 一种共享数据的处理方法、装置及服务器
CN109388338A (zh) 云计算环境中的基于NVMe的存储系统的混合框架
US20160004654A1 (en) System for migrating stash transactions
KR20200136468A (ko) 작업 스케줄링
EP3918467A1 (en) Handling an input/output store instruction
CN113010297A (zh) 基于消息队列的数据库写入调度器、写入方法和存储介质
CN103166845A (zh) 数据处理方法和装置
CN106571935B (zh) 一种资源调度的方法与设备
WO2017220020A1 (zh) 存储资源分配方法和装置
CN107741873A (zh) 业务处理方法及装置
TW202205103A (zh) 對命令進行排程之系統以及方法
CN111831408A (zh) 异步任务处理方法、装置、电子设备及介质
CN112817516A (zh) 数据读写控制方法、装置、设备和存储介质
CN111131078B (zh) 报文散列方法、装置、fpga模组及处理器模组
WO2017070869A1 (zh) 一种内存配置方法、装置及系统

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 17814758

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 17814758

Country of ref document: EP

Kind code of ref document: A1