WO2017219965A1

WO2017219965A1 - Method and system for processing frequency shift of television signal

Info

Publication number: WO2017219965A1
Application number: PCT/CN2017/089233
Authority: WO
Inventors: 丁前利
Original assignee: 深圳创维数字技术有限公司
Priority date: 2016-06-20
Filing date: 2017-06-20
Publication date: 2017-12-28
Also published as: CN105898163A

Abstract

Provided are a method and system for processing a frequency shift of a television signal. The system comprises: a mixer circuit of a tuner; a frequency discriminating circuit; a filter circuit; a voltage-controlled oscillator circuit; and a tuner chip controlled by a central processing unit. Before entering a demodulator, an intermediate frequency signal generated by the tuner by means of frequency mixing sequentially undergoes frequency discrimination performed by the frequency discriminating circuit, filtering performed by the filter circuit, an oscillator frequency generation operation performed by the voltage-controlled oscillator circuit and frequency division performed by the tuner chip controlled by the central processing unit.

Description

Method and system for processing television signal frequency offset

Technical field

The present disclosure relates to the field of television technology, for example, to a method and system for processing a television signal frequency offset.

Background technique

With the development of satellite set-top box technology, more and more countries and operators choose to use satellite set-top boxes. The carrier frequencies of satellite frequencies are generally around 3000MHz, so the carrier frequency will be affected by the transmitting equipment, transmission equipment, transmission channel environment, etc. There is a certain frequency offset, and the problem often encountered by satellite set-top boxes is that the frequency of the operator's frequency points is offset, causing a bad user experience for the user. Generally, the set-top box can lock the program in a small frequency offset, and the company that produces the set-top box can allow the frequency to be shifted by about 3 MHz, so many companies have not dealt with the frequency offset. However, if the operator's frequency offset exceeds 3MHz, it will cause the lock (storage) to be blocked, and the frequency offset is less than 3MHz and greater than 100KHz. The anti-digital frequency interference of the set-top box is also reduced, and the consequence is easy. Cause mosaic.

Summary of the invention

A processing method and system for frequency offset of a television signal can make the frequency received by the television receiving system have no deviation and achieve a good receiving effect.

A method for processing a frequency offset of a television signal, comprising:

Mixing the frequency of the television signal with the local oscillator frequency of the high frequency tuner to generate an intermediate frequency signal;

Inputting the intermediate frequency signal into the frequency discriminating circuit, acquiring a frequency difference between the intermediate frequency signal and the zero intermediate frequency signal, and outputting an adjustment level according to the frequency difference;

Filtering the adjustment level to obtain a DC level;

Inputting the DC level into a voltage controlled oscillation circuit to generate an oscillation frequency;

The oscillation frequency is divided to obtain an adjustment frequency, and the adjustment frequency is used as a local oscillation frequency of the high frequency tuner in the mixing.

Optionally, the obtaining a frequency difference between the intermediate frequency signal and the zero intermediate frequency signal includes:

Comparing the frequency of the intermediate frequency signal with the frequency of the zero intermediate frequency signal to obtain a frequency difference.

Optionally, the outputting the adjustment level according to the frequency difference, including:

Outputting a positive adjustment level when the frequency difference is positive;

When the frequency difference is negative, a negative adjustment level is output.

Optionally, after the obtaining the frequency difference, the method further includes:

When the frequency difference is zero, the intermediate frequency signal is output to a demodulator.

Optionally, the dividing the oscillating frequency comprises: dividing, by the central processor, a frequency divider of the high frequency tuner by an internal integrated circuit communication protocol to divide the oscillating frequency.

Optionally, the frequency discrimination chip of the frequency discrimination circuit is an AD9901 chip;

The voltage controlled oscillator of the voltage controlled oscillation circuit is an MC1648 oscillator.

A processing system for frequency offset of a television signal, comprising:

The high frequency tuner mixing circuit is configured to receive the frequency of the television signal, mix the frequency of the television signal with the local oscillator frequency of the high frequency tuner, generate an intermediate frequency signal, and output the intermediate frequency signal to the frequency discriminating circuit;

a frequency discriminating circuit configured to receive the intermediate frequency signal, obtain a frequency difference between the intermediate frequency signal and the zero intermediate frequency signal, and output an adjustment level to the filter circuit according to the frequency difference;

a filter circuit configured to receive the adjustment level, filter the adjustment level, obtain a DC level, and output a DC level to the voltage controlled oscillation circuit;

a voltage controlled oscillation circuit configured to receive the DC level, generate an oscillation frequency according to a DC level, and output the oscillation frequency to a high frequency tuner chip;

The high frequency tuner chip is arranged to divide the oscillation frequency to obtain an adjustment frequency, and the adjustment frequency is used as a local oscillation frequency of the high frequency tuner in the mixing.

Optionally, the frequency discriminating circuit is configured to:

Receiving the intermediate frequency signal, comparing the frequency of the intermediate frequency signal with the frequency of the zero intermediate frequency signal, obtaining a frequency difference value, and obtaining an adjustment level according to the frequency difference value, and outputting to the filter circuit The adjustment level is described.

Optionally, the obtaining an adjustment level according to the frequency difference includes:

When the frequency difference is positive, a positive adjustment voltage is obtained;

When the frequency difference is negative, a negative adjustment voltage is obtained.

Optionally, the system further includes:

An output circuit configured to output the intermediate frequency signal to a demodulator when the frequency difference is zero; wherein

The frequency discrimination chip of the frequency discrimination circuit is an AD9901 chip;

Generating an intermediate frequency signal by mixing a frequency of the television signal and a local oscillator frequency of the high frequency tuner; inputting the intermediate frequency signal into the frequency discriminating circuit to obtain a frequency difference between the intermediate frequency signal and the zero intermediate frequency signal, according to Frequency difference output adjustment level; filtering the adjustment level to obtain a DC level; inputting the DC level into a voltage controlled oscillation circuit to generate an oscillation frequency; and dividing the oscillation frequency to obtain an adjustment Frequency, the adjustment frequency is taken as the local oscillator frequency of the high frequency tuner in the mixing. Before the intermediate frequency signal generated by the mixing of the high frequency tuner enters the demodulator, the frequency discriminating, filtering, and oscillator frequency division are sequentially performed by the frequency discriminating circuit, thereby realizing the frequency of the high frequency tuner when the frequency of the television signal frequency is shifted. The vibration frequency is offset along with the frequency of the television signal, and the frequency offset of the local oscillator frequency is the same as the frequency offset of the television signal frequency, so that the frequency received by the television receiving system is not deviated, thereby achieving a good receiving effect. Improved user experience.

DRAWINGS

In order to more clearly illustrate the technical solutions in the embodiments, the drawings used in the description of the embodiments will be described below, and the drawings in the following description are only some embodiments.

1 is a flow chart of a method of a first embodiment of a method for processing a frequency offset of a television signal.

2 is a flow chart of a method of a second embodiment of a method for processing a frequency offset of a television signal.

FIG. 3 is a schematic diagram of frequency discrimination characteristics of the frequency discrimination circuit.

Figure 4 is a schematic diagram of the mixing of the television signal frequency with and without offset.

Figure 5 is a block diagram showing the circuit configuration of a processing system for frequency offset of a television signal.

Figure 6 is a schematic diagram of the operation of the AD9901 frequency discrimination circuit.

Fig. 7 is a circuit schematic diagram of a voltage controlled oscillation circuit.

detailed description

In order to make the technical solution clearer, the technical solutions of the embodiments will be described in detail below with reference to the accompanying drawings. The described embodiments are only a part of the embodiments, not all of the embodiments. The technical features in the following embodiments and embodiments may be arbitrarily combined with each other without conflict.

In step 110, the television signal frequency is mixed with the local oscillator frequency of the high frequency tuner to produce an intermediate frequency signal.

Input the TV signal frequency into a high frequency tuner (also known as tuner) mixing circuit, and combine the frequency of the TV signal with the high frequency tuner (Tuner) in the mixer circuit of the high frequency tuner. The local oscillator frequency is mixed to produce an intermediate frequency signal.

In step 120, the intermediate frequency signal is input to the frequency discrimination circuit, the frequency difference between the intermediate frequency signal and the zero intermediate frequency signal is obtained, and the adjustment level is output according to the frequency difference.

The intermediate frequency signal generated by the mixing may be input into the frequency discriminating circuit, and the frequency discriminating circuit may compare the intermediate frequency signal and the zero intermediate frequency signal to obtain a frequency difference, generate an adjustment level according to the frequency difference, and output an adjustment level.

In step 130, the adjustment level is filtered to obtain a DC level.

The adjustment level is filtered by a filter circuit or a filter, and the ripple is filtered to obtain a DC level. In the frequency discrimination circuit, the comparison time between the intermediate frequency signal and the zero intermediate frequency signal is relatively short, so the speed of the output adjustment level is also relatively fast, the level change causes the generation of the ripple, and the faster the level change occurs, the generated The larger the ripple, the adjustment level output from the frequency discrimination circuit is the adjustment level with a large ripple, and the adjustment level can be filtered. The adjustment level can be filtered by a low pass filter circuit, which can be a filter circuit constructed with resistors and capacitors.

In step 140, the DC level is input to a voltage controlled oscillating circuit to generate an oscillating frequency.

The input control voltage in each voltage controlled oscillation circuit has a certain correspondence with the output frequency, and multiple There may be multiple correspondences between the input control voltage and the output frequency in the voltage controlled oscillator, and the operating state of the voltage controlled oscillator is controlled by the input control voltage. The DC level is input to the voltage controlled oscillation circuit, and the oscillation frequency can be generated according to the correspondence between the input control voltage and the output frequency in the voltage controlled oscillation circuit.

In step 150, the oscillation frequency is divided to obtain an adjustment frequency, and the adjustment frequency is used as a local oscillation frequency of the high frequency tuner in the mixing.

The Central Processing Unit (CPU) can divide the oscillation frequency by an Inter-Integrated Circuit (IIC) communication protocol to obtain an adjusted frequency, which is used as a mixed high frequency tuner (Tuner). The local oscillator frequency is mixed with the frequency of the television signal in a high frequency tuner (Tuner) mixing circuit to obtain an intermediate frequency signal for the next cycle until a zero intermediate frequency signal is obtained. For example, when the TV signal frequency is 3844MHz and the local oscillator frequency of the high-frequency tuner (Tuner) is 3840MHz, the adjustment frequency of 3842MHz and the adjustment frequency of 3844MHz can be obtained, and the adjustment frequency of 3844MHz is used as the mixing medium-high frequency tuner (Tuner). The local oscillator frequency gives a zero IF signal.

In this embodiment, the intermediate frequency signal is generated by mixing the frequency of the television signal and the local oscillator frequency of the high frequency tuner; and inputting the intermediate frequency signal into the frequency discriminating circuit to obtain a frequency difference between the intermediate frequency signal and the zero intermediate frequency signal. And outputting an adjustment level according to the frequency difference; filtering the adjustment level to obtain a DC level; inputting the DC level into a voltage-controlled oscillation circuit to generate an oscillation frequency; and dividing the oscillation frequency The adjustment frequency is obtained, and the adjustment frequency is used as the local oscillation frequency of the high frequency tuner in the mixing. Before the intermediate frequency signal generated by the mixing of the high frequency tuner enters the demodulator, the frequency discriminating, filtering, and oscillator frequency division may be sequentially performed by the frequency discriminating circuit, thereby realizing the high frequency tuner when the frequency of the television signal frequency is shifted. The local oscillator frequency is offset along with the frequency of the television signal, and the frequency offset of the local oscillator frequency is the same as the frequency offset of the television signal frequency, so that the frequency received by the television receiving system is not deviated, and a good receiving effect is obtained, and the improvement is achieved. The user experience.

2 is a flow chart of a method of a second embodiment of a method of processing a television signal frequency offset.

In step 210, the television signal frequency is mixed with the local oscillator frequency of the high frequency tuner to produce an intermediate frequency signal.

In step 220, the intermediate frequency signal is input to the frequency discrimination circuit, and the frequency of the intermediate frequency signal is compared with the frequency of the zero intermediate frequency signal to obtain a frequency difference value.

Optionally, the frequency discrimination chip of the frequency discrimination circuit is an AD9901 chip. AD9901 chip when the US simulator A phase/frequency discriminator developed by Analog Devices. Figure 6 is a schematic diagram of the operation of the AD9901 frequency discrimination circuit. It can be seen from Fig. 6 that the input terminal of the frequency discrimination circuit AD9901 inputs the reference frequency and the input frequency, and the frequency discrimination circuit AD9901 compares the reference frequency with the input frequency, and the output terminal outputs the adjustment level.

In step 230, it is determined if the frequency difference is zero.

It is determined whether the frequency difference is zero. When the frequency difference is 0, step 250 is performed; when the frequency difference is not 0, step 240 is performed.

In step 240, an adjustment level is output based on the frequency difference.

The adjustment level is output according to the frequency difference. When the frequency difference is positive, the output is positively adjusted; when the frequency difference is negative, the negative adjustment level is output.

FIG. 3 is a schematic diagram of frequency discrimination characteristics of the frequency discrimination circuit. As can be seen from FIG. 3, when the input level f _{R is} greater than the reference level f _v , the output voltage Vd is positive, and the larger the absolute value of the difference between f _R and f _v is, the larger the output voltage Vd is; When the level f _{R is} smaller than the reference level f _v , the output voltage Vd is negative, and the larger the absolute value of the difference between f _R and f _v is, the smaller the output voltage Vd is; when the input level f _R is equal to the reference level At f _v , the output voltage is very close to 0 volts (replaced with 0V in the figure).

In step 250, the intermediate frequency signal is output to a demodulator.

When the frequency difference is zero, the intermediate frequency signal is zero intermediate frequency signal. As shown in FIG. 4, the high frequency tuner (Tuner) of the high frequency tuner (Tuner) mixing circuit has a local oscillator frequency of 3840 MHz, and the intermediate frequency signal can be The local oscillator frequency is a centrally symmetric frequency signal. When the television signal frequency is 3840MHz, the television signal frequency is mixed with the high frequency tuner (Tuner) local oscillator frequency to generate a zero intermediate frequency signal; at this time, the intermediate frequency signal is output to the demodulation. Demodulator (DEMO) performs demodulation. The zero intermediate frequency signal can be a frequency signal centered at 0 Hz.

In step 260, the adjustment level is filtered to obtain a DC level.

In step 270, the DC level is input to a voltage controlled oscillating circuit to generate an oscillating frequency.

Optionally, the voltage controlled oscillator in the voltage controlled oscillator circuit is an MC1648 oscillator. The MC1648 is a voltage controlled oscillator developed by Motorola. Fig. 7 is a circuit schematic diagram of a voltage controlled oscillation circuit. As shown in FIG. 7, the first input of the oscillator MC1648 is connected to the first end of the inductor L1 and the first end of the varactor C1, respectively, and the second input of the oscillator MC1648 is connected to the second end of the inductor L1, respectively. And a first end of the varactor C2, the second end of the varactor C1 is respectively connected to the second end of the varactor C2 and the first end of the resistor R1, and the second end of the resistor R1 is connected to the filter circuit. When the DC level is input to the voltage controlled oscillation circuit, the resistance value of the inductor L1 can be 100nH through the resistor R1, and the resistance of the resistor R1 can be 51KΩ. In Figure 7, the resonant tank in the voltage controlled oscillator includes varactor diodes C1 and C2. The center frequency of the resonant tank can be determined by the equivalent inductance L and the equivalent capacitance C in the loop.

The equivalent capacitance of the varactor is controlled by the voltage applied across the equivalent diode. The change in voltage can be converted into a change in the resonant frequency of the loop (oscillation frequency), which constitutes the voltage controlled oscillator circuit. The MC1648 oscillator can reach the oscillation frequency of 160MHz, and the oscillation frequency of 160MHz is convenient for the CPU to control the high frequency tuner (Tuner) chip to divide the required adjustment frequency.

In step 280, the oscillation frequency is divided to obtain an adjustment frequency, and the adjustment frequency is used as the local oscillation frequency of the high-frequency tuner in the mixing, and the process returns to step 210.

As shown in Figure 4, when the TV signal frequency is shifted from 3840MHz to 4MHz and becomes 3844MHz, the local oscillator frequency of the high-frequency tuner (Tuner) is still 3840MHz, the TV signal frequency and the high-frequency tuner (Tuner) local oscillator frequency. After mixing, the obtained non-zero intermediate frequency signal (intermediate frequency signal with a non-zero value) is an intermediate frequency signal centered at 4 MHz (difference between 3844 MHz and 3840 MHz). When the bandwidth of the filter is 21MHz (megahertz), if the IF signal is not processed, the IF signal is input to the demodulator (Demodulator, DEMO) for demodulation. At this time, signal loss may occur, resulting in mosaic. Or you can't lock the channel. In this embodiment, before the intermediate frequency signal is input to the DEMO, the frequency discriminating circuit can determine whether the frequency of the television signal and the local oscillator frequency of the high frequency tuner have a frequency offset, and in the case of frequency offset, the frequency discrimination is performed. The adjustment level of the circuit output is filtered by the filter and input to the Voltage Controlled Oscillator (VCO) controlled by the CPU. After the VCO generates the oscillation frequency, the CPU controls the high-frequency tuner chip pair through the IIC communication protocol. The oscillation frequency is divided to obtain the adjustment frequency of 3841MHz, 3842MHz, 3843MHz, and 3844MHz. When the adjustment frequency is 3844MHz, the local oscillator frequency of the mixed high frequency tuner (Tuner) is also 3844MHz, and the frequency and height of the TV signal are high. The tuner frequency of the tuner is mixed to generate a zero-IF signal, and the zero-IF signal is input to the DEMO for demodulation, thereby avoiding the problem of mosaic or locking the channel due to the offset of the frequency of the front-end television signal. Get a good channel reception.

In summary, when the zero-IF signal is generated after the TV signal frequency is mixed with the local oscillator frequency of the high-frequency tuner, the zero-IF signal is input to the demodulator for demodulation; in the frequency of the television signal and the high-frequency tuner When the IF frequency is mixed and the non-zero IF signal is generated, the IF signal can be sequentially passed through the frequency discrimination circuit, the filter filter, and the oscillator frequency division to obtain the same adjustment frequency as the TV signal frequency. Frequency as the local oscillator frequency of the new high-frequency tuner, the non-zero IF signal generated by mixing the local oscillator frequency of the new high-frequency tuner with the TV signal frequency enters the demodulator for demodulation, which solves the problem because the front-end television signal The frequency of the offset caused by the mosaic or the problem of locking the channel, achieved good channel reception.

The following is an embodiment of a processing system for frequency offset of a television signal. The embodiment of the processing system for frequency offset of the television signal is implemented based on an embodiment of the processing method for frequency offset of the television signal, in which the frequency of the television signal is shifted. For an exhaustive description of the embodiment of the processing system, please refer to the above-described embodiment of the processing method for the frequency offset of the television signal.

Figure 5 is a block diagram showing the circuit configuration of a processing system for frequency offset of a television signal. As shown in FIG. 5, the system includes a high frequency tuner mixing circuit 510, a frequency discriminating circuit 520, a filter circuit 530, a voltage controlled oscillation circuit 540, and a high frequency tuner chip 550.

The high frequency tuner mixing circuit 510 receives the television signal frequency, mixes the television signal frequency with the local oscillator frequency of the high frequency tuner, generates an intermediate frequency signal, and outputs the intermediate frequency signal to the frequency discriminating circuit 520.

The frequency discerning circuit 520 receives the intermediate frequency signal, acquires a frequency difference between the intermediate frequency signal and the zero intermediate frequency signal, obtains an adjustment level according to the frequency difference, and outputs an adjustment level to the filter circuit 530.

The frequency discriminating circuit 520 can also receive the intermediate frequency signal, compare the frequency of the intermediate frequency signal with the frequency of the zero intermediate frequency signal, obtain a frequency difference, obtain an adjustment level according to the frequency difference, and output to the filter circuit. The adjustment level.

Optionally, when the frequency difference is positive, a positive adjustment voltage is obtained; and when the frequency difference is negative, a negative adjustment voltage is obtained.

Optionally, the frequency discrimination chip of the frequency discrimination circuit is an AD9901 chip.

The filter circuit 530 receives the adjustment level, filters the adjustment level to obtain a DC level, and outputs a DC level to the voltage controlled oscillation circuit 540.

The voltage-controlled oscillation circuit 540 receives the DC level, generates an oscillation frequency based on the DC level, and outputs the oscillation frequency to the high-frequency tuner chip 550.

Optionally, the voltage controlled oscillator of the voltage controlled oscillator circuit is an MC1648 oscillator.

The high frequency tuner chip 550 divides the oscillation frequency to obtain an adjustment frequency, and uses the adjustment frequency as a local oscillation frequency of the high frequency tuner in the mixing.

The system can also include an output circuit that outputs the intermediate frequency signal to the demodulator when the frequency difference is zero.

In this embodiment, the high frequency tuner mixing circuit 510 receives the frequency of the television signal, mixes the frequency of the television signal with the local oscillator frequency of the high frequency tuner, generates an intermediate frequency signal, and outputs the intermediate frequency to the frequency discriminating circuit. a signal; the frequency discriminating circuit 520 receives the intermediate frequency signal, obtains a frequency difference between the intermediate frequency signal and the zero intermediate frequency signal, obtains an adjustment level according to the frequency difference, and outputs an adjustment level to the filter circuit; the filter circuit 530 receives Up to the adjustment level, filtering the adjustment level to obtain a DC level, and outputting a DC level to the voltage controlled oscillation circuit; the voltage control oscillation circuit 540 receives the DC level, generates an oscillation frequency according to the DC level, and tunes to the high frequency. The oscillator chip outputs the oscillation frequency; the high frequency tuner chip 550 divides the oscillation frequency to obtain an adjustment frequency, and uses the adjustment frequency as a local oscillation frequency of the mixed high frequency tuner. Before the IF signal enters the demodulator (Demodulator, DEMO), the frequency discriminating circuit, the filtering circuit filtering, and the voltage controlled oscillator frequency division can be sequentially performed, thereby realizing the high frequency tuner when the frequency of the television signal frequency is shifted. (Tuner) The local oscillator frequency is also shifted along with the TV signal frequency, so that the frequency offset value of the high frequency tuner (Tuner) local oscillator frequency is the same as the frequency offset value of the TV signal frequency, and the frequency received by the television receiving system is realized. There is no deviation, the program is quickly locked, and good reception results are obtained, which improves the user experience.

Industrial applicability

The processing method and system for the frequency offset of the television signal realize that when the frequency of the television signal frequency is shifted, the local oscillator frequency of the high frequency tuner is shifted along with the frequency of the television signal, and the frequency offset of the local oscillator frequency is The frequency offset of the TV signal frequency is the same, so that the frequency received by the television receiving system is not deviated, a good receiving effect is obtained, and the user experience is improved.

Claims

A method for processing a frequency offset of a television signal, comprising:

Mixing the frequency of the television signal with the local oscillator frequency of the high frequency tuner to generate an intermediate frequency signal;

Inputting the intermediate frequency signal into the frequency discriminating circuit, acquiring a frequency difference between the intermediate frequency signal and the zero intermediate frequency signal, and outputting an adjustment level according to the frequency difference;

Filtering the adjustment level to obtain a DC level;

Inputting the DC level into a voltage controlled oscillation circuit to generate an oscillation frequency;

The oscillation frequency is divided to obtain an adjustment frequency, and the adjustment frequency is used as a local oscillation frequency of the high frequency tuner in the mixing.
The method of claim 1, wherein the obtaining a frequency difference between the intermediate frequency signal and the zero intermediate frequency signal comprises:

Comparing the frequency of the intermediate frequency signal with the frequency of the zero intermediate frequency signal to obtain a frequency difference.
The method of claim 2, wherein the outputting the adjustment level according to the frequency difference comprises:

Outputting a positive adjustment level when the frequency difference is positive;

When the frequency difference is negative, a negative adjustment level is output.
The method of claim 2, after the obtaining the frequency difference, the method further comprises:

When the frequency difference is zero, the intermediate frequency signal is output to a demodulator.
The method of claim 1, wherein said dividing said oscillating frequency comprises: dividing, by said central processor, a frequency divider of a high frequency tuner by an internal integrated circuit communication protocol to divide said oscillating frequency frequency.
The method of claim 1 wherein the frequency discrimination chip of the frequency discrimination circuit is an AD9901 chip;

The voltage controlled oscillator of the voltage controlled oscillation circuit is an MC1648 oscillator.
A processing system for frequency offset of a television signal, comprising:

The high frequency tuner mixing circuit is configured to receive the frequency of the television signal, mix the frequency of the television signal with the local oscillator frequency of the high frequency tuner, generate an intermediate frequency signal, and output the intermediate frequency signal to the frequency discriminating circuit;

a frequency discriminating circuit configured to receive the intermediate frequency signal, obtain a frequency difference between the intermediate frequency signal and the zero intermediate frequency signal, obtain an adjustment level according to the frequency difference, and output an adjustment level to the filter circuit;

a filter circuit configured to receive the adjustment level, filter the adjustment level, obtain a DC level, and output a DC level to the voltage controlled oscillation circuit;

a voltage controlled oscillation circuit configured to receive the DC level, generate an oscillation frequency according to a DC level, and output the oscillation frequency to a high frequency tuner chip;

The high frequency tuner chip is arranged to divide the oscillation frequency to obtain an adjustment frequency, and the adjustment frequency is used as a local oscillation frequency of the high frequency tuner in the mixing.
The system of claim 7 wherein said frequency discriminating circuit is configured to:

Receiving the intermediate frequency signal, comparing the frequency of the intermediate frequency signal with the frequency of the zero intermediate frequency signal to obtain a frequency difference value, and obtaining an adjustment level according to the frequency difference, and outputting the adjustment level to the filter circuit.
The system of claim 8 wherein said determining an adjustment level based on said frequency difference comprises:

When the frequency difference is positive, a positive adjustment voltage is obtained;

When the frequency difference is negative, a negative adjustment voltage is obtained.
The system of claim 8 further comprising:

An output circuit configured to output the intermediate frequency signal to a demodulator when the frequency difference is zero; wherein

The frequency discrimination chip of the frequency discrimination circuit is an AD9901 chip;

The voltage controlled oscillator of the voltage controlled oscillation circuit is an MC1648 oscillator.