WO2017197744A1 - 电源控制系统及具有该电源控制系统的显示面板 - Google Patents

电源控制系统及具有该电源控制系统的显示面板 Download PDF

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WO2017197744A1
WO2017197744A1 PCT/CN2016/089663 CN2016089663W WO2017197744A1 WO 2017197744 A1 WO2017197744 A1 WO 2017197744A1 CN 2016089663 W CN2016089663 W CN 2016089663W WO 2017197744 A1 WO2017197744 A1 WO 2017197744A1
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Prior art keywords
driving
control system
signal
power
voltage
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English (en)
French (fr)
Inventor
黎云涛
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Priority to US15/300,950 priority Critical patent/US10262619B2/en
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3696—Generation of voltages supplied to electrode drivers
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/021—Power management, e.g. power saving
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2370/00—Aspects of data communication
    • G09G2370/14—Use of low voltage differential signaling [LVDS] for display data communication

Definitions

  • the present invention relates to the field of power supply control, and in particular, to a power control system and a display panel having the power control system.
  • the liquid crystal panel is popular among people because of its small size, light weight and superior display quality.
  • the circuit drive system of the liquid crystal panel includes a timer controller (TCON IC), a driver integrated chip (Driver IC), a power manager (PWN IC), and a programmable gamma correction buffer circuit integrated chip (P-Gamma IC), a timer
  • the controller outputs a video signal to the driving integrated chip
  • the power manager outputs a voltage to the driving integrated chip and the programmable gamma correction buffer circuit integrated chip
  • the timer controller and the power manager independently output, and the video data needs to be output before output.
  • Decoding it is easy to cause the time difference between the video data output by the timer controller and the voltage output by the power manager is sometimes large, and a black screen appears on the display panel, giving the user a feeling that the display panel is abnormal.
  • the present invention provides a power supply control system that reduces the output time difference between video data and voltage, and a display panel having the power supply control system.
  • the invention provides a power supply control system for a driving circuit of a display panel, the power control system comprising a timer controller, a power manager and a driving circuit, the timer controller is configured to receive the first video signal and read Sending a read completion signal to the power manager after successfully decoding the decoding code of the first video signal, the power manager is configured to send the first driving voltage and the second driving after receiving the read completion signal A voltage is applied to the drive circuit.
  • timer controller is further configured to send the second video signal and the timing control signal to the driving circuit after decoding the first video signal according to the decoding code.
  • the first video signal is an LVDS signal
  • the second video signal is a Mini-LVDS signal.
  • the driving circuit includes a source driving integrated chip and a gate driving integrated chip, and the source driving integrated chip is configured to receive the Mini-LVDS signal and the first driving voltage, and the gate driving integration The chip is configured to receive the second driving voltage and the timing control signal.
  • the power control system further includes a programmable gamma correction buffer circuit integrated chip, and the programmable gamma correction buffer circuit integrated chip is configured to receive a first driving voltage sent by the power controller and output a gamma voltage The integrated chip is driven to the source.
  • the first driving voltage is a VAA voltage
  • the second driving voltage is a VGH voltage
  • the power control system further includes a memory, and the decoding code is stored in the memory.
  • timer controller further includes a POWER ON control pin for transmitting the read completion signal to the power manager.
  • the timer controller is configured to switch the potential of the POWER ON control pin from a low level to a high level after reading the decoding code successfully and before outputting the second video signal to complete Transmitting the read completion signal
  • the power manager is configured to send the first driving voltage and the second driving voltage to the driving circuit after receiving the reading completion signal of the high level
  • the present invention also provides a display panel comprising the above-described power supply control system.
  • the timer controller sends a read completion signal to the power manager after reading the decoding code successfully, and the power manager sends the driving voltage to the read completion signal
  • the drive circuit effectively reduces the time difference between the video data output by the timer controller and the voltage output by the power manager.
  • FIG. 1 is a system block diagram of a preferred embodiment of a power control system for a display panel of the present invention.
  • FIG. 2 is another system block diagram of a preferred embodiment of a power control system for a display panel of the present invention.
  • a preferred embodiment of the power control system of the display panel of the present invention includes a timer controller 10, a power manager 20, a driving circuit 30, a programmable gamma correction buffer circuit integrated chip 40, and a memory 50.
  • the driving circuit 30 includes a source driver integrated chip (Source Driver IC) 31 and a gate driver integrated chip (Gate Driver IC) 33
  • the memory 50 is an erasable programmable read only memory.
  • the memory 50 stores a decoding code.
  • the timer controller 10 After receiving the first video signal, the timer controller 10 reads the decoding code from the memory 50 and sends a read completion signal to the power manager 20, and then the power manager 20 sends the first The driving voltage and the second driving voltage are respectively supplied to the source driving integrated chip 31 and the gate driving integrated chip 33.
  • the timer controller 10 decodes the first video signal according to the decoding code after transmitting the read completion signal to the power manager 20, and outputs the second video signal and the timing control signal after decoding.
  • the source drives the integrated chip 31.
  • the first video signal is an LVDS signal
  • the second video signal is a mini-LVDS signal
  • the first driving voltage is a VAA voltage
  • the second driving voltage is a VGH voltage.
  • the programmable gamma correction buffer circuit integrated chip 40 receives the first driving voltage sent by the power controller and outputs a gamma voltage to the source driving integrated chip 31.
  • the gate driving integrated chip 32 controls imaging of the display panel according to the timing control signal and the VGH voltage.
  • a POWER ON control pin (not shown) may be added to the timer controller 10, and when the timer controller 10 reads the decoded code from the memory 50 successfully, Before outputting the second video signal, the timer controller 10 switches the potential of the POWER ON control pin from a low level to a high level to complete the transmission of the read completion signal. After receiving the high-level read completion signal, the power manager 20 transmits the first driving voltage and the second driving voltage to the source driving integrated chip 31 and the gate driving integrated chip 33, respectively.
  • the power of the display panel system is controlled by the timer controller 10 to ensure that the video signal and the power supply driving voltage can be output in a preset order, thereby reducing the timer controller 10 and the power manager 20 in the prior art. Because the output is completed independently, and the time interval between the two output signals is large, the abnormal situation such as the loss of the screen at the startup time or the black screen for a long time occurs.
  • the timer controller 10 sends a read completion signal to the power manager 20 after successfully reading the decoding code from the memory 50, and the power manager 20 receives the read.
  • the drive voltage is transmitted to the drive circuit 30 after the completion signal is taken, thereby effectively shortening the time difference between the video data output by the timer controller and the voltage output by the power manager.

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Controls And Circuits For Display Device (AREA)

Abstract

一种显示面板及所述显示面板的驱动电路（30）的电源控制系统，所述电源控制系统包括定时器控制器（10）、电源管理器（20）及驱动电路（30），所述定时器控制器（10）用于在接收第一视频信号并在读取用于解码所述第一视频信号的解码代码成功后发送读取完成信号给所述电源管理器（20），所述电源管理器（20）用于在接收所述读取完成信号后发送第一驱动电压及第二驱动电压给所述驱动电路（30）。所述电源控制系统降低了视频信号与电压信号输出的时间差，避免了黑屏问题。

Description

电源控制系统及具有该电源控制系统的显示面板 技术领域
本发明涉及电源控制领域，尤其涉及一种电源控制系统及具有该电源控制系统的显示面板。
背景技术
液晶面板因其体积小，重量轻，显示质量优越而深受人们的喜爱。液晶面板的电路驱动系统包括定时器控制器(TCON IC)、驱动集成芯片(Driver IC)、电源管理器(PWN IC)及可编程伽玛校正缓冲电路集成芯片(P-Gamma IC)，定时器控制器输出视频信号给驱动集成芯片，电源管理器输出电压给所述驱动集成芯片及可编程伽玛校正缓冲电路集成芯片，由于定时器控制器和电源管理器独立输出，且视频数据输出前需要解码，容易造成定时器控制器输出的视频数据与电源管理器输出的电压存在时间差有时比较大，显示面板会出现黑画面，给用户感觉显示面板有异常。
发明内容
为克服现有技术的不足，本发明提供一种减少视频数据与电压之间的输出时间差的电源控制系统及具有该电源控制系统的显示面板。
本发明提供一种显示面板的驱动电路的电源控制系统，所述电源控制系统包括定时器控制器、电源管理器及驱动电路，所述定时器控制器用于在接收第一视频信号并在读取用于解码所述第一视频信号的解码代码成功后发送读取完成信号给所述电源管理器，所述电源管理器用于在接收所述读取完成信号后发送第一驱动电压及第二驱动电压给所述驱动电路。
进一步地，所述定时器控制器还用于根据所述解码代码解码所述第一视频信号后发送第二视频信号及时序控制信号给所述驱动电路。
进一步地，所述第一视频信号为LVDS信号，所述第二视频信号为Mini-LVDS信号。
进一步地，所述驱动电路包括源极驱动集成芯片及栅极驱动集成芯片，所述源极驱动集成芯片用于接收所述Mini-LVDS信号及所述第一驱动电压，所述栅极驱动集成芯片用于接收所述第二驱动电压及所述时序控制信号。
进一步地，所述电源控制系统还包括可编程伽玛校正缓冲电路集成芯片，所述可编程伽玛校正缓冲电路集成芯片用于接收所述电源控制器发送的第一驱动电压而输出伽玛电压给所述源极驱动集成芯片。
进一步地，所述第一驱动电压为VAA电压，所述第二驱动电压为VGH电压。
进一步地，所述电源控制系统还包括存储器，所述解码代码存储于所述存储器中。
进一步地，所述定时器控制器还包括用于向所述电源管理器发送所述读取完成信号的POWER ON控制引脚。
进一步地，所述定时器控制器用于在读取所述解码代码成功后且在输出所述第二视频信号之前将所述POWER ON控制引脚的电位由低电平切换为高电平以完成所述读取完成信号的发送，所述电源管理器用于在接收到所述高电平的读取完成信号后，再发送所述第一驱动电压及所述第二驱动电压给所述驱动电路
本发明还提供了一种显示面板，所述显示面板包括上述的电源控制系统。
本发明的有益效果：所述定时器控制器读取解码代码成功后发送读取完成信号给所述电源管理器，所述电源管理器在收到所述读取完成信号后再发送驱动电压给所述驱动电路，从而有效地缩短了定时器控制器输出的视频数据与电源管理器输出的电压之间的时间差。
附图说明
图1为本发明显示面板的电源控制系统较佳实施方式的系统框图。
图2为本发明显示面板的电源控制系统较佳实施方式的另一系统框图。
具体实施方式
下面，将结合附图对本发明各实施例作详细介绍。
请参阅图1及图2，本发明显示面板的电源控制系统较佳实施方式包括定时器控制器10、电源管理器20、驱动电路30、可编程伽玛校正缓冲电路集成芯片40及存储器50。在本实施例中，所述驱动电路30包括源极驱动集成芯片(Source Driver IC)31及栅极驱动集成芯片(Gate Driver IC)33，所述存储器50为可擦可编程只读存储器，所述存储器50存储有解码代码。
所述电源管理器20上电后及时提供各个部件的3.3V的直流电压而使个部件处于工作状态，另外还直接提供VGL电压给所述栅极驱动集成芯片33。所述定时器控制器10在接收第一视频信号后，从所述存储器50中读取解码代码成功后发送读取完成信号给所述电源管理器20，然后所述电源管理器20发送第一驱动电压及第二驱动电压分别给所述源极驱动集成芯片31及所述栅极驱动集成芯片33。所述定时器控制器10在发送读取完成信号给所述电源管理器20后再根据所述解码代码对所述第一视频信号进行解码，解码完后输出第二视频信号及时序控制信号给所述源极驱动集成芯片31。在本实施例中，所述第一视频信号为LVDS信号，所述第二视频信号为mini-LVDS信号，所述第一驱动电压为VAA电压，所述第二驱动电压为VGH电压。所述可编程伽玛校正缓冲电路集成芯片40接收所述电源控制器发送的第一驱动电压而输出伽玛(Gamma)电压给所述源极驱动集成芯片31。
所述栅极驱动集成芯片32根据所述时序控制信号及所述VGH电压控制所述显示面板的成像。
具体来说，可在定时器控制器10中增设一个POWER ON控制引脚(图未示)，当所述定时器控制器10从所述存储器50中读取解码代码成功后，并在准 备输出第二视频信号之前，所述定时器控制器10将POWER ON控制引脚的电位由低电平切换为高电平以完成读取完成信号的发送。所述电源管理器20接收到该高电平的读取完成信号后，再发送第一驱动电压及第二驱动电压分别给所述源极驱动集成芯片31及所述栅极驱动集成芯片33。在本发明中，显示面板系统的电源由定时器控制器10来掌控，确保视频信号、电源驱动电压能按照预设的顺序输出，从而减少现有技术中定时器控制器10和电源管理器20因各自独立完成输出，且两者输出信号的时间点之间间隔较大，而导致的开机时刻丢失画面或者长时间显示黑画面等异常情况的发生。
在本实施例中，所述定时器控制器10从所述存储器50中读取解码代码成功后发送读取完成信号给所述电源管理器20，所述电源管理器20在收到所述读取完成信号后再发送驱动电压给所述驱动电路30，从而有效地缩短了定时器控制器输出的视频数据与电源管理器输出的电压之间的时间差。
虽然已经参照特定实施例示出并描述了本发明，但是本领域的技术人员将理解：在不脱离由权利要求及其等同物限定的本发明的精神和范围的情况下，可在此进行形式和细节上的各种变化。

Claims (18)

  1. 一种显示面板的驱动电路的电源控制系统，其中，所述电源控制系统包括定时器控制器、电源管理器及用于驱动显示面板成像的驱动电路，所述定时器控制器用于在接收第一视频信号并在读取用于解码所述第一视频信号的解码代码成功后发送读取完成信号给所述电源管理器，所述电源管理器用于在接收所述读取完成信号后发送第一驱动电压及第二驱动电压给所述驱动电路。
  2. 根据权利要求1所述的电源控制系统，其中，所述定时器控制器还用于根据所述解码代码解码所述第一视频信号后发送第二视频信号及时序控制信号给所述驱动电路。
  3. 根据权利要求2所述的电源控制系统，其中，所述第一视频信号为LVDS信号，所述第二视频信号为Mini-LVDS信号。
  4. 根据权利要求3所述的电源控制系统，其中，所述驱动电路包括源极驱动集成芯片及栅极驱动集成芯片，所述源极驱动集成芯片用于接收所述Mini-LVDS信号及所述第一驱动电压，所述栅极驱动集成芯片用于接收所述第二驱动电压及所述时序控制信号。
  5. 根据权利要求4所述的电源控制系统，其中，所述电源控制系统还包括可编程伽玛校正缓冲电路集成芯片，所述可编程伽玛校正缓冲电路集成芯片用于接收所述电源控制器发送的第一驱动电压而输出伽玛电压给所述源极驱动集成芯片。
  6. 根据权利要求1所述的电源控制系统，其中，所述第一驱动电压为VAA电压，所述第二驱动电压为VGH电压。
  7. 根据权利要求1所述的电源控制系统，其中，所述电源控制系统还包括存储器，所述解码代码存储于所述存储器中。
  8. 根据权利要求1所述的电源控制系统，其中，所述定时器控制器还包括用于向所述电源管理器发送所述读取完成信号的POWER ON控制引脚。
  9. 根据权利要求8所述的电源控制系统，其中，所述定时器控制器用于在读取所述解码代码成功后且在输出所述第二视频信号之前将所述POWER ON控制引脚的电位由低电平切换为高电平以完成所述读取完成信号的发送，所述电源管理器用于在接收到所述高电平的读取完成信号后，再发送所述第一驱动电压及所述第二驱动电压给所述驱动电路。
  10. 一种显示面板，其中，所述显示面板包括驱动电路的电源控制系统，所述电源控制系统包括定时器控制器、电源管理器及用于驱动显示面板成像的驱动电路，所述定时器控制器用于在接收第一视频信号并在读取用于解码所述第一视频信号的解码代码成功后发送读取完成信号给所述电源管理器，所述电源管理器用于在接收所述读取完成信号后发送第一驱动电压及第二驱动电压给所述驱动电路。
  11. 根据权利要求10所述的显示面板，其特征在于，所述定时器控制器还用于根据所述解码代码解码所述第一视频信号后发送第二视频信号及时序控制信号给所述驱动电路。
  12. 根据权利要求11所述的显示面板，其中，所述第一视频信号为LVDS信号，所述第二视频信号为Mini-LVDS信号。
  13. 根据权利要求12所述的显示面板，其中，所述驱动电路包括源极驱动集成芯片及栅极驱动集成芯片，所述源极驱动集成芯片用于接收所述Mini-LVDS信号及所述第一驱动电压，所述栅极驱动集成芯片用于接收所述第二驱动电压及所述时序控制信号。
  14. 根据权利要求13所述的显示面板，其中，所述电源控制系统还包括可编程伽玛校正缓冲电路集成芯片，所述可编程伽玛校正缓冲电路集成芯片用于接收所述电源控制器发送的第一驱动电压而输出伽玛电压给所述源极驱动集成芯片。
  15. 根据权利要求10所述的显示面板，其中，所述第一驱动电压为VAA电压，所述第二驱动电压为VGH电压。
  16. 根据权利要求10所述的显示面板，其中，所述电源控制系统还包括存储器，所述解码代码存储于所述存储器中。
  17. 根据权利要求10所述的显示面板，其中，所述定时器控制器还包括用于向所述电源管理器发送所述读取完成信号的POWER ON控制引脚。
  18. 根据权利要求17所述的显示面板，其中，所述定时器控制器用于在读取所述解码代码成功后且在输出所述第二视频信号之前将所述POWER ON控制引脚的电位由低电平切换为高电平以完成所述读取完成信号的发送，所述电源管理器用于在接收到所述高电平的读取完成信号后，再发送所述第一驱动电压及所述第二驱动电压给所述驱动电路。
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Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2020056924A (ja) * 2018-10-02 2020-04-09 株式会社ジャパンディスプレイ 表示装置
CN109345991A (zh) * 2018-12-14 2019-02-15 惠科股份有限公司 显示驱动方法、显示驱动装置和显示装置
CN109712555A (zh) * 2019-02-25 2019-05-03 合肥京东方显示技术有限公司 控制电路板、附加电路板及显示装置
CN115313813B (zh) * 2022-08-25 2024-10-01 新誉集团有限公司 一种驱动电压的控制方法、装置、设备及介质

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120146977A1 (en) * 2010-12-09 2012-06-14 Ming Han Tsai Working voltage switching system for liquid crystal panel and switching method thereof
CN102789769A (zh) * 2012-07-05 2012-11-21 青岛海信电器股份有限公司 3d液晶显示驱动方法及3d液晶显示系统
CN102810301A (zh) * 2011-06-02 2012-12-05 青岛海信电器股份有限公司 液晶显示器和控制液晶显示器像素电压的极性变换的方法
US20130127815A1 (en) * 2011-11-18 2013-05-23 Myoung-Hwan Yoo Display device and driving method thereof
CN204315216U (zh) * 2014-12-11 2015-05-06 江苏奥斯汀光电科技有限公司 一种高清液晶屏架构
CN204596392U (zh) * 2014-12-11 2015-08-26 江苏奥斯汀光电科技有限公司 一种cog模式的液晶屏架构

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100580755C (zh) * 2004-04-07 2010-01-13 友达光电股份有限公司 集成显示模块
KR100727115B1 (ko) * 2005-09-22 2007-06-12 엘지전자 주식회사 전원제어방법 및 영상표시기기
CN100362560C (zh) * 2005-10-10 2008-01-16 深圳创维－Rgb电子有限公司 液晶电视开机时序控制方法
US7705841B2 (en) * 2006-01-20 2010-04-27 Novatek Microelectronics Corp. Display system and method for embeddedly transmitting data signals, control signals, clock signals and setting signals
CN200997263Y (zh) * 2006-10-21 2007-12-26 中国电子科技集团公司第三十八研究所 液晶显示驱动系统
KR101325982B1 (ko) * 2006-11-22 2013-11-07 엘지디스플레이 주식회사 액정표시장치 및 이의 구동방법
CN102074207B (zh) * 2009-11-20 2013-02-06 群康科技(深圳)有限公司 液晶显示器
CN201812478U (zh) * 2010-09-17 2011-04-27 清远市佳的美电子科技有限公司 液晶屏显示驱动系统及其柔性电路板

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120146977A1 (en) * 2010-12-09 2012-06-14 Ming Han Tsai Working voltage switching system for liquid crystal panel and switching method thereof
CN102810301A (zh) * 2011-06-02 2012-12-05 青岛海信电器股份有限公司 液晶显示器和控制液晶显示器像素电压的极性变换的方法
US20130127815A1 (en) * 2011-11-18 2013-05-23 Myoung-Hwan Yoo Display device and driving method thereof
CN102789769A (zh) * 2012-07-05 2012-11-21 青岛海信电器股份有限公司 3d液晶显示驱动方法及3d液晶显示系统
CN204315216U (zh) * 2014-12-11 2015-05-06 江苏奥斯汀光电科技有限公司 一种高清液晶屏架构
CN204596392U (zh) * 2014-12-11 2015-08-26 江苏奥斯汀光电科技有限公司 一种cog模式的液晶屏架构

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