WO2017189241A1 - Composant rf de forte puissance pour aptitude à la fabrication améliorée - Google Patents

Composant rf de forte puissance pour aptitude à la fabrication améliorée Download PDF

Info

Publication number
WO2017189241A1
WO2017189241A1 PCT/US2017/027298 US2017027298W WO2017189241A1 WO 2017189241 A1 WO2017189241 A1 WO 2017189241A1 US 2017027298 W US2017027298 W US 2017027298W WO 2017189241 A1 WO2017189241 A1 WO 2017189241A1
Authority
WO
WIPO (PCT)
Prior art keywords
component
conductive trace
dielectric layer
layer
dielectric
Prior art date
Application number
PCT/US2017/027298
Other languages
English (en)
Inventor
Michael Len
Hans Peter Ostergaard
Original Assignee
Anaren, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Anaren, Inc. filed Critical Anaren, Inc.
Publication of WO2017189241A1 publication Critical patent/WO2017189241A1/fr

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01PWAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P1/00Auxiliary devices
    • H01P1/30Auxiliary devices for compensation of, or protection against, temperature or moisture effects ; for improving power handling capability
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01PWAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P5/00Coupling devices of the waveguide type
    • H01P5/12Coupling devices having more than two ports
    • H01P5/16Conjugate devices, i.e. devices having at least one port decoupled from one other port
    • H01P5/18Conjugate devices, i.e. devices having at least one port decoupled from one other port consisting of two coupled guides, e.g. directional couplers
    • H01P5/184Conjugate devices, i.e. devices having at least one port decoupled from one other port consisting of two coupled guides, e.g. directional couplers the guides being strip lines or microstrips
    • H01P5/187Broadside coupled lines
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01PWAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P3/00Waveguides; Transmission lines of the waveguide type
    • H01P3/02Waveguides; Transmission lines of the waveguide type with two longitudinal conductors
    • H01P3/08Microstrips; Strip lines
    • H01P3/081Microstriplines
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0201Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H05K1/0203Cooling of mounted components
    • H05K1/0204Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0237High frequency adaptations
    • H05K1/025Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance
    • H05K1/0251Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance related to vias or transitions between vias and transmission lines
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/115Via connections; Lands around holes or via connections

Definitions

  • the present invention relates generally to electrical components and, more particularly, to a coupler having improved power handling for RF and thermal bridge applications.
  • the power handling of a given RF device is limited by its heat dissipation capabilities.
  • typical RF devices include microstrip transmission lines, stripline transmission lines, and broadside stripline couplers disposed on microstrip printed circuit boards.
  • the heat dissipation characteristics of a given design depend on its configuration and the type of dielectric materials employed therein. If the thermal energy generated by an RF device is dissipated over a relatively small surface area, the heat will build up over time, become problematic and thus limit the power handling capabilities of the device.
  • the thermal energy conducted through a device or assembly can be described by the thermal resistance (R th )- Moreover, each element or component (e.g. conductor or dielectric layer) that the heat traverses or conducts through is characterized by a thermal resistance.
  • the power handling of a given RF device is limited by its heat dissipation capabilities and the power handling of the assembly is a function of the thermal resistance (R th ), ambient or mounting temperature, a maximum operating temperature and the dissipated power (in the conductor):
  • Dissipated power (P in )(l-10 "(1UiU ,
  • k is the Thermal Conductivity [W/mK] of the material that the heat is passing through
  • D is the Distance [m] of heat flow
  • A is the cross sectional area of the heat flow [m 2 ].
  • the maximum operating temperature is defined as the maximum temperature at which a material may be subjected to, that will not cause degradation of the material.
  • the present invention provides a system that reduces the number of thermal resistance elements when coupled to a printed circuit board and thus provides for improved thermal performance.
  • the invention comprises an electrical component having a first dielectric layer having a top and a bottom, a first conductive trace positioned on the bottom of the dielectric layer, and a first ground layer positioned on the bottom of the dielectric layer and spaced apart from the first conductive trace.
  • a first ground plane may be positioned on the top of the first dielectric layer.
  • a second ground layer may be positioned on the bottom of the first dielectric layer and spaced apart from the first conductive trace and the first ground layer.
  • the electrical component maybe a thermal bridge where the first dielectric layer has a high thermal conductivity and is formed from a ceramic material such as A1N or A1 2 0 3 .
  • the invention comprises an electrical component having a first dielectric layer having a top and a bottom, a first conductive trace positioned on the bottom of the dielectric layer, a first ground layer positioned on the bottom of the dielectric layer and spaced apart from the first conductive trace, a second conductive trace positioned on top of first dielectric, and a second dielectric positioned on top of the second conductive trace.
  • a second ground plane may be positioned on top of the second dielectric.
  • This structure may then be attached to a printed circuit board having a third conductive trace that is coupled to the first conductive trace by a first solder layer.
  • the printed circuit board may include a second ground layer spaced apart from the third conductive trace and coupled to the first ground layer by a second solder layer.
  • the printed circuit board may further include a third dielectric layer supporting the third conductive trace and a second ground plane positioned on an opposing side of the third dielectric layer.
  • the printed circuit board may further include at least one interconnection via formed through the third dielectric layer.
  • This embodiment may comprise a RF device where the third conductive trace comprises a transmission line and the first conductive trace is wider than the transmission line or the first conductive trace is narrower than the transmission line.
  • a set of ground vias may be positioned on either side of the transmission line.
  • the printed circuit board may further include signal contact regions coupled to device pads associated with the first conductive trace.
  • FIG. 1 is a cross-sectional view of a broadside coupled coupler assembly in accordance with an embodiment of the present invention
  • FIG. 2 is a diagrammatic depiction of the thermal dissipation path for the broadside coupler assembly depicted in FIG. 1
  • FIG. 3 is a chart comparing the thermal performance of the broadside coupler assembly of FIG. 1 of the present invention to conventional assemblies;
  • FIG. 4 is an isometric view of a broadside coupler assembly in accordance with the present invention.
  • FIG. 5 is a top exploded view of the broadside coupler assembly in accordance with the present invention.
  • FIG. 6 is a bottom exploded view of the broadside coupler assembly in accordance with the present invention.
  • FIG. 7 is an exploded view of a transmission line assembly in accordance with an embodiment of the present invention.
  • FIG. 8 is an exploded view of a broadside coupler in accordance with another embodiment of the present invention.
  • FIG. 9 is a plan view of a broadside coupler assembly in accordance with a further embodiment of the present invention.
  • FIG. 10 is an exploded view of a thermal bridge in accordance with another embodiment of the present invention.
  • FIG. 11 is an exploded view of a thermal bridge in accordance with a further embodiment of the present invention.
  • FIG. 12 is an exploded view of a thermal bridge in accordance with an embodiment of the invention.
  • FIG. 13 is an exploded view of a thermal bridge in accordance with an embodiment of the invention.
  • FIG. 1 a cross-sectional view of a broadside coupled coupler assembly 100 having an electrical component 10 configured as a broadside coupler mounted to a printer circuit board (PCB) 20 according to the present invention.
  • Coupler 10 is configured to be adapted to the form factor of PCB 20 to eliminate superfluous thermal resistance layers and improve the thermal dissipation properties and the power handling capabilities of assembly 100.
  • Coupler 10 differs from conventional broadside couplers in that coupler 10 contains approximately "two-thirds" of the typical structure and is instead configured according to the present invention so that PCB 20 provides the remaining structure required to form a complete coupler.
  • Coupler 10 includes a top conductive trace 14 and a bottom conductive tract
  • Coupler 10 is mounted on PCB 20 so that bottom conductive trace 16 is electrically and mechanically coupled to a conductive trace 28 of PCB 20 by a solder layer 30. Bottom ground layers 24a and 24b of coupler 10 are coupled to an upper ground layer 32 of PCB 20 by corresponding layers of solder 34a and 34b.
  • PCB 20 includes another ground layer 36 disposed on the side of a dielectric layer 38 from ground layer 32.
  • PCB 20 may further include interconnection vias 40 formed in the interior of dielectric layer 38 to serve as ground vias or signal vias as needed.
  • the thermal dissipation path (P T ) for coupler assembly 100 of FIG. 1 extends upwardly through coupler 10 and downwardly through PCB 20.
  • the thermal energy dissipated by a given device or assembly can be expressed as function of the thermal resistance (R th ), which is defined by the following equation;
  • k is the Thermal Conductivity of the material that the heat is passing through
  • D is the Distance of heat flow
  • A is the cross sectional area of the heat flow.
  • the area (A) can be defined as the region under the PCB 20 and substantially within the thermal dissipation path (P T ). In other words, those skilled in the art will appreciate that the area does not necessarily correspond to the dashed line pattern of the thermal dissipation path (P T ).
  • FIG. 1 begins with bottom conductive trace 16 and includes the thermal resistance of solder layer 30, the thermal resistance of PCB conductive trace 28, the thermal resistance of dielectric layer 38, and the thermal resistance of ground layer 36.
  • the total thermal resistance of coupler assembly 100 is thus only nominally more than a conventional microstrip transmission line, which has the thermal resistance path also seen in FIG. 3, and significantly less than a conventional stripline component, also seen in FIG. 3.
  • broadside coupler assembly 100 has an additional, complementary thermal path that only further brings the total thermal conductivity closer to that of a conventional microstrip transmission line and even more significantly less than a
  • coupler 10 of the present invention is adapted to use the form factor of PCB 20, superfluous thermal resistance layers have been eliminated so that the thermal path for device 10 of the present invention is nearly identical to the thermal path for a microstrip transmission line and only one additional resistance component, i.e., solder 30.
  • solder 30 one additional resistance component
  • coupler 10 of the present invention may be demonstrated using an analysis of standard operating values as follows:
  • Coupler 10 1.6 69 109 204
  • coupler 10 will have a 40 percent or greater power handling increase (from 100 W to 144 W) over a conventional assembly.
  • Coupler 10 of FIG. 1 may be used in connection with various applications.
  • coupler 10 may be mounted on PCB 20 as described above to form an improved broadside coupled coupler assembly 100.
  • broadside coupler assembly 100 may be formed by disposing coupler 10 over the various requisite solder layers in order to provide the appropriate connections between related portions of coupler 10 and PCB 20. More specifically, ground layer 32 of PCB 20 has portions removed at predetermined regions to form dielectric regions 26 on either side of microstrip
  • a solder-connected region 48 provides connectivity with lower coupler trace 16 of coupler 10 via solder layer 30.
  • PCB 20 also includes signal contact regions 50 and 52 that are connected to device pads 54 and 56 via solder pads 58 and 60, respectively.
  • Solder layer 34 couple device ground layer 24 to ground layer 32 of PCB 20.
  • solder layer 30 connects to bottom conductive trace 16 on the underside of coupler 10.
  • Signal contact regions 50 and 52 are connected to device pads 54 and 56, respectively, via solder pads 58 and 60, respectively.
  • Solder layers 34a and 34b correspond to device ground layers 24a and 24b, respectively.
  • the lower device conductive trace 16 is connected to the microstrip transmission line 28 (not visible in this view) by solder layer 30.
  • component 10 of the present invention may be configured a transmission line assembly 200 in accordance with the present invention comprises ground plane 222 disposed over dielectric core 218.
  • a transmission line conductor 216 is disposed on the opposing side of core 218.
  • Transmission line conductor 216 is isolated from ground layers 224a and 224b as described above with respect to coupler 10.
  • FIG. 8 There is seen in FIG. 8 an exploded view of the broadside coupler 10. Trace
  • Coupler 14 is disposed between dielectric layers 18 and 20.
  • Dielectric layer 20 includes conductive ground plane 22 whereas conductive trace 16 is disposed on the underside (not shown in this view) of dielectric layer 18.
  • the direct and coupled traces of coupler 10 may be etched on the opposite sides of the core dielectric layer 18 to achieve the best layer-to-layer registration as preferred for consistent coupling.
  • Direct trace 14 of coupler 10 is wider than microstrip transmission line 28. Consequently, the coupling is a function of the layer-to-layer alignment of coupler 10 rather than the alignment of coupler 10 to microstrip transmission line 28.
  • Coupler 10 further includes a set of ground vias (PTHs) 70 on either side of the microstrip transmission line that improves both thermal and RF performance.
  • PTHs ground vias
  • a plan view of the broadside coupler assembly 100 illustrates that direct trace 16 of coupler 10 is wider than the microstrip transmission line 28. This view also shows trace 14 coupled to the signal outputs formed by device pads 54 and 56 and thus signal contact regions 50 and 52.
  • component 10 of the present invention may be configured for use as a thermal bridge with transmission line conductor 216 being wider than any microstrip transmission line 28 and dielectric core 218 comprising a material having high thermal conductivity, such as a ceramic (A1N or A1 2 0 3 ).
  • a ceramic A1N or A1 2 0 3
  • ground plane 222 disposed over dielectric core 218 may be omitted for this implementation, leaving dielectric core 218 as the uppermost surface.
  • component 10 may be dimensioned for use as a thermal bridge by reducing the overall length as compared to other embodiments of the invention.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Inorganic Chemistry (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

L'invention porte sur un composant électrique, tel qu'un dispositif radiofréquence (RF) ou un pont thermique, destiné à être utilisé avec une carte de circuit imprimé. Le composant comporte une première couche diélectrique ayant un dessus et un dessous, une première piste conductrice positionnée sur le dessous de la couche diélectrique, et une première couche de masse positionnée sur le dessous de la couche diélectrique et espacée de la première piste conductrice. Pour des applications RF, une deuxième piste conductrice est positionnée sur le dessus du premier diélectrique, un deuxième diélectrique est positionné au-dessus de la deuxième piste conductrice, et un deuxième plan de masse est positionné au-dessus du deuxième diélectrique. Une carte de circuit imprimé comportant une troisième piste conductrice peut ensuite être couplée à la première piste conductrice par une première couche de brasure.
PCT/US2017/027298 2016-04-26 2017-04-13 Composant rf de forte puissance pour aptitude à la fabrication améliorée WO2017189241A1 (fr)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US201662327839P 2016-04-26 2016-04-26
US62/327,839 2016-04-26
US201662388281P 2016-05-18 2016-05-18
US62/388,281 2016-05-18

Publications (1)

Publication Number Publication Date
WO2017189241A1 true WO2017189241A1 (fr) 2017-11-02

Family

ID=60160000

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2017/027298 WO2017189241A1 (fr) 2016-04-26 2017-04-13 Composant rf de forte puissance pour aptitude à la fabrication améliorée

Country Status (1)

Country Link
WO (1) WO2017189241A1 (fr)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5625169A (en) * 1994-07-04 1997-04-29 Murata Manufacturing Co., Ltd. Electronic parts with an electrode pattern between two dielectric substrates
WO2002061875A2 (fr) * 2000-11-09 2002-08-08 Merrimac Industries, Inc. Coupleurs en spirale
US20040037062A1 (en) * 2002-08-26 2004-02-26 Sweeney Richard Emil Low cost highly isolated RF coupler
US20040124943A1 (en) * 2002-12-31 2004-07-01 Mcnc Three dimensional multimode and optical coupling devices
US20120242423A1 (en) * 2011-03-23 2012-09-27 Rob Torsiello Integrated hybrid-direct couplers
US8969733B1 (en) * 2013-09-30 2015-03-03 Anaren, Inc. High power RF circuit

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5625169A (en) * 1994-07-04 1997-04-29 Murata Manufacturing Co., Ltd. Electronic parts with an electrode pattern between two dielectric substrates
WO2002061875A2 (fr) * 2000-11-09 2002-08-08 Merrimac Industries, Inc. Coupleurs en spirale
US20040037062A1 (en) * 2002-08-26 2004-02-26 Sweeney Richard Emil Low cost highly isolated RF coupler
US20040124943A1 (en) * 2002-12-31 2004-07-01 Mcnc Three dimensional multimode and optical coupling devices
US20120242423A1 (en) * 2011-03-23 2012-09-27 Rob Torsiello Integrated hybrid-direct couplers
US8969733B1 (en) * 2013-09-30 2015-03-03 Anaren, Inc. High power RF circuit

Similar Documents

Publication Publication Date Title
US6236572B1 (en) Controlled impedance bus and method for a computer system
US7457132B2 (en) Via stub termination structures and methods for making same
US10062942B2 (en) High-frequency transmission line
US10292257B2 (en) Cross-talk reduction for high speed signaling at ball grid array region and connector region
US7271348B1 (en) Providing decoupling capacitors in a circuit board
US20220247058A1 (en) High powered rf part for improved manufacturability
US20150229016A1 (en) Multi-layer transmission lines
US7224249B2 (en) Stripline structure with multiple ground vias separated by no more than 100 mil
JP2008258619A (ja) ラミネートキャパシタの配線構造
CN104871654B (zh) 电子基板及其接头连接的结构
US20060237228A1 (en) Printed circuit board having reduced parasitic capacitance pad
US20070152771A1 (en) Apparatus and method of via-stub resonance extinction
KR20100019342A (ko) 프린트 배선판
US7593235B2 (en) Thermal conduit
CN110506454B (zh) 基板间连接构造
US20220029262A1 (en) High powered rf part for improved manufacturability
US20070194434A1 (en) Differential signal transmission structure, wiring board, and chip package
US7907418B2 (en) Circuit board including stubless signal paths and method of making same
JP4830539B2 (ja) 多層プリント回路基板
EP2086295A2 (fr) Carte à circuit imprimé et procédé de fabrication correspondant
EP1349271B1 (fr) Circuit d'alimentation en tension continue comportant un filtre antiparasite
US10321555B1 (en) Printed circuit board based RF circuit module
US8841561B1 (en) High performance PCB
WO2017189241A1 (fr) Composant rf de forte puissance pour aptitude à la fabrication améliorée
JPWO2009119849A1 (ja) 複合配線基板

Legal Events

Date Code Title Description
NENP Non-entry into the national phase

Ref country code: DE

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 17720339

Country of ref document: EP

Kind code of ref document: A1

122 Ep: pct application non-entry in european phase

Ref document number: 17720339

Country of ref document: EP

Kind code of ref document: A1