WO2017166463A1 - Conversion circuit, heartbeat current signal conversion device and method, and heartbeat detection system - Google Patents

Abstract

A heartbeat current signal conversion device, comprising a converter for converting a modulated optical signal into a current signal and transmitting same; a mixer for performing frequency conversion of a heartbeat current signal and a background photocurrent signal in the current signal, and then transmitting the modulated photocurrent signal, the frequency-converted heartbeat current signal and the frequency-converted background photocurrent signal in the current signal; a fully differential integrator for performing both positive integration and inverse integration on the modulated photocurrent signal, the frequency-converted heartbeat current signal and the frequency-converted background photocurrent signal, which are inputted, and then outputting a voltage signal. The fully differential integrator can improve the suppression of the heartbeat current signal conversion device to the common mode noise, and the linearity and the dynamic output range of the circuit. Moreover, the heartbeat current signal conversion device loop always forms a closed loop, and thus a direct output to the next-stage circuit can be achieved, eliminating an output buffer circuit, thereby reducing power consumption.

Description

Conversion circuit, heartbeat current signal conversion device and method, heartbeat detection system

This application claims the priority of the Chinese patent application filed on April 1, 2016, the Chinese Patent Office, the application number is 201610204252.5, and the invention is entitled "conversion circuit, heartbeat current signal conversion device and method, heartbeat detection system". This is incorporated herein by reference.

Technical field

The invention belongs to the technical field of integrated circuits, and in particular relates to a conversion circuit, a heartbeat current signal conversion device, a conversion method and a heartbeat detection system.

Background technique

In the photoelectric heartbeat detection system, the conversion circuit is one of the core parts. Its function is to downconvert the heartbeat current signal modulated at the clock frequency to zero frequency, and then convert the heartbeat current signal into a voltage signal through the transimpedance amplifier. Then, it is sent to the subsequent circuit for processing. Therefore, the performance of the conversion circuit such as power consumption, noise, linearity, and output dynamic range seriously restricts the performance of the entire heartbeat detection system. Current conversion circuits generally have two forms of single-ended and first-time mixing and re-integration.

If a single-ended conversion circuit structure is used, it is usually necessary to convert the heartbeat current signal modulated at the clock frequency into a voltage signal, and then down-convert the voltage signal to zero frequency. Since the heartbeat current signal is very small, a transimpedance amplifier is required to provide a very large transimpedance in order to obtain a suitable voltage signal, thereby increasing the noise of the conversion circuit. Moreover, using a single-ended form, common mode noise interference will affect the output of the transimpedance amplifier, which further increases the noise of the converted electrical.

If the conversion circuit structure of the first mixing and re-integration is adopted, although the noise and common mode noise interference caused by the large-span resistance are solved, the working dynamic range is small due to the circuit bias voltage, especially in the deep sub-micron process. Next, this problem will be more obvious. Moreover, the bandwidth of the conversion circuit varies with the signal, and the influence of the parasitic capacitance is low, so the linearity is low.

Therefore, the existing heartbeat current signal conversion circuit has many problems such as noise caused by large-span resistance, common mode noise interference, small working dynamic range, and poor linearity.

Summary of the invention

In view of this, the technical problem to be solved by the present invention is to provide a conversion circuit and a heartbeat The flow signal conversion device, the conversion method and the heartbeat detection system are used for solving the problem that the existing heartbeat current signal conversion circuit has noise caused by large-span resistance, common mode noise interference, small working dynamic range, and poor linearity.

A first aspect of the present invention provides a conversion circuit including a fully differential integrator and a mixer;

The mixer is configured to frequency convert the input current signal, and then output the obtained variable frequency current signal to the fully differential integrator;

The fully differential integrator is configured to integrate the input variable frequency current signal, convert the integrated variable frequency current signal, and output a voltage signal.

A second aspect of the present invention provides a heartbeat current signal conversion apparatus including the conversion circuit and the converter as described above;

The converter is configured to convert a modulated optical signal into a current signal and then transmit the signal to the mixer; the modulated optical signal includes a modulated heartbeat optical signal;

The mixer is configured to frequency convert the heartbeat current signal in the current signal to zero frequency, convert the background photocurrent signal in the current signal to a clock frequency, and then convert the modulated photocurrent signal in the current signal to the converted heartbeat Transmitting a current signal and the converted background photocurrent signal to the fully differential integrator;

The fully differential integrator is configured to alternately perform positive integration and inverse integration on the input modulated photocurrent signal, the converted heartbeat current signal, and the converted background photocurrent signal, and then perform conversion and output Modulate the photovoltage signal and the heartbeat voltage signal.

A third aspect of the present invention provides a method for converting a heartbeat current signal, including:

Receiving a modulated optical signal, and then converting the modulated optical signal into a current signal; the modulated optical signal includes a modulated heartbeat optical signal; the current signal includes a modulated optical current signal, a heartbeat current signal, and a background optical current signal;

Converting the heartbeat current signal to zero frequency, and converting the background photocurrent signal to a clock frequency;

The modulated photocurrent signal, the converted heartbeat current signal and the converted background photocurrent signal are alternately positively integrated and inversely integrated, and then converted to output a modulated photovoltage signal and a heartbeat voltage signal.

A fourth aspect of the present invention provides a heartbeat detecting system including the above-described heartbeat current signal converting apparatus.

It can be seen from the above embodiments of the present invention that the fully differential integrator provided by the embodiment of the present invention can improve The heartbeat current signal conversion device suppresses common mode noise, linearity, and output dynamic range. On the other hand, the heartbeat current signal conversion device loop always forms a closed loop, so it can be directly output to the lower stage circuit, eliminating the output buffer circuit, thereby reducing power consumption. At the same time, because the load capacitance is connected across the output of the fully differential integrator, the equivalent load capacitance can be doubled, resulting in a double the capacitance required to achieve the same noise bandwidth. In addition, the heartbeat current signal conversion device provided by the embodiment of the present invention provides a standard differential output interface, which is easy to link the latter circuit. At the same time, the heartbeat detection system provided by the invention can suppress common mode noise, improve linearity, increase output swing, reduce power consumption, and save circuit cost.

DRAWINGS

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the embodiments or the description of the prior art will be briefly described below. Obviously, the drawings in the following description are only It is a certain embodiment of the present invention, and those skilled in the art can obtain other drawings according to the drawings without any inventive labor.

FIG. 1 is a schematic structural diagram of a conversion circuit according to Embodiment 1 of the present invention.

2 is a schematic structural diagram of a fully differential integrator according to Embodiment 1 of the present invention.

FIG. 3 is a schematic structural diagram of an operational amplifier according to Embodiment 1 of the present invention.

4 is a flow chart of a conversion method provided by Embodiment 2 of the present invention.

FIG. 5 is a schematic structural diagram of a heartbeat current signal conversion apparatus according to Embodiment 3 of the present invention.

FIG. 6 is a detailed structural diagram of a heartbeat current signal conversion apparatus according to Embodiment 3 of the present invention.

FIG. 7 is a timing diagram of a junction of a heartbeat current signal conversion apparatus according to Embodiment 3 of the present invention.

FIG. 8 is a schematic structural diagram of a heartbeat current signal conversion apparatus according to Embodiment 4 of the present invention.

FIG. 9 is a schematic structural diagram of a bootstrap circuit according to Embodiment 4 of the present invention.

FIG. 10 is a schematic structural diagram of a common mode negative feedback circuit according to Embodiment 5 of the present invention.

FIG. 11 is a flowchart of a method for converting a heartbeat current signal according to Embodiment 6 of the present invention.

detailed description

In order to make the object, the features and the advantages of the present invention more obvious and understandable, the technical solutions in the embodiments of the present invention are clear and complete in the following with reference to the accompanying drawings in the embodiments of the present invention. It is apparent that the described embodiments are only a part of the embodiments of the invention, and not all of the embodiments. All other embodiments obtained by a person skilled in the art based on the embodiments of the present invention without creative efforts are within the scope of the present invention.

1 shows a conversion circuit according to Embodiment 1 of the present invention, including a fully differential integrator and a mixer;

The mixer is configured to frequency convert the input current signal, and then output the obtained variable frequency current signal to the fully differential integrator;

The fully differential integrator is configured to integrate the input variable frequency current signal, convert the integrated variable frequency current signal, and output a voltage signal.

In the conversion circuit provided in this embodiment, the input circuit signal can be converted, integrated, and converted to output a voltage signal. This embodiment can efficiently filter out other interference signals to obtain an actual required voltage signal.

FIG. 2 shows a fully differential integrator according to Embodiment 1 of the present invention, including an operational amplifier 201, a first feedback capacitor C _F1 , a second feedback capacitor C _F2 , a first reset switch S _{F1 ,} and a second reset switch S _F2 ;

The first feedback capacitor C _{F1 is} connected between the inverting input terminal V _{IN of the} operational amplifier 201 and the positive output terminal V _OP ; the second feedback capacitor C _{F2 is} connected to the non-inverting input terminal V _IP and the negative output terminal V _{ON of the} operational amplifier 201 The first end of the first reset switch S _F1 is connected to the inverting input terminal V _{IN of the} operational amplifier 201 , and the second end of the first reset switch S _F1 is connected to the positive output terminal V _{OP of the} operational amplifier 201 ; the second reset switch The first end of S _F2 is connected to the non-inverting input terminal V _{IP of the} operational amplifier 201, and the second end of the second reset switch S _F2 is connected to the negative output terminal V _{ON of the} operational amplifier 201.

Further, the fully differential integrator further includes a load capacitance C _L connected between the positive output terminal V _OP and the negative output terminal V _{ON of the} operational amplifier. In the present embodiment, the load capacitance C _L is a preferred solution, and the purpose is to limit the noise bandwidth of the operational amplifier 201, and the trade-off is performed according to actual needs, and is not limited herein.

The invention also provides a conversion method as shown in FIG. 4, comprising:

Receiving a current signal, and then converting the current signal to obtain a variable frequency current signal;

Integrating the variable frequency current signal, converting the integrated variable frequency current signal, and outputting a voltage signal.

The fully differential integrator provided in the above embodiment is suitable for the field of integrated circuits, and can improve the common mode noise suppression, linearity, output dynamic range, and circuit of the conversion circuit in the heartbeat detection circuit. The power consumption, cost and difficulty of cascading with the latter circuits. In the present embodiment, the operational amplifier is an operational amplifier of a folded cascode structure as shown in FIG. 3, and a single-machine structure can be used to reduce power consumption and to easily control the output noise voltage.

Based on the conversion circuit provided in the above embodiment, as shown in FIG. 5, a heartbeat current signal conversion device according to Embodiment 3 of the present invention includes a conversion circuit and a converter;

The converter is configured to convert the modulated optical signal into a current signal and then transmit the signal to the mixer; the modulated optical signal includes a modulated heartbeat optical signal. The heartbeat light signal is the light signal radiated by the LED light on the human body. The modulated light contains the modulated light signal and the optical signal related to the modulation of the optical heartbeat in the modulation.

The mixer is configured to frequency convert the heartbeat current signal in the current signal to zero frequency, convert the background photocurrent signal in the current signal to a clock frequency, and then convert the modulated photocurrent signal in the current signal to the converted heartbeat The current signal and the converted background photocurrent signal are transmitted to the fully differential integrator. Because in practical applications, when the converter converts the modulated optical signal into a current signal, it is easy to convert the mixed background light signal at the same time. Therefore, the converter actually converts the modulated optical signal and modulation. The light includes a modulated heartbeat optical signal and a background optical signal, so the current signal generated by the converter conversion includes a modulated photocurrent signal, a heartbeat current signal, and a background photocurrent signal. In the present embodiment, the main function of the mixer is to perform frequency conversion processing on the mixed background light current signal to ensure the modulated photocurrent signal in the current signal, the converted heartbeat current signal, and the converted background photocurrent signal input. After the fully differential integrator, the fully differential integrator filters the background light.

The fully differential integrator is configured to alternately perform positive integration and inverse integration on the input modulated photocurrent signal, the converted heartbeat current signal, and the converted background photocurrent signal, and then perform conversion and output Modulate the photovoltage signal and the heartbeat voltage signal. In this embodiment, the function of the fully differential integrator is to integrate the input current signals alternately (including positive integration and inverse integration) to amplify the low frequency heartbeat signal, filter out the high frequency background light signal, and then filter After the background light signal, the modulated photocurrent signal and the heartbeat current signal obtained after the positive integration and the inverse integration are respectively converted, and the current signal is converted into a voltage signal to obtain a modulated photovoltage signal and a heartbeat voltage signal, and then output.

In the third embodiment provided by the present invention, a converter is added on the basis of the first embodiment, and the modulated light modulated with the heartbeat signal can be converted into a current signal and then input to the conversion circuit, and the conversion circuit converts the current. The signal is first converted, then integrated and converted to output a modulated photovoltage signal. The number and heartbeat voltage signals are used in subsequent heartbeat detection to effectively amplify the low frequency heartbeat signal and filter out the high frequency background light signal.

As shown in FIG. 6, the converter includes a photodiode D; the anode of the photodiode D is grounded, and the cathode of the photodiode D is connected to the mixer.

The mixer includes a first switch S1, a second switch S2, a third switch S3, and a fourth switch S4;

The first end of the first switch S1 is connected to the external common mode power supply V _CM , the second end of the first switch S1 is connected to the converter through the third switch S3; the first end of the second switch S2 is connected to the external common mode power supply V _CM The second end of the second switch S2 is connected to the converter through a fourth switch S4; the inverting input terminal V _{IN of} the fully differential integrator is connected between the first switch S1 and the third switch S3, the whole The non-inverting input terminal V _{IP of the} differential integrator is connected between the second switch S2 and the fourth switch S4. The first switch S1, the second switch S2, the third switch S3, and the fourth switch S4 are all FETs.

In the circuit shown in FIG. 6, the capacitance C _PD is the parasitic junction capacitance of the photodiode D, and the switches S1 to S4 constitute a mixer, the operational amplifier 201, the feedback capacitance C _F1 , the feedback capacitance C _F2 , the reset switch S _{F1 ,} and The reset switch S _F2 constitutes a fully differential integrator. Where φ and

Is a two-phase non-overlapping clock signal, and φ represents a clock signal of the first clock output,

A clock signal representing the output of the second clock, rst being the reset signal of the fully differential integrator. φ,

Both rst and rst are generated by separate digital control circuits, because the digital control circuit is not the focus of the embodiments of the present invention, and is omitted here. Hereinafter, the working principle of the third embodiment provided by the present invention is further analyzed by combining FIG. 7:

The working process of the heartbeat current signal conversion device provided by the third embodiment of the present invention is divided into three parts: a reset phase, an integration phase, and a retention phase:

In the reset phase, φ,

Both rst and rst are high, so switches S1 to S4, S _F1 , and S _F2 are both closed, so that the cathode voltage V _{PD of} photodiode D, the inverting input terminal V _{IN of} operational amplifier 201, the positive phase input terminal V _IP and The voltage at the negative output terminal V _ON and the positive output terminal V _OP is the common mode voltage V _CM .

In the integration phase, the positive and inverse integral phases alternate. When φ is high, the fully differential integrator is in positive integration phase. At this time, switches S2 and S3 are closed, S1 and S4 are open, and the positive input terminal of operational amplifier 201 is open. Connected to the common mode voltage V _CM to provide a common mode voltage to the non-inverting input of the operational amplifier; the inverting input terminal V _IN of the operational amplifier 201 is coupled to the cathode voltage V _{PD of the} photodiode D. At this time, since the positive and negative input terminals of the operational amplifier are short and the cathode of the photodiode D and the voltage of the common mode voltage V _CM are equal, the photocurrent I _{PD of the} photodiode can only flow from the positive output terminal V _{OP of the} operational amplifier 201. The inverting input terminal V _IN of the operational amplifier 201 increases the voltage of the positive output terminal V _OP of the operational amplifier 201. At the same time, since the common mode negative feedback keeps the output common mode constant, a mirror current of the same magnitude as the photocurrent I _{PD is} generated from the positive phase input terminal V _{IP of the} operational amplifier 201 to the negative output terminal V _ON , so that The voltage at the negative output terminal V _ON of the operational amplifier 201 is lowered. when

When it is high, the fully differential integrator is in anti-integral phase, switches S1 and S4 are closed, and S2 and S3 are on. The situation is exactly opposite to φ, so the negative output terminal V _{ON of the} operational amplifier 201 becomes high and the positive output terminal V _OP becomes low. .

In the hold phase, φ,

When the level is low, the switches S1 to S4 are both turned on. At this time, the photosensitive current I _{PD of the} photodiode D does not flow through the fully differential integrator, so the output of the fully differential integrator remains unchanged.

It can be seen from Figure 7 that if the background light is constant, then φ,

After two phases, the effect of the background light will be completely eliminated. It can be seen from V _OP and V _ON that the background light is eliminated. In the positive integration phase, the fully differential integrator positively integrates the converted background photocurrent signal, the modulated photocurrent signal, and the converted heartbeat current signal. In the inverse integration phase, the fully differential integrator only inversely integrates the converted background photocurrent signal. Thus, at the end of the inverse integration phase, the fully differential integrator converts the current signal into a voltage signal, and the fully differential integrator output leaves only the modulated photovoltage signal and the heartbeat voltage signal modulated on the modulated light.

In the heartbeat current signal conversion apparatus shown in FIG. 6, the load capacitance C _{L is} used to limit the noise bandwidth of the operational amplifier 201, assuming that the input transconductance of the operational amplifier 201 is gm, and the impedance magnitude R _EQ output from the fully differential integrator is :

If the output current noise power spectral density is:

Where k is the Boltzmann constant, T is the absolute temperature, and γ is the process constant:

Then the integrated noise voltage of the output noise is:

Wherein, in the above integrated noise voltage formula, df represents the differential of the frequency, ω represents the angular frequency, ω = 2πf;

Let the clock period be T _S , and the magnitude of the current signal except the background photo current signal is I _SIG . After one clock cycle, the differential output voltage of the fully differential integrator is:

It can be seen from the above that compared with the single-ended structure, since the noise is constant, the signal is doubled after the conversion circuit provided by the embodiment, so the noise of the fully differential integrator is doubled compared with the single end.

Because the common mode voltage V _CM is usually half of the power supply voltage V _DD during the use of the circuit, the mixer switches S1 to S4 are turned on without any other circuit controlling the gate voltage of the mixer. When the gate is pulled to V _DD , the gate-source and gate-drain voltage difference of the switches S1 to S4 is V _DD /2. Under some high threshold voltage processes, S1 to S4 will enter the subthreshold region, resulting in The on-resistance is very large. The resistor and the parasitic capacitance C _PD of the photodiode D form a pole (low-pass characteristic), which will output the high-frequency component of the current of the photodiode D (modulating the photocurrent signal and the heartbeat current signal modulated on the modulated light and its harmonic The filter is filtered so that the amount of signal entering the fully differential integrator becomes smaller, thereby affecting the signal-to-noise ratio of the fully differential integrator output.

For the above reasons, the present invention provides a fourth embodiment as described in FIG. 8. In the fourth embodiment, in addition to the circuit provided by the third embodiment, a bootstrap circuit is included;

The bootstrap circuit is configured to output a gate voltage to a gate of the switch in the mixer such that a difference between a gate-source voltage of the switch and a gate-drain voltage of the switch in the mixer is equal to a power supply voltage value.

The specific bootstrap circuit is as shown in FIG. 9 , and includes a fifth switch S5 , a sixth switch S6 , a seventh switch S7 , an eighth switch S8 , a ninth switch S9 , a first capacitor C ₁ , and a first MOS transistor M1 . Two MOS tube M2, third MOS tube M3, fourth MOS tube M4 and fifth MOS tube M5;

The first end of the fifth switch S5 is grounded, and the second end of the fifth switch S5 is connected to the first power source V1 through the sixth switch S6, the seventh switch S7 and the eighth switch S8; the sixth switch S6 and the seventh switch common mode S7 external power source V _CM; source of the first MOS transistor M1 is connected to a first capacitor C ₁ between the fifth switch S5 and the sixth switch S6 via electrode, a gate of the first MOS transistor M1 is connected to the seventh Between the switch S7 and the eighth switch S8, the drain of the first MOS transistor M1 is connected to the gate voltage output terminal V _G ; the gate of the second MOS transistor M2 is connected to the gate of the first MOS transistor M1, and the second MOS transistor The source of M2 is grounded through the ninth switch S9, the drain of the second MOS transistor M2 is connected to the drain of the first MOS transistor M1; the drain of the third MOS transistor M3 is connected to the source of the first MOS transistor M1, and the third MOS The gate of the tube M3 is connected to the drain of the first MOS transistor M1, the source of the third MOS transistor M3 is connected to the second power source V2; the source of the fourth MOS transistor M4 is connected to the drain of the first MOS transistor M1, the fourth MOS The drain of the tube M4 is connected to the third power source V3, and the gate of the fourth MOS transistor M4 is connected to the signal output end of the second clock.

The source of the fifth MOS transistor M5 is connected to the source of the second MOS transistor M2, the drain of the fifth MOS transistor M5 is connected to the fourth power source V4, and the gate of the fifth MOS transistor M5 is connected to the signal output terminal of the second clock.

The fifth switch S5, the sixth switch S6, the seventh switch S7, the eighth switch S8, and the ninth switch S9 are all FETs.

In FIG. 9, to a connection point between the fifth switch S5, a sixth switch and a first capacitor C ₁ to the point A, the seventh switch S7, the eighth switch S8, the gate of the first MOS transistor and a second The connection point between the gates of the MOS transistors is point B, and the connection point between the second MOS tube and the ninth switch S9 is C point, with the first capacitor C1, the first MOS tube source and the third MOS tube The connection point between the drains is point D to further elaborate the working principle of the bootstrap circuit:

When φ of the first clock output is high level, the switches S5, S8 and S9 are turned on, and the point B is connected to the power source V1 and C, and the second MOS transistor M2 pulls the gate voltage output terminal V _G to the ground, so that The three MOS transistors M3 are turned on to charge the D point to the power supply voltage, and at this moment, the voltage difference across the first capacitor C ₁ is the power supply voltage V _DD .

When the second clock is output

When the level is high, the fourth MOS transistor M4 and the fifth MOS transistor M5 are turned on, the C point is pulled high to turn off the second MOS transistor M2, and the gate voltage output terminal V _G is pulled high to turn off the third MOS transistor M3. . After the switches S2 and S3 are turned on, the two points A and B are connected to the common mode voltage V _CM . At this time, the voltage at point D becomes V _DD +V _CM , so the voltage difference between the two points D and B is V _DD , so the first The MOS transistor M1 is turned on, and the voltage at point D is charged to V _G .

Since the operating voltage of the positive phase input terminal V _IP and the inverting input terminal V _IN of the fully differential integrator is generally one-half of the power supply voltage V _DD , the on-resistance of the mixer is very high, which will result in the inflow of fully differential integration. The current of the device is reduced, and the larger resistance contributes to larger noise. Therefore, in the present embodiment, a bootstrap circuit is employed to increase the gate voltage of the mixer switch, so that the signal-to-noise ratio of the entire conversion circuit can be increased. Because the bootstrap circuit is used, the gate voltage output terminal of the bootstrap circuit is connected to the gates of the mixer switches S1 to S4, so that the difference between the gate source and the gate drain voltage of the mixer is about the power supply voltage V _DD , thereby This reduces the on-resistance of the switches in the mixer, which increases the signal-to-noise ratio of the fully differential integrator output.

The operational amplifiers provided in the embodiments of the present invention are all operational amplifiers of the folded cascode structure as shown in FIG. 3. The single-stage structure can reduce power consumption and easily control the output noise voltage. In addition, since the finite gain of the operational amplifier will cause the output signal to remain in the parasitic junction capacitance of the photodiode, this will cause the output amplitude to increase as the number of integration times decreases, so that the resulting signal amount is reduced, the signal-to-noise ratio reduce.

The fifth embodiment provided by the present invention is to add a common mode feedback circuit based on the fourth embodiment; the common mode negative feedback circuit is used for the positive output terminal and the negative output terminal of the fully differential integrator Obtaining a feedback common mode voltage, and generating a control voltage according to the feedback common mode voltage; the control voltage is used to control the common mode negative feedback circuit and the fully differential integrator to form a negative feedback loop.

As shown in FIG. 10, the common mode negative feedback circuit includes a second capacitor C ₂ , a third capacitor C ₃ , a first resistor R1, a second resistor R2, a sixth MOS transistor M6, a seventh MOS transistor M7, and an eighth MOS tube M8, ninth MOS tube M9 and tenth MOS tube M10;

a first end of the second capacitor C ₂ is connected to the positive output terminal V _{OP of} the fully differential integrator, and a second end of the second capacitor C ₂ is connected to the negative output terminal of the fully differential integrator via a third capacitor C ₃ V _ON ; the first end of the first resistor R1 is connected to the positive output terminal V _{OP of} the fully differential integrator, and the second end of the first resistor R1 is connected to the negative output terminal of the fully differential integrator through the second resistor R2 V _ON ; the second end of the second capacitor C ₂ is connected to the second end of the first resistor R1; the gate of the eighth MOS transistor M8 is connected between the first resistor R1 and the second resistor R2, and the eighth MOS transistor The source of M8 is connected to the drain of the tenth MOS transistor M10, the drain of the eighth MOS transistor M8 is connected to the drain of the sixth MOS transistor M6, and the gate of the sixth MOS transistor M6 is connected to the drain of the eighth MOS transistor M8. The source of the sixth MOS transistor M6 is grounded; the source of the seventh MOS transistor M7 is grounded, the drain of the seventh MOS transistor M7 is connected to the drain of the ninth MOS transistor M9, and the gate of the seventh MOS transistor M7 is connected to the control voltage output. a terminal V _CTRL ; a drain of the ninth MOS transistor M9 is connected to the control voltage output terminal, a gate of the ninth MOS transistor M9 is connected to the common mode power supply V _CM , and a source of the ninth MOS transistor M9 is connected to the tenth MOS transistor M The drain of 10; the source of the tenth MOS transistor M10 is connected to the fifth power source V5, and the gate of the tenth MOS transistor M10 is connected to the sixth power source V _BP .

In this embodiment, FIG. 10 is a common mode feedback circuit of the operational amplifier shown in FIG. 3. The resistor R1 and the resistor R2 obtain a feedback common mode voltage V _CMO from the positive output terminal V _OP and the negative output terminal V _{ON of the} operational amplifier. The eighth MOS transistor M8 and the ninth MOS transistor M9 generate a control voltage V _CTRL to control the current mirror load tubes M14 and M15 of the operational amplifier of FIG. The common mode negative feedback circuit forms a negative feedback with M14~M17 in the operational amplifier. According to the short circuit of the operational amplifier, the feedback common mode voltage V _{CMO is} equal to the common mode voltage V _CM . The capacitor C1 and the capacitor C2 in FIG. 10 generate a zero point to cancel the pole formed by the resistor R1, the resistor R2, the eighth MOS transistor M8, and the ninth MOS transistor M9, so that the stability of the common mode negative feedback is improved.

The present invention also provides a fifth embodiment, as shown in FIG. 11, a method for converting a heartbeat current signal, comprising:

S1, receiving a modulated optical signal, and then converting the modulated optical signal into a current signal; the modulated optical signal includes a modulated heartbeat optical signal; the current signal includes a modulated optical current signal, a heartbeat current signal, and a background optical current signal ;

S2, converting the heartbeat current signal to zero frequency, and frequency converting the background photocurrent signal to Clock frequency

S3, the modulated photocurrent signal, the converted heartbeat current signal, and the converted background photocurrent signal are alternately positively integrated and inversely integrated, and then converted to output a modulated photovoltage signal and a heartbeat voltage signal.

In a fifth embodiment of the present invention, the heartbeat current signal conversion device converts the received modulated optical signal into a current signal, and then modulates the background optical signal in the optical signal by means of frequency conversion, integration, and conversion. Filtering, amplifying the low frequency heartbeat signal, and then outputting the modulated photovoltage signal and the heartbeat voltage signal for subsequent heartbeat signal detection.

The present invention also provides a heartbeat detection system comprising the heartbeat current signal conversion device as described above. In the present embodiment, the heartbeat current signal conversion device of the structure of FIG. 5 is used as a conversion circuit of the heartbeat detection system, which can suppress common mode noise, improve linearity, increase output swing, reduce power consumption, and save circuit cost.

In summary, the fully differential integrator provided by the embodiment of the invention can improve the suppression, linearity and output dynamic range of the common mode noise of the heartbeat current signal conversion device. Moreover, since the heartbeat current signal conversion device loop always forms a closed loop, it can be directly output to the lower stage circuit, eliminating the output buffer circuit, thereby reducing power consumption. At the same time, because the load capacitance is connected across the output of the fully differential integrator, the equivalent load capacitance can be doubled, resulting in a double the capacitance required to achieve the same noise bandwidth. In addition, the embodiment of the present invention provides a heartbeat current signal conversion device mainly used in the field of heart rate monitoring application, and can also be used in other fields such as a touch screen, providing a standard ground differential output interface, and facilitating the link of the rear stage circuit.

At the same time, the heartbeat current signal conversion device provided by the invention can eliminate BG, realize full differential output, achieve the purpose of suppressing noise, and has common mode suppression, has a large output dynamic range, and also provides full access to the rear circuit. Differential circuit interface; function with Hold reduces one-stage SH, saves output-limited bandwidth capacitance, and further, uses a bootstrap circuit to reduce the problem that the amplifier has a large noise due to excessive switching resistance.

In the several embodiments provided herein, it should be understood that the disclosed systems and methods can be implemented in other ways. For example, the system embodiment described above is merely illustrative. For example, the division of the module is only a logical function division. In actual implementation, there may be another division manner, for example, multiple modules or components may be combined or Can be integrated into another system, or some features can be ignored or not executed. In addition, the mutual coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection through some interface, device or module. It can be electrical, mechanical or other form.

In addition, each functional module in each embodiment of the present invention may be integrated into one processing module, or each module may exist physically separately, or two or more modules may be integrated into one module. The above integrated modules can be implemented in the form of hardware or in the form of software functional modules.

The integrated modules, if implemented in the form of software functional modules and sold or used as separate products, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention, which is essential or contributes to the prior art, or all or part of the technical solution, may be embodied in the form of a software product stored in a storage medium. A number of instructions are included to cause a computer device (which may be a personal computer, server, or network device, etc.) to perform all or part of the steps of the methods described in various embodiments of the present invention. The foregoing storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk, and the like. .

It should be noted that, for the foregoing method embodiments, for the sake of brevity, they are all described as a series of action combinations, but those skilled in the art should understand that the present invention is not limited by the described action sequence. Because certain steps may be performed in other sequences or concurrently in accordance with the present invention. In the following, those skilled in the art should also understand that the embodiments described in the specification are all preferred embodiments, and the actions and modules involved are not necessarily required by the present invention.

In the above embodiments, the descriptions of the various embodiments are all focused, and the parts that are not detailed in a certain embodiment can be referred to the related descriptions of other embodiments.

The above is a description of the conversion circuit, the heartbeat current signal conversion device, the conversion method, and the heartbeat detection system provided by the present invention. For those skilled in the art, according to the idea of the embodiment of the present invention, the specific implementation manner and the application range will be In view of the above, the contents of this specification are not to be construed as limiting the invention.

Claims (14)

1. A conversion circuit, characterized in that the conversion circuit comprises a fully differential integrator and a mixer;

   The mixer is configured to frequency convert the input current signal, and then output the obtained variable frequency current signal to the fully differential integrator;

   The fully differential integrator is configured to integrate the input variable frequency current signal, convert the integrated variable frequency current signal, and output a voltage signal.
2. The conversion circuit according to claim 1, wherein the fully differential integrator comprises an operational amplifier, a first feedback capacitor, a second feedback capacitor, a first reset switch, and a second reset switch;

   The first feedback capacitor is coupled between the inverting input terminal and the positive output terminal of the operational amplifier; the second feedback capacitor is coupled between the non-inverting input terminal and the negative output terminal of the operational amplifier; a first end of a reset switch is connected to an inverting input end of the operational amplifier, a second end of the first reset switch is connected to a positive output end of the operational amplifier; and a first end of the second reset switch is connected The non-inverting input of the operational amplifier, the second end of the second reset switch is coupled to the negative output of the operational amplifier.
3. The conversion circuit of claim 2 wherein said fully differential integrator further comprises a load capacitance coupled between a positive output and a negative output of said operational amplifier.
4. The conversion circuit according to claim 1, wherein said mixer comprises a first switch, a second switch, a third switch, and a fourth switch;

   The first end of the first switch is connected to an external common mode power supply, and the second end of the first switch is connected to the converter through the third switch; the first end of the second switch is connected to an external common mode power supply The second end of the second switch is connected to the converter through the fourth switch;

   An inverting input of the fully differential integrator is coupled between the first switch and the third switch, and a non-inverting input of the fully differential integrator is coupled to the second switch and the fourth Between the switches.
5. The conversion circuit according to claim 4, wherein said first switch, said second switch, said third switch, and said fourth switch are all field effect transistors.
6. A heartbeat current signal conversion device, characterized in that the heartbeat current signal conversion device comprises the conversion circuit and converter according to any one of claims 1 to 5;

   The converter is configured to convert the modulated optical signal into a current signal and transmit the signal to the mixer; The modulated optical signal includes a modulated heartbeat optical signal;

   The mixer is configured to frequency convert the heartbeat current signal in the current signal to zero frequency, convert the background photocurrent signal in the current signal to a clock frequency, and then convert the modulated photocurrent signal in the current signal to the converted heartbeat Transmitting a current signal and the converted background photocurrent signal to the fully differential integrator;

   The fully differential integrator is configured to alternately perform positive integration and inverse integration on the input modulated photocurrent signal, the converted heartbeat current signal, and the converted background photocurrent signal, and then perform conversion and output Modulate the photovoltage signal and the heartbeat voltage signal.
7. The heartbeat current signal conversion device according to claim 6, wherein said converter comprises a photodiode;

   The anode of the photodiode is grounded, and the cathode of the photodiode is connected to the mixer.
8. A heartbeat current signal conversion apparatus according to claim 6, wherein said heartbeat current signal conversion means further comprises a bootstrap circuit connected to said mixer;

   The bootstrap circuit is configured to output a gate voltage to a gate of the switch in the mixer such that a difference between a gate-source voltage of the switch and a gate-drain voltage of the switch in the mixer is equal to a power supply voltage value.
9. The heartbeat current signal conversion device according to claim 8, wherein the bootstrap circuit comprises a fifth switch, a sixth switch, a seventh switch, an eighth switch, a ninth switch, a first capacitor, and a first MOS a tube, a second MOS transistor, a third MOS transistor, a fourth MOS transistor, and a fifth MOS transistor;

   The first end of the fifth switch is grounded, and the second end of the fifth switch is connected to the first power source by sequentially passing through the sixth switch, the seventh switch and the eighth switch; An external common mode power supply is connected between the switch and the seventh switch; a source of the first MOS transistor is connected to the fifth switch and the sixth switch through the first capacitor, where the first MOS transistor a gate is connected between the seventh switch and the eighth switch, a drain of the first MOS transistor is connected to a gate voltage output terminal; a gate of the second MOS transistor is connected to the first MOS transistor a gate, a source of the second MOS transistor is grounded through the ninth switch, a drain of the second MOS transistor is connected to a drain of the first MOS transistor; and a drain of the third MOS transistor is connected a source of the first MOS transistor, a gate of the third MOS transistor is connected to a drain of the first MOS transistor, a source of the third MOS transistor is connected to a second power source; and the fourth MOS transistor The source is connected to the drain of the first MOS transistor, the drain of the fourth MOS transistor is connected to the third power source, and the gate of the fourth MOS transistor is connected to the signal of the second clock The end; the source of the fifth MOS transistor is connected to a source electrode of said second MOS transistor, the The drain of the fifth MOS transistor is connected to the fourth power source, and the gate of the fifth MOS transistor is connected to the signal output end of the second clock.
10. The heartbeat current signal conversion device according to claim 9, wherein said fifth switch, said sixth switch, said seventh switch, said eighth switch, and said ninth switch are field effects tube.
11. The heartbeat current signal conversion device according to claim 6, wherein said heartbeat current signal conversion device further comprises a common mode negative feedback circuit connected to said fully differential integrator;

    The common mode negative feedback circuit is configured to obtain a feedback common mode voltage from a positive output end and a negative output end of the fully differential integrator, and generate a control voltage according to the feedback common mode voltage; the control voltage is used to control the The common mode negative feedback circuit forms a negative feedback loop with the fully differential integrator.
12. The heartbeat current signal conversion device according to claim 11, wherein the common mode negative feedback circuit comprises a second capacitor, a third capacitor, a first resistor, a second resistor, a sixth MOS transistor, and a seventh MOS transistor. , an eighth MOS tube, a ninth MOS tube, and a tenth MOS tube;

    a first end of the second capacitor is coupled to a positive output of the fully differential integrator, and a second end of the second capacitor is coupled to a negative output of the fully differential integrator through the third capacitor; a first end of the first resistor is coupled to a positive output of the fully differential integrator, and a second end of the first resistor is coupled to a negative output of the fully differential integrator via the second resistor; a second end of the second capacitor is connected to the second end of the first resistor; a gate of the eighth MOS transistor is connected between the first resistor and the second resistor, the eighth MOS a source of the tube is connected to a drain of the tenth MOS transistor, a drain of the eighth MOS transistor is connected to a drain of the sixth MOS transistor; and a gate of the sixth MOS transistor is connected to the eighth MOS a drain of the tube, a source of the sixth MOS transistor being grounded; a source of the seventh MOS transistor being grounded, a drain of the seventh MOS transistor being connected to a drain of the ninth MOS transistor, the a gate of the seventh MOS transistor is connected to the control voltage output terminal; a drain of the ninth MOS transistor is connected to the control voltage output terminal, and a gate of the ninth MOS transistor is connected a common mode power supply, a source of the ninth MOS transistor is connected to a drain of the tenth MOS transistor; a source of the tenth MOS transistor is connected to a fifth power source, and a gate of the tenth MOS transistor is connected to a sixth power supply.
13. A method for converting a heartbeat current signal, comprising:

    Receiving a modulated optical signal, and then converting the modulated optical signal into a current signal; the modulated optical signal includes a modulated heartbeat optical signal; the current signal includes a modulated optical current signal, a heartbeat current signal, and a background optical current signal;

    Converting the heartbeat current signal to zero frequency, and converting the background photocurrent signal to a clock frequency rate;

    The modulated photocurrent signal, the converted heartbeat current signal and the converted background photocurrent signal are alternately positively integrated and inversely integrated, and then converted to output a modulated photovoltage signal and a heartbeat voltage signal.
14. A heartbeat detecting system, characterized in that the heartbeat detecting system comprises the heartbeat current signal converting device according to any one of claims 6 to 12.

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