WO2017160280A1 - Extrémité avant de communication de substrat intégré ayant un filtre équilibré - Google Patents

Extrémité avant de communication de substrat intégré ayant un filtre équilibré Download PDF

Info

Publication number
WO2017160280A1
WO2017160280A1 PCT/US2016/022474 US2016022474W WO2017160280A1 WO 2017160280 A1 WO2017160280 A1 WO 2017160280A1 US 2016022474 W US2016022474 W US 2016022474W WO 2017160280 A1 WO2017160280 A1 WO 2017160280A1
Authority
WO
WIPO (PCT)
Prior art keywords
coupled
terminal
inductor
capacitor
differential transmission
Prior art date
Application number
PCT/US2016/022474
Other languages
English (en)
Inventor
Sidharth Dalmia
Original Assignee
Intel Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corporation filed Critical Intel Corporation
Priority to PCT/US2016/022474 priority Critical patent/WO2017160280A1/fr
Publication of WO2017160280A1 publication Critical patent/WO2017160280A1/fr

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/01Frequency selective two-port networks
    • H03H7/09Filters comprising mutual inductance
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/42Networks for transforming balanced signals into unbalanced signals and vice versa, e.g. baluns
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/46Networks for connecting several sources or loads, working on different frequencies or frequency bands, to a common load or source
    • H03H7/463Duplexers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H1/00Constructional details of impedance networks whose electrical mode of operation is not specified or applicable to more than one type of network
    • H03H2001/0021Constructional details
    • H03H2001/0085Multilayer, e.g. LTCC, HTCC, green sheets

Definitions

  • LTCC Low Temperature Co-fired Ceramic
  • Fig. 1 illustrates a cross-section of a computing platform with standalone components of a radio frequency (RF) frontend positioned on the surface of a laminate.
  • RF radio frequency
  • FIG. 2 illustrates a cross-section of a computing platform with integrated components of a RF frontend within a laminate or substrate, according to some embodiments of the disclosure.
  • Fig. 3 illustrates a differential balanced filter or balanced diplexer with integrated balun, diplexer, and bandpass filter, according to some embodiments of the disclosure.
  • Fig. 4 illustrates a plot showing frequency response (e.g., scattering parameters) of the balanced filter or balanced diplexer of Fig. 3, according to some embodiments of the disclosure.
  • Fig. 5 illustrates a plot showing frequency response (e.g., impedance parameters) of the balanced filter or balanced diplexer of Fig. 3, according to some embodiments of the disclosure.
  • Fig. 6A illustrates a differential balanced multiplexer with integrated balun, multiplexer, and bandpass filter, according to some embodiments of the disclosure.
  • Fig. 6B illustrates a differential balanced multiplexer with multiplexer and bandpass filter, according to some embodiments of the disclosure.
  • Fig. 7A illustrates a single-ended balanced multiplexer with multiplexer and bandpass filter, according to some embodiments of the disclosure.
  • Fig. 7B illustrates a single-ended balanced multiplexer with multiplexer and bandpass filter, according to some embodiments of the disclosure.
  • Figs. 8A-B illustrate three-dimensional (3D) views, respectively, of the parasitic-aware differential balanced diplexer formed in a 4-layer substrate, according to some embodiments of the disclosure.
  • Fig. 9 illustrates a view of a RF frontend on top of a laminate and an integrated substrate RF frontend with fewer standalone components, according to some embodiments of the disclosure.
  • Fig. 10 illustrates a top view of an RF module with an integrated substrate RF frontend, according to some embodiments of the disclosure.
  • Fig. 11 illustrates a top view of an integrated substrate balanced bandpass filter, according to some embodiments of the disclosure.
  • Fig. 12 illustrates a smart device or a computer system or a SoC (System-on-
  • Chip which is partially implemented in the laminate/substrate, according to some embodiments.
  • FIG. 1 illustrates cross-section 100 of a computing platform (e.g., a circuit board of a handheld phone) with standalone components of a radio frequency (RF) frontend positioned on the surface of a laminate.
  • Cross-section 100 comprises a printed circuit board (PCB) 101, solder balls 102, laminate or substrate 103 with micro-bumps and redistribution layer, RF active and passive devices 104 (e.g., wireless chip), surface mount devices (SMDs) 105 and 106, and mold compound 107.
  • SMDs 105 and 106 may include frontend components such as baluns, antennas, diplexers, multiplexers, filters (e.g., bandpass and low pass filers), etc. These SMDs perform important functions.
  • baluns are used for eliminating common mode noise, diplexers and multiplexers allow for antenna sharing, and bandpass/low-pass filters reject unwanted signals and blockers.
  • BOM Bill of Materials
  • an apparatus e.g., a computing platform which comprises a die (e.g., processor die) with a first side and a first set of solder balls coupled to the die along the first side.
  • the apparatus further comprises a laminate based substrate adjacent to the first set of solder balls, where the laminate based substrate includes a balanced filter embedded in it, and where the balanced filter is communicatively coupled to the first die via at least one of the solder balls of the first set.
  • the laminate forms the iSFE.
  • the iSFE portion can be directly underneath the die too.
  • the iSFE of various embodiments is lower in cost than any known integration schemes such as Low Temperature Co-fired Ceramic (LTCC) processes or IPD (Integrated Passive Devices) on SOI (Silicon-on-Insulator) or high resistivity Si or higher cost laminate packages.
  • LTCC Low Temperature Co-fired Ceramic
  • IPD Integrated Passive Devices
  • SOI Silicon-on-Insulator
  • Si silicon-on-Insulator
  • signals are represented with lines. Some lines may be thicker, to indicate more constituent signal paths, and/or have arrows at one or more ends, to indicate primary information flow direction. Such indications are not intended to be limiting. Rather, the lines are used in connection with one or more exemplary embodiments to facilitate easier understanding of a circuit or a logical unit. Any represented signal, as dictated by design needs or preferences, may actually comprise one or more signals that may travel in either direction and may be implemented with any suitable type of signal scheme.
  • connection means a direct connection, such as electrical, mechanical, or magnetic connection between the things that are connected, without any intermediary devices.
  • coupled means a direct or indirect connection, such as a direct electrical, mechanical, or magnetic connection between the things that are connected or an indirect connection, through one or more passive or active intermediary devices.
  • circuit or “module” may refer to one or more passive and/or active components that are arranged to cooperate with one another to provide a desired function.
  • signal may refer to at least one current signal, voltage signal, magnetic signal, or data/clock signal.
  • the meaning of "a,” “an,” and “the” include plural references.
  • the meaning of "in” includes “in” and "on.”
  • scaling generally refers to converting a design (schematic and layout) from one process technology to another process technology and subsequently being reduced in layout area.
  • scaling generally also refers to downsizing layout and devices within the same technology node.
  • scaling may also refer to adjusting (e.g., slowing down or speeding up - i.e. scaling down, or scaling up respectively) of a signal frequency relative to another parameter, for example, power supply level.
  • substantially “close,” “approximately,” “near,” and “about,” generally refer to being within +/- 10% of a target value.
  • phrases “A and/or B” and “A or B” mean (A), (B), or (A and B).
  • phrase “A, B, and/or C” means (A), (B), (C), (A and B), (A and C), (B and C), or (A, B and C).
  • the terms “left,” “right,” “front,” “back,” “top,” “bottom,” “over,” “under,” and the like in the description and in the claims, if any, are used for descriptive purposes and not necessarily for describing permanent relative positions.
  • FIG. 2 illustrates cross-section 200 of a computing platform with integrated components of a RF frontend within a laminate or substrate, according to some embodiments of the disclosure. It is pointed out that those elements of Fig. 2 having the same reference numbers (or names) as the elements of any other figure can operate or function in any manner similar to that described, but are not limited to such.
  • Cross-section 200 illustrates laminate 203 with integrated SMDs 205 and 206.
  • laminate 203 uses standard silicon package substrate technology with minimum layer counts (e.g., less than 5 layers) and
  • Laminate based substrate 203 of the various embodiments is manufactured at low cost using traditional schemes such as core base or coreless substrates.
  • the laminate based substrate 203 of the various embodiments is conducive for silicon package or standalone component with thin core and thin pre-impregnated layers.
  • the laminate based substrate 203 of the various embodiments is also conducive for fan-out and for iSFE.
  • laminate 203 can have one metal layer as the minimum number of layers or multiple layers depending on the availability of substrate thickness.
  • solder connections can be used instead of vias and the area underneath the device on main PCB can be used to draw portions of inductors and capacitors too.
  • Fig. 2 shows solder balls on top side and bottom side of substrate, it is understood that the solder balls can be replaced with a LGA (Land Grid Array) connection where the solder ball is replaced with regular SMT (Surface Mount Technology) connection.
  • LGA Land Grid Array
  • SMT Surface Mount Technology
  • Cu Copper
  • the substrate can have cavity for the die alongside the integrated passive components.
  • laminate 203 can be made using convention materials used in commonplace packages and PCBs.
  • the material permeability (Er) of laminate 203 ranges from 2-30.
  • the thickness of laminate 203 can range from 2 ⁇ to 200 ⁇ depending on density and isolation requirements.
  • laminate 203 can be made using microvias and through-holes or just one of the interconnects.
  • laminate 203 can be as minimal as 2 metal layers with one core/prepreg material.
  • the laminate based substrate is independent of microvias.
  • GNSS Global System for Mobile Communications
  • the embodiments are not limited to the above communication standards.
  • hardware associated with other standards such as WiGig (by Wireless Gigabit Alliance) or 5G (fifth generation mobile network or wireless system) signal, which are greater than 10 GHz, can be implemented and integrated in substrate 203.
  • WiGig by Wireless Gigabit Alliance
  • 5G fifth generation mobile network or wireless system
  • the thickness of mold compound 207 is less than the thickness of mold compound 107, and as such package thickness (e.g., height) is reduced.
  • laminate 203 includes an integrated balanced filter for each frequency band which can be connected to other balanced filters in other frequency band with minimal circuitry.
  • single-ended antenna sharing or dipole antenna sharing across multiple bands is achieved in accordance with some embodiments.
  • dominant inductive and dominant parasitic capacitive designs are employed to integrate frontend components in ultra-thin substrate 103 and PCB 101 without additional processing costs and without the need for non-standard PCB/substrate materials. By using parasitic capacitances, minimal number of physical realizable components are used to achieve desired responses in-band and out-of-band.
  • no physical ground is used in the package itself. Instead, in some embodiments, the ground of the reference board is used to free up a metal layer of laminate 203 and/or PCB 101.
  • Fig. 3 illustrates a differential balanced filter or balanced diplexer 300 (e.g.,
  • balanced diplexer 300 comprises a first differential path, a second differential path, and a common node coupling the first and second differential paths to antenna 403.
  • balanced diplexer 300 includes an output impedance (e.g., 50 Ohms) matched to the input impedance of antenna 301.
  • first differential path comprises differential input impedance Rl (e.g., 50 Ohms), capacitors CI, C2, C3, C3, and C5, and inductors LI and L2.
  • differential input impedance Rl is provided by a resistor having a first terminal coupled to one input port (e.g., '+' port) and another terminal coupled to another input port (e.g., '+' port).
  • capacitor CI has a first terminal coupled to the input port and the first terminal of resistor Rl .
  • the second terminal of capacitor CI is coupled to a first terminal of inductor LI .
  • capacitor C2 has a first terminal coupled to the input port and the second terminal of resistor Rl .
  • the second terminal of capacitor C2 is coupled to a second terminal of inductor LI.
  • capacitor C3 is coupled in parallel to inductor LI .
  • inductor LI is inductively coupled to inductor L2.
  • a first terminal of inductor L2 is coupled to a first terminal of capacitor C4 and a first terminal of capacitor C5.
  • a second terminal of inductor L2 is coupled to ground.
  • capacitor C5 is coupled in parallel to inductor L2.
  • a second terminal of capacitor C4 is coupled to the common node.
  • an output impedance e.g., a 50 Ohms resistor R2 is coupled to the common node.
  • inductors LI and L2 together function as a balun.
  • a balun is a four port device (or effectively a 3-port device because one port is coupled to ground) and is an electrical device that converts between a balanced signal (e.g., two signals working against each other where ground is irrelevant) and an unbalanced signal (e.g., a single signal working against ground or pseudo-ground).
  • the first and second differential paths provide the diplexer function of apparatus 300.
  • a diplexer receives two inputs and diplexes them for antenna 301 coupled to the diplexer.
  • a diplexer is a passive device that implements frequency-domain multiplexing. For instance, two ports (e.g., low frequency port and high frequency port) are multiplexed onto an output port.
  • the low frequency port generally provides signals on a low frequency band (e.g., 2.4 GHz band) while the high frequency port generally provides signals on a high frequency band (e.g., 5 GHz band).
  • the signals on the low frequency port and the high frequency port occupy disjoint frequency bands.
  • antenna 301 is one of: monopole antennas, dipole antennas, loop antennas, patch antennas, microstrip antennas, coplanar wave antennas, or other types of antennas suitable for transmission of Radio Frequency (RF) signals.
  • RF Radio Frequency
  • antenna array 305 are separated to take advantage of spatial diversity.
  • BPF bandpass filter
  • I and resistor Rl provide the bandpass filter (BPF) function.
  • BPF is a filter that passes frequencies within a certain range and rejects or attenuates frequencies outside of that range.
  • all components of the differential balanced filter or balanced diplexer 300 provide band pass function.
  • capacitors CI, C2, C3, C4, and C5, inductors LI and L2, and resistor Rl together provide a band pass function.
  • the differential design of Fig. 3 uses coupled inductor topology where inductor L2 (and L2') is single-ended whereas inductor LI (and LI ') provide differential signal, in accordance with some embodiments.
  • the inductor coupling for each frequency band is tailored to meet the desired bandwidth.
  • the capacitors C3 and C5 of the first differential path which are parallel to inductors LI and L2, respectively, provide the desired frequency pole for the first differential path.
  • the capacitors C3' and C5' of the second differential path which are parallel to inductors LI ' and L2', respectively, provide the desired frequency pole for the second differential path.
  • the series capacitors CI, C2, and C4 for the first differential path match to the desired impedance (e.g., 25 Qs to 100 Qs).
  • the series capacitors CI ', C2', and C4' for the second differential path match to the desired impedance (e.g., 25 Qs to 100 Qs).
  • the differential or single ended impedance can be as low as 1-10 Ohms with some reactance.
  • a portion of circuitry may be implemented on the Si (silicon) itself.
  • capacitors and capacitor banks can be implemented in silicon itself where impedance and frequency tenability is also achieved.
  • the filters can connect together without the need for additional matching, phasing, and multiplexing phasors at the common node.
  • inductors LI, L2, LI ', and L2' are large (e.g., the range can be 0.5 nH to 30 nH) whereas capacitors (CI, C2, C3, C4, C5, CI ', C2', C3', C4', and C5') are small (e.g., in the range of 0.01 pF to 5 pF) so that diplexer 300 can be realized in a small size using standard PCB and packaging dielectrics.
  • second differential path has a similar structure and layout (or floorplan) as the first differential path but with different capacitors and inductors (e.g., different values of capacitances and inductances).
  • the second differential path comprises differential input impedance Rl ' (e.g., 50 Ohms), capacitors CI ', C2', C3', C4', and C5', and inductors LI ' and L2'.
  • lower frequency band (e.g., 2.4 GHz) produces a very high input impedance at the input ports of the upper band (e.g., 5 GHz) while the upper frequency band (e.g., 5 GHz) provides a very high impedance at the input ports of the lower band (e.g., 2.5 GHz).
  • the common node provides a single-ended port to a multiband antenna (e.g., antenna 301), in accordance with some embodiments.
  • antenna 301 is formed in laminate 203. In some embodiments, antenna 301 is formed outside of laminate 203.
  • Fig. 4 illustrates plot 400 showing frequency response (e.g., scattering parameters) of the balanced filter or balanced diplexer of Fig. 3, according to some embodiments of the disclosure.
  • x-axis is frequency in Giga-Hertz (GHz) and y-axis is decibels (dB).
  • curve 401 is the passband for the second differential path (low frequency band) from 2.4 GHz to 2.5 GHz;
  • curve 402 is the passband for the first differential path (high frequency band) from 5.15 GHz to 5.85 GHz;
  • curve 403 is the return loss at the antenna port (or common node).
  • Fig. 5 illustrates plot 500 showing frequency response (e.g., impedance parameters) of the balanced filter or balanced diplexer of Fig. 5, according to some embodiments of the disclosure.
  • x-axis is frequency in GHz and y-axis is impedance in Ohms.
  • Plot 500 shows the impedance provided by the lower frequency band filter in-band and out-of-band.
  • the impedance ml 1 is matched to a desired 50 Ohms at 2.45 GHz
  • the low frequency band filter produces 4000 Ohms to 700 Ohms at the input ports of the higher band filter (i.e., second differential path).
  • Fig. 6A illustrates a differential balanced multiplexer or triplexer 600 (e.g.,
  • a third differential path is added which comprises differential input impedance Rl " (e.g., 50 Ohms), capacitors CI “, C2", C4", C3", and C5", and inductors LI " and L2".
  • Rl differential input impedance
  • the ports for the third differential path receive GNSS frequency band.
  • resistor Rl ", capacitors CI “, C2", C4", C3", and C5", and inductors LI “ and L2" of the third differential path behave same as resistor Rl, capacitors CI, C2, C3, C4, and C5, and inductors LI and L2 of the first differential path.
  • lower frequency band (e.g., 2.4 GHz) produces a very high input impedance at the input ports of the first differential path (e.g., upper band of 5 GHz) and the third differential path (e.g., GNSS frequency band).
  • the upper frequency band (e.g., 5 GHz) provides a very high impedance at the input ports of the second differential path (e.g., lower band of 2.5 GHz) and the third differential path (e.g., GNSS frequency band).
  • the GNSS frequency band provides a very high impedance at the input ports of the first differential path (e.g., higher band of 5 GHz) and the second differential path (e.g., lower band of 2.5 GHz). As such, signals on the first, second, and third differential paths remain separate and avoid interference.
  • the common node provides a single-ended port to a multiband antenna (e.g., antenna 301), in accordance with some embodiments.
  • Fig. 6B illustrates a differential balanced multiplexer or triplexer 620 (e.g.,
  • a tap to ground is added to inductor LI (and LI ').
  • capacitor C3 (and C3') of Fig. 6A are placed with a series combination of inductor L3 and capacitor C3 (and L3' and C3'). In some embodiments, this series combination of inductor and capacitor acts as capacitor in band but with a notch at higher frequencies.
  • Fig. 7A illustrates a single-ended balanced multiplexer/triplexer 700 with integrated balun, multiplexer/triplexer, and bandpass filter, according to some embodiments of the disclosure. It is pointed out that those elements of Fig. 7A having the same reference numbers (or names) as the elements of any other figure can operate or function in any manner similar to that described, but are not limited to such. So as not to obscure the embodiments of the disclosure, differences between Fig. 7A and Fig. 6A are described. [0052] While the embodiment of Fig. 7A is illustrated with reference to three single- ended paths, the embodiments are applicable to any number of single-ended paths.
  • capacitors C2, C2', and C2" are removed and second terminals of input resistors Rl, Rl ', and Rl " are grounded. As such, one port per path is configured. In some embodiments, the second terminals of capacitors C3, C3', and C3"and inductors LI, LI ', and LI " are coupled to ground.
  • first single-ended path comprises single-ended input impedance Rl (e.g., 50 Ohms), capacitors CI, C3, C4, and C5, and inductors LI and L2.
  • second single-ended path comprises single-ended input impedance Rl ' (e.g., 50 Ohms), capacitors CI ', C3', C4', and C5', and inductors LI ' and L2'.
  • third single-ended path comprises single-ended input impedance Rl " (e.g., 50 Ohms), capacitors CI ", C3", C4", and C5", and inductors LI " and L2".
  • lower frequency band (e.g., 2.4 GHz) produces a very high input impedance at the input port of the first single-ended path (e.g., upper band of 5 GHz) and the third single-ended path (e.g., GNSS frequency band).
  • the upper frequency band (e.g., 5 GHz) provides a very high impedance at the input port of the second single-ended path (e.g., lower band of 2.5 GHz) and the third single-ended path (e.g., GNSS frequency band).
  • the GNSS frequency band provides a very high impedance at the input port of the first single-ended path (e.g., higher band of 5 GHz) and the second single-ended path (e.g., lower band of 2.5 GHz). As such, signals on the first, second, and third single-ended paths remain separate and avoid interference.
  • the common node provides a single-ended port to a multiband antenna (e.g., antenna 301), in accordance with some embodiments.
  • Fig. 7B illustrates a single-ended balanced multiplexer/triplexer 720 with multiplexer/triplexer and bandpass filter, according to some embodiments of the disclosure. It is pointed out that those elements of Fig. 7B having the same reference numbers (or names) as the elements of any other figure can operate or function in any manner similar to that described, but are not limited to such. So as not to obscure the embodiments of the disclosure, differences between Fig. 7A and Fig. 7B are described.
  • an inductor L3 is coupled to capacitor C3, inductors LI and L2, and capacitor C5, an inductor L3.
  • a first terminal of inductor L3 is coupled to capacitor C3, inductors LI and L2, and capacitor C5, a second terminal of inductor L3 is coupled to ground.
  • an inductor L3' is coupled to capacitor C3', inductors LI ' and L2', and capacitor C5', an inductor L3'.
  • inductor L3 while a first terminal of inductor L3' is coupled to capacitor C3', inductors LI ' and L2', and capacitor C5', a second terminal of inductor L3' is coupled to ground.
  • an inductor L3 instead of the ground terminal coupled to capacitor C3", inductors LI “ and L2", and capacitor C5", an inductor L3" is coupled to capacitor C3", inductors LI " and L2", and capacitor C5", an inductor L3".
  • a first terminal of inductor L3" is coupled to capacitor C3", inductors LI " and L2", and capacitor C5"
  • a second terminal of inductor L3" is coupled to ground.
  • the additional inductor to ground (e.g., L3, L3', and
  • the additional inductor to ground can be physical inductor or part of return current path in ground.
  • Figs. 8A-B illustrates three-dimensional (3D) views 800 and 820, respectively, of differential balanced diplexer formed in 2 or 4-layer substrate/laminate 203, according to some embodiments of the disclosure. It is pointed out that those elements of Figs. 8A-B having the same reference numbers (or names) as the elements of any other figure can operate or function in any manner similar to that described, but are not limited to such.
  • the 3D view 800 of the balanced diplexer is 2.5 mm x 1.25 mm x 0.3 mm (e.g., less than 1 mm 3 ).
  • Fig. 9 illustrates a view of an RF frontend on top of laminate 103/203 and an integrated substrate/laminate 203 RF frontend with fewer standalone components, according to some embodiments of the disclosure.
  • view 900 is a top view of Fig. 1 with the RF frontend (e.g., balun, bandpass filter, diplexer, triplexer, etc.) located on top of laminate 103.
  • View 901 identifies various frontend components (see 'X' mark) that can be integrated in laminate 103/203.
  • View 902 is a top view of Fig. 2 with the RF frontend integrated in substrate or laminate 103/203.
  • Fig. 10 illustrates top view 1000 of an RF module 902 of Fig. 11 with an integrated substrate RF frontend, according to some embodiments of the disclosure.
  • the metal lines embedded in laminate/substrate 203 are the various RF frontend components integrated in laminate 203.
  • the embedded components include baluns lOOla b, bandpass filter 1002a/b, and diplexer section 1003a/b as shown by the white dotted sections.
  • Fig. 11 illustrates a top view 1100 of an integrated substrate balanced bandpass filter (e.g., 1002a b), according to some embodiments of the disclosure.
  • Fig. 12 illustrates a smart device or a computer system or a SoC (System-on-
  • Chip 2500 which is partially implemented in laminate/substrate 203, according to some embodiments. It is pointed out that those elements of Fig. 12 having the same reference numbers (or names) as the elements of any other figure can operate or function in any manner similar to that described, but are not limited to such.
  • the transistors in various circuits and logic blocks described here are metal oxide semiconductor (MOS) transistors or their derivatives, where the MOS transistors include drain, source, gate, and bulk terminals.
  • the transistors and/or the MOS transistor derivatives also include Tri-Gate and FinFET transistors, Gate All Around Cylindrical Transistors, Tunneling FET (TFET), Square Wire, or Rectangular Ribbon Transistors, ferroelectric FET (FeFETs), or other devices implementing transistor functionality like carbon nanotubes or spintronic devices.
  • MOSFET symmetrical source and drain terminals i.e., are identical terminals and are interchangeably used here.
  • a TFET device on the other hand, has asymmetric Source and Drain terminals.
  • Bi-polar junction transistors— BJT PNP/NPN, BiCMOS, CMOS, etc. may be used without departing from the scope of the disclosure.
  • Fig. 12 illustrates a block diagram of an embodiment of a mobile device in which flat surface interface connectors could be used.
  • computing device 2500 represents a mobile computing device, such as a computing tablet, a mobile phone or smart-phone, a wireless-enabled e-reader, or other wireless mobile device. It will be understood that certain components are shown generally, and not all components of such a device are shown in computing device 2500.
  • computing device 2500 includes a first processor 2510
  • the various embodiments of the present disclosure may also comprise a network interface within 2570 such as a wireless interface so that a system embodiment may be incorporated into a wireless device, for example, cell phone or personal digital assistant.
  • processor 2510 can include one or more physical devices, such as microprocessors, application processors, microcontrollers, programmable logic devices, or other processing means.
  • the processing operations performed by processor 2510 include the execution of an operating platform or operating system on which applications and/or device functions are executed.
  • the processing operations include operations related to I/O (input/output) with a human user or with other devices, operations related to power management, and/or operations related to connecting the computing device 2500 to another device.
  • the processing operations may also include operations related to audio I/O and/or display I/O.
  • computing device 2500 includes audio subsystem 2520, which represents hardware (e.g., audio hardware and audio circuits) and software (e.g., drivers, codecs) components associated with providing audio functions to the computing device. Audio functions can include speaker and/or headphone output, as well as microphone input. Devices for such functions can be integrated into computing device 2500, or connected to the computing device 2500. In one embodiment, a user interacts with the computing device 2500 by providing audio commands that are received and processed by processor 2510.
  • audio subsystem 2520 represents hardware (e.g., audio hardware and audio circuits) and software (e.g., drivers, codecs) components associated with providing audio functions to the computing device. Audio functions can include speaker and/or headphone output, as well as microphone input. Devices for such functions can be integrated into computing device 2500, or connected to the computing device 2500. In one embodiment, a user interacts with the computing device 2500 by providing audio commands that are received and processed by processor 2510.
  • Display subsystem 2530 represents hardware (e.g., display devices) and software (e.g., drivers) components that provide a visual and/or tactile display for a user to interact with the computing device 2500.
  • Display subsystem 2530 includes display interface 2532, which includes the particular screen or hardware device used to provide a display to a user.
  • display interface 2532 includes logic separate from processor 2510 to perform at least some processing related to the display.
  • display subsystem 2530 includes a touch screen (or touch pad) device that provides both output and input to a user.
  • I/O controller 2540 represents hardware devices and software components related to interaction with a user. I/O controller 2540 is operable to manage hardware that is part of audio subsystem 2520 and/or display subsystem 2530. Additionally, I/O controller 2540 illustrates a connection point for additional devices that connect to computing device 2500 through which a user might interact with the system. For example, devices that can be attached to the computing device 2500 might include microphone devices, speaker or stereo systems, video systems or other display devices, keyboard or keypad devices, or other I/O devices for use with specific applications such as card readers or other devices.
  • I/O controller 2540 can interact with audio subsystem
  • display subsystem 2530 For example, input through a microphone or other audio device can provide input or commands for one or more applications or functions of the computing device 2500. Additionally, audio output can be provided instead of, or in addition to display output.
  • display subsystem 2530 includes a touch screen, the display device also acts as an input device, which can be at least partially managed by I/O controller 2540. There can also be additional buttons or switches on the computing device 2500 to provide I/O functions managed by I/O controller 2540.
  • I/O controller 2540 manages devices such as
  • the input can be part of direct user interaction, as well as providing environmental input to the system to influence its operations (such as filtering for noise, adjusting displays for brightness detection, applying a flash for a camera, or other features).
  • computing device 2500 includes power management 2550 that manages battery power usage, charging of the battery, and features related to power saving operation.
  • Memory subsystem 2560 includes memory devices for storing information in computing device 2500. Memory can include nonvolatile (state does not change if power to the memory device is interrupted) and/or volatile (state is indeterminate if power to the memory device is interrupted) memory devices. Memory subsystem 2560 can store application data, user data, music, photos, documents, or other data, as well as system data (whether long-term or temporary) related to the execution of the applications and functions of the computing device 2500.
  • the machine-readable medium may include, but is not limited to, flash memory, optical disks, CD-ROMs, DVD ROMs, RAMs, EPROMs, EEPROMs, magnetic or optical cards, phase change memory (PCM), or other types of machine-readable media suitable for storing electronic or computer-executable instructions.
  • a computer program e.g., BIOS
  • BIOS BIOS
  • a remote computer e.g., a server
  • a requesting computer e.g., a client
  • a communication link e.g., a modem or network connection
  • Connectivity 2570 includes hardware devices (e.g., wireless and/or wired connectors and communication hardware) and software components (e.g., drivers, protocol stacks) to enable the computing device 2500 to communicate with external devices.
  • the computing device 2500 could be separate devices, such as other computing devices, wireless access points or base stations, as well as peripherals such as headsets, printers, or other devices.
  • Connectivity 2570 can include multiple different types of connectivity.
  • the computing device 2500 is illustrated with cellular connectivity 2572 and wireless connectivity 2574.
  • Cellular connectivity 2572 refers generally to cellular network connectivity provided by wireless carriers, such as provided via GSM (global system for mobile communications) or variations or derivatives, CDMA (code division multiple access) or variations or derivatives, TDM (time division multiplexing) or variations or derivatives, or other cellular service standards.
  • Wireless connectivity (or wireless interface) 2574 refers to wireless connectivity that is not cellular, and can include personal area networks (such as Bluetooth, Near Field, etc.), local area networks (such as Wi-Fi), and/or wide area networks (such as WiMax), or other wireless communication.
  • various frontend components of the cellular connectivity 2574 such as antennas, baluns, diplexers, triplexers, multiplexers, bandpass filters, low pass filters, etc. are implemented as iSFE.
  • Peripheral connections 2580 include hardware interfaces and connectors, as well as software components (e.g., drivers, protocol stacks) to make peripheral connections. It will be understood that the computing device 2500 could both be a peripheral device ("to” 2582) to other computing devices, as well as have peripheral devices ("from” 2584) connected to it.
  • the computing device 2500 commonly has a "docking" connector to connect to other computing devices for purposes such as managing (e.g., downloading and/or uploading, changing, synchronizing) content on computing device 2500. Additionally, a docking connector can allow computing device 2500 to connect to certain peripherals that allow the computing device 2500 to control content output, for example, to audiovisual or other systems.
  • the computing device 2500 can make peripheral connections 1680 via common or standards-based connectors.
  • Common types can include a Universal Serial Bus (USB) connector (which can include any of a number of different hardware interfaces), DisplayPort including MiniDisplayPort (MDP), High Definition Multimedia Interface (HDMI), Firewire, or other types.
  • USB Universal Serial Bus
  • MDP MiniDisplayPort
  • HDMI High Definition Multimedia Interface
  • Firewire or other types.
  • an apparatus which comprises: a die with a first side; a first set of solder balls coupled to the die along the first side; a laminate based substrate adjacent to the first set of solder balls, the laminate based substrate having a balanced filter embedded in it, wherein the balanced filter is communicatively coupled to the first die via at least one of the solder balls of the first set.
  • the balanced filter includes: a balun, a diplexer, and a bandpass filter.
  • the balanced filter is one of a differential input balanced filter or a single-ended input balanced filter.
  • the balanced filter comprises: a first differential transmission path for a first frequency band; a second differential transmission path for a second frequency band different from the first frequency band; and a node common to the first and second differential transmission paths, the node to be coupled to an antenna.
  • frequency of the first frequency band is higher than a frequency of the second frequency band.
  • an input impedance of the first differential transmission path is to be higher for the second frequency band than an input impedance of the second differential transmission path at the second frequency band.
  • an input impedance of the second differential transmission path is to be higher for the first frequency band than an input impedance of the first differential transmission path at the first frequency band.
  • the first or second differential transmission paths comprise: input ports to be communicatively coupled to the first die; an input termination impedance coupled to the input ports; a first inductor; and a first capacitor having one terminal coupled to one of the input ports, and another terminal coupled to a first terminal of the first inductor.
  • the first or second differential transmission paths comprise: a second capacitor having one terminal coupled to one of the input ports, and another terminal coupled to a second terminal of the first inductor; and a third capacitor having one terminal coupled to the first terminal of the first inductor and another terminal coupled to the second terminal of the first inductor, wherein the third capacitor is coupled to the first and second capacitors.
  • first or second differential transmission paths comprise: a second inductor inductively coupled to the first inductor; a fourth capacitor having a first terminal coupled to a first terminal of the second inductor, and a second terminal coupled to the node common to the first and second differential transmission paths; and a fifth capacitor having a first terminal coupled to the first terminal of the second inductor and to the first terminal to the fourth capacitor.
  • the laminate based substrate has less than five layers.
  • the laminate based substrate has a thickness which is less than 30 ⁇ .
  • the apparatus comprises: a second set of solder balls adjacent to the laminate based substrate; and a printed circuit board (PCB) adjacent to the second set of solder balls.
  • the PCB has metal lines with spacing less than 50 ⁇ between the metal lines.
  • the laminate based substrate includes a balanced tri-plexer embedded in it.
  • the laminate based substrate is independent of a ground plane.
  • the laminate based substrate is independent of microvias.
  • a system is provided which comprises: a memory; an apparatus coupled to the memory, the apparatus according to the apparatus described above; and one or more antennas communicatively coupled to the apparatus.
  • an apparatus which comprises: an antenna; and a balanced triplexer coupled to the antenna, the balanced triplexer operable to multiplex signals on first, second, and third frequency bands, wherein the balanced triplexer includes: a balun, a diplexer, and a bandpass filter.
  • the balanced triplexer comprises: a first differential transmission path for the first frequency band; a second differential transmission path for the second frequency band different from the first frequency band; a third differential transmission path for the third frequency band different from the first and second frequency bands; and a node common to the first, second, and third differential transmission paths, the node to be coupled to the second antenna.
  • At least one of the first, second, and third differential transmission paths comprise: input ports to be communicatively coupled to the first die; an input termination impedance coupled to the input ports; a first inductor; and a first capacitor having one terminal coupled to one of the input ports, and another terminal coupled to a first terminal of the first inductor.
  • at least one of the first, second, and third differential transmission paths comprise: a second capacitor having one terminal coupled to one of the input ports, and another terminal coupled to a second terminal of the first inductor; and a third capacitor having one terminal coupled to the first terminal of the first inductor and another terminal coupled to the second terminal of the first inductor, wherein the third capacitor is coupled to the first and second capacitors.
  • At least one of the first, second, and third differential transmission paths comprise: a second inductor inductively coupled to the first inductor; a fourth capacitor having a first terminal coupled to a first terminal of the second inductor, and a second terminal coupled to the node common to the first and second differential transmission paths; and a fifth capacitor having a first terminal coupled to the first terminal of the second inductor and to the first terminal to the fourth capacitor.
  • At least one of the first, second, and third differential transmission paths comprise: a second capacitor having one terminal coupled to the first terminal of the first inductor and another terminal coupled to the second terminal of the first inductor, a second inductor inductively coupled to the first inductor; a third capacitor having a first terminal coupled to a first terminal of the second inductor, and a second terminal coupled to the node common to the first and second differential transmission paths; a fourth capacitor having a first terminal coupled to the first terminal of the second inductor and to the first terminal to the fourth capacitor; and a third inductor having a first terminal coupled to the second terminals of the first and second inductors, and the second terminals of the second and third capacitors, wherein a second terminal of the third inductor is coupled to ground.
  • the balanced triplexer is formed in a laminate which is independent of a ground plane.
  • a system which comprises: a memory; a processor coupled to the memory; a first set of solder balls coupled to the processor along a first side of the processor; and a laminate based substrate adjacent to the first set of solder balls, the laminate based substrate having an apparatus to the apparatus described above.
  • a method comprises: multiplexing, by a balanced triplexer, signals on first, second, and third frequency bands, wherein the balanced triplexer includes: a balun, a diplexer, and a bandpass filter.
  • the method comprises: providing a first differential transmission path for the first frequency band;
  • an apparatus which comprises: means for multiplexing signals on first, second, and third frequency bands, wherein the means for multiplexing includes: a balun, a diplexer, and a bandpass filter.
  • the apparatus comprises: means for providing a first differential transmission path for the first frequency band; means for providing a second differential transmission path for the second frequency band different from the first frequency band; means for providing a third differential transmission path for the third frequency band different from the first and second frequency bands; and means for coupling a node common to the first, second, and third differential transmission paths, to an antenna.

Landscapes

  • Filters And Equalizers (AREA)

Abstract

La présente invention concerne un appareil qui comprend : un dé ayant un premier côté; un premier ensemble de billes de soudure couplées au dé le long du premier côté; un substrat à base de stratifié adjacent au premier ensemble de billes de soudure, le substrat à base de stratifié ayant un filtre équilibré intégré en son sein, le filtre équilibré étant couplé en communication au premier dé par le biais d'au moins l'une des billes de soudure du premier ensemble.
PCT/US2016/022474 2016-03-15 2016-03-15 Extrémité avant de communication de substrat intégré ayant un filtre équilibré WO2017160280A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/US2016/022474 WO2017160280A1 (fr) 2016-03-15 2016-03-15 Extrémité avant de communication de substrat intégré ayant un filtre équilibré

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/US2016/022474 WO2017160280A1 (fr) 2016-03-15 2016-03-15 Extrémité avant de communication de substrat intégré ayant un filtre équilibré

Publications (1)

Publication Number Publication Date
WO2017160280A1 true WO2017160280A1 (fr) 2017-09-21

Family

ID=59851102

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2016/022474 WO2017160280A1 (fr) 2016-03-15 2016-03-15 Extrémité avant de communication de substrat intégré ayant un filtre équilibré

Country Status (1)

Country Link
WO (1) WO2017160280A1 (fr)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108768332A (zh) * 2018-06-29 2018-11-06 广东风华高新科技股份有限公司 一种适用于5g通讯的陶瓷滤波器
CN111465498A (zh) * 2017-10-20 2020-07-28 康宁股份有限公司 具有改进的波度的层压玻璃结构
US11729902B2 (en) 2019-02-05 2023-08-15 Intel Corporation Radio frequency front-end structures

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5543764A (en) * 1993-03-03 1996-08-06 Lk-Products Oy Filter having an electromagnetically tunable transmission zero
US20120133561A1 (en) * 2010-11-26 2012-05-31 Anand Konanur Method and apparatus for in-mold laminate antennas
US20150054511A1 (en) * 2013-08-22 2015-02-26 AMI Research & Development, LLC Nuclear quadrupole resonance system
US20150280651A1 (en) * 2014-03-28 2015-10-01 Qualcomm Incorporated Spurious signal mitigation for carrier aggregation amplifier
US20150303974A1 (en) * 2014-04-18 2015-10-22 Skyworks Solutions, Inc. Independent Multi-Band Tuning

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5543764A (en) * 1993-03-03 1996-08-06 Lk-Products Oy Filter having an electromagnetically tunable transmission zero
US20120133561A1 (en) * 2010-11-26 2012-05-31 Anand Konanur Method and apparatus for in-mold laminate antennas
US20150054511A1 (en) * 2013-08-22 2015-02-26 AMI Research & Development, LLC Nuclear quadrupole resonance system
US20150280651A1 (en) * 2014-03-28 2015-10-01 Qualcomm Incorporated Spurious signal mitigation for carrier aggregation amplifier
US20150303974A1 (en) * 2014-04-18 2015-10-22 Skyworks Solutions, Inc. Independent Multi-Band Tuning

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111465498A (zh) * 2017-10-20 2020-07-28 康宁股份有限公司 具有改进的波度的层压玻璃结构
CN111465498B (zh) * 2017-10-20 2023-10-10 康宁股份有限公司 具有改进的波度的层压玻璃结构
CN108768332A (zh) * 2018-06-29 2018-11-06 广东风华高新科技股份有限公司 一种适用于5g通讯的陶瓷滤波器
US11729902B2 (en) 2019-02-05 2023-08-15 Intel Corporation Radio frequency front-end structures

Similar Documents

Publication Publication Date Title
US11469190B2 (en) Parasitic-aware integrated substrate balanced filter and apparatus to achieve transmission zeros
US9866244B2 (en) Electromagnetic couplers for multi-frequency power detection
CN106797205B (zh) 用于形成背面管芯平面器件和saw滤波器的方法和装置
KR102371332B1 (ko) 세라믹 기판들 상에서 rf 장치들의 패키징과 관련된 장치들 및 방법들
US9553614B2 (en) Composite module
TWI511475B (zh) 模組基板及通信用模組
US20140028521A1 (en) Tuner topology for wide bandwidth
US10027029B2 (en) Matching circuit for antenna and associated method
WO2015160631A2 (fr) Multiplexeur de fréquence
US9252476B2 (en) Circuit module including a splitter and a mounting substrate
US9484608B2 (en) Switch module
CN109462411A (zh) 射频放大模块及通信终端
CN102355223A (zh) 一种单芯片gsm射频天线开关模块及gsm射频前端
CN104660232A (zh) 管理堆叠的射频设备的寄生电容和电压处理
CN109314298A (zh) 补偿电磁耦合器
WO2017160280A1 (fr) Extrémité avant de communication de substrat intégré ayant un filtre équilibré
CN115004560A (zh) 阻抗匹配收发器
US9515384B2 (en) Apparatus and method for setting antenna resonant mode of multi-port antenna structure
US11024574B2 (en) Integrated substrate communication frontend
US20200091094A1 (en) Integrated filter technology with embedded devices
US9362883B2 (en) Passive radio frequency signal handler
CN110767606B (zh) 一种具有复合功能的电子元器件及其制造方法
CN209088930U (zh) 射频放大模块及通信终端
CN115943564B (zh) 用于射频滤波器的混合钉扎封装
JP2005287085A (ja) 送受信端回路装置

Legal Events

Date Code Title Description
NENP Non-entry into the national phase

Ref country code: DE

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 16894739

Country of ref document: EP

Kind code of ref document: A1

122 Ep: pct application non-entry in european phase

Ref document number: 16894739

Country of ref document: EP

Kind code of ref document: A1