WO2017156839A1 - 具有电源管理芯片的电源的辅助电路 - Google Patents

具有电源管理芯片的电源的辅助电路 Download PDF

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Publication number
WO2017156839A1
WO2017156839A1 PCT/CN2016/081201 CN2016081201W WO2017156839A1 WO 2017156839 A1 WO2017156839 A1 WO 2017156839A1 CN 2016081201 W CN2016081201 W CN 2016081201W WO 2017156839 A1 WO2017156839 A1 WO 2017156839A1
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Prior art keywords
circuit
switch
input signal
turned
controlling
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PCT/CN2016/081201
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English (en)
French (fr)
Inventor
曹丹
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深圳市华星光电技术有限公司
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Priority to US15/114,652 priority Critical patent/US10170977B2/en
Publication of WO2017156839A1 publication Critical patent/WO2017156839A1/zh

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/44—Circuits or arrangements for compensating for electromagnetic interference in converters or inverters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/16—Modifications for eliminating interference voltages or currents
    • H03K17/161—Modifications for eliminating interference voltages or currents in field-effect transistor switches
    • H03K17/165—Modifications for eliminating interference voltages or currents in field-effect transistor switches by feedback from the output circuit to the control circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/22—Modifications for ensuring a predetermined initial state when the supply voltage has been applied
    • H03K17/223—Modifications for ensuring a predetermined initial state when the supply voltage has been applied in field-effect transistor switches
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/78—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used using opto-electronic devices, i.e. light-emitting and photoelectric devices electrically- or optically-coupled
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/06—Handling electromagnetic interferences [EMI], covering emitted as well as received electromagnetic radiation
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/12—Test circuits or failure detection circuits included in a display system, as permanent part thereof
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/20—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits

Definitions

  • the present invention generally relates to an auxiliary circuit and, more particularly, to an auxiliary circuit having a power supply for a power management chip.
  • a power management chip (English name: Power Management IC, PMIC for short) and a peripheral circuit are usually formed into a circuit having a specific function, such as a boost circuit, a step-down circuit, and the like.
  • the power management chip switch in the power supply composed of the power management chip and the peripheral circuit is usually connected in series with an RC.
  • the circuit shown in FIG. 1, however, in the above solution, although the electromagnetic interference problem is improved, the switching loss of the internal field effect transistor of the power management chip becomes large, so that the working efficiency of the power management chip is degraded.
  • an object of the present invention is to provide an auxiliary circuit for a power supply having a power management chip to solve the problem of the power management chip inside the existing power supply chip switch pin-to-ground series RC circuit.
  • the switching loss of the FET becomes large, which causes the power management chip to work less.
  • the invention provides an auxiliary circuit with a power supply of a power management chip, comprising: a detection circuit for generating an input signal; and a signal generation circuit for generating a control signal for controlling whether the switch is turned on or off according to an input signal generated by the detection circuit; And an RC circuit; the switch is turned on or off in response to the control signal; wherein, when the switch is turned on, the switch causes the power management chip, the RC circuit, and the ground to be connected in series.
  • the detecting circuit includes: a first detecting sub-circuit, detecting an input current input to the power source, and generating a first input signal for controlling whether the switch is turned on or off according to the detected input current a second detecting sub-circuit detecting an output current output by the power source and generating an output current according to the detected output current Generating a second input signal for controlling whether the switch is turned on or off; the third detecting sub-circuit detects a mode in which the display device where the power source is located, and generates a control switch to be turned on or off according to the detected mode. a third input signal, wherein the signal generating circuit generates a control signal for controlling the switch to be turned on or off according to the first input signal, the second input signal, and the third input signal.
  • the signal generating circuit when the first input signal, the second input signal, and the third input signal are both used to control the switch to be turned on, the signal generating circuit generates a control signal that controls the switch to be turned on; when the first input signal and the second input signal are When the third input signal is not used to control the switch to be turned on, the signal generating circuit generates a control signal for controlling the switch to be turned off.
  • the first detecting sub-circuit includes a first photocoupler and a first comparator, wherein the first photocoupler detects an input current input to the power source, and performs the detected input current Coupling, the first comparator compares the first voltage coupled by the first photocoupler with the first reference voltage, and generates a first input signal for controlling the switch to be turned on or off according to the comparison result.
  • the first comparator when the first voltage is greater than the first reference voltage, the first comparator generates a first input signal for controlling the switch to be turned on, and when the first voltage is less than the first reference voltage, the first comparator generates A first input signal that controls the switch to be turned off.
  • the second detecting sub-circuit includes: a second photocoupler and a second comparator, wherein the second photocoupler detects an output current output by the power source, and detects the output current Coupling, the second comparator compares the second voltage coupled by the second photocoupler with the second reference voltage, and generates a second input signal for controlling the switch to be turned on or off according to the comparison result.
  • the second comparator when the second voltage is greater than the second reference voltage, the second comparator generates a second input signal for controlling the switch to be turned on, and when the second voltage is less than the second reference voltage, the second comparator is generated for A second input signal that controls the switch to be turned off.
  • the third detecting sub-circuit when the third detecting sub-circuit detects that the display device where the power management chip is located is in the electromagnetic interference test mode, the third detecting sub-circuit provides a third input signal for controlling the switch to be turned on.
  • the third detecting sub-circuit detects that the display device where the power management chip is located is in the normal mode, the third detecting sub-circuit provides a third input signal for controlling the switch to be turned off.
  • the third detection sub-circuit is a timing controller.
  • the signal generating circuit is an AND circuit.
  • An auxiliary circuit having a power supply of a power management chip may be In order to selectively control the timing of the power management chip switch pin-to-ground RC circuit, not only can the electromagnetic interference problem be solved, but also the working efficiency of the power management chip can be considered.
  • FIG. 1 is a structural view showing a power supply of an RC circuit connected in series in the prior art
  • FIG. 2 is a block diagram showing an auxiliary circuit of a power supply having a power management chip according to an embodiment of the present invention
  • FIG. 3 is a structural diagram showing an example of a detecting circuit in the auxiliary circuit shown in FIG. 2;
  • FIG. 4 is a circuit diagram showing an auxiliary circuit of a power supply having a power management chip according to an embodiment of the present invention.
  • FIG. 2 is a block diagram showing an auxiliary circuit of a power supply having a power management chip according to an embodiment of the present invention.
  • an auxiliary circuit of a power supply having a power management chip includes a detecting circuit 110, a signal generating circuit 120, an RC circuit 130, and a switch 140.
  • the detection circuit 110 generates an input signal.
  • the signal generating circuit 120 generates a control signal for controlling the switch 140 to be turned on or off based on the input signal generated by the detecting circuit 110.
  • the signal generating circuit 120 may be any unit circuit that can implement basic logic operations and compound logic operations, such as AND gate circuits, OR gate circuits, NOT gate circuits, and the like.
  • the switch 140 is turned on or off in response to the control signal.
  • the switch 140 may be a field effect transistor such as an NMOS transistor or a PMOS transistor used as an electronic switch. Specifically, when the switch When the switch 140 is turned on, the switch 140 causes the power management chip 150, the RC circuit 130, and the ground 160 to be connected in series. Accordingly, when the switch 140 is turned off, the switch 140 causes the power management chip 150, the RC circuit 130, and the ground 160 not to be connected in series. .
  • the setting position of the switch 140 is not limited to be between the RC circuit 130 and the ground 150, and may be disposed at any other position where the power management chip 150, the RC circuit 130, and the ground 160 may be connected in series, for example, The switch 140 is disposed between the power management chip 150 and the RC circuit 130.
  • the power management chip, the RC circuit and the ground can be controlled in series by the switch, which effectively solves the adverse effect on the power management chip when the RC circuit is always connected in series between the power management chip and the ground.
  • FIG. 3 is a block diagram showing an example of the detecting circuit 110 in the auxiliary circuit shown in FIG. 2.
  • the detecting circuit 110 can include: a first detecting sub-circuit 111, a second detecting sub-circuit 112, and a third detecting sub-circuit 113.
  • the first detecting sub-circuit 111 detects an input current input to the power source, and generates a first input signal for controlling the switch 140 to be turned on or off according to the detected input current.
  • the second detecting sub-circuit 112 detects an output current output by the power source, and generates a second input signal for controlling the switch to be turned on or off according to the detected output current.
  • the third detecting sub-circuit 113 detects a mode in which the display device in which the power source is located, and generates a third input signal for controlling the switch to be turned on or off according to the detected mode.
  • the mode in which the display device in which the power source is located refers to a normal mode or an electromagnetic interference test mode (EMI mode).
  • EMI mode electromagnetic interference test mode
  • the third detecting sub-circuit 113 detects that the display device where the power management chip 150 is located is in the electromagnetic interference test mode
  • the third detecting sub-circuit 113 provides a third for controlling the conduction of the switch 140.
  • the input signal when the third detecting sub-circuit 113 detects that the display device in which the power management chip 150 is located is in the normal mode, the third detecting sub-circuit 113 provides a third input signal for controlling the switch 140 to be turned off.
  • the third detection sub-circuit 113 can be a timing controller.
  • the signal generating circuit 120 can generate a control signal for controlling the switch 140 to be turned on or off according to the first input signal, the second input signal, and the third input signal. Specifically, when the first input signal S1, the second input signal S2, and the third input signal S3 are both used to control the switch 140 to be turned on, the signal generating circuit 120 generates a control signal that controls the switch 140 to be turned on; when the first input When the signal, the second input signal, and the third input signal are not all used to control the switch 140 to be turned on, the signal generating circuit 120 generates a control signal that controls the switch 140 to turn off. For example, when the switch 140 is an NMOS transistor, it receives a high level.
  • the signal generating circuit 120 is an AND circuit, when the first input signal, the second input signal, and the third input signal are both high level signals, the output generated by the signal generating circuit 120
  • the signal is a high level signal that causes switch 140 to conduct.
  • the first detecting sub-circuit 111 may include a first photocoupler U24 and a first comparator OP1. Further, the first photocoupler U24 may further include a first resistor R174 and a second resistor R147. Specifically, the first end 11 of the first photocoupler U24 is connected to the voltage source VCC, the second end 12 of the first photocoupler U24 is connected to one end of the inductor L5, and the other end of the inductor L5 is connected to the switch control of the power management chip 150.
  • the pin (SW pin), the technical solution provided by the embodiment of the present invention is exemplified by the power management chip of the HX5562R11U model, but the invention is not limited thereto, and may be another type of power management chip), the first photocoupler U24
  • the third end 13 is connected to one end of the first resistor R174, the other end of the first resistor R174 is grounded, the fourth end 14 of the first photocoupler U24 is connected to one end of the second resistor R147, and the other end of the second resistor R147 is connected to the voltage.
  • the source VCC, the positive input terminal of the first comparator OP1 is connected to the third terminal 13 of the first photocoupler U24, and the negative input terminal of the first comparator OP1 is connected to the first reference voltage Vref1, and the output of the first comparator OP1
  • the terminal is coupled to the first input 31 of the signal generating module 120.
  • the second detecting sub-circuit 112 includes a second photocoupler U17 and a second comparator OP2.
  • the second photocoupler U17 may further include a third resistor R171 and a fourth resistor R134.
  • the first end 21 of the first photocoupler U17 is connected to one end of the capacitor C75
  • the other end of the capacitor C75 is connected to one end of the fifth resistor R144
  • the other end of the fifth resistor R144 is connected to the gate of the power management chip 150.
  • the technical solution provided by the embodiment of the present invention is exemplified by the power management chip of the HX5562R11U model, but the present invention is not limited thereto, and may be another type of power management chip), and the second photocoupler U17
  • the second end 22 of the second photocoupler U17 is connected to one end of the third resistor R171, the other end of the third resistor R171 is grounded, and the fourth end 24 of the second photocoupler U17 is connected.
  • One end of the fourth resistor R134, the other end of the fourth resistor R134 is connected to the voltage source VCC, the forward input end of the first comparator OP2 is connected to the third end 23 of the second photocoupler U17, and the negative direction of the second comparator OP2
  • the input terminal is connected to the second reference voltage Vref2, and the output of the first comparator OP2 is connected to the second input terminal 32 of the signal generating module 120.
  • the third detecting circuit 113 is a timing controller T-CON, wherein the electromagnetic interference test pin of the timing controller T-CON (ie, the EMI Test pin) is connected to the third input terminal of the signal generating module 120.
  • the signal generation module 120 is an AND gate circuit, wherein the AND gate circuit of the embodiment of the present invention has three input terminals and one output terminal, and the three input terminals respectively receive the first input signal, the second input signal, and the The three-input signal is connected to the switch 140 at the output of the AND circuit, and the switch 140 is controlled to be turned on or off by the output control signal.
  • the first photocoupler U24 detects an input current input to the power source VCC, and couples the detected input current
  • the first comparator OP1 couples the first voltage after the first photocoupler U24 Va is compared with the first reference voltage Vref1, and generates a first input signal for controlling the switch 140 to be turned on or off according to the comparison result, for example, when the first voltage Va is greater than the first reference voltage Vref1, the first comparator OP1 A first input signal for controlling the conduction of the switch 140 is generated.
  • the first comparator OP1 When the first voltage Va is smaller than the first reference voltage Vref1, the first comparator OP1 generates a first input signal for controlling the switch 140 to be turned off.
  • the input current flowing through the first end 11 to the second end 12 of the first photocoupler U24 will increase, according to The working principle of the photocoupler, the current of the first end 11 to the second end of the first photocoupler U24 increases, which inevitably increases the current of the third end 13 to the fourth end 14 of the first photocoupler U24, thereby flowing
  • the current of R174 increases, the voltage at the third terminal 13 of the first photocoupler U24 (ie, the voltage Va at node a) increases, when the voltage Va at the third terminal 13 of the first photocoupler U24 is greater than the first
  • the output terminal of the first comparator OP1 outputs a first input signal for controlling the conduction of the switch 140 when the voltage Va at the third terminal 13 of the first photocoupler U24 is smaller than the first reference voltage Vref1.
  • the output of the first comparator OP1 outputs a first input signal for controlling the conduction of the switch 140 when the voltage Va at the third terminal 13 of the first photocoupler U24 is smaller than the first reference
  • the second photocoupler U17 detects the output current output by the power source VAA and couples the detected output current, and the second comparator OP2 couples the second voltage Vb coupled with the second photocoupler U17 with the second
  • the reference voltage Vref2 is compared, and a second input signal for controlling the switch 140 to be turned on or off is generated based on the comparison result. For example, when the second voltage Vb is greater than the second reference voltage Vref2, the second comparator OP2 generates a second input signal for controlling the switch 140 to be turned on, and when the second voltage Vb is smaller than the second reference voltage Vref2, the second comparison The OP2 generates a second input signal for controlling the switch 140 to be turned off.
  • the first end of the second photocoupler U17 flows.
  • the output current of 21 to the second end 22 will increase, and according to the working principle of the photocoupler, the first end of the second photocoupler U17
  • the increase in current from 21 to the second terminal 22 necessarily causes the current of the third end 23 to the fourth end 24 of the second photocoupler U17 to increase, so that the current flowing through R171 increases, and the third end of the second photocoupler U17
  • the voltage at 23 i.e., the voltage Vb at node b
  • the output of the first comparator OP2 is output for Controlling the second input signal of the switch 140, when the Vb voltage of the third terminal 23 of the first photocoupler U24 is less than the second reference voltage Vref2, the output of the second comparator OP2 is output
  • the timing controller T-CON detects a mode in which the display device in which the power source is located, and generates a third input signal for controlling the switch 140 to be turned on or off according to the detected mode. For example, when the timing controller T-CON detects that the display device in which the power management chip 150 is located is in the electromagnetic interference test mode, the timing controller T-CON supplies the AND circuit with a third for controlling the conduction of the switch 140. The input signal, when the timing controller T-CON detects that the display device in which the power management chip 150 is located is in the normal mode, the timing controller T-CON provides a third input signal for controlling the switch 140 to be turned off.
  • the AND gate After receiving the first input signal, the second input signal, and the third input signal, the AND gate generates a control signal for controlling the switch 140 to be turned on or off according to the first input signal, the second input signal, and the third input signal.
  • the switch 140 is an NMOS
  • the AND circuit 120 when the first input signal, the second input signal, and the third input signal are both high level signals, the AND circuit 120 generates a high level signal that controls the switch 140 to be turned on, so that the switch The 140 is turned on, so that the power management chip 150, the RC circuit 140, and the ground 160 can be connected in series.
  • the other circuits in Figure 4 act as boosters.
  • the auxiliary circuit of the power supply with the power management chip can selectively control the timing of the power management chip to the series RC circuit in the ground, and can not only solve the electromagnetic interference problem, but also take into consideration The efficiency of the power management chip.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Electronic Switches (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

一种具有电源管理芯片（160）的电源的辅助电路，其中，所述辅助电路包括：侦测电路（110），产生输入信号；信号发生电路（120），根据侦测电路（110）产生的输入信号产生用于控制开关（140）导通或截止的控制信号；RC电路（130）；开关（140），响应于所述控制信号导通或截止；其中，当开关（140）导通时，开关（140）使得所述电源管理芯片（160）、RC电路（130）、地（150）串联。根据所述辅助电路，能够有效防止在电源管理芯片（160）对地（150）串联一个RC电路（130）的情况下，由于电源管理芯片（160）内部场效应管的切换损耗变大而导致的电源管理芯片（160）工作效率下降的问题。

Description

具有电源管理芯片的电源的辅助电路 技术领域
本发明总体说来涉及一种辅助电路，更具体地讲，尤其涉及一种具有电源管理芯片的电源的辅助电路。
背景技术
目前，通常将电源管理芯片(英文全称：Power Management IC，简称：PMIC)与外围电路形成一个具有特定功能的电路，例如升压电路、降压电路等。在显示装置测试领域，为了解决显示装置的电磁干扰(英文全称：Electromagnetic Interference，简称：EMI)问题，通常将电源管理芯片与外围电路组成的电源中的电源管理芯片开关引脚对地串联一个RC电路(如图1所示)，然而，在上述方案中，虽然电磁干扰问题得到了改善，但是导致电源管理芯片内部场效应管的切换损耗变大，从而使得电源管理芯片的工作效率下降。
发明内容
有鉴于此，本发明的目的是提供一种具有电源管理芯片的电源的辅助电路，以解决在现有的在电源管理芯片开关引脚对地串联一个RC电路的情况下，由于电源管理芯片内部场效应管的切换损耗变大而导致的电源管理芯片工作效率下降的问题。
本发明提供一种具有电源管理芯片的电源的辅助电路，包括：侦测电路，产生输入信号；信号发生电路，根据侦测电路产生的输入信号产生用于控制开关导通或截止的控制信号；RC电路；开关，响应于所述控制信号导通或截止；其中，当开关导通时，开关使得所述电源管理芯片、RC电路、地串联。
可选地，所述侦测电路包括：第一侦测子电路，侦测输入到所述电源的输入电流，并根据侦测的输入电流产生用于控制开关导通或截止的第一输入信号；第二侦测子电路，侦测所述电源所输出的输出电流，并根据侦测的输出电流产 生用于控制开关导通或截止的第二输入信号；第三侦测子电路，检测所述电源所在的显示装置所处的模式，根据检测到的模式产生用于控制开关导通或截止的第三输入信号，其中，信号发生电路根据第一输入信号、第二输入信号和第三输入信号产生用于控制开关导通或截止的控制信号。
可选地，当第一输入信号、第二输入信号和第三输入信号都用于控制开关导通时，信号发生电路产生控制开关导通的控制信号；当第一输入信号、第二输入信号和第三输入信号不都用于控制开关导通时，信号发生电路产生控制开关截止的控制信号
可选地，所述第一侦测子电路包括第一光电耦合器和第一比较器，其中，第一光电耦合器侦测输入到所述电源的输入电流，并对侦测的输入电流进行耦合，第一比较器将第一光电耦合器耦合后的第一电压与第一参考电压进行比较，并根据比较结果产生用于控制开关导通或截止的第一输入信号。
可选地，当第一电压大于第一参考电压时，第一比较器产生用于控制开关导通的第一输入信号，当第一电压小于第一参考电压时，第一比较器产生用于控制开关截止的第一输入信号。
可选地，所述第二侦测子电路包括：第二光电耦合器和第二比较器，其中，第二光电耦合器侦测所述电源所输出的输出电流，并对侦测的输出电流进行耦合，第二比较器将第二光电耦合器耦合后的第二电压与第二参考电压进行比较，并根据比较结果产生用于控制开关导通或截止的第二输入信号。
可选地，当第二电压大于第二参考电压时，第二比较器产生用于控制开关导通的第二输入信号，当第二电压小于第二参考电压时，第二比较器产生用于控制开关截止的第二输入信号。
可选地，当第三侦测子电路检测到电源管理芯片所在的显示装置处于电磁干扰测试模式下时，所述第三侦测子电路提供用于控制开关导通的第三输入信号，当第三侦测子电路检测到电源管理芯片所在的显示装置处于正常模式下时，所述第三侦测子电路提供用于控制开关截止的第三输入信号。
可选地，所述第三侦测子电路为时序控制器。
可选地，所述信号发生电路为与门电路。
根据本发明示例性实施例提供的具有电源管理芯片的电源的辅助电路，可 以有选择地控制电源管理芯片开关引脚对地串联RC电路的时机，不仅能够解决电磁干扰问题，还能兼顾电源管理芯片的工作效率。
附图说明
通过下面结合附图进行的详细描述，本发明示例性实施例的上述和其它目的、特点和优点将会变得更加清楚，其中：
图1示出现有技术中串联有RC电路的电源的结构图；
图2示出本发明的一个实施例的具有电源管理芯片的电源的辅助电路的结构图；
图3示出图2所示出的辅助电路中的侦测电路的一个示例的结构图；
图4示出本发明的一个实施例的具有电源管理芯片的电源的辅助电路的电路图。
具体实施方式
现在，将参照附图更充分地描述不同的示例实施例，其中，一些示例性实施例在附图中示出，其中，相同的标号始终表示相同的部件。
图2示出本发明的一个实施例的具有电源管理芯片的电源的辅助电路的结构图。
如图2所示，根据本发明的具有电源管理芯片的电源的辅助电路包括：侦测电路110、信号发生电路120、RC电路130和开关140。
具体说来，侦测电路110产生输入信号。
信号发生电路120根据侦测电路110产生的输入信号产生用于控制开关140导通或截止的控制信号。这里，作为示例，所述信号发生电路120可以是任何可实现基本逻辑运算和复合逻辑运算的单元电路，例如与门电路、或门电路、非门电路等。
开关140响应于所述控制信号导通或截止，这里，作为示例，所述开关140可以是被用作电子开关的NMOS管、PMOS管等场效应管，具体说来，当开关 140导通时，开关140使得所述电源管理芯片150、RC电路130、地160串联，相应地，当开关140截止时，开关140使得所述电源管理芯片150、RC电路130、地160不串联。这里，应注意，开关140的设置位置并不限于在RC电路130与地150之间，还可以设置于其他任何可以实现将电源管理芯片150、RC电路130、地160串联的位置，例如，可以将开关140设置在电源管理芯片150和RC电路130之间。
通过上述方式，可以通过开关来控制电源管理芯片、RC电路和地是否串联，有效解决了当RC电路一直串联在电源管理芯片与地之间时给电源管理芯片造成的不利影响。
图3示出图2所示出的辅助电路中的侦测电路110的一个示例的结构图。
如图3所示，侦测电路110可包括：第一侦测子电路111、第二侦测子电路112和第三侦测子电路113。
第一侦测子电路111侦测输入到所述电源的输入电流，并根据侦测的输入电流产生用于控制开关140导通或截止的第一输入信号。
第二侦测子电路112侦测所述电源所输出的输出电流，并根据侦测的输出电流产生用于控制开关导通或截止的第二输入信号。
第三侦测子电路113检测所述电源所在的显示装置所处的模式，根据检测到的模式产生用于控制开关导通或截止的第三输入信号。这里，所述电源所在的显示装置所处的模式是指正常模式或电磁干扰测试模式(EMI模式)。具体说来，当第三侦测子电路113检测到电源管理芯片150所在的显示装置处于电磁干扰测试模式下时，所述第三侦测子电路113提供用于控制开关140导通的第三输入信号，当第三侦测子电路113检测到电源管理芯片150所在的显示装置处于正常模式下时，所述第三侦测子电路113提供用于控制开关140截止的第三输入信号。作为示例，所述第三侦测子电路113可以是时序控制器。
其中，信号发生电路120可根据第一输入信号、第二输入信号和第三输入信号产生用于控制开关140导通或截止的控制信号。具体说来，当第一输入信号S1、第二输入信号S2和第三输入信号S3都用于控制开关140导通时，信号发生电路120产生控制开关140导通的控制信号；当第一输入信号、第二输入信号和第三输入信号不都用于控制开关140导通时，信号发生电路120产生控制开关140截止的控制信号。例如，当开关140为NMOS管，在接收到高电平 信号时导通，那么，在信号发生电路120为与门电路的情况下，当第一输入信号、第二输入信号和第三输入信号都为高电平信号时，信号发生电路120产生的输出信号为高电平信号，可以使得开关140导通。
下面，将结合图4来详细描述根据本发明示例性实施例的具有电源管理芯片的电源的辅助电路的电路图。
如图4所示，作为示例，第一侦测子电路111可包括第一光电耦合器U24和第一比较器OP1。此外，第一光电耦合器U24还可包括第一电阻R174和第二电阻R147。具体说来，第一光电耦合器U24的第一端11连接电压源VCC，第一光电耦合器U24的第二端12连接电感L5的一端，电感L5的另一端连接电源管理芯片150的开关控制引脚(SW引脚，本发明的实施例提供的技术方案以HX5562R11U型号的电源管理芯片为例，但是本发明不限于此，也可以是其他型号的电源管理芯片)，第一光电耦合器U24的第三端13连接第一电阻R174的一端，第一电阻R174的另一端接地，第一光电耦合器U24的第四端14连接第二电阻R147的一端，第二电阻R147的另一端连接电压源VCC，第一比较器OP1的正向输入端连接第一光电耦合器U24的第三端13，第一比较器OP1的负向输入端连接第一参考电压Vref1，第一比较器OP1的输出端连接信号发生模块120的第一输入端31。
此外，作为示例，所述第二侦测子电路112包括：第二光电耦合器U17和第二比较器OP2。此外，第二光电耦合器U17还可包括第三电阻R171和第四电阻R134。具体说来，第一光电耦合器U17的第一端21连接电容C75的一端，电容C75的另一端连接第五电阻R144的一端，第五电阻R144的另一端连接电源管理芯片150的栅极控制引脚(GD引脚，本发明的实施例提供的技术方案以HX5562R11U型号的电源管理芯片为例，但是本发明不限于此，也可以是其他型号的电源管理芯片)，第二光电耦合器U17的第二端22连接输出电压VAA，第二光电耦合器U17的第三端23连接第三电阻R171的一端，第三电阻R171的另一端接地，第二光电耦合器U17的第四端24连接第四电阻R134的一端，第四电阻R134的另一端连接电压源VCC，第一比较器OP2的正向输入端连接第二光电耦合器U17的第三端23，第二比较器OP2的负向输入端连接第二参考电压Vref2，第一比较器OP2的输出端连接信号发生模块120的第二输入端32。
作为示例，第三侦测电路113为时序控制器T-CON，其中，时序控制器T-CON的电磁干扰测试引脚(即，EMI Test pin)连接信号发生模块120的第三输入端 33。这里，信号发生模块120为与门电路，其中，本发明实施例的与门电路具有三个输入端和一个输出端，所述三个输入端分别接收第一输入信号、第二输入信号和第三输入信号，与门电路的输出端与开关140相连接，通过输出的控制信号来控制开关140的导通或截止。
以下，对根据本发明示例性实施例的具有电源管理芯片的辅助电路的工作原理进行描述。
具体说来，第一光电耦合器U24侦测输入到所述电源VCC的输入电流，并对侦测的输入电流进行耦合，第一比较器OP1将第一光电耦合器U24耦合后的第一电压Va与第一参考电压Vref1进行比较，并根据比较结果产生用于控制开关140导通或截止的第一输入信号，例如，当第一电压Va大于第一参考电压Vref1时，第一比较器OP1产生用于控制开关140导通的第一输入信号，当第一电压Va小于第一参考电压Vref1时，第一比较器OP1产生用于控制开关140截止的第一输入信号。换言之，即当电源管理芯片150所在的显示装置从正常模式转换成电磁干扰测试模式时，则流过第一光电耦合器U24的第一端11到第二端12的输入电流将增大，根据光电耦合器的工作原理，第一光电耦合器U24的第一端11到第二端的电流增加，必然使得第一光电耦合器U24的第三端13到第四端14的电流增加，从而流过R174的电流增加，第一光电耦合器U24的第三端13处的电压(即，节点a处的电压Va)增加，当第一光电耦合器U24的第三端13处的电压Va大于第一参考电压Vref1时，第一比较器OP1的输出端输出用于控制开关140导通的第一输入信号，当第一光电耦合器U24的第三端13处的电压Va小于第一参考电压Vref1时，第一比较器OP1的输出端输出用于控制开关140截止的第一输入信号。
第二光电耦合器U17侦测所述电源VAA所输出的输出电流，并对侦测的输出电流进行耦合，第二比较器OP2将第二光电耦合器U17耦合后的第二电压Vb与第二参考电压Vref2进行比较，并根据比较结果产生用于控制开关140导通或截止的第二输入信号。例如，当第二电压Vb大于第二参考电压Vref2时，第二比较器OP2产生用于控制开关140导通的第二输入信号，当第二电压Vb小于第二参考电压Vref2时，第二比较器OP2产生用于控制开关140截止的第二输入信号，换言之，当电源管理芯片150所在的显示装置从正常模式转换成电磁干扰测试模式时，则流过第二光电耦合器U17的第一端21到第二端22的输出电流将增大，根据光电耦合器的工作原理，第二光电耦合器U17的第一端 21到第二端22的电流增加，必然使得第二光电耦合器U17的第三端23到第四端24的电流增加，从而流过R171的电流增加，第二光电耦合器U17的第三端23处的电压(即，节点b处的电压Vb)增加，当第二光电耦合器U17的第三端23处电压Vb大于第二参考电压Vref2时，第一比较器OP2的输出端输出用于控制开关140导通的第二输入信号，当第一光电耦合器U24的第三端23的Vb电压小于第二参考电压Vref2时，第二比较器OP2的输出端输出用于控制开关140截止的第二输入信号。
时序控制器T-CON检测所述电源所在的显示装置所处的模式，根据检测到的模式产生用于控制开关140导通或截止的第三输入信号。例如，当时序控制器T-CON检测到电源管理芯片150所在的显示装置处于电磁干扰测试模式下时，所述时序控制器T-CON向与门电路提供用于控制开关140导通的第三输入信号，当时序控制器T-CON检测到电源管理芯片150所在的显示装置处于正常模式下时，所述时序控制器T-CON提供用于控制开关140截止的第三输入信号。
与门电路在接收到第一输入信号、第二输入信号和第三输入信号之后，根据第一输入信号、第二输入信号和第三输入信号产生用于控制开关140导通或截止的控制信号。例如，在开关140为NMOS时，当第一输入信号、第二输入信号和第三输入信号都为高电平信号时，与门电路120产生控制开关140导通的高电平信号，使得开关140导通，从而可以使得所述电源管理芯片150、RC电路140、地160串联。此外，图4中的其他电路起升压作用。
综上所述，在根据本发明示例性实施例的具有电源管理芯片的电源的辅助电路，可以有选择地控制电源管理芯片对地串联RC电路的时机，不仅能够解决电磁干扰问题，还能兼顾电源管理芯片的工作效率。
显然，本发明的保护范围并不局限于上诉的具体实施方式，本领域的技术人员可以对发明进行各种改动和变型而不脱离本发明的精神和范围。这样，倘若本发明的这些修改和变型属于本发明权利要求及其等同技术的范围之内，则本发明也意图包含这些改动和变型在内。

Claims (10)

  1. 一种具有电源管理芯片的电源的辅助电路，其中，所述辅助电路包括：
    侦测电路，产生输入信号；
    信号发生电路，根据侦测电路产生的输入信号产生用于控制开关导通或截止的控制信号；
    RC电路；
    开关，响应于所述控制信号导通或截止；
    其中，当开关导通时，开关使得所述电源管理芯片、RC电路、地串联。
  2. 如权利要求1所述的辅助电路，其中，所述侦测电路包括：
    第一侦测子电路，侦测输入到所述电源的输入电流，并根据侦测的输入电流产生用于控制开关导通或截止的第一输入信号；
    第二侦测子电路，侦测所述电源所输出的输出电流，并根据侦测的输出电流产生用于控制开关导通或截止的第二输入信号；
    第三侦测子电路，检测所述电源所在的显示装置所处的模式，根据检测到的模式产生用于控制开关导通或截止的第三输入信号，
    其中，信号发生电路根据第一输入信号、第二输入信号和第三输入信号产生用于控制开关导通或截止的控制信号。
  3. 如权利要求2所述的辅助电路，其中，当第一输入信号、第二输入信号和第三输入信号都用于控制开关导通时，信号发生电路产生控制开关导通的控制信号；当第一输入信号、第二输入信号和第三输入信号不都用于控制开关导通时，信号发生电路产生控制开关截止的控制信号。
  4. 如权利要求2所述的辅助电路，其中，所述第一侦测子电路包括第一光电耦合器和第一比较器，
    其中，第一光电耦合器侦测输入到所述电源的输入电流，并对侦测的输入电流进行耦合，第一比较器将第一光电耦合器耦合后的第一电压与第一参考电 压进行比较，并根据比较结果产生用于控制开关导通或截止的第一输入信号。
  5. 如权利要求4所述的辅助电路，其中，当第一电压大于第一参考电压时，第一比较器产生用于控制开关导通的第一输入信号，当第一电压小于第一参考电压时，第一比较器产生用于控制开关截止的第一输入信号。
  6. 如权利要求2所述的辅助电路，其中，所述第二侦测子电路包括：第二光电耦合器和第二比较器，
    其中，第二光电耦合器侦测所述电源所输出的输出电流，并对侦测的输出电流进行耦合，第二比较器将第二光电耦合器耦合后的第二电压与第二参考电压进行比较，并根据比较结果产生用于控制开关导通或截止的第二输入信号。
  7. 如权利要求6所述的辅助电路，其中，当第二电压大于第二参考电压时，第二比较器产生用于控制开关导通的第二输入信号，当第二电压小于第二参考电压时，第二比较器产生用于控制开关截止的第二输入信号。
  8. 如权利要求2所述的辅助电路，其中，当第三侦测子电路检测到电源管理芯片所在的显示装置处于电磁干扰测试模式下时，所述第三侦测子电路提供用于控制开关导通的第三输入信号，当第三侦测子电路检测到电源管理芯片所在的显示装置处于正常模式下时，所述第三侦测子电路提供用于控制开关截止的第三输入信号。
  9. 如权利要求8所述的辅助电路，其中，所述第三侦测子电路为时序控制器。
  10. 如权利要求1所述的辅助电路，其中，所述信号发生电路为与门电路。
PCT/CN2016/081201 2016-03-16 2016-05-06 具有电源管理芯片的电源的辅助电路 WO2017156839A1 (zh)

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